hyperv.c 43 KB

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  1. /*
  2. * KVM Microsoft Hyper-V emulation
  3. *
  4. * derived from arch/x86/kvm/x86.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. * Copyright (C) 2008 Qumranet, Inc.
  8. * Copyright IBM Corporation, 2008
  9. * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10. * Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com>
  11. *
  12. * Authors:
  13. * Avi Kivity <avi@qumranet.com>
  14. * Yaniv Kamay <yaniv@qumranet.com>
  15. * Amit Shah <amit.shah@qumranet.com>
  16. * Ben-Ami Yassour <benami@il.ibm.com>
  17. * Andrey Smetanin <asmetanin@virtuozzo.com>
  18. *
  19. * This work is licensed under the terms of the GNU GPL, version 2. See
  20. * the COPYING file in the top-level directory.
  21. *
  22. */
  23. #include "x86.h"
  24. #include "lapic.h"
  25. #include "ioapic.h"
  26. #include "hyperv.h"
  27. #include <linux/kvm_host.h>
  28. #include <linux/highmem.h>
  29. #include <linux/sched/cputime.h>
  30. #include <linux/eventfd.h>
  31. #include <asm/apicdef.h>
  32. #include <trace/events/kvm.h>
  33. #include "trace.h"
  34. static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint)
  35. {
  36. return atomic64_read(&synic->sint[sint]);
  37. }
  38. static inline int synic_get_sint_vector(u64 sint_value)
  39. {
  40. if (sint_value & HV_SYNIC_SINT_MASKED)
  41. return -1;
  42. return sint_value & HV_SYNIC_SINT_VECTOR_MASK;
  43. }
  44. static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic,
  45. int vector)
  46. {
  47. int i;
  48. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  49. if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
  50. return true;
  51. }
  52. return false;
  53. }
  54. static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic,
  55. int vector)
  56. {
  57. int i;
  58. u64 sint_value;
  59. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  60. sint_value = synic_read_sint(synic, i);
  61. if (synic_get_sint_vector(sint_value) == vector &&
  62. sint_value & HV_SYNIC_SINT_AUTO_EOI)
  63. return true;
  64. }
  65. return false;
  66. }
  67. static void synic_update_vector(struct kvm_vcpu_hv_synic *synic,
  68. int vector)
  69. {
  70. if (vector < HV_SYNIC_FIRST_VALID_VECTOR)
  71. return;
  72. if (synic_has_vector_connected(synic, vector))
  73. __set_bit(vector, synic->vec_bitmap);
  74. else
  75. __clear_bit(vector, synic->vec_bitmap);
  76. if (synic_has_vector_auto_eoi(synic, vector))
  77. __set_bit(vector, synic->auto_eoi_bitmap);
  78. else
  79. __clear_bit(vector, synic->auto_eoi_bitmap);
  80. }
  81. static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint,
  82. u64 data, bool host)
  83. {
  84. int vector, old_vector;
  85. bool masked;
  86. vector = data & HV_SYNIC_SINT_VECTOR_MASK;
  87. masked = data & HV_SYNIC_SINT_MASKED;
  88. /*
  89. * Valid vectors are 16-255, however, nested Hyper-V attempts to write
  90. * default '0x10000' value on boot and this should not #GP. We need to
  91. * allow zero-initing the register from host as well.
  92. */
  93. if (vector < HV_SYNIC_FIRST_VALID_VECTOR && !host && !masked)
  94. return 1;
  95. /*
  96. * Guest may configure multiple SINTs to use the same vector, so
  97. * we maintain a bitmap of vectors handled by synic, and a
  98. * bitmap of vectors with auto-eoi behavior. The bitmaps are
  99. * updated here, and atomically queried on fast paths.
  100. */
  101. old_vector = synic_read_sint(synic, sint) & HV_SYNIC_SINT_VECTOR_MASK;
  102. atomic64_set(&synic->sint[sint], data);
  103. synic_update_vector(synic, old_vector);
  104. synic_update_vector(synic, vector);
  105. /* Load SynIC vectors into EOI exit bitmap */
  106. kvm_make_request(KVM_REQ_SCAN_IOAPIC, synic_to_vcpu(synic));
  107. return 0;
  108. }
  109. static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx)
  110. {
  111. struct kvm_vcpu *vcpu = NULL;
  112. int i;
  113. if (vpidx >= KVM_MAX_VCPUS)
  114. return NULL;
  115. vcpu = kvm_get_vcpu(kvm, vpidx);
  116. if (vcpu && vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
  117. return vcpu;
  118. kvm_for_each_vcpu(i, vcpu, kvm)
  119. if (vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
  120. return vcpu;
  121. return NULL;
  122. }
  123. static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx)
  124. {
  125. struct kvm_vcpu *vcpu;
  126. struct kvm_vcpu_hv_synic *synic;
  127. vcpu = get_vcpu_by_vpidx(kvm, vpidx);
  128. if (!vcpu)
  129. return NULL;
  130. synic = vcpu_to_synic(vcpu);
  131. return (synic->active) ? synic : NULL;
  132. }
  133. static void synic_clear_sint_msg_pending(struct kvm_vcpu_hv_synic *synic,
  134. u32 sint)
  135. {
  136. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  137. struct page *page;
  138. gpa_t gpa;
  139. struct hv_message *msg;
  140. struct hv_message_page *msg_page;
  141. gpa = synic->msg_page & PAGE_MASK;
  142. page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
  143. if (is_error_page(page)) {
  144. vcpu_err(vcpu, "Hyper-V SynIC can't get msg page, gpa 0x%llx\n",
  145. gpa);
  146. return;
  147. }
  148. msg_page = kmap_atomic(page);
  149. msg = &msg_page->sint_message[sint];
  150. msg->header.message_flags.msg_pending = 0;
  151. kunmap_atomic(msg_page);
  152. kvm_release_page_dirty(page);
  153. kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
  154. }
  155. static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint)
  156. {
  157. struct kvm *kvm = vcpu->kvm;
  158. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  159. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  160. struct kvm_vcpu_hv_stimer *stimer;
  161. int gsi, idx, stimers_pending;
  162. trace_kvm_hv_notify_acked_sint(vcpu->vcpu_id, sint);
  163. if (synic->msg_page & HV_SYNIC_SIMP_ENABLE)
  164. synic_clear_sint_msg_pending(synic, sint);
  165. /* Try to deliver pending Hyper-V SynIC timers messages */
  166. stimers_pending = 0;
  167. for (idx = 0; idx < ARRAY_SIZE(hv_vcpu->stimer); idx++) {
  168. stimer = &hv_vcpu->stimer[idx];
  169. if (stimer->msg_pending &&
  170. (stimer->config & HV_STIMER_ENABLE) &&
  171. HV_STIMER_SINT(stimer->config) == sint) {
  172. set_bit(stimer->index,
  173. hv_vcpu->stimer_pending_bitmap);
  174. stimers_pending++;
  175. }
  176. }
  177. if (stimers_pending)
  178. kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
  179. idx = srcu_read_lock(&kvm->irq_srcu);
  180. gsi = atomic_read(&synic->sint_to_gsi[sint]);
  181. if (gsi != -1)
  182. kvm_notify_acked_gsi(kvm, gsi);
  183. srcu_read_unlock(&kvm->irq_srcu, idx);
  184. }
  185. static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr)
  186. {
  187. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  188. struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
  189. hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC;
  190. hv_vcpu->exit.u.synic.msr = msr;
  191. hv_vcpu->exit.u.synic.control = synic->control;
  192. hv_vcpu->exit.u.synic.evt_page = synic->evt_page;
  193. hv_vcpu->exit.u.synic.msg_page = synic->msg_page;
  194. kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
  195. }
  196. static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
  197. u32 msr, u64 data, bool host)
  198. {
  199. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  200. int ret;
  201. if (!synic->active && !host)
  202. return 1;
  203. trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host);
  204. ret = 0;
  205. switch (msr) {
  206. case HV_X64_MSR_SCONTROL:
  207. synic->control = data;
  208. if (!host)
  209. synic_exit(synic, msr);
  210. break;
  211. case HV_X64_MSR_SVERSION:
  212. if (!host) {
  213. ret = 1;
  214. break;
  215. }
  216. synic->version = data;
  217. break;
  218. case HV_X64_MSR_SIEFP:
  219. if ((data & HV_SYNIC_SIEFP_ENABLE) && !host &&
  220. !synic->dont_zero_synic_pages)
  221. if (kvm_clear_guest(vcpu->kvm,
  222. data & PAGE_MASK, PAGE_SIZE)) {
  223. ret = 1;
  224. break;
  225. }
  226. synic->evt_page = data;
  227. if (!host)
  228. synic_exit(synic, msr);
  229. break;
  230. case HV_X64_MSR_SIMP:
  231. if ((data & HV_SYNIC_SIMP_ENABLE) && !host &&
  232. !synic->dont_zero_synic_pages)
  233. if (kvm_clear_guest(vcpu->kvm,
  234. data & PAGE_MASK, PAGE_SIZE)) {
  235. ret = 1;
  236. break;
  237. }
  238. synic->msg_page = data;
  239. if (!host)
  240. synic_exit(synic, msr);
  241. break;
  242. case HV_X64_MSR_EOM: {
  243. int i;
  244. for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
  245. kvm_hv_notify_acked_sint(vcpu, i);
  246. break;
  247. }
  248. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  249. ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host);
  250. break;
  251. default:
  252. ret = 1;
  253. break;
  254. }
  255. return ret;
  256. }
  257. static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata,
  258. bool host)
  259. {
  260. int ret;
  261. if (!synic->active && !host)
  262. return 1;
  263. ret = 0;
  264. switch (msr) {
  265. case HV_X64_MSR_SCONTROL:
  266. *pdata = synic->control;
  267. break;
  268. case HV_X64_MSR_SVERSION:
  269. *pdata = synic->version;
  270. break;
  271. case HV_X64_MSR_SIEFP:
  272. *pdata = synic->evt_page;
  273. break;
  274. case HV_X64_MSR_SIMP:
  275. *pdata = synic->msg_page;
  276. break;
  277. case HV_X64_MSR_EOM:
  278. *pdata = 0;
  279. break;
  280. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  281. *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]);
  282. break;
  283. default:
  284. ret = 1;
  285. break;
  286. }
  287. return ret;
  288. }
  289. static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint)
  290. {
  291. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  292. struct kvm_lapic_irq irq;
  293. int ret, vector;
  294. if (sint >= ARRAY_SIZE(synic->sint))
  295. return -EINVAL;
  296. vector = synic_get_sint_vector(synic_read_sint(synic, sint));
  297. if (vector < 0)
  298. return -ENOENT;
  299. memset(&irq, 0, sizeof(irq));
  300. irq.shorthand = APIC_DEST_SELF;
  301. irq.dest_mode = APIC_DEST_PHYSICAL;
  302. irq.delivery_mode = APIC_DM_FIXED;
  303. irq.vector = vector;
  304. irq.level = 1;
  305. ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq, NULL);
  306. trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret);
  307. return ret;
  308. }
  309. int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint)
  310. {
  311. struct kvm_vcpu_hv_synic *synic;
  312. synic = synic_get(kvm, vpidx);
  313. if (!synic)
  314. return -EINVAL;
  315. return synic_set_irq(synic, sint);
  316. }
  317. void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector)
  318. {
  319. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  320. int i;
  321. trace_kvm_hv_synic_send_eoi(vcpu->vcpu_id, vector);
  322. for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
  323. if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
  324. kvm_hv_notify_acked_sint(vcpu, i);
  325. }
  326. static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi)
  327. {
  328. struct kvm_vcpu_hv_synic *synic;
  329. synic = synic_get(kvm, vpidx);
  330. if (!synic)
  331. return -EINVAL;
  332. if (sint >= ARRAY_SIZE(synic->sint_to_gsi))
  333. return -EINVAL;
  334. atomic_set(&synic->sint_to_gsi[sint], gsi);
  335. return 0;
  336. }
  337. void kvm_hv_irq_routing_update(struct kvm *kvm)
  338. {
  339. struct kvm_irq_routing_table *irq_rt;
  340. struct kvm_kernel_irq_routing_entry *e;
  341. u32 gsi;
  342. irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu,
  343. lockdep_is_held(&kvm->irq_lock));
  344. for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) {
  345. hlist_for_each_entry(e, &irq_rt->map[gsi], link) {
  346. if (e->type == KVM_IRQ_ROUTING_HV_SINT)
  347. kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu,
  348. e->hv_sint.sint, gsi);
  349. }
  350. }
  351. }
  352. static void synic_init(struct kvm_vcpu_hv_synic *synic)
  353. {
  354. int i;
  355. memset(synic, 0, sizeof(*synic));
  356. synic->version = HV_SYNIC_VERSION_1;
  357. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  358. atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED);
  359. atomic_set(&synic->sint_to_gsi[i], -1);
  360. }
  361. }
  362. static u64 get_time_ref_counter(struct kvm *kvm)
  363. {
  364. struct kvm_hv *hv = &kvm->arch.hyperv;
  365. struct kvm_vcpu *vcpu;
  366. u64 tsc;
  367. /*
  368. * The guest has not set up the TSC page or the clock isn't
  369. * stable, fall back to get_kvmclock_ns.
  370. */
  371. if (!hv->tsc_ref.tsc_sequence)
  372. return div_u64(get_kvmclock_ns(kvm), 100);
  373. vcpu = kvm_get_vcpu(kvm, 0);
  374. tsc = kvm_read_l1_tsc(vcpu, rdtsc());
  375. return mul_u64_u64_shr(tsc, hv->tsc_ref.tsc_scale, 64)
  376. + hv->tsc_ref.tsc_offset;
  377. }
  378. static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer,
  379. bool vcpu_kick)
  380. {
  381. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  382. set_bit(stimer->index,
  383. vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
  384. kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
  385. if (vcpu_kick)
  386. kvm_vcpu_kick(vcpu);
  387. }
  388. static void stimer_cleanup(struct kvm_vcpu_hv_stimer *stimer)
  389. {
  390. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  391. trace_kvm_hv_stimer_cleanup(stimer_to_vcpu(stimer)->vcpu_id,
  392. stimer->index);
  393. hrtimer_cancel(&stimer->timer);
  394. clear_bit(stimer->index,
  395. vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
  396. stimer->msg_pending = false;
  397. stimer->exp_time = 0;
  398. }
  399. static enum hrtimer_restart stimer_timer_callback(struct hrtimer *timer)
  400. {
  401. struct kvm_vcpu_hv_stimer *stimer;
  402. stimer = container_of(timer, struct kvm_vcpu_hv_stimer, timer);
  403. trace_kvm_hv_stimer_callback(stimer_to_vcpu(stimer)->vcpu_id,
  404. stimer->index);
  405. stimer_mark_pending(stimer, true);
  406. return HRTIMER_NORESTART;
  407. }
  408. /*
  409. * stimer_start() assumptions:
  410. * a) stimer->count is not equal to 0
  411. * b) stimer->config has HV_STIMER_ENABLE flag
  412. */
  413. static int stimer_start(struct kvm_vcpu_hv_stimer *stimer)
  414. {
  415. u64 time_now;
  416. ktime_t ktime_now;
  417. time_now = get_time_ref_counter(stimer_to_vcpu(stimer)->kvm);
  418. ktime_now = ktime_get();
  419. if (stimer->config & HV_STIMER_PERIODIC) {
  420. if (stimer->exp_time) {
  421. if (time_now >= stimer->exp_time) {
  422. u64 remainder;
  423. div64_u64_rem(time_now - stimer->exp_time,
  424. stimer->count, &remainder);
  425. stimer->exp_time =
  426. time_now + (stimer->count - remainder);
  427. }
  428. } else
  429. stimer->exp_time = time_now + stimer->count;
  430. trace_kvm_hv_stimer_start_periodic(
  431. stimer_to_vcpu(stimer)->vcpu_id,
  432. stimer->index,
  433. time_now, stimer->exp_time);
  434. hrtimer_start(&stimer->timer,
  435. ktime_add_ns(ktime_now,
  436. 100 * (stimer->exp_time - time_now)),
  437. HRTIMER_MODE_ABS);
  438. return 0;
  439. }
  440. stimer->exp_time = stimer->count;
  441. if (time_now >= stimer->count) {
  442. /*
  443. * Expire timer according to Hypervisor Top-Level Functional
  444. * specification v4(15.3.1):
  445. * "If a one shot is enabled and the specified count is in
  446. * the past, it will expire immediately."
  447. */
  448. stimer_mark_pending(stimer, false);
  449. return 0;
  450. }
  451. trace_kvm_hv_stimer_start_one_shot(stimer_to_vcpu(stimer)->vcpu_id,
  452. stimer->index,
  453. time_now, stimer->count);
  454. hrtimer_start(&stimer->timer,
  455. ktime_add_ns(ktime_now, 100 * (stimer->count - time_now)),
  456. HRTIMER_MODE_ABS);
  457. return 0;
  458. }
  459. static int stimer_set_config(struct kvm_vcpu_hv_stimer *stimer, u64 config,
  460. bool host)
  461. {
  462. trace_kvm_hv_stimer_set_config(stimer_to_vcpu(stimer)->vcpu_id,
  463. stimer->index, config, host);
  464. stimer_cleanup(stimer);
  465. if ((stimer->config & HV_STIMER_ENABLE) && HV_STIMER_SINT(config) == 0)
  466. config &= ~HV_STIMER_ENABLE;
  467. stimer->config = config;
  468. stimer_mark_pending(stimer, false);
  469. return 0;
  470. }
  471. static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count,
  472. bool host)
  473. {
  474. trace_kvm_hv_stimer_set_count(stimer_to_vcpu(stimer)->vcpu_id,
  475. stimer->index, count, host);
  476. stimer_cleanup(stimer);
  477. stimer->count = count;
  478. if (stimer->count == 0)
  479. stimer->config &= ~HV_STIMER_ENABLE;
  480. else if (stimer->config & HV_STIMER_AUTOENABLE)
  481. stimer->config |= HV_STIMER_ENABLE;
  482. stimer_mark_pending(stimer, false);
  483. return 0;
  484. }
  485. static int stimer_get_config(struct kvm_vcpu_hv_stimer *stimer, u64 *pconfig)
  486. {
  487. *pconfig = stimer->config;
  488. return 0;
  489. }
  490. static int stimer_get_count(struct kvm_vcpu_hv_stimer *stimer, u64 *pcount)
  491. {
  492. *pcount = stimer->count;
  493. return 0;
  494. }
  495. static int synic_deliver_msg(struct kvm_vcpu_hv_synic *synic, u32 sint,
  496. struct hv_message *src_msg)
  497. {
  498. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  499. struct page *page;
  500. gpa_t gpa;
  501. struct hv_message *dst_msg;
  502. int r;
  503. struct hv_message_page *msg_page;
  504. if (!(synic->msg_page & HV_SYNIC_SIMP_ENABLE))
  505. return -ENOENT;
  506. gpa = synic->msg_page & PAGE_MASK;
  507. page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
  508. if (is_error_page(page))
  509. return -EFAULT;
  510. msg_page = kmap_atomic(page);
  511. dst_msg = &msg_page->sint_message[sint];
  512. if (sync_cmpxchg(&dst_msg->header.message_type, HVMSG_NONE,
  513. src_msg->header.message_type) != HVMSG_NONE) {
  514. dst_msg->header.message_flags.msg_pending = 1;
  515. r = -EAGAIN;
  516. } else {
  517. memcpy(&dst_msg->u.payload, &src_msg->u.payload,
  518. src_msg->header.payload_size);
  519. dst_msg->header.message_type = src_msg->header.message_type;
  520. dst_msg->header.payload_size = src_msg->header.payload_size;
  521. r = synic_set_irq(synic, sint);
  522. if (r >= 1)
  523. r = 0;
  524. else if (r == 0)
  525. r = -EFAULT;
  526. }
  527. kunmap_atomic(msg_page);
  528. kvm_release_page_dirty(page);
  529. kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
  530. return r;
  531. }
  532. static int stimer_send_msg(struct kvm_vcpu_hv_stimer *stimer)
  533. {
  534. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  535. struct hv_message *msg = &stimer->msg;
  536. struct hv_timer_message_payload *payload =
  537. (struct hv_timer_message_payload *)&msg->u.payload;
  538. payload->expiration_time = stimer->exp_time;
  539. payload->delivery_time = get_time_ref_counter(vcpu->kvm);
  540. return synic_deliver_msg(vcpu_to_synic(vcpu),
  541. HV_STIMER_SINT(stimer->config), msg);
  542. }
  543. static void stimer_expiration(struct kvm_vcpu_hv_stimer *stimer)
  544. {
  545. int r;
  546. stimer->msg_pending = true;
  547. r = stimer_send_msg(stimer);
  548. trace_kvm_hv_stimer_expiration(stimer_to_vcpu(stimer)->vcpu_id,
  549. stimer->index, r);
  550. if (!r) {
  551. stimer->msg_pending = false;
  552. if (!(stimer->config & HV_STIMER_PERIODIC))
  553. stimer->config &= ~HV_STIMER_ENABLE;
  554. }
  555. }
  556. void kvm_hv_process_stimers(struct kvm_vcpu *vcpu)
  557. {
  558. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  559. struct kvm_vcpu_hv_stimer *stimer;
  560. u64 time_now, exp_time;
  561. int i;
  562. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  563. if (test_and_clear_bit(i, hv_vcpu->stimer_pending_bitmap)) {
  564. stimer = &hv_vcpu->stimer[i];
  565. if (stimer->config & HV_STIMER_ENABLE) {
  566. exp_time = stimer->exp_time;
  567. if (exp_time) {
  568. time_now =
  569. get_time_ref_counter(vcpu->kvm);
  570. if (time_now >= exp_time)
  571. stimer_expiration(stimer);
  572. }
  573. if ((stimer->config & HV_STIMER_ENABLE) &&
  574. stimer->count) {
  575. if (!stimer->msg_pending)
  576. stimer_start(stimer);
  577. } else
  578. stimer_cleanup(stimer);
  579. }
  580. }
  581. }
  582. void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu)
  583. {
  584. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  585. int i;
  586. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  587. stimer_cleanup(&hv_vcpu->stimer[i]);
  588. }
  589. static void stimer_prepare_msg(struct kvm_vcpu_hv_stimer *stimer)
  590. {
  591. struct hv_message *msg = &stimer->msg;
  592. struct hv_timer_message_payload *payload =
  593. (struct hv_timer_message_payload *)&msg->u.payload;
  594. memset(&msg->header, 0, sizeof(msg->header));
  595. msg->header.message_type = HVMSG_TIMER_EXPIRED;
  596. msg->header.payload_size = sizeof(*payload);
  597. payload->timer_index = stimer->index;
  598. payload->expiration_time = 0;
  599. payload->delivery_time = 0;
  600. }
  601. static void stimer_init(struct kvm_vcpu_hv_stimer *stimer, int timer_index)
  602. {
  603. memset(stimer, 0, sizeof(*stimer));
  604. stimer->index = timer_index;
  605. hrtimer_init(&stimer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  606. stimer->timer.function = stimer_timer_callback;
  607. stimer_prepare_msg(stimer);
  608. }
  609. void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)
  610. {
  611. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  612. int i;
  613. synic_init(&hv_vcpu->synic);
  614. bitmap_zero(hv_vcpu->stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
  615. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  616. stimer_init(&hv_vcpu->stimer[i], i);
  617. }
  618. void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu)
  619. {
  620. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  621. hv_vcpu->vp_index = kvm_vcpu_get_idx(vcpu);
  622. }
  623. int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages)
  624. {
  625. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  626. /*
  627. * Hyper-V SynIC auto EOI SINT's are
  628. * not compatible with APICV, so deactivate APICV
  629. */
  630. kvm_vcpu_deactivate_apicv(vcpu);
  631. synic->active = true;
  632. synic->dont_zero_synic_pages = dont_zero_synic_pages;
  633. return 0;
  634. }
  635. static bool kvm_hv_msr_partition_wide(u32 msr)
  636. {
  637. bool r = false;
  638. switch (msr) {
  639. case HV_X64_MSR_GUEST_OS_ID:
  640. case HV_X64_MSR_HYPERCALL:
  641. case HV_X64_MSR_REFERENCE_TSC:
  642. case HV_X64_MSR_TIME_REF_COUNT:
  643. case HV_X64_MSR_CRASH_CTL:
  644. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  645. case HV_X64_MSR_RESET:
  646. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  647. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  648. case HV_X64_MSR_TSC_EMULATION_STATUS:
  649. r = true;
  650. break;
  651. }
  652. return r;
  653. }
  654. static int kvm_hv_msr_get_crash_data(struct kvm_vcpu *vcpu,
  655. u32 index, u64 *pdata)
  656. {
  657. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  658. if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param)))
  659. return -EINVAL;
  660. *pdata = hv->hv_crash_param[index];
  661. return 0;
  662. }
  663. static int kvm_hv_msr_get_crash_ctl(struct kvm_vcpu *vcpu, u64 *pdata)
  664. {
  665. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  666. *pdata = hv->hv_crash_ctl;
  667. return 0;
  668. }
  669. static int kvm_hv_msr_set_crash_ctl(struct kvm_vcpu *vcpu, u64 data, bool host)
  670. {
  671. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  672. if (host)
  673. hv->hv_crash_ctl = data & HV_X64_MSR_CRASH_CTL_NOTIFY;
  674. if (!host && (data & HV_X64_MSR_CRASH_CTL_NOTIFY)) {
  675. vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n",
  676. hv->hv_crash_param[0],
  677. hv->hv_crash_param[1],
  678. hv->hv_crash_param[2],
  679. hv->hv_crash_param[3],
  680. hv->hv_crash_param[4]);
  681. /* Send notification about crash to user space */
  682. kvm_make_request(KVM_REQ_HV_CRASH, vcpu);
  683. }
  684. return 0;
  685. }
  686. static int kvm_hv_msr_set_crash_data(struct kvm_vcpu *vcpu,
  687. u32 index, u64 data)
  688. {
  689. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  690. if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param)))
  691. return -EINVAL;
  692. hv->hv_crash_param[index] = data;
  693. return 0;
  694. }
  695. /*
  696. * The kvmclock and Hyper-V TSC page use similar formulas, and converting
  697. * between them is possible:
  698. *
  699. * kvmclock formula:
  700. * nsec = (ticks - tsc_timestamp) * tsc_to_system_mul * 2^(tsc_shift-32)
  701. * + system_time
  702. *
  703. * Hyper-V formula:
  704. * nsec/100 = ticks * scale / 2^64 + offset
  705. *
  706. * When tsc_timestamp = system_time = 0, offset is zero in the Hyper-V formula.
  707. * By dividing the kvmclock formula by 100 and equating what's left we get:
  708. * ticks * scale / 2^64 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  709. * scale / 2^64 = tsc_to_system_mul * 2^(tsc_shift-32) / 100
  710. * scale = tsc_to_system_mul * 2^(32+tsc_shift) / 100
  711. *
  712. * Now expand the kvmclock formula and divide by 100:
  713. * nsec = ticks * tsc_to_system_mul * 2^(tsc_shift-32)
  714. * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32)
  715. * + system_time
  716. * nsec/100 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  717. * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  718. * + system_time / 100
  719. *
  720. * Replace tsc_to_system_mul * 2^(tsc_shift-32) / 100 by scale / 2^64:
  721. * nsec/100 = ticks * scale / 2^64
  722. * - tsc_timestamp * scale / 2^64
  723. * + system_time / 100
  724. *
  725. * Equate with the Hyper-V formula so that ticks * scale / 2^64 cancels out:
  726. * offset = system_time / 100 - tsc_timestamp * scale / 2^64
  727. *
  728. * These two equivalencies are implemented in this function.
  729. */
  730. static bool compute_tsc_page_parameters(struct pvclock_vcpu_time_info *hv_clock,
  731. HV_REFERENCE_TSC_PAGE *tsc_ref)
  732. {
  733. u64 max_mul;
  734. if (!(hv_clock->flags & PVCLOCK_TSC_STABLE_BIT))
  735. return false;
  736. /*
  737. * check if scale would overflow, if so we use the time ref counter
  738. * tsc_to_system_mul * 2^(tsc_shift+32) / 100 >= 2^64
  739. * tsc_to_system_mul / 100 >= 2^(32-tsc_shift)
  740. * tsc_to_system_mul >= 100 * 2^(32-tsc_shift)
  741. */
  742. max_mul = 100ull << (32 - hv_clock->tsc_shift);
  743. if (hv_clock->tsc_to_system_mul >= max_mul)
  744. return false;
  745. /*
  746. * Otherwise compute the scale and offset according to the formulas
  747. * derived above.
  748. */
  749. tsc_ref->tsc_scale =
  750. mul_u64_u32_div(1ULL << (32 + hv_clock->tsc_shift),
  751. hv_clock->tsc_to_system_mul,
  752. 100);
  753. tsc_ref->tsc_offset = hv_clock->system_time;
  754. do_div(tsc_ref->tsc_offset, 100);
  755. tsc_ref->tsc_offset -=
  756. mul_u64_u64_shr(hv_clock->tsc_timestamp, tsc_ref->tsc_scale, 64);
  757. return true;
  758. }
  759. void kvm_hv_setup_tsc_page(struct kvm *kvm,
  760. struct pvclock_vcpu_time_info *hv_clock)
  761. {
  762. struct kvm_hv *hv = &kvm->arch.hyperv;
  763. u32 tsc_seq;
  764. u64 gfn;
  765. BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence));
  766. BUILD_BUG_ON(offsetof(HV_REFERENCE_TSC_PAGE, tsc_sequence) != 0);
  767. if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
  768. return;
  769. mutex_lock(&kvm->arch.hyperv.hv_lock);
  770. if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
  771. goto out_unlock;
  772. gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
  773. /*
  774. * Because the TSC parameters only vary when there is a
  775. * change in the master clock, do not bother with caching.
  776. */
  777. if (unlikely(kvm_read_guest(kvm, gfn_to_gpa(gfn),
  778. &tsc_seq, sizeof(tsc_seq))))
  779. goto out_unlock;
  780. /*
  781. * While we're computing and writing the parameters, force the
  782. * guest to use the time reference count MSR.
  783. */
  784. hv->tsc_ref.tsc_sequence = 0;
  785. if (kvm_write_guest(kvm, gfn_to_gpa(gfn),
  786. &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)))
  787. goto out_unlock;
  788. if (!compute_tsc_page_parameters(hv_clock, &hv->tsc_ref))
  789. goto out_unlock;
  790. /* Ensure sequence is zero before writing the rest of the struct. */
  791. smp_wmb();
  792. if (kvm_write_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref)))
  793. goto out_unlock;
  794. /*
  795. * Now switch to the TSC page mechanism by writing the sequence.
  796. */
  797. tsc_seq++;
  798. if (tsc_seq == 0xFFFFFFFF || tsc_seq == 0)
  799. tsc_seq = 1;
  800. /* Write the struct entirely before the non-zero sequence. */
  801. smp_wmb();
  802. hv->tsc_ref.tsc_sequence = tsc_seq;
  803. kvm_write_guest(kvm, gfn_to_gpa(gfn),
  804. &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence));
  805. out_unlock:
  806. mutex_unlock(&kvm->arch.hyperv.hv_lock);
  807. }
  808. static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
  809. bool host)
  810. {
  811. struct kvm *kvm = vcpu->kvm;
  812. struct kvm_hv *hv = &kvm->arch.hyperv;
  813. switch (msr) {
  814. case HV_X64_MSR_GUEST_OS_ID:
  815. hv->hv_guest_os_id = data;
  816. /* setting guest os id to zero disables hypercall page */
  817. if (!hv->hv_guest_os_id)
  818. hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
  819. break;
  820. case HV_X64_MSR_HYPERCALL: {
  821. u64 gfn;
  822. unsigned long addr;
  823. u8 instructions[4];
  824. /* if guest os id is not set hypercall should remain disabled */
  825. if (!hv->hv_guest_os_id)
  826. break;
  827. if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
  828. hv->hv_hypercall = data;
  829. break;
  830. }
  831. gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
  832. addr = gfn_to_hva(kvm, gfn);
  833. if (kvm_is_error_hva(addr))
  834. return 1;
  835. kvm_x86_ops->patch_hypercall(vcpu, instructions);
  836. ((unsigned char *)instructions)[3] = 0xc3; /* ret */
  837. if (__copy_to_user((void __user *)addr, instructions, 4))
  838. return 1;
  839. hv->hv_hypercall = data;
  840. mark_page_dirty(kvm, gfn);
  841. break;
  842. }
  843. case HV_X64_MSR_REFERENCE_TSC:
  844. hv->hv_tsc_page = data;
  845. if (hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)
  846. kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
  847. break;
  848. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  849. return kvm_hv_msr_set_crash_data(vcpu,
  850. msr - HV_X64_MSR_CRASH_P0,
  851. data);
  852. case HV_X64_MSR_CRASH_CTL:
  853. return kvm_hv_msr_set_crash_ctl(vcpu, data, host);
  854. case HV_X64_MSR_RESET:
  855. if (data == 1) {
  856. vcpu_debug(vcpu, "hyper-v reset requested\n");
  857. kvm_make_request(KVM_REQ_HV_RESET, vcpu);
  858. }
  859. break;
  860. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  861. hv->hv_reenlightenment_control = data;
  862. break;
  863. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  864. hv->hv_tsc_emulation_control = data;
  865. break;
  866. case HV_X64_MSR_TSC_EMULATION_STATUS:
  867. hv->hv_tsc_emulation_status = data;
  868. break;
  869. case HV_X64_MSR_TIME_REF_COUNT:
  870. /* read-only, but still ignore it if host-initiated */
  871. if (!host)
  872. return 1;
  873. break;
  874. default:
  875. vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
  876. msr, data);
  877. return 1;
  878. }
  879. return 0;
  880. }
  881. /* Calculate cpu time spent by current task in 100ns units */
  882. static u64 current_task_runtime_100ns(void)
  883. {
  884. u64 utime, stime;
  885. task_cputime_adjusted(current, &utime, &stime);
  886. return div_u64(utime + stime, 100);
  887. }
  888. static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
  889. {
  890. struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
  891. switch (msr) {
  892. case HV_X64_MSR_VP_INDEX: {
  893. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  894. int vcpu_idx = kvm_vcpu_get_idx(vcpu);
  895. u32 new_vp_index = (u32)data;
  896. if (!host || new_vp_index >= KVM_MAX_VCPUS)
  897. return 1;
  898. if (new_vp_index == hv_vcpu->vp_index)
  899. return 0;
  900. /*
  901. * The VP index is initialized to vcpu_index by
  902. * kvm_hv_vcpu_postcreate so they initially match. Now the
  903. * VP index is changing, adjust num_mismatched_vp_indexes if
  904. * it now matches or no longer matches vcpu_idx.
  905. */
  906. if (hv_vcpu->vp_index == vcpu_idx)
  907. atomic_inc(&hv->num_mismatched_vp_indexes);
  908. else if (new_vp_index == vcpu_idx)
  909. atomic_dec(&hv->num_mismatched_vp_indexes);
  910. hv_vcpu->vp_index = new_vp_index;
  911. break;
  912. }
  913. case HV_X64_MSR_VP_ASSIST_PAGE: {
  914. u64 gfn;
  915. unsigned long addr;
  916. if (!(data & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE)) {
  917. hv_vcpu->hv_vapic = data;
  918. if (kvm_lapic_enable_pv_eoi(vcpu, 0))
  919. return 1;
  920. break;
  921. }
  922. gfn = data >> HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT;
  923. addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);
  924. if (kvm_is_error_hva(addr))
  925. return 1;
  926. if (__clear_user((void __user *)addr, PAGE_SIZE))
  927. return 1;
  928. hv_vcpu->hv_vapic = data;
  929. kvm_vcpu_mark_page_dirty(vcpu, gfn);
  930. if (kvm_lapic_enable_pv_eoi(vcpu,
  931. gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
  932. return 1;
  933. break;
  934. }
  935. case HV_X64_MSR_EOI:
  936. return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
  937. case HV_X64_MSR_ICR:
  938. return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
  939. case HV_X64_MSR_TPR:
  940. return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
  941. case HV_X64_MSR_VP_RUNTIME:
  942. if (!host)
  943. return 1;
  944. hv_vcpu->runtime_offset = data - current_task_runtime_100ns();
  945. break;
  946. case HV_X64_MSR_SCONTROL:
  947. case HV_X64_MSR_SVERSION:
  948. case HV_X64_MSR_SIEFP:
  949. case HV_X64_MSR_SIMP:
  950. case HV_X64_MSR_EOM:
  951. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  952. return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host);
  953. case HV_X64_MSR_STIMER0_CONFIG:
  954. case HV_X64_MSR_STIMER1_CONFIG:
  955. case HV_X64_MSR_STIMER2_CONFIG:
  956. case HV_X64_MSR_STIMER3_CONFIG: {
  957. int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
  958. return stimer_set_config(vcpu_to_stimer(vcpu, timer_index),
  959. data, host);
  960. }
  961. case HV_X64_MSR_STIMER0_COUNT:
  962. case HV_X64_MSR_STIMER1_COUNT:
  963. case HV_X64_MSR_STIMER2_COUNT:
  964. case HV_X64_MSR_STIMER3_COUNT: {
  965. int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
  966. return stimer_set_count(vcpu_to_stimer(vcpu, timer_index),
  967. data, host);
  968. }
  969. case HV_X64_MSR_TSC_FREQUENCY:
  970. case HV_X64_MSR_APIC_FREQUENCY:
  971. /* read-only, but still ignore it if host-initiated */
  972. if (!host)
  973. return 1;
  974. break;
  975. default:
  976. vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
  977. msr, data);
  978. return 1;
  979. }
  980. return 0;
  981. }
  982. static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  983. {
  984. u64 data = 0;
  985. struct kvm *kvm = vcpu->kvm;
  986. struct kvm_hv *hv = &kvm->arch.hyperv;
  987. switch (msr) {
  988. case HV_X64_MSR_GUEST_OS_ID:
  989. data = hv->hv_guest_os_id;
  990. break;
  991. case HV_X64_MSR_HYPERCALL:
  992. data = hv->hv_hypercall;
  993. break;
  994. case HV_X64_MSR_TIME_REF_COUNT:
  995. data = get_time_ref_counter(kvm);
  996. break;
  997. case HV_X64_MSR_REFERENCE_TSC:
  998. data = hv->hv_tsc_page;
  999. break;
  1000. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  1001. return kvm_hv_msr_get_crash_data(vcpu,
  1002. msr - HV_X64_MSR_CRASH_P0,
  1003. pdata);
  1004. case HV_X64_MSR_CRASH_CTL:
  1005. return kvm_hv_msr_get_crash_ctl(vcpu, pdata);
  1006. case HV_X64_MSR_RESET:
  1007. data = 0;
  1008. break;
  1009. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  1010. data = hv->hv_reenlightenment_control;
  1011. break;
  1012. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  1013. data = hv->hv_tsc_emulation_control;
  1014. break;
  1015. case HV_X64_MSR_TSC_EMULATION_STATUS:
  1016. data = hv->hv_tsc_emulation_status;
  1017. break;
  1018. default:
  1019. vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
  1020. return 1;
  1021. }
  1022. *pdata = data;
  1023. return 0;
  1024. }
  1025. static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata,
  1026. bool host)
  1027. {
  1028. u64 data = 0;
  1029. struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
  1030. switch (msr) {
  1031. case HV_X64_MSR_VP_INDEX:
  1032. data = hv_vcpu->vp_index;
  1033. break;
  1034. case HV_X64_MSR_EOI:
  1035. return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
  1036. case HV_X64_MSR_ICR:
  1037. return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
  1038. case HV_X64_MSR_TPR:
  1039. return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
  1040. case HV_X64_MSR_VP_ASSIST_PAGE:
  1041. data = hv_vcpu->hv_vapic;
  1042. break;
  1043. case HV_X64_MSR_VP_RUNTIME:
  1044. data = current_task_runtime_100ns() + hv_vcpu->runtime_offset;
  1045. break;
  1046. case HV_X64_MSR_SCONTROL:
  1047. case HV_X64_MSR_SVERSION:
  1048. case HV_X64_MSR_SIEFP:
  1049. case HV_X64_MSR_SIMP:
  1050. case HV_X64_MSR_EOM:
  1051. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  1052. return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata, host);
  1053. case HV_X64_MSR_STIMER0_CONFIG:
  1054. case HV_X64_MSR_STIMER1_CONFIG:
  1055. case HV_X64_MSR_STIMER2_CONFIG:
  1056. case HV_X64_MSR_STIMER3_CONFIG: {
  1057. int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
  1058. return stimer_get_config(vcpu_to_stimer(vcpu, timer_index),
  1059. pdata);
  1060. }
  1061. case HV_X64_MSR_STIMER0_COUNT:
  1062. case HV_X64_MSR_STIMER1_COUNT:
  1063. case HV_X64_MSR_STIMER2_COUNT:
  1064. case HV_X64_MSR_STIMER3_COUNT: {
  1065. int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
  1066. return stimer_get_count(vcpu_to_stimer(vcpu, timer_index),
  1067. pdata);
  1068. }
  1069. case HV_X64_MSR_TSC_FREQUENCY:
  1070. data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
  1071. break;
  1072. case HV_X64_MSR_APIC_FREQUENCY:
  1073. data = APIC_BUS_FREQUENCY;
  1074. break;
  1075. default:
  1076. vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
  1077. return 1;
  1078. }
  1079. *pdata = data;
  1080. return 0;
  1081. }
  1082. int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
  1083. {
  1084. if (kvm_hv_msr_partition_wide(msr)) {
  1085. int r;
  1086. mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
  1087. r = kvm_hv_set_msr_pw(vcpu, msr, data, host);
  1088. mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
  1089. return r;
  1090. } else
  1091. return kvm_hv_set_msr(vcpu, msr, data, host);
  1092. }
  1093. int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
  1094. {
  1095. if (kvm_hv_msr_partition_wide(msr)) {
  1096. int r;
  1097. mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
  1098. r = kvm_hv_get_msr_pw(vcpu, msr, pdata);
  1099. mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
  1100. return r;
  1101. } else
  1102. return kvm_hv_get_msr(vcpu, msr, pdata, host);
  1103. }
  1104. static __always_inline bool hv_vcpu_in_sparse_set(struct kvm_vcpu_hv *hv_vcpu,
  1105. u64 sparse_banks[],
  1106. u64 valid_bank_mask)
  1107. {
  1108. int bank = hv_vcpu->vp_index / 64, sbank;
  1109. if (bank >= 64)
  1110. return false;
  1111. if (!(valid_bank_mask & BIT_ULL(bank)))
  1112. return false;
  1113. /* Sparse bank number equals to the number of set bits before it */
  1114. sbank = bitmap_weight((unsigned long *)&valid_bank_mask, bank);
  1115. return !!(sparse_banks[sbank] & BIT_ULL(hv_vcpu->vp_index % 64));
  1116. }
  1117. static u64 kvm_hv_flush_tlb(struct kvm_vcpu *current_vcpu, u64 ingpa,
  1118. u16 rep_cnt, bool ex)
  1119. {
  1120. struct kvm *kvm = current_vcpu->kvm;
  1121. struct kvm_hv *hv = &kvm->arch.hyperv;
  1122. struct kvm_vcpu_hv *hv_vcpu = &current_vcpu->arch.hyperv;
  1123. struct hv_tlb_flush_ex flush_ex;
  1124. struct hv_tlb_flush flush;
  1125. struct kvm_vcpu *vcpu;
  1126. unsigned long vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)] = {0};
  1127. u64 valid_bank_mask;
  1128. u64 sparse_banks[64];
  1129. int sparse_banks_len, i, bank, sbank;
  1130. bool all_cpus;
  1131. if (!ex) {
  1132. if (unlikely(kvm_read_guest(kvm, ingpa, &flush, sizeof(flush))))
  1133. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1134. trace_kvm_hv_flush_tlb(flush.processor_mask,
  1135. flush.address_space, flush.flags);
  1136. valid_bank_mask = BIT_ULL(0);
  1137. sparse_banks[0] = flush.processor_mask;
  1138. all_cpus = flush.flags & HV_FLUSH_ALL_PROCESSORS;
  1139. } else {
  1140. if (unlikely(kvm_read_guest(kvm, ingpa, &flush_ex,
  1141. sizeof(flush_ex))))
  1142. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1143. trace_kvm_hv_flush_tlb_ex(flush_ex.hv_vp_set.valid_bank_mask,
  1144. flush_ex.hv_vp_set.format,
  1145. flush_ex.address_space,
  1146. flush_ex.flags);
  1147. valid_bank_mask = flush_ex.hv_vp_set.valid_bank_mask;
  1148. all_cpus = flush_ex.hv_vp_set.format !=
  1149. HV_GENERIC_SET_SPARSE_4K;
  1150. sparse_banks_len =
  1151. bitmap_weight((unsigned long *)&valid_bank_mask, 64) *
  1152. sizeof(sparse_banks[0]);
  1153. if (!sparse_banks_len && !all_cpus)
  1154. goto ret_success;
  1155. if (!all_cpus &&
  1156. kvm_read_guest(kvm,
  1157. ingpa + offsetof(struct hv_tlb_flush_ex,
  1158. hv_vp_set.bank_contents),
  1159. sparse_banks,
  1160. sparse_banks_len))
  1161. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1162. }
  1163. /*
  1164. * vcpu->arch.cr3 may not be up-to-date for running vCPUs so we can't
  1165. * analyze it here, flush TLB regardless of the specified address space.
  1166. */
  1167. cpumask_clear(&hv_vcpu->tlb_lush);
  1168. if (all_cpus) {
  1169. kvm_make_vcpus_request_mask(kvm,
  1170. KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP,
  1171. NULL, &hv_vcpu->tlb_lush);
  1172. goto ret_success;
  1173. }
  1174. if (atomic_read(&hv->num_mismatched_vp_indexes)) {
  1175. kvm_for_each_vcpu(i, vcpu, kvm) {
  1176. if (hv_vcpu_in_sparse_set(&vcpu->arch.hyperv,
  1177. sparse_banks,
  1178. valid_bank_mask))
  1179. __set_bit(i, vcpu_bitmap);
  1180. }
  1181. goto flush_request;
  1182. }
  1183. /*
  1184. * num_mismatched_vp_indexes is zero so every vcpu has
  1185. * vp_index == vcpu_idx.
  1186. */
  1187. sbank = 0;
  1188. for_each_set_bit(bank, (unsigned long *)&valid_bank_mask,
  1189. BITS_PER_LONG) {
  1190. for_each_set_bit(i,
  1191. (unsigned long *)&sparse_banks[sbank],
  1192. BITS_PER_LONG) {
  1193. u32 vp_index = bank * 64 + i;
  1194. /* A non-existent vCPU was specified */
  1195. if (vp_index >= KVM_MAX_VCPUS)
  1196. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1197. __set_bit(vp_index, vcpu_bitmap);
  1198. }
  1199. sbank++;
  1200. }
  1201. flush_request:
  1202. kvm_make_vcpus_request_mask(kvm,
  1203. KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP,
  1204. vcpu_bitmap, &hv_vcpu->tlb_lush);
  1205. ret_success:
  1206. /* We always do full TLB flush, set rep_done = rep_cnt. */
  1207. return (u64)HV_STATUS_SUCCESS |
  1208. ((u64)rep_cnt << HV_HYPERCALL_REP_COMP_OFFSET);
  1209. }
  1210. bool kvm_hv_hypercall_enabled(struct kvm *kvm)
  1211. {
  1212. return READ_ONCE(kvm->arch.hyperv.hv_hypercall) & HV_X64_MSR_HYPERCALL_ENABLE;
  1213. }
  1214. static void kvm_hv_hypercall_set_result(struct kvm_vcpu *vcpu, u64 result)
  1215. {
  1216. bool longmode;
  1217. longmode = is_64_bit_mode(vcpu);
  1218. if (longmode)
  1219. kvm_register_write(vcpu, VCPU_REGS_RAX, result);
  1220. else {
  1221. kvm_register_write(vcpu, VCPU_REGS_RDX, result >> 32);
  1222. kvm_register_write(vcpu, VCPU_REGS_RAX, result & 0xffffffff);
  1223. }
  1224. }
  1225. static int kvm_hv_hypercall_complete(struct kvm_vcpu *vcpu, u64 result)
  1226. {
  1227. kvm_hv_hypercall_set_result(vcpu, result);
  1228. ++vcpu->stat.hypercalls;
  1229. return kvm_skip_emulated_instruction(vcpu);
  1230. }
  1231. static int kvm_hv_hypercall_complete_userspace(struct kvm_vcpu *vcpu)
  1232. {
  1233. return kvm_hv_hypercall_complete(vcpu, vcpu->run->hyperv.u.hcall.result);
  1234. }
  1235. static u16 kvm_hvcall_signal_event(struct kvm_vcpu *vcpu, bool fast, u64 param)
  1236. {
  1237. struct eventfd_ctx *eventfd;
  1238. if (unlikely(!fast)) {
  1239. int ret;
  1240. gpa_t gpa = param;
  1241. if ((gpa & (__alignof__(param) - 1)) ||
  1242. offset_in_page(gpa) + sizeof(param) > PAGE_SIZE)
  1243. return HV_STATUS_INVALID_ALIGNMENT;
  1244. ret = kvm_vcpu_read_guest(vcpu, gpa, &param, sizeof(param));
  1245. if (ret < 0)
  1246. return HV_STATUS_INVALID_ALIGNMENT;
  1247. }
  1248. /*
  1249. * Per spec, bits 32-47 contain the extra "flag number". However, we
  1250. * have no use for it, and in all known usecases it is zero, so just
  1251. * report lookup failure if it isn't.
  1252. */
  1253. if (param & 0xffff00000000ULL)
  1254. return HV_STATUS_INVALID_PORT_ID;
  1255. /* remaining bits are reserved-zero */
  1256. if (param & ~KVM_HYPERV_CONN_ID_MASK)
  1257. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1258. /* the eventfd is protected by vcpu->kvm->srcu, but conn_to_evt isn't */
  1259. rcu_read_lock();
  1260. eventfd = idr_find(&vcpu->kvm->arch.hyperv.conn_to_evt, param);
  1261. rcu_read_unlock();
  1262. if (!eventfd)
  1263. return HV_STATUS_INVALID_PORT_ID;
  1264. eventfd_signal(eventfd, 1);
  1265. return HV_STATUS_SUCCESS;
  1266. }
  1267. int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
  1268. {
  1269. u64 param, ingpa, outgpa, ret = HV_STATUS_SUCCESS;
  1270. uint16_t code, rep_idx, rep_cnt;
  1271. bool fast, longmode, rep;
  1272. /*
  1273. * hypercall generates UD from non zero cpl and real mode
  1274. * per HYPER-V spec
  1275. */
  1276. if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
  1277. kvm_queue_exception(vcpu, UD_VECTOR);
  1278. return 1;
  1279. }
  1280. longmode = is_64_bit_mode(vcpu);
  1281. if (!longmode) {
  1282. param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
  1283. (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
  1284. ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
  1285. (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
  1286. outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
  1287. (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
  1288. }
  1289. #ifdef CONFIG_X86_64
  1290. else {
  1291. param = kvm_register_read(vcpu, VCPU_REGS_RCX);
  1292. ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
  1293. outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
  1294. }
  1295. #endif
  1296. code = param & 0xffff;
  1297. fast = !!(param & HV_HYPERCALL_FAST_BIT);
  1298. rep_cnt = (param >> HV_HYPERCALL_REP_COMP_OFFSET) & 0xfff;
  1299. rep_idx = (param >> HV_HYPERCALL_REP_START_OFFSET) & 0xfff;
  1300. rep = !!(rep_cnt || rep_idx);
  1301. trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
  1302. switch (code) {
  1303. case HVCALL_NOTIFY_LONG_SPIN_WAIT:
  1304. if (unlikely(rep)) {
  1305. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1306. break;
  1307. }
  1308. kvm_vcpu_on_spin(vcpu, true);
  1309. break;
  1310. case HVCALL_SIGNAL_EVENT:
  1311. if (unlikely(rep)) {
  1312. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1313. break;
  1314. }
  1315. ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);
  1316. if (ret != HV_STATUS_INVALID_PORT_ID)
  1317. break;
  1318. /* maybe userspace knows this conn_id: fall through */
  1319. case HVCALL_POST_MESSAGE:
  1320. /* don't bother userspace if it has no way to handle it */
  1321. if (unlikely(rep || !vcpu_to_synic(vcpu)->active)) {
  1322. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1323. break;
  1324. }
  1325. vcpu->run->exit_reason = KVM_EXIT_HYPERV;
  1326. vcpu->run->hyperv.type = KVM_EXIT_HYPERV_HCALL;
  1327. vcpu->run->hyperv.u.hcall.input = param;
  1328. vcpu->run->hyperv.u.hcall.params[0] = ingpa;
  1329. vcpu->run->hyperv.u.hcall.params[1] = outgpa;
  1330. vcpu->arch.complete_userspace_io =
  1331. kvm_hv_hypercall_complete_userspace;
  1332. return 0;
  1333. case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST:
  1334. if (unlikely(fast || !rep_cnt || rep_idx)) {
  1335. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1336. break;
  1337. }
  1338. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
  1339. break;
  1340. case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE:
  1341. if (unlikely(fast || rep)) {
  1342. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1343. break;
  1344. }
  1345. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
  1346. break;
  1347. case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX:
  1348. if (unlikely(fast || !rep_cnt || rep_idx)) {
  1349. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1350. break;
  1351. }
  1352. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
  1353. break;
  1354. case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX:
  1355. if (unlikely(fast || rep)) {
  1356. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1357. break;
  1358. }
  1359. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
  1360. break;
  1361. default:
  1362. ret = HV_STATUS_INVALID_HYPERCALL_CODE;
  1363. break;
  1364. }
  1365. return kvm_hv_hypercall_complete(vcpu, ret);
  1366. }
  1367. void kvm_hv_init_vm(struct kvm *kvm)
  1368. {
  1369. mutex_init(&kvm->arch.hyperv.hv_lock);
  1370. idr_init(&kvm->arch.hyperv.conn_to_evt);
  1371. }
  1372. void kvm_hv_destroy_vm(struct kvm *kvm)
  1373. {
  1374. struct eventfd_ctx *eventfd;
  1375. int i;
  1376. idr_for_each_entry(&kvm->arch.hyperv.conn_to_evt, eventfd, i)
  1377. eventfd_ctx_put(eventfd);
  1378. idr_destroy(&kvm->arch.hyperv.conn_to_evt);
  1379. }
  1380. static int kvm_hv_eventfd_assign(struct kvm *kvm, u32 conn_id, int fd)
  1381. {
  1382. struct kvm_hv *hv = &kvm->arch.hyperv;
  1383. struct eventfd_ctx *eventfd;
  1384. int ret;
  1385. eventfd = eventfd_ctx_fdget(fd);
  1386. if (IS_ERR(eventfd))
  1387. return PTR_ERR(eventfd);
  1388. mutex_lock(&hv->hv_lock);
  1389. ret = idr_alloc(&hv->conn_to_evt, eventfd, conn_id, conn_id + 1,
  1390. GFP_KERNEL);
  1391. mutex_unlock(&hv->hv_lock);
  1392. if (ret >= 0)
  1393. return 0;
  1394. if (ret == -ENOSPC)
  1395. ret = -EEXIST;
  1396. eventfd_ctx_put(eventfd);
  1397. return ret;
  1398. }
  1399. static int kvm_hv_eventfd_deassign(struct kvm *kvm, u32 conn_id)
  1400. {
  1401. struct kvm_hv *hv = &kvm->arch.hyperv;
  1402. struct eventfd_ctx *eventfd;
  1403. mutex_lock(&hv->hv_lock);
  1404. eventfd = idr_remove(&hv->conn_to_evt, conn_id);
  1405. mutex_unlock(&hv->hv_lock);
  1406. if (!eventfd)
  1407. return -ENOENT;
  1408. synchronize_srcu(&kvm->srcu);
  1409. eventfd_ctx_put(eventfd);
  1410. return 0;
  1411. }
  1412. int kvm_vm_ioctl_hv_eventfd(struct kvm *kvm, struct kvm_hyperv_eventfd *args)
  1413. {
  1414. if ((args->flags & ~KVM_HYPERV_EVENTFD_DEASSIGN) ||
  1415. (args->conn_id & ~KVM_HYPERV_CONN_ID_MASK))
  1416. return -EINVAL;
  1417. if (args->flags == KVM_HYPERV_EVENTFD_DEASSIGN)
  1418. return kvm_hv_eventfd_deassign(kvm, args->conn_id);
  1419. return kvm_hv_eventfd_assign(kvm, args->conn_id, args->fd);
  1420. }