bitops_32.h 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428
  1. #ifndef _I386_BITOPS_H
  2. #define _I386_BITOPS_H
  3. /*
  4. * Copyright 1992, Linus Torvalds.
  5. */
  6. #ifndef _LINUX_BITOPS_H
  7. #error only <linux/bitops.h> can be included directly
  8. #endif
  9. #include <linux/compiler.h>
  10. #include <asm/alternative.h>
  11. /*
  12. * These have to be done with inline assembly: that way the bit-setting
  13. * is guaranteed to be atomic. All bit operations return 0 if the bit
  14. * was cleared before the operation and != 0 if it was not.
  15. *
  16. * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
  17. */
  18. #define ADDR (*(volatile long *) addr)
  19. /**
  20. * set_bit - Atomically set a bit in memory
  21. * @nr: the bit to set
  22. * @addr: the address to start counting from
  23. *
  24. * This function is atomic and may not be reordered. See __set_bit()
  25. * if you do not require the atomic guarantees.
  26. *
  27. * Note: there are no guarantees that this function will not be reordered
  28. * on non x86 architectures, so if you are writing portable code,
  29. * make sure not to rely on its reordering guarantees.
  30. *
  31. * Note that @nr may be almost arbitrarily large; this function is not
  32. * restricted to acting on a single-word quantity.
  33. */
  34. static inline void set_bit(int nr, volatile unsigned long * addr)
  35. {
  36. __asm__ __volatile__( LOCK_PREFIX
  37. "btsl %1,%0"
  38. :"+m" (ADDR)
  39. :"Ir" (nr));
  40. }
  41. /**
  42. * __set_bit - Set a bit in memory
  43. * @nr: the bit to set
  44. * @addr: the address to start counting from
  45. *
  46. * Unlike set_bit(), this function is non-atomic and may be reordered.
  47. * If it's called on the same region of memory simultaneously, the effect
  48. * may be that only one operation succeeds.
  49. */
  50. static inline void __set_bit(int nr, volatile unsigned long * addr)
  51. {
  52. __asm__(
  53. "btsl %1,%0"
  54. :"+m" (ADDR)
  55. :"Ir" (nr));
  56. }
  57. /**
  58. * clear_bit - Clears a bit in memory
  59. * @nr: Bit to clear
  60. * @addr: Address to start counting from
  61. *
  62. * clear_bit() is atomic and may not be reordered. However, it does
  63. * not contain a memory barrier, so if it is used for locking purposes,
  64. * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
  65. * in order to ensure changes are visible on other processors.
  66. */
  67. static inline void clear_bit(int nr, volatile unsigned long * addr)
  68. {
  69. __asm__ __volatile__( LOCK_PREFIX
  70. "btrl %1,%0"
  71. :"+m" (ADDR)
  72. :"Ir" (nr));
  73. }
  74. static inline void __clear_bit(int nr, volatile unsigned long * addr)
  75. {
  76. __asm__ __volatile__(
  77. "btrl %1,%0"
  78. :"+m" (ADDR)
  79. :"Ir" (nr));
  80. }
  81. #define smp_mb__before_clear_bit() barrier()
  82. #define smp_mb__after_clear_bit() barrier()
  83. /**
  84. * __change_bit - Toggle a bit in memory
  85. * @nr: the bit to change
  86. * @addr: the address to start counting from
  87. *
  88. * Unlike change_bit(), this function is non-atomic and may be reordered.
  89. * If it's called on the same region of memory simultaneously, the effect
  90. * may be that only one operation succeeds.
  91. */
  92. static inline void __change_bit(int nr, volatile unsigned long * addr)
  93. {
  94. __asm__ __volatile__(
  95. "btcl %1,%0"
  96. :"+m" (ADDR)
  97. :"Ir" (nr));
  98. }
  99. /**
  100. * change_bit - Toggle a bit in memory
  101. * @nr: Bit to change
  102. * @addr: Address to start counting from
  103. *
  104. * change_bit() is atomic and may not be reordered. It may be
  105. * reordered on other architectures than x86.
  106. * Note that @nr may be almost arbitrarily large; this function is not
  107. * restricted to acting on a single-word quantity.
  108. */
  109. static inline void change_bit(int nr, volatile unsigned long * addr)
  110. {
  111. __asm__ __volatile__( LOCK_PREFIX
  112. "btcl %1,%0"
  113. :"+m" (ADDR)
  114. :"Ir" (nr));
  115. }
  116. /**
  117. * test_and_set_bit - Set a bit and return its old value
  118. * @nr: Bit to set
  119. * @addr: Address to count from
  120. *
  121. * This operation is atomic and cannot be reordered.
  122. * It may be reordered on other architectures than x86.
  123. * It also implies a memory barrier.
  124. */
  125. static inline int test_and_set_bit(int nr, volatile unsigned long * addr)
  126. {
  127. int oldbit;
  128. __asm__ __volatile__( LOCK_PREFIX
  129. "btsl %2,%1\n\tsbbl %0,%0"
  130. :"=r" (oldbit),"+m" (ADDR)
  131. :"Ir" (nr) : "memory");
  132. return oldbit;
  133. }
  134. /**
  135. * __test_and_set_bit - Set a bit and return its old value
  136. * @nr: Bit to set
  137. * @addr: Address to count from
  138. *
  139. * This operation is non-atomic and can be reordered.
  140. * If two examples of this operation race, one can appear to succeed
  141. * but actually fail. You must protect multiple accesses with a lock.
  142. */
  143. static inline int __test_and_set_bit(int nr, volatile unsigned long * addr)
  144. {
  145. int oldbit;
  146. __asm__(
  147. "btsl %2,%1\n\tsbbl %0,%0"
  148. :"=r" (oldbit),"+m" (ADDR)
  149. :"Ir" (nr));
  150. return oldbit;
  151. }
  152. /**
  153. * test_and_clear_bit - Clear a bit and return its old value
  154. * @nr: Bit to clear
  155. * @addr: Address to count from
  156. *
  157. * This operation is atomic and cannot be reordered.
  158. * It can be reorderdered on other architectures other than x86.
  159. * It also implies a memory barrier.
  160. */
  161. static inline int test_and_clear_bit(int nr, volatile unsigned long * addr)
  162. {
  163. int oldbit;
  164. __asm__ __volatile__( LOCK_PREFIX
  165. "btrl %2,%1\n\tsbbl %0,%0"
  166. :"=r" (oldbit),"+m" (ADDR)
  167. :"Ir" (nr) : "memory");
  168. return oldbit;
  169. }
  170. /**
  171. * __test_and_clear_bit - Clear a bit and return its old value
  172. * @nr: Bit to clear
  173. * @addr: Address to count from
  174. *
  175. * This operation is non-atomic and can be reordered.
  176. * If two examples of this operation race, one can appear to succeed
  177. * but actually fail. You must protect multiple accesses with a lock.
  178. */
  179. static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
  180. {
  181. int oldbit;
  182. __asm__(
  183. "btrl %2,%1\n\tsbbl %0,%0"
  184. :"=r" (oldbit),"+m" (ADDR)
  185. :"Ir" (nr));
  186. return oldbit;
  187. }
  188. /* WARNING: non atomic and it can be reordered! */
  189. static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
  190. {
  191. int oldbit;
  192. __asm__ __volatile__(
  193. "btcl %2,%1\n\tsbbl %0,%0"
  194. :"=r" (oldbit),"+m" (ADDR)
  195. :"Ir" (nr) : "memory");
  196. return oldbit;
  197. }
  198. /**
  199. * test_and_change_bit - Change a bit and return its old value
  200. * @nr: Bit to change
  201. * @addr: Address to count from
  202. *
  203. * This operation is atomic and cannot be reordered.
  204. * It also implies a memory barrier.
  205. */
  206. static inline int test_and_change_bit(int nr, volatile unsigned long* addr)
  207. {
  208. int oldbit;
  209. __asm__ __volatile__( LOCK_PREFIX
  210. "btcl %2,%1\n\tsbbl %0,%0"
  211. :"=r" (oldbit),"+m" (ADDR)
  212. :"Ir" (nr) : "memory");
  213. return oldbit;
  214. }
  215. #if 0 /* Fool kernel-doc since it doesn't do macros yet */
  216. /**
  217. * test_bit - Determine whether a bit is set
  218. * @nr: bit number to test
  219. * @addr: Address to start counting from
  220. */
  221. static int test_bit(int nr, const volatile void * addr);
  222. #endif
  223. static __always_inline int constant_test_bit(int nr, const volatile unsigned long *addr)
  224. {
  225. return ((1UL << (nr & 31)) & (addr[nr >> 5])) != 0;
  226. }
  227. static inline int variable_test_bit(int nr, const volatile unsigned long * addr)
  228. {
  229. int oldbit;
  230. __asm__ __volatile__(
  231. "btl %2,%1\n\tsbbl %0,%0"
  232. :"=r" (oldbit)
  233. :"m" (ADDR),"Ir" (nr));
  234. return oldbit;
  235. }
  236. #define test_bit(nr,addr) \
  237. (__builtin_constant_p(nr) ? \
  238. constant_test_bit((nr),(addr)) : \
  239. variable_test_bit((nr),(addr)))
  240. #undef ADDR
  241. /**
  242. * find_first_zero_bit - find the first zero bit in a memory region
  243. * @addr: The address to start the search at
  244. * @size: The maximum size to search
  245. *
  246. * Returns the bit-number of the first zero bit, not the number of the byte
  247. * containing a bit.
  248. */
  249. static inline int find_first_zero_bit(const unsigned long *addr, unsigned size)
  250. {
  251. int d0, d1, d2;
  252. int res;
  253. if (!size)
  254. return 0;
  255. /* This looks at memory. Mark it volatile to tell gcc not to move it around */
  256. __asm__ __volatile__(
  257. "movl $-1,%%eax\n\t"
  258. "xorl %%edx,%%edx\n\t"
  259. "repe; scasl\n\t"
  260. "je 1f\n\t"
  261. "xorl -4(%%edi),%%eax\n\t"
  262. "subl $4,%%edi\n\t"
  263. "bsfl %%eax,%%edx\n"
  264. "1:\tsubl %%ebx,%%edi\n\t"
  265. "shll $3,%%edi\n\t"
  266. "addl %%edi,%%edx"
  267. :"=d" (res), "=&c" (d0), "=&D" (d1), "=&a" (d2)
  268. :"1" ((size + 31) >> 5), "2" (addr), "b" (addr) : "memory");
  269. return res;
  270. }
  271. /**
  272. * find_next_zero_bit - find the first zero bit in a memory region
  273. * @addr: The address to base the search on
  274. * @offset: The bitnumber to start searching at
  275. * @size: The maximum size to search
  276. */
  277. int find_next_zero_bit(const unsigned long *addr, int size, int offset);
  278. /**
  279. * __ffs - find first bit in word.
  280. * @word: The word to search
  281. *
  282. * Undefined if no bit exists, so code should check against 0 first.
  283. */
  284. static inline unsigned long __ffs(unsigned long word)
  285. {
  286. __asm__("bsfl %1,%0"
  287. :"=r" (word)
  288. :"rm" (word));
  289. return word;
  290. }
  291. /**
  292. * find_first_bit - find the first set bit in a memory region
  293. * @addr: The address to start the search at
  294. * @size: The maximum size to search
  295. *
  296. * Returns the bit-number of the first set bit, not the number of the byte
  297. * containing a bit.
  298. */
  299. static inline unsigned find_first_bit(const unsigned long *addr, unsigned size)
  300. {
  301. unsigned x = 0;
  302. while (x < size) {
  303. unsigned long val = *addr++;
  304. if (val)
  305. return __ffs(val) + x;
  306. x += (sizeof(*addr)<<3);
  307. }
  308. return x;
  309. }
  310. /**
  311. * find_next_bit - find the first set bit in a memory region
  312. * @addr: The address to base the search on
  313. * @offset: The bitnumber to start searching at
  314. * @size: The maximum size to search
  315. */
  316. int find_next_bit(const unsigned long *addr, int size, int offset);
  317. /**
  318. * ffz - find first zero in word.
  319. * @word: The word to search
  320. *
  321. * Undefined if no zero exists, so code should check against ~0UL first.
  322. */
  323. static inline unsigned long ffz(unsigned long word)
  324. {
  325. __asm__("bsfl %1,%0"
  326. :"=r" (word)
  327. :"r" (~word));
  328. return word;
  329. }
  330. #ifdef __KERNEL__
  331. #include <asm-generic/bitops/sched.h>
  332. /**
  333. * ffs - find first bit set
  334. * @x: the word to search
  335. *
  336. * This is defined the same way as
  337. * the libc and compiler builtin ffs routines, therefore
  338. * differs in spirit from the above ffz() (man ffs).
  339. */
  340. static inline int ffs(int x)
  341. {
  342. int r;
  343. __asm__("bsfl %1,%0\n\t"
  344. "jnz 1f\n\t"
  345. "movl $-1,%0\n"
  346. "1:" : "=r" (r) : "rm" (x));
  347. return r+1;
  348. }
  349. /**
  350. * fls - find last bit set
  351. * @x: the word to search
  352. *
  353. * This is defined the same way as ffs().
  354. */
  355. static inline int fls(int x)
  356. {
  357. int r;
  358. __asm__("bsrl %1,%0\n\t"
  359. "jnz 1f\n\t"
  360. "movl $-1,%0\n"
  361. "1:" : "=r" (r) : "rm" (x));
  362. return r+1;
  363. }
  364. #include <asm-generic/bitops/hweight.h>
  365. #include <asm-generic/bitops/lock.h>
  366. #endif /* __KERNEL__ */
  367. #include <asm-generic/bitops/fls64.h>
  368. #ifdef __KERNEL__
  369. #include <asm-generic/bitops/ext2-non-atomic.h>
  370. #define ext2_set_bit_atomic(lock,nr,addr) \
  371. test_and_set_bit((nr),(unsigned long*)addr)
  372. #define ext2_clear_bit_atomic(lock,nr, addr) \
  373. test_and_clear_bit((nr),(unsigned long*)addr)
  374. #include <asm-generic/bitops/minix.h>
  375. #endif /* __KERNEL__ */
  376. #endif /* _I386_BITOPS_H */