patch_cirrus.c 32 KB

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  1. /*
  2. * HD audio interface patch for Cirrus Logic CS420x chip
  3. *
  4. * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
  5. *
  6. * This driver is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This driver is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/init.h>
  21. #include <linux/slab.h>
  22. #include <linux/module.h>
  23. #include <sound/core.h>
  24. #include <sound/tlv.h>
  25. #include "hda_codec.h"
  26. #include "hda_local.h"
  27. #include "hda_auto_parser.h"
  28. #include "hda_jack.h"
  29. #include "hda_generic.h"
  30. /*
  31. */
  32. struct cs_spec {
  33. struct hda_gen_spec gen;
  34. unsigned int gpio_mask;
  35. unsigned int gpio_dir;
  36. unsigned int gpio_data;
  37. unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
  38. unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
  39. /* CS421x */
  40. unsigned int spdif_detect:1;
  41. unsigned int spdif_present:1;
  42. unsigned int sense_b:1;
  43. hda_nid_t vendor_nid;
  44. /* for MBP SPDIF control */
  45. int (*spdif_sw_put)(struct snd_kcontrol *kcontrol,
  46. struct snd_ctl_elem_value *ucontrol);
  47. };
  48. /* available models with CS420x */
  49. enum {
  50. CS420X_MBP53,
  51. CS420X_MBP55,
  52. CS420X_IMAC27,
  53. CS420X_GPIO_13,
  54. CS420X_GPIO_23,
  55. CS420X_MBP101,
  56. CS420X_MBP81,
  57. CS420X_MBA42,
  58. CS420X_AUTO,
  59. /* aliases */
  60. CS420X_IMAC27_122 = CS420X_GPIO_23,
  61. CS420X_APPLE = CS420X_GPIO_13,
  62. };
  63. /* CS421x boards */
  64. enum {
  65. CS421X_CDB4210,
  66. CS421X_SENSE_B,
  67. CS421X_STUMPY,
  68. };
  69. /* Vendor-specific processing widget */
  70. #define CS420X_VENDOR_NID 0x11
  71. #define CS_DIG_OUT1_PIN_NID 0x10
  72. #define CS_DIG_OUT2_PIN_NID 0x15
  73. #define CS_DMIC1_PIN_NID 0x0e
  74. #define CS_DMIC2_PIN_NID 0x12
  75. /* coef indices */
  76. #define IDX_SPDIF_STAT 0x0000
  77. #define IDX_SPDIF_CTL 0x0001
  78. #define IDX_ADC_CFG 0x0002
  79. /* SZC bitmask, 4 modes below:
  80. * 0 = immediate,
  81. * 1 = digital immediate, analog zero-cross
  82. * 2 = digtail & analog soft-ramp
  83. * 3 = digital soft-ramp, analog zero-cross
  84. */
  85. #define CS_COEF_ADC_SZC_MASK (3 << 0)
  86. #define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
  87. #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
  88. /* PGA mode: 0 = differential, 1 = signle-ended */
  89. #define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
  90. #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
  91. #define IDX_DAC_CFG 0x0003
  92. /* SZC bitmask, 4 modes below:
  93. * 0 = Immediate
  94. * 1 = zero-cross
  95. * 2 = soft-ramp
  96. * 3 = soft-ramp on zero-cross
  97. */
  98. #define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
  99. #define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
  100. #define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
  101. #define IDX_BEEP_CFG 0x0004
  102. /* 0x0008 - test reg key */
  103. /* 0x0009 - 0x0014 -> 12 test regs */
  104. /* 0x0015 - visibility reg */
  105. /* Cirrus Logic CS4208 */
  106. #define CS4208_VENDOR_NID 0x24
  107. /*
  108. * Cirrus Logic CS4210
  109. *
  110. * 1 DAC => HP(sense) / Speakers,
  111. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  112. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  113. */
  114. #define CS4210_DAC_NID 0x02
  115. #define CS4210_ADC_NID 0x03
  116. #define CS4210_VENDOR_NID 0x0B
  117. #define CS421X_DMIC_PIN_NID 0x09 /* Port E */
  118. #define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
  119. #define CS421X_IDX_DEV_CFG 0x01
  120. #define CS421X_IDX_ADC_CFG 0x02
  121. #define CS421X_IDX_DAC_CFG 0x03
  122. #define CS421X_IDX_SPK_CTL 0x04
  123. /* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
  124. #define CS4213_VENDOR_NID 0x09
  125. static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
  126. {
  127. struct cs_spec *spec = codec->spec;
  128. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  129. AC_VERB_SET_COEF_INDEX, idx);
  130. return snd_hda_codec_read(codec, spec->vendor_nid, 0,
  131. AC_VERB_GET_PROC_COEF, 0);
  132. }
  133. static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
  134. unsigned int coef)
  135. {
  136. struct cs_spec *spec = codec->spec;
  137. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  138. AC_VERB_SET_COEF_INDEX, idx);
  139. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  140. AC_VERB_SET_PROC_COEF, coef);
  141. }
  142. /*
  143. * auto-mute and auto-mic switching
  144. * CS421x auto-output redirecting
  145. * HP/SPK/SPDIF
  146. */
  147. static void cs_automute(struct hda_codec *codec)
  148. {
  149. struct cs_spec *spec = codec->spec;
  150. /* mute HPs if spdif jack (SENSE_B) is present */
  151. spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
  152. snd_hda_gen_update_outputs(codec);
  153. if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
  154. spec->gpio_data = spec->gen.hp_jack_present ?
  155. spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
  156. snd_hda_codec_write(codec, 0x01, 0,
  157. AC_VERB_SET_GPIO_DATA, spec->gpio_data);
  158. }
  159. }
  160. static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
  161. {
  162. unsigned int val;
  163. val = snd_hda_codec_get_pincfg(codec, nid);
  164. return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
  165. }
  166. static void init_input_coef(struct hda_codec *codec)
  167. {
  168. struct cs_spec *spec = codec->spec;
  169. unsigned int coef;
  170. /* CS420x has multiple ADC, CS421x has single ADC */
  171. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  172. coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
  173. if (is_active_pin(codec, CS_DMIC2_PIN_NID))
  174. coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
  175. if (is_active_pin(codec, CS_DMIC1_PIN_NID))
  176. coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
  177. * No effect if SPDIF_OUT2 is
  178. * selected in IDX_SPDIF_CTL.
  179. */
  180. cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
  181. }
  182. }
  183. static const struct hda_verb cs_coef_init_verbs[] = {
  184. {0x11, AC_VERB_SET_PROC_STATE, 1},
  185. {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
  186. {0x11, AC_VERB_SET_PROC_COEF,
  187. (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
  188. | 0x0040 /* Mute DACs on FIFO error */
  189. | 0x1000 /* Enable DACs High Pass Filter */
  190. | 0x0400 /* Disable Coefficient Auto increment */
  191. )},
  192. /* ADC1/2 - Digital and Analog Soft Ramp */
  193. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  194. {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
  195. /* Beep */
  196. {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
  197. {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
  198. {} /* terminator */
  199. };
  200. static const struct hda_verb cs4208_coef_init_verbs[] = {
  201. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  202. {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  203. {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
  204. {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
  205. {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
  206. {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
  207. {} /* terminator */
  208. };
  209. /* Errata: CS4207 rev C0/C1/C2 Silicon
  210. *
  211. * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
  212. *
  213. * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
  214. * may be excessive (up to an additional 200 μA), which is most easily
  215. * observed while the part is being held in reset (RESET# active low).
  216. *
  217. * Root Cause: At initial powerup of the device, the logic that drives
  218. * the clock and write enable to the S/PDIF SRC RAMs is not properly
  219. * initialized.
  220. * Certain random patterns will cause a steady leakage current in those
  221. * RAM cells. The issue will resolve once the SRCs are used (turned on).
  222. *
  223. * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
  224. * blocks, which will alleviate the issue.
  225. */
  226. static const struct hda_verb cs_errata_init_verbs[] = {
  227. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  228. {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  229. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  230. {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
  231. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  232. {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
  233. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  234. {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
  235. {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
  236. {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
  237. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  238. {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
  239. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  240. {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
  241. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  242. {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
  243. {0x11, AC_VERB_SET_PROC_STATE, 0x00},
  244. #if 0 /* Don't to set to D3 as we are in power-up sequence */
  245. {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
  246. {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
  247. /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
  248. #endif
  249. {} /* terminator */
  250. };
  251. /* SPDIF setup */
  252. static void init_digital_coef(struct hda_codec *codec)
  253. {
  254. unsigned int coef;
  255. coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
  256. coef |= 0x0008; /* Replace with mute on error */
  257. if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
  258. coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
  259. * SPDIF_OUT2 is shared with GPIO1 and
  260. * DMIC_SDA2.
  261. */
  262. cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
  263. }
  264. static int cs_init(struct hda_codec *codec)
  265. {
  266. struct cs_spec *spec = codec->spec;
  267. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  268. /* init_verb sequence for C0/C1/C2 errata*/
  269. snd_hda_sequence_write(codec, cs_errata_init_verbs);
  270. snd_hda_sequence_write(codec, cs_coef_init_verbs);
  271. } else if (spec->vendor_nid == CS4208_VENDOR_NID) {
  272. snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
  273. }
  274. snd_hda_gen_init(codec);
  275. if (spec->gpio_mask) {
  276. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  277. spec->gpio_mask);
  278. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  279. spec->gpio_dir);
  280. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  281. spec->gpio_data);
  282. }
  283. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  284. init_input_coef(codec);
  285. init_digital_coef(codec);
  286. }
  287. return 0;
  288. }
  289. static int cs_build_controls(struct hda_codec *codec)
  290. {
  291. int err;
  292. err = snd_hda_gen_build_controls(codec);
  293. if (err < 0)
  294. return err;
  295. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD);
  296. return 0;
  297. }
  298. #define cs_free snd_hda_gen_free
  299. static const struct hda_codec_ops cs_patch_ops = {
  300. .build_controls = cs_build_controls,
  301. .build_pcms = snd_hda_gen_build_pcms,
  302. .init = cs_init,
  303. .free = cs_free,
  304. .unsol_event = snd_hda_jack_unsol_event,
  305. };
  306. static int cs_parse_auto_config(struct hda_codec *codec)
  307. {
  308. struct cs_spec *spec = codec->spec;
  309. int err;
  310. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  311. if (err < 0)
  312. return err;
  313. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  314. if (err < 0)
  315. return err;
  316. return 0;
  317. }
  318. static const struct hda_model_fixup cs420x_models[] = {
  319. { .id = CS420X_MBP53, .name = "mbp53" },
  320. { .id = CS420X_MBP55, .name = "mbp55" },
  321. { .id = CS420X_IMAC27, .name = "imac27" },
  322. { .id = CS420X_IMAC27_122, .name = "imac27_122" },
  323. { .id = CS420X_APPLE, .name = "apple" },
  324. { .id = CS420X_MBP101, .name = "mbp101" },
  325. { .id = CS420X_MBP81, .name = "mbp81" },
  326. { .id = CS420X_MBA42, .name = "mba42" },
  327. {}
  328. };
  329. static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
  330. SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
  331. SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
  332. SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
  333. SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
  334. /* this conflicts with too many other models */
  335. /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
  336. /* codec SSID */
  337. SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
  338. SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
  339. SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
  340. SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
  341. SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
  342. {} /* terminator */
  343. };
  344. static const struct hda_pintbl mbp53_pincfgs[] = {
  345. { 0x09, 0x012b4050 },
  346. { 0x0a, 0x90100141 },
  347. { 0x0b, 0x90100140 },
  348. { 0x0c, 0x018b3020 },
  349. { 0x0d, 0x90a00110 },
  350. { 0x0e, 0x400000f0 },
  351. { 0x0f, 0x01cbe030 },
  352. { 0x10, 0x014be060 },
  353. { 0x12, 0x400000f0 },
  354. { 0x15, 0x400000f0 },
  355. {} /* terminator */
  356. };
  357. static const struct hda_pintbl mbp55_pincfgs[] = {
  358. { 0x09, 0x012b4030 },
  359. { 0x0a, 0x90100121 },
  360. { 0x0b, 0x90100120 },
  361. { 0x0c, 0x400000f0 },
  362. { 0x0d, 0x90a00110 },
  363. { 0x0e, 0x400000f0 },
  364. { 0x0f, 0x400000f0 },
  365. { 0x10, 0x014be040 },
  366. { 0x12, 0x400000f0 },
  367. { 0x15, 0x400000f0 },
  368. {} /* terminator */
  369. };
  370. static const struct hda_pintbl imac27_pincfgs[] = {
  371. { 0x09, 0x012b4050 },
  372. { 0x0a, 0x90100140 },
  373. { 0x0b, 0x90100142 },
  374. { 0x0c, 0x018b3020 },
  375. { 0x0d, 0x90a00110 },
  376. { 0x0e, 0x400000f0 },
  377. { 0x0f, 0x01cbe030 },
  378. { 0x10, 0x014be060 },
  379. { 0x12, 0x01ab9070 },
  380. { 0x15, 0x400000f0 },
  381. {} /* terminator */
  382. };
  383. static const struct hda_pintbl mbp101_pincfgs[] = {
  384. { 0x0d, 0x40ab90f0 },
  385. { 0x0e, 0x90a600f0 },
  386. { 0x12, 0x50a600f0 },
  387. {} /* terminator */
  388. };
  389. static const struct hda_pintbl mba42_pincfgs[] = {
  390. { 0x09, 0x012b4030 }, /* HP */
  391. { 0x0a, 0x400000f0 },
  392. { 0x0b, 0x90100120 }, /* speaker */
  393. { 0x0c, 0x400000f0 },
  394. { 0x0d, 0x90a00110 }, /* mic */
  395. { 0x0e, 0x400000f0 },
  396. { 0x0f, 0x400000f0 },
  397. { 0x10, 0x400000f0 },
  398. { 0x12, 0x400000f0 },
  399. { 0x15, 0x400000f0 },
  400. {} /* terminator */
  401. };
  402. static const struct hda_pintbl mba6_pincfgs[] = {
  403. { 0x10, 0x032120f0 }, /* HP */
  404. { 0x11, 0x500000f0 },
  405. { 0x12, 0x90100010 }, /* Speaker */
  406. { 0x13, 0x500000f0 },
  407. { 0x14, 0x500000f0 },
  408. { 0x15, 0x770000f0 },
  409. { 0x16, 0x770000f0 },
  410. { 0x17, 0x430000f0 },
  411. { 0x18, 0x43ab9030 }, /* Mic */
  412. { 0x19, 0x770000f0 },
  413. { 0x1a, 0x770000f0 },
  414. { 0x1b, 0x770000f0 },
  415. { 0x1c, 0x90a00090 },
  416. { 0x1d, 0x500000f0 },
  417. { 0x1e, 0x500000f0 },
  418. { 0x1f, 0x500000f0 },
  419. { 0x20, 0x500000f0 },
  420. { 0x21, 0x430000f0 },
  421. { 0x22, 0x430000f0 },
  422. {} /* terminator */
  423. };
  424. static void cs420x_fixup_gpio_13(struct hda_codec *codec,
  425. const struct hda_fixup *fix, int action)
  426. {
  427. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  428. struct cs_spec *spec = codec->spec;
  429. spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
  430. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  431. spec->gpio_mask = spec->gpio_dir =
  432. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  433. }
  434. }
  435. static void cs420x_fixup_gpio_23(struct hda_codec *codec,
  436. const struct hda_fixup *fix, int action)
  437. {
  438. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  439. struct cs_spec *spec = codec->spec;
  440. spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
  441. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  442. spec->gpio_mask = spec->gpio_dir =
  443. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  444. }
  445. }
  446. static const struct hda_fixup cs420x_fixups[] = {
  447. [CS420X_MBP53] = {
  448. .type = HDA_FIXUP_PINS,
  449. .v.pins = mbp53_pincfgs,
  450. .chained = true,
  451. .chain_id = CS420X_APPLE,
  452. },
  453. [CS420X_MBP55] = {
  454. .type = HDA_FIXUP_PINS,
  455. .v.pins = mbp55_pincfgs,
  456. .chained = true,
  457. .chain_id = CS420X_GPIO_13,
  458. },
  459. [CS420X_IMAC27] = {
  460. .type = HDA_FIXUP_PINS,
  461. .v.pins = imac27_pincfgs,
  462. .chained = true,
  463. .chain_id = CS420X_GPIO_13,
  464. },
  465. [CS420X_GPIO_13] = {
  466. .type = HDA_FIXUP_FUNC,
  467. .v.func = cs420x_fixup_gpio_13,
  468. },
  469. [CS420X_GPIO_23] = {
  470. .type = HDA_FIXUP_FUNC,
  471. .v.func = cs420x_fixup_gpio_23,
  472. },
  473. [CS420X_MBP101] = {
  474. .type = HDA_FIXUP_PINS,
  475. .v.pins = mbp101_pincfgs,
  476. .chained = true,
  477. .chain_id = CS420X_GPIO_13,
  478. },
  479. [CS420X_MBP81] = {
  480. .type = HDA_FIXUP_VERBS,
  481. .v.verbs = (const struct hda_verb[]) {
  482. /* internal mic ADC2: right only, single ended */
  483. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  484. {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
  485. {}
  486. },
  487. .chained = true,
  488. .chain_id = CS420X_GPIO_13,
  489. },
  490. [CS420X_MBA42] = {
  491. .type = HDA_FIXUP_PINS,
  492. .v.pins = mba42_pincfgs,
  493. .chained = true,
  494. .chain_id = CS420X_GPIO_13,
  495. },
  496. };
  497. static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
  498. {
  499. struct cs_spec *spec;
  500. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  501. if (!spec)
  502. return NULL;
  503. codec->spec = spec;
  504. spec->vendor_nid = vendor_nid;
  505. snd_hda_gen_spec_init(&spec->gen);
  506. return spec;
  507. }
  508. static int patch_cs420x(struct hda_codec *codec)
  509. {
  510. struct cs_spec *spec;
  511. int err;
  512. spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
  513. if (!spec)
  514. return -ENOMEM;
  515. spec->gen.automute_hook = cs_automute;
  516. snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
  517. cs420x_fixups);
  518. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  519. err = cs_parse_auto_config(codec);
  520. if (err < 0)
  521. goto error;
  522. codec->patch_ops = cs_patch_ops;
  523. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  524. return 0;
  525. error:
  526. cs_free(codec);
  527. return err;
  528. }
  529. /*
  530. * CS4208 support:
  531. * Its layout is no longer compatible with CS4206/CS4207
  532. */
  533. enum {
  534. CS4208_MAC_AUTO,
  535. CS4208_MBA6,
  536. CS4208_MBP11,
  537. CS4208_GPIO0,
  538. };
  539. static const struct hda_model_fixup cs4208_models[] = {
  540. { .id = CS4208_GPIO0, .name = "gpio0" },
  541. { .id = CS4208_MBA6, .name = "mba6" },
  542. { .id = CS4208_MBP11, .name = "mbp11" },
  543. {}
  544. };
  545. static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
  546. SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO),
  547. {} /* terminator */
  548. };
  549. /* codec SSID matching */
  550. static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = {
  551. SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11),
  552. SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
  553. SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
  554. {} /* terminator */
  555. };
  556. static void cs4208_fixup_gpio0(struct hda_codec *codec,
  557. const struct hda_fixup *fix, int action)
  558. {
  559. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  560. struct cs_spec *spec = codec->spec;
  561. spec->gpio_eapd_hp = 0;
  562. spec->gpio_eapd_speaker = 1;
  563. spec->gpio_mask = spec->gpio_dir =
  564. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  565. }
  566. }
  567. static const struct hda_fixup cs4208_fixups[];
  568. /* remap the fixup from codec SSID and apply it */
  569. static void cs4208_fixup_mac(struct hda_codec *codec,
  570. const struct hda_fixup *fix, int action)
  571. {
  572. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  573. return;
  574. codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
  575. snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups);
  576. if (codec->fixup_id == HDA_FIXUP_ID_NOT_SET)
  577. codec->fixup_id = CS4208_GPIO0; /* default fixup */
  578. snd_hda_apply_fixup(codec, action);
  579. }
  580. static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol,
  581. struct snd_ctl_elem_value *ucontrol)
  582. {
  583. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  584. struct cs_spec *spec = codec->spec;
  585. hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0];
  586. int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0;
  587. snd_hda_set_pin_ctl_cache(codec, pin, pinctl);
  588. return spec->spdif_sw_put(kcontrol, ucontrol);
  589. }
  590. /* hook the SPDIF switch */
  591. static void cs4208_fixup_spdif_switch(struct hda_codec *codec,
  592. const struct hda_fixup *fix, int action)
  593. {
  594. if (action == HDA_FIXUP_ACT_BUILD) {
  595. struct cs_spec *spec = codec->spec;
  596. struct snd_kcontrol *kctl;
  597. if (!spec->gen.autocfg.dig_out_pins[0])
  598. return;
  599. kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch");
  600. if (!kctl)
  601. return;
  602. spec->spdif_sw_put = kctl->put;
  603. kctl->put = cs4208_spdif_sw_put;
  604. }
  605. }
  606. static const struct hda_fixup cs4208_fixups[] = {
  607. [CS4208_MBA6] = {
  608. .type = HDA_FIXUP_PINS,
  609. .v.pins = mba6_pincfgs,
  610. .chained = true,
  611. .chain_id = CS4208_GPIO0,
  612. },
  613. [CS4208_MBP11] = {
  614. .type = HDA_FIXUP_FUNC,
  615. .v.func = cs4208_fixup_spdif_switch,
  616. .chained = true,
  617. .chain_id = CS4208_GPIO0,
  618. },
  619. [CS4208_GPIO0] = {
  620. .type = HDA_FIXUP_FUNC,
  621. .v.func = cs4208_fixup_gpio0,
  622. },
  623. [CS4208_MAC_AUTO] = {
  624. .type = HDA_FIXUP_FUNC,
  625. .v.func = cs4208_fixup_mac,
  626. },
  627. };
  628. /* correct the 0dB offset of input pins */
  629. static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
  630. {
  631. unsigned int caps;
  632. caps = query_amp_caps(codec, adc, HDA_INPUT);
  633. caps &= ~(AC_AMPCAP_OFFSET);
  634. caps |= 0x02;
  635. snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
  636. }
  637. static int patch_cs4208(struct hda_codec *codec)
  638. {
  639. struct cs_spec *spec;
  640. int err;
  641. spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
  642. if (!spec)
  643. return -ENOMEM;
  644. spec->gen.automute_hook = cs_automute;
  645. /* exclude NID 0x10 (HP) from output volumes due to different steps */
  646. spec->gen.out_vol_mask = 1ULL << 0x10;
  647. snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
  648. cs4208_fixups);
  649. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  650. snd_hda_override_wcaps(codec, 0x18,
  651. get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
  652. cs4208_fix_amp_caps(codec, 0x18);
  653. cs4208_fix_amp_caps(codec, 0x1b);
  654. cs4208_fix_amp_caps(codec, 0x1c);
  655. err = cs_parse_auto_config(codec);
  656. if (err < 0)
  657. goto error;
  658. codec->patch_ops = cs_patch_ops;
  659. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  660. return 0;
  661. error:
  662. cs_free(codec);
  663. return err;
  664. }
  665. /*
  666. * Cirrus Logic CS4210
  667. *
  668. * 1 DAC => HP(sense) / Speakers,
  669. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  670. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  671. */
  672. /* CS4210 board names */
  673. static const struct hda_model_fixup cs421x_models[] = {
  674. { .id = CS421X_CDB4210, .name = "cdb4210" },
  675. { .id = CS421X_STUMPY, .name = "stumpy" },
  676. {}
  677. };
  678. static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
  679. /* Test Intel board + CDB2410 */
  680. SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
  681. {} /* terminator */
  682. };
  683. /* CS4210 board pinconfigs */
  684. /* Default CS4210 (CDB4210)*/
  685. static const struct hda_pintbl cdb4210_pincfgs[] = {
  686. { 0x05, 0x0321401f },
  687. { 0x06, 0x90170010 },
  688. { 0x07, 0x03813031 },
  689. { 0x08, 0xb7a70037 },
  690. { 0x09, 0xb7a6003e },
  691. { 0x0a, 0x034510f0 },
  692. {} /* terminator */
  693. };
  694. /* Stumpy ChromeBox */
  695. static const struct hda_pintbl stumpy_pincfgs[] = {
  696. { 0x05, 0x022120f0 },
  697. { 0x06, 0x901700f0 },
  698. { 0x07, 0x02a120f0 },
  699. { 0x08, 0x77a70037 },
  700. { 0x09, 0x77a6003e },
  701. { 0x0a, 0x434510f0 },
  702. {} /* terminator */
  703. };
  704. /* Setup GPIO/SENSE for each board (if used) */
  705. static void cs421x_fixup_sense_b(struct hda_codec *codec,
  706. const struct hda_fixup *fix, int action)
  707. {
  708. struct cs_spec *spec = codec->spec;
  709. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  710. spec->sense_b = 1;
  711. }
  712. static const struct hda_fixup cs421x_fixups[] = {
  713. [CS421X_CDB4210] = {
  714. .type = HDA_FIXUP_PINS,
  715. .v.pins = cdb4210_pincfgs,
  716. .chained = true,
  717. .chain_id = CS421X_SENSE_B,
  718. },
  719. [CS421X_SENSE_B] = {
  720. .type = HDA_FIXUP_FUNC,
  721. .v.func = cs421x_fixup_sense_b,
  722. },
  723. [CS421X_STUMPY] = {
  724. .type = HDA_FIXUP_PINS,
  725. .v.pins = stumpy_pincfgs,
  726. },
  727. };
  728. static const struct hda_verb cs421x_coef_init_verbs[] = {
  729. {0x0B, AC_VERB_SET_PROC_STATE, 1},
  730. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
  731. /*
  732. Disable Coefficient Index Auto-Increment(DAI)=1,
  733. PDREF=0
  734. */
  735. {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
  736. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
  737. /* ADC SZCMode = Digital Soft Ramp */
  738. {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
  739. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
  740. {0x0B, AC_VERB_SET_PROC_COEF,
  741. (0x0002 /* DAC SZCMode = Digital Soft Ramp */
  742. | 0x0004 /* Mute DAC on FIFO error */
  743. | 0x0008 /* Enable DAC High Pass Filter */
  744. )},
  745. {} /* terminator */
  746. };
  747. /* Errata: CS4210 rev A1 Silicon
  748. *
  749. * http://www.cirrus.com/en/pubs/errata/
  750. *
  751. * Description:
  752. * 1. Performance degredation is present in the ADC.
  753. * 2. Speaker output is not completely muted upon HP detect.
  754. * 3. Noise is present when clipping occurs on the amplified
  755. * speaker outputs.
  756. *
  757. * Workaround:
  758. * The following verb sequence written to the registers during
  759. * initialization will correct the issues listed above.
  760. */
  761. static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
  762. {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  763. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
  764. {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
  765. {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
  766. {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
  767. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
  768. {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
  769. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
  770. {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
  771. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
  772. {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
  773. {} /* terminator */
  774. };
  775. /* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
  776. static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
  777. static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
  778. struct snd_ctl_elem_info *uinfo)
  779. {
  780. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  781. uinfo->count = 1;
  782. uinfo->value.integer.min = 0;
  783. uinfo->value.integer.max = 3;
  784. return 0;
  785. }
  786. static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
  787. struct snd_ctl_elem_value *ucontrol)
  788. {
  789. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  790. ucontrol->value.integer.value[0] =
  791. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
  792. return 0;
  793. }
  794. static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
  795. struct snd_ctl_elem_value *ucontrol)
  796. {
  797. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  798. unsigned int vol = ucontrol->value.integer.value[0];
  799. unsigned int coef =
  800. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
  801. unsigned int original_coef = coef;
  802. coef &= ~0x0003;
  803. coef |= (vol & 0x0003);
  804. if (original_coef == coef)
  805. return 0;
  806. else {
  807. cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
  808. return 1;
  809. }
  810. }
  811. static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
  812. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  813. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  814. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  815. .name = "Speaker Boost Playback Volume",
  816. .info = cs421x_boost_vol_info,
  817. .get = cs421x_boost_vol_get,
  818. .put = cs421x_boost_vol_put,
  819. .tlv = { .p = cs421x_speaker_boost_db_scale },
  820. };
  821. static void cs4210_pinmux_init(struct hda_codec *codec)
  822. {
  823. struct cs_spec *spec = codec->spec;
  824. unsigned int def_conf, coef;
  825. /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
  826. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  827. if (spec->gpio_mask)
  828. coef |= 0x0008; /* B1,B2 are GPIOs */
  829. else
  830. coef &= ~0x0008;
  831. if (spec->sense_b)
  832. coef |= 0x0010; /* B2 is SENSE_B, not inverted */
  833. else
  834. coef &= ~0x0010;
  835. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  836. if ((spec->gpio_mask || spec->sense_b) &&
  837. is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
  838. /*
  839. GPIO or SENSE_B forced - disconnect the DMIC pin.
  840. */
  841. def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
  842. def_conf &= ~AC_DEFCFG_PORT_CONN;
  843. def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
  844. snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
  845. }
  846. }
  847. static void cs4210_spdif_automute(struct hda_codec *codec,
  848. struct hda_jack_callback *tbl)
  849. {
  850. struct cs_spec *spec = codec->spec;
  851. bool spdif_present = false;
  852. hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
  853. /* detect on spdif is specific to CS4210 */
  854. if (!spec->spdif_detect ||
  855. spec->vendor_nid != CS4210_VENDOR_NID)
  856. return;
  857. spdif_present = snd_hda_jack_detect(codec, spdif_pin);
  858. if (spdif_present == spec->spdif_present)
  859. return;
  860. spec->spdif_present = spdif_present;
  861. /* SPDIF TX on/off */
  862. if (spdif_present)
  863. snd_hda_set_pin_ctl(codec, spdif_pin,
  864. spdif_present ? PIN_OUT : 0);
  865. cs_automute(codec);
  866. }
  867. static void parse_cs421x_digital(struct hda_codec *codec)
  868. {
  869. struct cs_spec *spec = codec->spec;
  870. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  871. int i;
  872. for (i = 0; i < cfg->dig_outs; i++) {
  873. hda_nid_t nid = cfg->dig_out_pins[i];
  874. if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
  875. spec->spdif_detect = 1;
  876. snd_hda_jack_detect_enable_callback(codec, nid,
  877. cs4210_spdif_automute);
  878. }
  879. }
  880. }
  881. static int cs421x_init(struct hda_codec *codec)
  882. {
  883. struct cs_spec *spec = codec->spec;
  884. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  885. snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
  886. snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
  887. cs4210_pinmux_init(codec);
  888. }
  889. snd_hda_gen_init(codec);
  890. if (spec->gpio_mask) {
  891. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  892. spec->gpio_mask);
  893. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  894. spec->gpio_dir);
  895. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  896. spec->gpio_data);
  897. }
  898. init_input_coef(codec);
  899. cs4210_spdif_automute(codec, NULL);
  900. return 0;
  901. }
  902. static int cs421x_build_controls(struct hda_codec *codec)
  903. {
  904. struct cs_spec *spec = codec->spec;
  905. int err;
  906. err = snd_hda_gen_build_controls(codec);
  907. if (err < 0)
  908. return err;
  909. if (spec->gen.autocfg.speaker_outs &&
  910. spec->vendor_nid == CS4210_VENDOR_NID) {
  911. err = snd_hda_ctl_add(codec, 0,
  912. snd_ctl_new1(&cs421x_speaker_boost_ctl, codec));
  913. if (err < 0)
  914. return err;
  915. }
  916. return 0;
  917. }
  918. static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
  919. {
  920. unsigned int caps;
  921. /* set the upper-limit for mixer amp to 0dB */
  922. caps = query_amp_caps(codec, dac, HDA_OUTPUT);
  923. caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
  924. caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
  925. << AC_AMPCAP_NUM_STEPS_SHIFT;
  926. snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
  927. }
  928. static int cs421x_parse_auto_config(struct hda_codec *codec)
  929. {
  930. struct cs_spec *spec = codec->spec;
  931. hda_nid_t dac = CS4210_DAC_NID;
  932. int err;
  933. fix_volume_caps(codec, dac);
  934. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  935. if (err < 0)
  936. return err;
  937. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  938. if (err < 0)
  939. return err;
  940. parse_cs421x_digital(codec);
  941. return 0;
  942. }
  943. #ifdef CONFIG_PM
  944. /*
  945. Manage PDREF, when transitioning to D3hot
  946. (DAC,ADC) -> D3, PDREF=1, AFG->D3
  947. */
  948. static int cs421x_suspend(struct hda_codec *codec)
  949. {
  950. struct cs_spec *spec = codec->spec;
  951. unsigned int coef;
  952. snd_hda_shutup_pins(codec);
  953. snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
  954. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  955. snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
  956. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  957. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  958. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  959. coef |= 0x0004; /* PDREF */
  960. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  961. }
  962. return 0;
  963. }
  964. #endif
  965. static const struct hda_codec_ops cs421x_patch_ops = {
  966. .build_controls = cs421x_build_controls,
  967. .build_pcms = snd_hda_gen_build_pcms,
  968. .init = cs421x_init,
  969. .free = cs_free,
  970. .unsol_event = snd_hda_jack_unsol_event,
  971. #ifdef CONFIG_PM
  972. .suspend = cs421x_suspend,
  973. #endif
  974. };
  975. static int patch_cs4210(struct hda_codec *codec)
  976. {
  977. struct cs_spec *spec;
  978. int err;
  979. spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
  980. if (!spec)
  981. return -ENOMEM;
  982. spec->gen.automute_hook = cs_automute;
  983. snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
  984. cs421x_fixups);
  985. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  986. /*
  987. Update the GPIO/DMIC/SENSE_B pinmux before the configuration
  988. is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
  989. is disabled.
  990. */
  991. cs4210_pinmux_init(codec);
  992. err = cs421x_parse_auto_config(codec);
  993. if (err < 0)
  994. goto error;
  995. codec->patch_ops = cs421x_patch_ops;
  996. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  997. return 0;
  998. error:
  999. cs_free(codec);
  1000. return err;
  1001. }
  1002. static int patch_cs4213(struct hda_codec *codec)
  1003. {
  1004. struct cs_spec *spec;
  1005. int err;
  1006. spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
  1007. if (!spec)
  1008. return -ENOMEM;
  1009. err = cs421x_parse_auto_config(codec);
  1010. if (err < 0)
  1011. goto error;
  1012. codec->patch_ops = cs421x_patch_ops;
  1013. return 0;
  1014. error:
  1015. cs_free(codec);
  1016. return err;
  1017. }
  1018. /*
  1019. * patch entries
  1020. */
  1021. static const struct hda_codec_preset snd_hda_preset_cirrus[] = {
  1022. { .id = 0x10134206, .name = "CS4206", .patch = patch_cs420x },
  1023. { .id = 0x10134207, .name = "CS4207", .patch = patch_cs420x },
  1024. { .id = 0x10134208, .name = "CS4208", .patch = patch_cs4208 },
  1025. { .id = 0x10134210, .name = "CS4210", .patch = patch_cs4210 },
  1026. { .id = 0x10134213, .name = "CS4213", .patch = patch_cs4213 },
  1027. {} /* terminator */
  1028. };
  1029. MODULE_ALIAS("snd-hda-codec-id:10134206");
  1030. MODULE_ALIAS("snd-hda-codec-id:10134207");
  1031. MODULE_ALIAS("snd-hda-codec-id:10134208");
  1032. MODULE_ALIAS("snd-hda-codec-id:10134210");
  1033. MODULE_ALIAS("snd-hda-codec-id:10134213");
  1034. MODULE_LICENSE("GPL");
  1035. MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
  1036. static struct hda_codec_preset_list cirrus_list = {
  1037. .preset = snd_hda_preset_cirrus,
  1038. .owner = THIS_MODULE,
  1039. };
  1040. static int __init patch_cirrus_init(void)
  1041. {
  1042. return snd_hda_add_codec_preset(&cirrus_list);
  1043. }
  1044. static void __exit patch_cirrus_exit(void)
  1045. {
  1046. snd_hda_delete_codec_preset(&cirrus_list);
  1047. }
  1048. module_init(patch_cirrus_init)
  1049. module_exit(patch_cirrus_exit)