chip.c 21 KB

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  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include <trace/events/irq.h>
  18. #include "internals.h"
  19. /**
  20. * irq_set_chip - set the irq chip for an irq
  21. * @irq: irq number
  22. * @chip: pointer to irq chip description structure
  23. */
  24. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  25. {
  26. unsigned long flags;
  27. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  28. if (!desc)
  29. return -EINVAL;
  30. if (!chip)
  31. chip = &no_irq_chip;
  32. desc->irq_data.chip = chip;
  33. irq_put_desc_unlock(desc, flags);
  34. /*
  35. * For !CONFIG_SPARSE_IRQ make the irq show up in
  36. * allocated_irqs.
  37. */
  38. irq_mark_irq(irq);
  39. return 0;
  40. }
  41. EXPORT_SYMBOL(irq_set_chip);
  42. /**
  43. * irq_set_type - set the irq trigger type for an irq
  44. * @irq: irq number
  45. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  46. */
  47. int irq_set_irq_type(unsigned int irq, unsigned int type)
  48. {
  49. unsigned long flags;
  50. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  51. int ret = 0;
  52. if (!desc)
  53. return -EINVAL;
  54. type &= IRQ_TYPE_SENSE_MASK;
  55. ret = __irq_set_trigger(desc, irq, type);
  56. irq_put_desc_busunlock(desc, flags);
  57. return ret;
  58. }
  59. EXPORT_SYMBOL(irq_set_irq_type);
  60. /**
  61. * irq_set_handler_data - set irq handler data for an irq
  62. * @irq: Interrupt number
  63. * @data: Pointer to interrupt specific data
  64. *
  65. * Set the hardware irq controller data for an irq
  66. */
  67. int irq_set_handler_data(unsigned int irq, void *data)
  68. {
  69. unsigned long flags;
  70. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  71. if (!desc)
  72. return -EINVAL;
  73. desc->irq_data.handler_data = data;
  74. irq_put_desc_unlock(desc, flags);
  75. return 0;
  76. }
  77. EXPORT_SYMBOL(irq_set_handler_data);
  78. /**
  79. * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
  80. * @irq_base: Interrupt number base
  81. * @irq_offset: Interrupt number offset
  82. * @entry: Pointer to MSI descriptor data
  83. *
  84. * Set the MSI descriptor entry for an irq at offset
  85. */
  86. int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
  87. struct msi_desc *entry)
  88. {
  89. unsigned long flags;
  90. struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  91. if (!desc)
  92. return -EINVAL;
  93. desc->irq_data.msi_desc = entry;
  94. if (entry && !irq_offset)
  95. entry->irq = irq_base;
  96. irq_put_desc_unlock(desc, flags);
  97. return 0;
  98. }
  99. /**
  100. * irq_set_msi_desc - set MSI descriptor data for an irq
  101. * @irq: Interrupt number
  102. * @entry: Pointer to MSI descriptor data
  103. *
  104. * Set the MSI descriptor entry for an irq
  105. */
  106. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  107. {
  108. return irq_set_msi_desc_off(irq, 0, entry);
  109. }
  110. /**
  111. * irq_set_chip_data - set irq chip data for an irq
  112. * @irq: Interrupt number
  113. * @data: Pointer to chip specific data
  114. *
  115. * Set the hardware irq chip data for an irq
  116. */
  117. int irq_set_chip_data(unsigned int irq, void *data)
  118. {
  119. unsigned long flags;
  120. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  121. if (!desc)
  122. return -EINVAL;
  123. desc->irq_data.chip_data = data;
  124. irq_put_desc_unlock(desc, flags);
  125. return 0;
  126. }
  127. EXPORT_SYMBOL(irq_set_chip_data);
  128. struct irq_data *irq_get_irq_data(unsigned int irq)
  129. {
  130. struct irq_desc *desc = irq_to_desc(irq);
  131. return desc ? &desc->irq_data : NULL;
  132. }
  133. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  134. static void irq_state_clr_disabled(struct irq_desc *desc)
  135. {
  136. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  137. }
  138. static void irq_state_set_disabled(struct irq_desc *desc)
  139. {
  140. irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
  141. }
  142. static void irq_state_clr_masked(struct irq_desc *desc)
  143. {
  144. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  145. }
  146. static void irq_state_set_masked(struct irq_desc *desc)
  147. {
  148. irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
  149. }
  150. int irq_startup(struct irq_desc *desc, bool resend)
  151. {
  152. int ret = 0;
  153. irq_state_clr_disabled(desc);
  154. desc->depth = 0;
  155. if (desc->irq_data.chip->irq_startup) {
  156. ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  157. irq_state_clr_masked(desc);
  158. } else {
  159. irq_enable(desc);
  160. }
  161. if (resend)
  162. check_irq_resend(desc, desc->irq_data.irq);
  163. return ret;
  164. }
  165. void irq_shutdown(struct irq_desc *desc)
  166. {
  167. irq_state_set_disabled(desc);
  168. desc->depth = 1;
  169. if (desc->irq_data.chip->irq_shutdown)
  170. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  171. else if (desc->irq_data.chip->irq_disable)
  172. desc->irq_data.chip->irq_disable(&desc->irq_data);
  173. else
  174. desc->irq_data.chip->irq_mask(&desc->irq_data);
  175. irq_state_set_masked(desc);
  176. }
  177. void irq_enable(struct irq_desc *desc)
  178. {
  179. irq_state_clr_disabled(desc);
  180. if (desc->irq_data.chip->irq_enable)
  181. desc->irq_data.chip->irq_enable(&desc->irq_data);
  182. else
  183. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  184. irq_state_clr_masked(desc);
  185. }
  186. /**
  187. * irq_disable - Mark interrupt disabled
  188. * @desc: irq descriptor which should be disabled
  189. *
  190. * If the chip does not implement the irq_disable callback, we
  191. * use a lazy disable approach. That means we mark the interrupt
  192. * disabled, but leave the hardware unmasked. That's an
  193. * optimization because we avoid the hardware access for the
  194. * common case where no interrupt happens after we marked it
  195. * disabled. If an interrupt happens, then the interrupt flow
  196. * handler masks the line at the hardware level and marks it
  197. * pending.
  198. */
  199. void irq_disable(struct irq_desc *desc)
  200. {
  201. irq_state_set_disabled(desc);
  202. if (desc->irq_data.chip->irq_disable) {
  203. desc->irq_data.chip->irq_disable(&desc->irq_data);
  204. irq_state_set_masked(desc);
  205. }
  206. }
  207. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  208. {
  209. if (desc->irq_data.chip->irq_enable)
  210. desc->irq_data.chip->irq_enable(&desc->irq_data);
  211. else
  212. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  213. cpumask_set_cpu(cpu, desc->percpu_enabled);
  214. }
  215. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  216. {
  217. if (desc->irq_data.chip->irq_disable)
  218. desc->irq_data.chip->irq_disable(&desc->irq_data);
  219. else
  220. desc->irq_data.chip->irq_mask(&desc->irq_data);
  221. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  222. }
  223. static inline void mask_ack_irq(struct irq_desc *desc)
  224. {
  225. if (desc->irq_data.chip->irq_mask_ack)
  226. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  227. else {
  228. desc->irq_data.chip->irq_mask(&desc->irq_data);
  229. if (desc->irq_data.chip->irq_ack)
  230. desc->irq_data.chip->irq_ack(&desc->irq_data);
  231. }
  232. irq_state_set_masked(desc);
  233. }
  234. void mask_irq(struct irq_desc *desc)
  235. {
  236. if (desc->irq_data.chip->irq_mask) {
  237. desc->irq_data.chip->irq_mask(&desc->irq_data);
  238. irq_state_set_masked(desc);
  239. }
  240. }
  241. void unmask_irq(struct irq_desc *desc)
  242. {
  243. if (desc->irq_data.chip->irq_unmask) {
  244. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  245. irq_state_clr_masked(desc);
  246. }
  247. }
  248. void unmask_threaded_irq(struct irq_desc *desc)
  249. {
  250. struct irq_chip *chip = desc->irq_data.chip;
  251. if (chip->flags & IRQCHIP_EOI_THREADED)
  252. chip->irq_eoi(&desc->irq_data);
  253. if (chip->irq_unmask) {
  254. chip->irq_unmask(&desc->irq_data);
  255. irq_state_clr_masked(desc);
  256. }
  257. }
  258. /*
  259. * handle_nested_irq - Handle a nested irq from a irq thread
  260. * @irq: the interrupt number
  261. *
  262. * Handle interrupts which are nested into a threaded interrupt
  263. * handler. The handler function is called inside the calling
  264. * threads context.
  265. */
  266. void handle_nested_irq(unsigned int irq)
  267. {
  268. struct irq_desc *desc = irq_to_desc(irq);
  269. struct irqaction *action;
  270. irqreturn_t action_ret;
  271. might_sleep();
  272. raw_spin_lock_irq(&desc->lock);
  273. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  274. kstat_incr_irqs_this_cpu(irq, desc);
  275. action = desc->action;
  276. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
  277. desc->istate |= IRQS_PENDING;
  278. goto out_unlock;
  279. }
  280. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  281. raw_spin_unlock_irq(&desc->lock);
  282. action_ret = action->thread_fn(action->irq, action->dev_id);
  283. if (!noirqdebug)
  284. note_interrupt(irq, desc, action_ret);
  285. raw_spin_lock_irq(&desc->lock);
  286. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  287. out_unlock:
  288. raw_spin_unlock_irq(&desc->lock);
  289. }
  290. EXPORT_SYMBOL_GPL(handle_nested_irq);
  291. static bool irq_check_poll(struct irq_desc *desc)
  292. {
  293. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  294. return false;
  295. return irq_wait_for_poll(desc);
  296. }
  297. static bool irq_may_run(struct irq_desc *desc)
  298. {
  299. unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
  300. /*
  301. * If the interrupt is not in progress and is not an armed
  302. * wakeup interrupt, proceed.
  303. */
  304. if (!irqd_has_set(&desc->irq_data, mask))
  305. return true;
  306. /*
  307. * If the interrupt is an armed wakeup source, mark it pending
  308. * and suspended, disable it and notify the pm core about the
  309. * event.
  310. */
  311. if (irq_pm_check_wakeup(desc))
  312. return false;
  313. /*
  314. * Handle a potential concurrent poll on a different core.
  315. */
  316. return irq_check_poll(desc);
  317. }
  318. /**
  319. * handle_simple_irq - Simple and software-decoded IRQs.
  320. * @irq: the interrupt number
  321. * @desc: the interrupt description structure for this irq
  322. *
  323. * Simple interrupts are either sent from a demultiplexing interrupt
  324. * handler or come from hardware, where no interrupt hardware control
  325. * is necessary.
  326. *
  327. * Note: The caller is expected to handle the ack, clear, mask and
  328. * unmask issues if necessary.
  329. */
  330. void
  331. handle_simple_irq(unsigned int irq, struct irq_desc *desc)
  332. {
  333. raw_spin_lock(&desc->lock);
  334. if (!irq_may_run(desc))
  335. goto out_unlock;
  336. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  337. kstat_incr_irqs_this_cpu(irq, desc);
  338. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  339. desc->istate |= IRQS_PENDING;
  340. goto out_unlock;
  341. }
  342. handle_irq_event(desc);
  343. out_unlock:
  344. raw_spin_unlock(&desc->lock);
  345. }
  346. EXPORT_SYMBOL_GPL(handle_simple_irq);
  347. /*
  348. * Called unconditionally from handle_level_irq() and only for oneshot
  349. * interrupts from handle_fasteoi_irq()
  350. */
  351. static void cond_unmask_irq(struct irq_desc *desc)
  352. {
  353. /*
  354. * We need to unmask in the following cases:
  355. * - Standard level irq (IRQF_ONESHOT is not set)
  356. * - Oneshot irq which did not wake the thread (caused by a
  357. * spurious interrupt or a primary handler handling it
  358. * completely).
  359. */
  360. if (!irqd_irq_disabled(&desc->irq_data) &&
  361. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
  362. unmask_irq(desc);
  363. }
  364. /**
  365. * handle_level_irq - Level type irq handler
  366. * @irq: the interrupt number
  367. * @desc: the interrupt description structure for this irq
  368. *
  369. * Level type interrupts are active as long as the hardware line has
  370. * the active level. This may require to mask the interrupt and unmask
  371. * it after the associated handler has acknowledged the device, so the
  372. * interrupt line is back to inactive.
  373. */
  374. void
  375. handle_level_irq(unsigned int irq, struct irq_desc *desc)
  376. {
  377. raw_spin_lock(&desc->lock);
  378. mask_ack_irq(desc);
  379. if (!irq_may_run(desc))
  380. goto out_unlock;
  381. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  382. kstat_incr_irqs_this_cpu(irq, desc);
  383. /*
  384. * If its disabled or no action available
  385. * keep it masked and get out of here
  386. */
  387. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  388. desc->istate |= IRQS_PENDING;
  389. goto out_unlock;
  390. }
  391. handle_irq_event(desc);
  392. cond_unmask_irq(desc);
  393. out_unlock:
  394. raw_spin_unlock(&desc->lock);
  395. }
  396. EXPORT_SYMBOL_GPL(handle_level_irq);
  397. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  398. static inline void preflow_handler(struct irq_desc *desc)
  399. {
  400. if (desc->preflow_handler)
  401. desc->preflow_handler(&desc->irq_data);
  402. }
  403. #else
  404. static inline void preflow_handler(struct irq_desc *desc) { }
  405. #endif
  406. static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
  407. {
  408. if (!(desc->istate & IRQS_ONESHOT)) {
  409. chip->irq_eoi(&desc->irq_data);
  410. return;
  411. }
  412. /*
  413. * We need to unmask in the following cases:
  414. * - Oneshot irq which did not wake the thread (caused by a
  415. * spurious interrupt or a primary handler handling it
  416. * completely).
  417. */
  418. if (!irqd_irq_disabled(&desc->irq_data) &&
  419. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
  420. chip->irq_eoi(&desc->irq_data);
  421. unmask_irq(desc);
  422. } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
  423. chip->irq_eoi(&desc->irq_data);
  424. }
  425. }
  426. /**
  427. * handle_fasteoi_irq - irq handler for transparent controllers
  428. * @irq: the interrupt number
  429. * @desc: the interrupt description structure for this irq
  430. *
  431. * Only a single callback will be issued to the chip: an ->eoi()
  432. * call when the interrupt has been serviced. This enables support
  433. * for modern forms of interrupt handlers, which handle the flow
  434. * details in hardware, transparently.
  435. */
  436. void
  437. handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
  438. {
  439. struct irq_chip *chip = desc->irq_data.chip;
  440. raw_spin_lock(&desc->lock);
  441. if (!irq_may_run(desc))
  442. goto out;
  443. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  444. kstat_incr_irqs_this_cpu(irq, desc);
  445. /*
  446. * If its disabled or no action available
  447. * then mask it and get out of here:
  448. */
  449. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  450. desc->istate |= IRQS_PENDING;
  451. mask_irq(desc);
  452. goto out;
  453. }
  454. if (desc->istate & IRQS_ONESHOT)
  455. mask_irq(desc);
  456. preflow_handler(desc);
  457. handle_irq_event(desc);
  458. cond_unmask_eoi_irq(desc, chip);
  459. raw_spin_unlock(&desc->lock);
  460. return;
  461. out:
  462. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  463. chip->irq_eoi(&desc->irq_data);
  464. raw_spin_unlock(&desc->lock);
  465. }
  466. EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
  467. /**
  468. * handle_edge_irq - edge type IRQ handler
  469. * @irq: the interrupt number
  470. * @desc: the interrupt description structure for this irq
  471. *
  472. * Interrupt occures on the falling and/or rising edge of a hardware
  473. * signal. The occurrence is latched into the irq controller hardware
  474. * and must be acked in order to be reenabled. After the ack another
  475. * interrupt can happen on the same source even before the first one
  476. * is handled by the associated event handler. If this happens it
  477. * might be necessary to disable (mask) the interrupt depending on the
  478. * controller hardware. This requires to reenable the interrupt inside
  479. * of the loop which handles the interrupts which have arrived while
  480. * the handler was running. If all pending interrupts are handled, the
  481. * loop is left.
  482. */
  483. void
  484. handle_edge_irq(unsigned int irq, struct irq_desc *desc)
  485. {
  486. raw_spin_lock(&desc->lock);
  487. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  488. if (!irq_may_run(desc)) {
  489. desc->istate |= IRQS_PENDING;
  490. mask_ack_irq(desc);
  491. goto out_unlock;
  492. }
  493. /*
  494. * If its disabled or no action available then mask it and get
  495. * out of here.
  496. */
  497. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  498. desc->istate |= IRQS_PENDING;
  499. mask_ack_irq(desc);
  500. goto out_unlock;
  501. }
  502. kstat_incr_irqs_this_cpu(irq, desc);
  503. /* Start handling the irq */
  504. desc->irq_data.chip->irq_ack(&desc->irq_data);
  505. do {
  506. if (unlikely(!desc->action)) {
  507. mask_irq(desc);
  508. goto out_unlock;
  509. }
  510. /*
  511. * When another irq arrived while we were handling
  512. * one, we could have masked the irq.
  513. * Renable it, if it was not disabled in meantime.
  514. */
  515. if (unlikely(desc->istate & IRQS_PENDING)) {
  516. if (!irqd_irq_disabled(&desc->irq_data) &&
  517. irqd_irq_masked(&desc->irq_data))
  518. unmask_irq(desc);
  519. }
  520. handle_irq_event(desc);
  521. } while ((desc->istate & IRQS_PENDING) &&
  522. !irqd_irq_disabled(&desc->irq_data));
  523. out_unlock:
  524. raw_spin_unlock(&desc->lock);
  525. }
  526. EXPORT_SYMBOL(handle_edge_irq);
  527. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  528. /**
  529. * handle_edge_eoi_irq - edge eoi type IRQ handler
  530. * @irq: the interrupt number
  531. * @desc: the interrupt description structure for this irq
  532. *
  533. * Similar as the above handle_edge_irq, but using eoi and w/o the
  534. * mask/unmask logic.
  535. */
  536. void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
  537. {
  538. struct irq_chip *chip = irq_desc_get_chip(desc);
  539. raw_spin_lock(&desc->lock);
  540. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  541. if (!irq_may_run(desc)) {
  542. desc->istate |= IRQS_PENDING;
  543. goto out_eoi;
  544. }
  545. /*
  546. * If its disabled or no action available then mask it and get
  547. * out of here.
  548. */
  549. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  550. desc->istate |= IRQS_PENDING;
  551. goto out_eoi;
  552. }
  553. kstat_incr_irqs_this_cpu(irq, desc);
  554. do {
  555. if (unlikely(!desc->action))
  556. goto out_eoi;
  557. handle_irq_event(desc);
  558. } while ((desc->istate & IRQS_PENDING) &&
  559. !irqd_irq_disabled(&desc->irq_data));
  560. out_eoi:
  561. chip->irq_eoi(&desc->irq_data);
  562. raw_spin_unlock(&desc->lock);
  563. }
  564. #endif
  565. /**
  566. * handle_percpu_irq - Per CPU local irq handler
  567. * @irq: the interrupt number
  568. * @desc: the interrupt description structure for this irq
  569. *
  570. * Per CPU interrupts on SMP machines without locking requirements
  571. */
  572. void
  573. handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
  574. {
  575. struct irq_chip *chip = irq_desc_get_chip(desc);
  576. kstat_incr_irqs_this_cpu(irq, desc);
  577. if (chip->irq_ack)
  578. chip->irq_ack(&desc->irq_data);
  579. handle_irq_event_percpu(desc, desc->action);
  580. if (chip->irq_eoi)
  581. chip->irq_eoi(&desc->irq_data);
  582. }
  583. /**
  584. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  585. * @irq: the interrupt number
  586. * @desc: the interrupt description structure for this irq
  587. *
  588. * Per CPU interrupts on SMP machines without locking requirements. Same as
  589. * handle_percpu_irq() above but with the following extras:
  590. *
  591. * action->percpu_dev_id is a pointer to percpu variables which
  592. * contain the real device id for the cpu on which this handler is
  593. * called
  594. */
  595. void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc)
  596. {
  597. struct irq_chip *chip = irq_desc_get_chip(desc);
  598. struct irqaction *action = desc->action;
  599. void *dev_id = raw_cpu_ptr(action->percpu_dev_id);
  600. irqreturn_t res;
  601. kstat_incr_irqs_this_cpu(irq, desc);
  602. if (chip->irq_ack)
  603. chip->irq_ack(&desc->irq_data);
  604. trace_irq_handler_entry(irq, action);
  605. res = action->handler(irq, dev_id);
  606. trace_irq_handler_exit(irq, action, res);
  607. if (chip->irq_eoi)
  608. chip->irq_eoi(&desc->irq_data);
  609. }
  610. void
  611. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  612. const char *name)
  613. {
  614. unsigned long flags;
  615. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  616. if (!desc)
  617. return;
  618. if (!handle) {
  619. handle = handle_bad_irq;
  620. } else {
  621. if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
  622. goto out;
  623. }
  624. /* Uninstall? */
  625. if (handle == handle_bad_irq) {
  626. if (desc->irq_data.chip != &no_irq_chip)
  627. mask_ack_irq(desc);
  628. irq_state_set_disabled(desc);
  629. desc->depth = 1;
  630. }
  631. desc->handle_irq = handle;
  632. desc->name = name;
  633. if (handle != handle_bad_irq && is_chained) {
  634. irq_settings_set_noprobe(desc);
  635. irq_settings_set_norequest(desc);
  636. irq_settings_set_nothread(desc);
  637. irq_startup(desc, true);
  638. }
  639. out:
  640. irq_put_desc_busunlock(desc, flags);
  641. }
  642. EXPORT_SYMBOL_GPL(__irq_set_handler);
  643. void
  644. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  645. irq_flow_handler_t handle, const char *name)
  646. {
  647. irq_set_chip(irq, chip);
  648. __irq_set_handler(irq, handle, 0, name);
  649. }
  650. EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
  651. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  652. {
  653. unsigned long flags;
  654. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  655. if (!desc)
  656. return;
  657. irq_settings_clr_and_set(desc, clr, set);
  658. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  659. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  660. if (irq_settings_has_no_balance_set(desc))
  661. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  662. if (irq_settings_is_per_cpu(desc))
  663. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  664. if (irq_settings_can_move_pcntxt(desc))
  665. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  666. if (irq_settings_is_level(desc))
  667. irqd_set(&desc->irq_data, IRQD_LEVEL);
  668. irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
  669. irq_put_desc_unlock(desc, flags);
  670. }
  671. EXPORT_SYMBOL_GPL(irq_modify_status);
  672. /**
  673. * irq_cpu_online - Invoke all irq_cpu_online functions.
  674. *
  675. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  676. * for each.
  677. */
  678. void irq_cpu_online(void)
  679. {
  680. struct irq_desc *desc;
  681. struct irq_chip *chip;
  682. unsigned long flags;
  683. unsigned int irq;
  684. for_each_active_irq(irq) {
  685. desc = irq_to_desc(irq);
  686. if (!desc)
  687. continue;
  688. raw_spin_lock_irqsave(&desc->lock, flags);
  689. chip = irq_data_get_irq_chip(&desc->irq_data);
  690. if (chip && chip->irq_cpu_online &&
  691. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  692. !irqd_irq_disabled(&desc->irq_data)))
  693. chip->irq_cpu_online(&desc->irq_data);
  694. raw_spin_unlock_irqrestore(&desc->lock, flags);
  695. }
  696. }
  697. /**
  698. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  699. *
  700. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  701. * for each.
  702. */
  703. void irq_cpu_offline(void)
  704. {
  705. struct irq_desc *desc;
  706. struct irq_chip *chip;
  707. unsigned long flags;
  708. unsigned int irq;
  709. for_each_active_irq(irq) {
  710. desc = irq_to_desc(irq);
  711. if (!desc)
  712. continue;
  713. raw_spin_lock_irqsave(&desc->lock, flags);
  714. chip = irq_data_get_irq_chip(&desc->irq_data);
  715. if (chip && chip->irq_cpu_offline &&
  716. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  717. !irqd_irq_disabled(&desc->irq_data)))
  718. chip->irq_cpu_offline(&desc->irq_data);
  719. raw_spin_unlock_irqrestore(&desc->lock, flags);
  720. }
  721. }