omapdss.h 30 KB

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  1. /*
  2. * Copyright (C) 2008 Nokia Corporation
  3. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __OMAP_OMAPDSS_H
  18. #define __OMAP_OMAPDSS_H
  19. #include <linux/list.h>
  20. #include <linux/kobject.h>
  21. #include <linux/device.h>
  22. #include <linux/interrupt.h>
  23. #include <video/videomode.h>
  24. #define DISPC_IRQ_FRAMEDONE (1 << 0)
  25. #define DISPC_IRQ_VSYNC (1 << 1)
  26. #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
  27. #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
  28. #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
  29. #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
  30. #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
  31. #define DISPC_IRQ_GFX_END_WIN (1 << 7)
  32. #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
  33. #define DISPC_IRQ_OCP_ERR (1 << 9)
  34. #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
  35. #define DISPC_IRQ_VID1_END_WIN (1 << 11)
  36. #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
  37. #define DISPC_IRQ_VID2_END_WIN (1 << 13)
  38. #define DISPC_IRQ_SYNC_LOST (1 << 14)
  39. #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
  40. #define DISPC_IRQ_WAKEUP (1 << 16)
  41. #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
  42. #define DISPC_IRQ_VSYNC2 (1 << 18)
  43. #define DISPC_IRQ_VID3_END_WIN (1 << 19)
  44. #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
  45. #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
  46. #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
  47. #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
  48. #define DISPC_IRQ_FRAMEDONETV (1 << 24)
  49. #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
  50. #define DISPC_IRQ_SYNC_LOST3 (1 << 27)
  51. #define DISPC_IRQ_VSYNC3 (1 << 28)
  52. #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
  53. #define DISPC_IRQ_FRAMEDONE3 (1 << 30)
  54. struct omap_dss_device;
  55. struct omap_overlay_manager;
  56. struct dss_lcd_mgr_config;
  57. struct snd_aes_iec958;
  58. struct snd_cea_861_aud_if;
  59. struct hdmi_avi_infoframe;
  60. enum omap_display_type {
  61. OMAP_DISPLAY_TYPE_NONE = 0,
  62. OMAP_DISPLAY_TYPE_DPI = 1 << 0,
  63. OMAP_DISPLAY_TYPE_DBI = 1 << 1,
  64. OMAP_DISPLAY_TYPE_SDI = 1 << 2,
  65. OMAP_DISPLAY_TYPE_DSI = 1 << 3,
  66. OMAP_DISPLAY_TYPE_VENC = 1 << 4,
  67. OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
  68. OMAP_DISPLAY_TYPE_DVI = 1 << 6,
  69. };
  70. enum omap_plane {
  71. OMAP_DSS_GFX = 0,
  72. OMAP_DSS_VIDEO1 = 1,
  73. OMAP_DSS_VIDEO2 = 2,
  74. OMAP_DSS_VIDEO3 = 3,
  75. OMAP_DSS_WB = 4,
  76. };
  77. enum omap_channel {
  78. OMAP_DSS_CHANNEL_LCD = 0,
  79. OMAP_DSS_CHANNEL_DIGIT = 1,
  80. OMAP_DSS_CHANNEL_LCD2 = 2,
  81. OMAP_DSS_CHANNEL_LCD3 = 3,
  82. };
  83. enum omap_color_mode {
  84. OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
  85. OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
  86. OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
  87. OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
  88. OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
  89. OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
  90. OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
  91. OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
  92. OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
  93. OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
  94. OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
  95. OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
  96. OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
  97. OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
  98. OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
  99. OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
  100. OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
  101. OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
  102. OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
  103. };
  104. enum omap_dss_load_mode {
  105. OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
  106. OMAP_DSS_LOAD_CLUT_ONLY = 1,
  107. OMAP_DSS_LOAD_FRAME_ONLY = 2,
  108. OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
  109. };
  110. enum omap_dss_trans_key_type {
  111. OMAP_DSS_COLOR_KEY_GFX_DST = 0,
  112. OMAP_DSS_COLOR_KEY_VID_SRC = 1,
  113. };
  114. enum omap_rfbi_te_mode {
  115. OMAP_DSS_RFBI_TE_MODE_1 = 1,
  116. OMAP_DSS_RFBI_TE_MODE_2 = 2,
  117. };
  118. enum omap_dss_signal_level {
  119. OMAPDSS_SIG_ACTIVE_HIGH = 0,
  120. OMAPDSS_SIG_ACTIVE_LOW = 1,
  121. };
  122. enum omap_dss_signal_edge {
  123. OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
  124. OMAPDSS_DRIVE_SIG_RISING_EDGE,
  125. OMAPDSS_DRIVE_SIG_FALLING_EDGE,
  126. };
  127. enum omap_dss_venc_type {
  128. OMAP_DSS_VENC_TYPE_COMPOSITE,
  129. OMAP_DSS_VENC_TYPE_SVIDEO,
  130. };
  131. enum omap_dss_dsi_pixel_format {
  132. OMAP_DSS_DSI_FMT_RGB888,
  133. OMAP_DSS_DSI_FMT_RGB666,
  134. OMAP_DSS_DSI_FMT_RGB666_PACKED,
  135. OMAP_DSS_DSI_FMT_RGB565,
  136. };
  137. enum omap_dss_dsi_mode {
  138. OMAP_DSS_DSI_CMD_MODE = 0,
  139. OMAP_DSS_DSI_VIDEO_MODE,
  140. };
  141. enum omap_display_caps {
  142. OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
  143. OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
  144. };
  145. enum omap_dss_display_state {
  146. OMAP_DSS_DISPLAY_DISABLED = 0,
  147. OMAP_DSS_DISPLAY_ACTIVE,
  148. };
  149. enum omap_dss_audio_state {
  150. OMAP_DSS_AUDIO_DISABLED = 0,
  151. OMAP_DSS_AUDIO_ENABLED,
  152. OMAP_DSS_AUDIO_CONFIGURED,
  153. OMAP_DSS_AUDIO_PLAYING,
  154. };
  155. struct omap_dss_audio {
  156. struct snd_aes_iec958 *iec;
  157. struct snd_cea_861_aud_if *cea;
  158. };
  159. enum omap_dss_rotation_type {
  160. OMAP_DSS_ROT_DMA = 1 << 0,
  161. OMAP_DSS_ROT_VRFB = 1 << 1,
  162. OMAP_DSS_ROT_TILER = 1 << 2,
  163. };
  164. /* clockwise rotation angle */
  165. enum omap_dss_rotation_angle {
  166. OMAP_DSS_ROT_0 = 0,
  167. OMAP_DSS_ROT_90 = 1,
  168. OMAP_DSS_ROT_180 = 2,
  169. OMAP_DSS_ROT_270 = 3,
  170. };
  171. enum omap_overlay_caps {
  172. OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
  173. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
  174. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
  175. OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
  176. OMAP_DSS_OVL_CAP_POS = 1 << 4,
  177. OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
  178. };
  179. enum omap_overlay_manager_caps {
  180. OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
  181. };
  182. enum omap_dss_clk_source {
  183. OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
  184. * OMAP4: DSS_FCLK */
  185. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
  186. * OMAP4: PLL1_CLK1 */
  187. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
  188. * OMAP4: PLL1_CLK2 */
  189. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
  190. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
  191. };
  192. enum omap_hdmi_flags {
  193. OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
  194. };
  195. enum omap_dss_output_id {
  196. OMAP_DSS_OUTPUT_DPI = 1 << 0,
  197. OMAP_DSS_OUTPUT_DBI = 1 << 1,
  198. OMAP_DSS_OUTPUT_SDI = 1 << 2,
  199. OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
  200. OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
  201. OMAP_DSS_OUTPUT_VENC = 1 << 5,
  202. OMAP_DSS_OUTPUT_HDMI = 1 << 6,
  203. };
  204. /* RFBI */
  205. struct rfbi_timings {
  206. int cs_on_time;
  207. int cs_off_time;
  208. int we_on_time;
  209. int we_off_time;
  210. int re_on_time;
  211. int re_off_time;
  212. int we_cycle_time;
  213. int re_cycle_time;
  214. int cs_pulse_width;
  215. int access_time;
  216. int clk_div;
  217. u32 tim[5]; /* set by rfbi_convert_timings() */
  218. int converted;
  219. };
  220. /* DSI */
  221. enum omap_dss_dsi_trans_mode {
  222. /* Sync Pulses: both sync start and end packets sent */
  223. OMAP_DSS_DSI_PULSE_MODE,
  224. /* Sync Events: only sync start packets sent */
  225. OMAP_DSS_DSI_EVENT_MODE,
  226. /* Burst: only sync start packets sent, pixels are time compressed */
  227. OMAP_DSS_DSI_BURST_MODE,
  228. };
  229. struct omap_dss_dsi_videomode_timings {
  230. unsigned long hsclk;
  231. unsigned ndl;
  232. unsigned bitspp;
  233. /* pixels */
  234. u16 hact;
  235. /* lines */
  236. u16 vact;
  237. /* DSI video mode blanking data */
  238. /* Unit: byte clock cycles */
  239. u16 hss;
  240. u16 hsa;
  241. u16 hse;
  242. u16 hfp;
  243. u16 hbp;
  244. /* Unit: line clocks */
  245. u16 vsa;
  246. u16 vfp;
  247. u16 vbp;
  248. /* DSI blanking modes */
  249. int blanking_mode;
  250. int hsa_blanking_mode;
  251. int hbp_blanking_mode;
  252. int hfp_blanking_mode;
  253. enum omap_dss_dsi_trans_mode trans_mode;
  254. bool ddr_clk_always_on;
  255. int window_sync;
  256. };
  257. struct omap_dss_dsi_config {
  258. enum omap_dss_dsi_mode mode;
  259. enum omap_dss_dsi_pixel_format pixel_format;
  260. const struct omap_video_timings *timings;
  261. unsigned long hs_clk_min, hs_clk_max;
  262. unsigned long lp_clk_min, lp_clk_max;
  263. bool ddr_clk_always_on;
  264. enum omap_dss_dsi_trans_mode trans_mode;
  265. };
  266. enum omapdss_version {
  267. OMAPDSS_VER_UNKNOWN = 0,
  268. OMAPDSS_VER_OMAP24xx,
  269. OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
  270. OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
  271. OMAPDSS_VER_OMAP3630,
  272. OMAPDSS_VER_AM35xx,
  273. OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
  274. OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
  275. OMAPDSS_VER_OMAP4, /* All other OMAP4s */
  276. OMAPDSS_VER_OMAP5,
  277. OMAPDSS_VER_AM43xx,
  278. };
  279. /* Board specific data */
  280. struct omap_dss_board_info {
  281. int num_devices;
  282. struct omap_dss_device **devices;
  283. struct omap_dss_device *default_device;
  284. const char *default_display_name;
  285. int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
  286. void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
  287. int (*set_min_bus_tput)(struct device *dev, unsigned long r);
  288. enum omapdss_version version;
  289. };
  290. /* Init with the board info */
  291. extern int omap_display_init(struct omap_dss_board_info *board_data);
  292. /* HDMI mux init*/
  293. extern int omap_hdmi_init(enum omap_hdmi_flags flags);
  294. struct omap_video_timings {
  295. /* Unit: pixels */
  296. u16 x_res;
  297. /* Unit: pixels */
  298. u16 y_res;
  299. /* Unit: Hz */
  300. u32 pixelclock;
  301. /* Unit: pixel clocks */
  302. u16 hsw; /* Horizontal synchronization pulse width */
  303. /* Unit: pixel clocks */
  304. u16 hfp; /* Horizontal front porch */
  305. /* Unit: pixel clocks */
  306. u16 hbp; /* Horizontal back porch */
  307. /* Unit: line clocks */
  308. u16 vsw; /* Vertical synchronization pulse width */
  309. /* Unit: line clocks */
  310. u16 vfp; /* Vertical front porch */
  311. /* Unit: line clocks */
  312. u16 vbp; /* Vertical back porch */
  313. /* Vsync logic level */
  314. enum omap_dss_signal_level vsync_level;
  315. /* Hsync logic level */
  316. enum omap_dss_signal_level hsync_level;
  317. /* Interlaced or Progressive timings */
  318. bool interlace;
  319. /* Pixel clock edge to drive LCD data */
  320. enum omap_dss_signal_edge data_pclk_edge;
  321. /* Data enable logic level */
  322. enum omap_dss_signal_level de_level;
  323. /* Pixel clock edges to drive HSYNC and VSYNC signals */
  324. enum omap_dss_signal_edge sync_pclk_edge;
  325. };
  326. #ifdef CONFIG_OMAP2_DSS_VENC
  327. /* Hardcoded timings for tv modes. Venc only uses these to
  328. * identify the mode, and does not actually use the configs
  329. * itself. However, the configs should be something that
  330. * a normal monitor can also show */
  331. extern const struct omap_video_timings omap_dss_pal_timings;
  332. extern const struct omap_video_timings omap_dss_ntsc_timings;
  333. #endif
  334. struct omap_dss_cpr_coefs {
  335. s16 rr, rg, rb;
  336. s16 gr, gg, gb;
  337. s16 br, bg, bb;
  338. };
  339. struct omap_overlay_info {
  340. dma_addr_t paddr;
  341. dma_addr_t p_uv_addr; /* for NV12 format */
  342. u16 screen_width;
  343. u16 width;
  344. u16 height;
  345. enum omap_color_mode color_mode;
  346. u8 rotation;
  347. enum omap_dss_rotation_type rotation_type;
  348. bool mirror;
  349. u16 pos_x;
  350. u16 pos_y;
  351. u16 out_width; /* if 0, out_width == width */
  352. u16 out_height; /* if 0, out_height == height */
  353. u8 global_alpha;
  354. u8 pre_mult_alpha;
  355. u8 zorder;
  356. };
  357. struct omap_overlay {
  358. struct kobject kobj;
  359. struct list_head list;
  360. /* static fields */
  361. const char *name;
  362. enum omap_plane id;
  363. enum omap_color_mode supported_modes;
  364. enum omap_overlay_caps caps;
  365. /* dynamic fields */
  366. struct omap_overlay_manager *manager;
  367. /*
  368. * The following functions do not block:
  369. *
  370. * is_enabled
  371. * set_overlay_info
  372. * get_overlay_info
  373. *
  374. * The rest of the functions may block and cannot be called from
  375. * interrupt context
  376. */
  377. int (*enable)(struct omap_overlay *ovl);
  378. int (*disable)(struct omap_overlay *ovl);
  379. bool (*is_enabled)(struct omap_overlay *ovl);
  380. int (*set_manager)(struct omap_overlay *ovl,
  381. struct omap_overlay_manager *mgr);
  382. int (*unset_manager)(struct omap_overlay *ovl);
  383. int (*set_overlay_info)(struct omap_overlay *ovl,
  384. struct omap_overlay_info *info);
  385. void (*get_overlay_info)(struct omap_overlay *ovl,
  386. struct omap_overlay_info *info);
  387. int (*wait_for_go)(struct omap_overlay *ovl);
  388. struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
  389. };
  390. struct omap_overlay_manager_info {
  391. u32 default_color;
  392. enum omap_dss_trans_key_type trans_key_type;
  393. u32 trans_key;
  394. bool trans_enabled;
  395. bool partial_alpha_enabled;
  396. bool cpr_enable;
  397. struct omap_dss_cpr_coefs cpr_coefs;
  398. };
  399. struct omap_overlay_manager {
  400. struct kobject kobj;
  401. /* static fields */
  402. const char *name;
  403. enum omap_channel id;
  404. enum omap_overlay_manager_caps caps;
  405. struct list_head overlays;
  406. enum omap_display_type supported_displays;
  407. enum omap_dss_output_id supported_outputs;
  408. /* dynamic fields */
  409. struct omap_dss_device *output;
  410. /*
  411. * The following functions do not block:
  412. *
  413. * set_manager_info
  414. * get_manager_info
  415. * apply
  416. *
  417. * The rest of the functions may block and cannot be called from
  418. * interrupt context
  419. */
  420. int (*set_output)(struct omap_overlay_manager *mgr,
  421. struct omap_dss_device *output);
  422. int (*unset_output)(struct omap_overlay_manager *mgr);
  423. int (*set_manager_info)(struct omap_overlay_manager *mgr,
  424. struct omap_overlay_manager_info *info);
  425. void (*get_manager_info)(struct omap_overlay_manager *mgr,
  426. struct omap_overlay_manager_info *info);
  427. int (*apply)(struct omap_overlay_manager *mgr);
  428. int (*wait_for_go)(struct omap_overlay_manager *mgr);
  429. int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
  430. struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
  431. };
  432. /* 22 pins means 1 clk lane and 10 data lanes */
  433. #define OMAP_DSS_MAX_DSI_PINS 22
  434. struct omap_dsi_pin_config {
  435. int num_pins;
  436. /*
  437. * pin numbers in the following order:
  438. * clk+, clk-
  439. * data1+, data1-
  440. * data2+, data2-
  441. * ...
  442. */
  443. int pins[OMAP_DSS_MAX_DSI_PINS];
  444. };
  445. struct omap_dss_writeback_info {
  446. u32 paddr;
  447. u32 p_uv_addr;
  448. u16 buf_width;
  449. u16 width;
  450. u16 height;
  451. enum omap_color_mode color_mode;
  452. u8 rotation;
  453. enum omap_dss_rotation_type rotation_type;
  454. bool mirror;
  455. u8 pre_mult_alpha;
  456. };
  457. struct omapdss_dpi_ops {
  458. int (*connect)(struct omap_dss_device *dssdev,
  459. struct omap_dss_device *dst);
  460. void (*disconnect)(struct omap_dss_device *dssdev,
  461. struct omap_dss_device *dst);
  462. int (*enable)(struct omap_dss_device *dssdev);
  463. void (*disable)(struct omap_dss_device *dssdev);
  464. int (*check_timings)(struct omap_dss_device *dssdev,
  465. struct omap_video_timings *timings);
  466. void (*set_timings)(struct omap_dss_device *dssdev,
  467. struct omap_video_timings *timings);
  468. void (*get_timings)(struct omap_dss_device *dssdev,
  469. struct omap_video_timings *timings);
  470. void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
  471. };
  472. struct omapdss_sdi_ops {
  473. int (*connect)(struct omap_dss_device *dssdev,
  474. struct omap_dss_device *dst);
  475. void (*disconnect)(struct omap_dss_device *dssdev,
  476. struct omap_dss_device *dst);
  477. int (*enable)(struct omap_dss_device *dssdev);
  478. void (*disable)(struct omap_dss_device *dssdev);
  479. int (*check_timings)(struct omap_dss_device *dssdev,
  480. struct omap_video_timings *timings);
  481. void (*set_timings)(struct omap_dss_device *dssdev,
  482. struct omap_video_timings *timings);
  483. void (*get_timings)(struct omap_dss_device *dssdev,
  484. struct omap_video_timings *timings);
  485. void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
  486. };
  487. struct omapdss_dvi_ops {
  488. int (*connect)(struct omap_dss_device *dssdev,
  489. struct omap_dss_device *dst);
  490. void (*disconnect)(struct omap_dss_device *dssdev,
  491. struct omap_dss_device *dst);
  492. int (*enable)(struct omap_dss_device *dssdev);
  493. void (*disable)(struct omap_dss_device *dssdev);
  494. int (*check_timings)(struct omap_dss_device *dssdev,
  495. struct omap_video_timings *timings);
  496. void (*set_timings)(struct omap_dss_device *dssdev,
  497. struct omap_video_timings *timings);
  498. void (*get_timings)(struct omap_dss_device *dssdev,
  499. struct omap_video_timings *timings);
  500. };
  501. struct omapdss_atv_ops {
  502. int (*connect)(struct omap_dss_device *dssdev,
  503. struct omap_dss_device *dst);
  504. void (*disconnect)(struct omap_dss_device *dssdev,
  505. struct omap_dss_device *dst);
  506. int (*enable)(struct omap_dss_device *dssdev);
  507. void (*disable)(struct omap_dss_device *dssdev);
  508. int (*check_timings)(struct omap_dss_device *dssdev,
  509. struct omap_video_timings *timings);
  510. void (*set_timings)(struct omap_dss_device *dssdev,
  511. struct omap_video_timings *timings);
  512. void (*get_timings)(struct omap_dss_device *dssdev,
  513. struct omap_video_timings *timings);
  514. void (*set_type)(struct omap_dss_device *dssdev,
  515. enum omap_dss_venc_type type);
  516. void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
  517. bool invert_polarity);
  518. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  519. u32 (*get_wss)(struct omap_dss_device *dssdev);
  520. };
  521. struct omapdss_hdmi_ops {
  522. int (*connect)(struct omap_dss_device *dssdev,
  523. struct omap_dss_device *dst);
  524. void (*disconnect)(struct omap_dss_device *dssdev,
  525. struct omap_dss_device *dst);
  526. int (*enable)(struct omap_dss_device *dssdev);
  527. void (*disable)(struct omap_dss_device *dssdev);
  528. int (*check_timings)(struct omap_dss_device *dssdev,
  529. struct omap_video_timings *timings);
  530. void (*set_timings)(struct omap_dss_device *dssdev,
  531. struct omap_video_timings *timings);
  532. void (*get_timings)(struct omap_dss_device *dssdev,
  533. struct omap_video_timings *timings);
  534. int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
  535. bool (*detect)(struct omap_dss_device *dssdev);
  536. int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
  537. int (*set_infoframe)(struct omap_dss_device *dssdev,
  538. const struct hdmi_avi_infoframe *avi);
  539. /*
  540. * Note: These functions might sleep. Do not call while
  541. * holding a spinlock/readlock.
  542. */
  543. int (*audio_enable)(struct omap_dss_device *dssdev);
  544. void (*audio_disable)(struct omap_dss_device *dssdev);
  545. bool (*audio_supported)(struct omap_dss_device *dssdev);
  546. int (*audio_config)(struct omap_dss_device *dssdev,
  547. struct omap_dss_audio *audio);
  548. /* Note: These functions may not sleep */
  549. int (*audio_start)(struct omap_dss_device *dssdev);
  550. void (*audio_stop)(struct omap_dss_device *dssdev);
  551. };
  552. struct omapdss_dsi_ops {
  553. int (*connect)(struct omap_dss_device *dssdev,
  554. struct omap_dss_device *dst);
  555. void (*disconnect)(struct omap_dss_device *dssdev,
  556. struct omap_dss_device *dst);
  557. int (*enable)(struct omap_dss_device *dssdev);
  558. void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
  559. bool enter_ulps);
  560. /* bus configuration */
  561. int (*set_config)(struct omap_dss_device *dssdev,
  562. const struct omap_dss_dsi_config *cfg);
  563. int (*configure_pins)(struct omap_dss_device *dssdev,
  564. const struct omap_dsi_pin_config *pin_cfg);
  565. void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
  566. bool enable);
  567. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  568. int (*update)(struct omap_dss_device *dssdev, int channel,
  569. void (*callback)(int, void *), void *data);
  570. void (*bus_lock)(struct omap_dss_device *dssdev);
  571. void (*bus_unlock)(struct omap_dss_device *dssdev);
  572. int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
  573. void (*disable_video_output)(struct omap_dss_device *dssdev,
  574. int channel);
  575. int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
  576. int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
  577. int vc_id);
  578. void (*release_vc)(struct omap_dss_device *dssdev, int channel);
  579. /* data transfer */
  580. int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
  581. u8 *data, int len);
  582. int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
  583. u8 *data, int len);
  584. int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  585. u8 *data, int len);
  586. int (*gen_write)(struct omap_dss_device *dssdev, int channel,
  587. u8 *data, int len);
  588. int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
  589. u8 *data, int len);
  590. int (*gen_read)(struct omap_dss_device *dssdev, int channel,
  591. u8 *reqdata, int reqlen,
  592. u8 *data, int len);
  593. int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
  594. int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
  595. int channel, u16 plen);
  596. };
  597. struct omap_dss_device {
  598. struct device *dev;
  599. struct module *owner;
  600. struct list_head panel_list;
  601. /* alias in the form of "display%d" */
  602. char alias[16];
  603. enum omap_display_type type;
  604. enum omap_display_type output_type;
  605. union {
  606. struct {
  607. u8 data_lines;
  608. } dpi;
  609. struct {
  610. u8 channel;
  611. u8 data_lines;
  612. } rfbi;
  613. struct {
  614. u8 datapairs;
  615. } sdi;
  616. struct {
  617. int module;
  618. } dsi;
  619. struct {
  620. enum omap_dss_venc_type type;
  621. bool invert_polarity;
  622. } venc;
  623. } phy;
  624. struct {
  625. struct omap_video_timings timings;
  626. enum omap_dss_dsi_pixel_format dsi_pix_fmt;
  627. enum omap_dss_dsi_mode dsi_mode;
  628. } panel;
  629. struct {
  630. u8 pixel_size;
  631. struct rfbi_timings rfbi_timings;
  632. } ctrl;
  633. const char *name;
  634. /* used to match device to driver */
  635. const char *driver_name;
  636. void *data;
  637. struct omap_dss_driver *driver;
  638. union {
  639. const struct omapdss_dpi_ops *dpi;
  640. const struct omapdss_sdi_ops *sdi;
  641. const struct omapdss_dvi_ops *dvi;
  642. const struct omapdss_hdmi_ops *hdmi;
  643. const struct omapdss_atv_ops *atv;
  644. const struct omapdss_dsi_ops *dsi;
  645. } ops;
  646. /* helper variable for driver suspend/resume */
  647. bool activate_after_resume;
  648. enum omap_display_caps caps;
  649. struct omap_dss_device *src;
  650. enum omap_dss_display_state state;
  651. enum omap_dss_audio_state audio_state;
  652. /* OMAP DSS output specific fields */
  653. struct list_head list;
  654. /* DISPC channel for this output */
  655. enum omap_channel dispc_channel;
  656. /* output instance */
  657. enum omap_dss_output_id id;
  658. /* dynamic fields */
  659. struct omap_overlay_manager *manager;
  660. struct omap_dss_device *dst;
  661. };
  662. struct omap_dss_hdmi_data
  663. {
  664. int ct_cp_hpd_gpio;
  665. int ls_oe_gpio;
  666. int hpd_gpio;
  667. };
  668. struct omap_dss_driver {
  669. int (*probe)(struct omap_dss_device *);
  670. void (*remove)(struct omap_dss_device *);
  671. int (*connect)(struct omap_dss_device *dssdev);
  672. void (*disconnect)(struct omap_dss_device *dssdev);
  673. int (*enable)(struct omap_dss_device *display);
  674. void (*disable)(struct omap_dss_device *display);
  675. int (*run_test)(struct omap_dss_device *display, int test);
  676. int (*update)(struct omap_dss_device *dssdev,
  677. u16 x, u16 y, u16 w, u16 h);
  678. int (*sync)(struct omap_dss_device *dssdev);
  679. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  680. int (*get_te)(struct omap_dss_device *dssdev);
  681. u8 (*get_rotate)(struct omap_dss_device *dssdev);
  682. int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
  683. bool (*get_mirror)(struct omap_dss_device *dssdev);
  684. int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
  685. int (*memory_read)(struct omap_dss_device *dssdev,
  686. void *buf, size_t size,
  687. u16 x, u16 y, u16 w, u16 h);
  688. void (*get_resolution)(struct omap_dss_device *dssdev,
  689. u16 *xres, u16 *yres);
  690. void (*get_dimensions)(struct omap_dss_device *dssdev,
  691. u32 *width, u32 *height);
  692. int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
  693. int (*check_timings)(struct omap_dss_device *dssdev,
  694. struct omap_video_timings *timings);
  695. void (*set_timings)(struct omap_dss_device *dssdev,
  696. struct omap_video_timings *timings);
  697. void (*get_timings)(struct omap_dss_device *dssdev,
  698. struct omap_video_timings *timings);
  699. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  700. u32 (*get_wss)(struct omap_dss_device *dssdev);
  701. int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
  702. bool (*detect)(struct omap_dss_device *dssdev);
  703. int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
  704. int (*set_hdmi_infoframe)(struct omap_dss_device *dssdev,
  705. const struct hdmi_avi_infoframe *avi);
  706. /*
  707. * For display drivers that support audio. This encompasses
  708. * HDMI and DisplayPort at the moment.
  709. */
  710. /*
  711. * Note: These functions might sleep. Do not call while
  712. * holding a spinlock/readlock.
  713. */
  714. int (*audio_enable)(struct omap_dss_device *dssdev);
  715. void (*audio_disable)(struct omap_dss_device *dssdev);
  716. bool (*audio_supported)(struct omap_dss_device *dssdev);
  717. int (*audio_config)(struct omap_dss_device *dssdev,
  718. struct omap_dss_audio *audio);
  719. /* Note: These functions may not sleep */
  720. int (*audio_start)(struct omap_dss_device *dssdev);
  721. void (*audio_stop)(struct omap_dss_device *dssdev);
  722. };
  723. enum omapdss_version omapdss_get_version(void);
  724. bool omapdss_is_initialized(void);
  725. int omap_dss_register_driver(struct omap_dss_driver *);
  726. void omap_dss_unregister_driver(struct omap_dss_driver *);
  727. int omapdss_register_display(struct omap_dss_device *dssdev);
  728. void omapdss_unregister_display(struct omap_dss_device *dssdev);
  729. struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
  730. void omap_dss_put_device(struct omap_dss_device *dssdev);
  731. #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
  732. struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
  733. struct omap_dss_device *omap_dss_find_device(void *data,
  734. int (*match)(struct omap_dss_device *dssdev, void *data));
  735. const char *omapdss_get_default_display_name(void);
  736. void videomode_to_omap_video_timings(const struct videomode *vm,
  737. struct omap_video_timings *ovt);
  738. void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
  739. struct videomode *vm);
  740. int dss_feat_get_num_mgrs(void);
  741. int dss_feat_get_num_ovls(void);
  742. enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
  743. enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
  744. enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
  745. int omap_dss_get_num_overlay_managers(void);
  746. struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
  747. int omap_dss_get_num_overlays(void);
  748. struct omap_overlay *omap_dss_get_overlay(int num);
  749. int omapdss_register_output(struct omap_dss_device *output);
  750. void omapdss_unregister_output(struct omap_dss_device *output);
  751. struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
  752. struct omap_dss_device *omap_dss_find_output(const char *name);
  753. struct omap_dss_device *omap_dss_find_output_by_node(struct device_node *node);
  754. int omapdss_output_set_device(struct omap_dss_device *out,
  755. struct omap_dss_device *dssdev);
  756. int omapdss_output_unset_device(struct omap_dss_device *out);
  757. struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
  758. struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
  759. void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
  760. u16 *xres, u16 *yres);
  761. int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
  762. void omapdss_default_get_timings(struct omap_dss_device *dssdev,
  763. struct omap_video_timings *timings);
  764. typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
  765. int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  766. int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  767. u32 dispc_read_irqstatus(void);
  768. void dispc_clear_irqstatus(u32 mask);
  769. u32 dispc_read_irqenable(void);
  770. void dispc_write_irqenable(u32 mask);
  771. int dispc_request_irq(irq_handler_t handler, void *dev_id);
  772. void dispc_free_irq(void *dev_id);
  773. int dispc_runtime_get(void);
  774. void dispc_runtime_put(void);
  775. void dispc_mgr_enable(enum omap_channel channel, bool enable);
  776. bool dispc_mgr_is_enabled(enum omap_channel channel);
  777. u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
  778. u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
  779. u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
  780. bool dispc_mgr_go_busy(enum omap_channel channel);
  781. void dispc_mgr_go(enum omap_channel channel);
  782. void dispc_mgr_set_lcd_config(enum omap_channel channel,
  783. const struct dss_lcd_mgr_config *config);
  784. void dispc_mgr_set_timings(enum omap_channel channel,
  785. const struct omap_video_timings *timings);
  786. void dispc_mgr_setup(enum omap_channel channel,
  787. const struct omap_overlay_manager_info *info);
  788. int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
  789. const struct omap_overlay_info *oi,
  790. const struct omap_video_timings *timings,
  791. int *x_predecim, int *y_predecim);
  792. int dispc_ovl_enable(enum omap_plane plane, bool enable);
  793. bool dispc_ovl_enabled(enum omap_plane plane);
  794. void dispc_ovl_set_channel_out(enum omap_plane plane,
  795. enum omap_channel channel);
  796. int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
  797. bool replication, const struct omap_video_timings *mgr_timings,
  798. bool mem_to_mem);
  799. int omapdss_compat_init(void);
  800. void omapdss_compat_uninit(void);
  801. struct dss_mgr_ops {
  802. int (*connect)(struct omap_overlay_manager *mgr,
  803. struct omap_dss_device *dst);
  804. void (*disconnect)(struct omap_overlay_manager *mgr,
  805. struct omap_dss_device *dst);
  806. void (*start_update)(struct omap_overlay_manager *mgr);
  807. int (*enable)(struct omap_overlay_manager *mgr);
  808. void (*disable)(struct omap_overlay_manager *mgr);
  809. void (*set_timings)(struct omap_overlay_manager *mgr,
  810. const struct omap_video_timings *timings);
  811. void (*set_lcd_config)(struct omap_overlay_manager *mgr,
  812. const struct dss_lcd_mgr_config *config);
  813. int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
  814. void (*handler)(void *), void *data);
  815. void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
  816. void (*handler)(void *), void *data);
  817. };
  818. int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
  819. void dss_uninstall_mgr_ops(void);
  820. int dss_mgr_connect(struct omap_overlay_manager *mgr,
  821. struct omap_dss_device *dst);
  822. void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
  823. struct omap_dss_device *dst);
  824. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  825. const struct omap_video_timings *timings);
  826. void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
  827. const struct dss_lcd_mgr_config *config);
  828. int dss_mgr_enable(struct omap_overlay_manager *mgr);
  829. void dss_mgr_disable(struct omap_overlay_manager *mgr);
  830. void dss_mgr_start_update(struct omap_overlay_manager *mgr);
  831. int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
  832. void (*handler)(void *), void *data);
  833. void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
  834. void (*handler)(void *), void *data);
  835. static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
  836. {
  837. return dssdev->src;
  838. }
  839. static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
  840. {
  841. return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
  842. }
  843. struct device_node *
  844. omapdss_of_get_next_port(const struct device_node *parent,
  845. struct device_node *prev);
  846. struct device_node *
  847. omapdss_of_get_next_endpoint(const struct device_node *parent,
  848. struct device_node *prev);
  849. struct device_node *
  850. omapdss_of_get_first_endpoint(const struct device_node *parent);
  851. struct omap_dss_device *
  852. omapdss_of_find_source_for_first_ep(struct device_node *node);
  853. #endif