core.c 29 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227
  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/firmware.h>
  19. #include "core.h"
  20. #include "mac.h"
  21. #include "htc.h"
  22. #include "hif.h"
  23. #include "wmi.h"
  24. #include "bmi.h"
  25. #include "debug.h"
  26. #include "htt.h"
  27. #include "testmode.h"
  28. unsigned int ath10k_debug_mask;
  29. static bool uart_print;
  30. static unsigned int ath10k_p2p;
  31. module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  32. module_param(uart_print, bool, 0644);
  33. module_param_named(p2p, ath10k_p2p, uint, 0644);
  34. MODULE_PARM_DESC(debug_mask, "Debugging mask");
  35. MODULE_PARM_DESC(uart_print, "Uart target debugging");
  36. MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
  37. static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  38. {
  39. .id = QCA988X_HW_2_0_VERSION,
  40. .name = "qca988x hw2.0",
  41. .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  42. .fw = {
  43. .dir = QCA988X_HW_2_0_FW_DIR,
  44. .fw = QCA988X_HW_2_0_FW_FILE,
  45. .otp = QCA988X_HW_2_0_OTP_FILE,
  46. .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  47. },
  48. },
  49. };
  50. static void ath10k_send_suspend_complete(struct ath10k *ar)
  51. {
  52. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
  53. complete(&ar->target_suspend);
  54. }
  55. static int ath10k_init_configure_target(struct ath10k *ar)
  56. {
  57. u32 param_host;
  58. int ret;
  59. /* tell target which HTC version it is used*/
  60. ret = ath10k_bmi_write32(ar, hi_app_host_interest,
  61. HTC_PROTOCOL_VERSION);
  62. if (ret) {
  63. ath10k_err(ar, "settings HTC version failed\n");
  64. return ret;
  65. }
  66. /* set the firmware mode to STA/IBSS/AP */
  67. ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
  68. if (ret) {
  69. ath10k_err(ar, "setting firmware mode (1/2) failed\n");
  70. return ret;
  71. }
  72. /* TODO following parameters need to be re-visited. */
  73. /* num_device */
  74. param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  75. /* Firmware mode */
  76. /* FIXME: Why FW_MODE_AP ??.*/
  77. param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
  78. /* mac_addr_method */
  79. param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  80. /* firmware_bridge */
  81. param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  82. /* fwsubmode */
  83. param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
  84. ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
  85. if (ret) {
  86. ath10k_err(ar, "setting firmware mode (2/2) failed\n");
  87. return ret;
  88. }
  89. /* We do all byte-swapping on the host */
  90. ret = ath10k_bmi_write32(ar, hi_be, 0);
  91. if (ret) {
  92. ath10k_err(ar, "setting host CPU BE mode failed\n");
  93. return ret;
  94. }
  95. /* FW descriptor/Data swap flags */
  96. ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
  97. if (ret) {
  98. ath10k_err(ar, "setting FW data/desc swap flags failed\n");
  99. return ret;
  100. }
  101. return 0;
  102. }
  103. static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
  104. const char *dir,
  105. const char *file)
  106. {
  107. char filename[100];
  108. const struct firmware *fw;
  109. int ret;
  110. if (file == NULL)
  111. return ERR_PTR(-ENOENT);
  112. if (dir == NULL)
  113. dir = ".";
  114. snprintf(filename, sizeof(filename), "%s/%s", dir, file);
  115. ret = request_firmware(&fw, filename, ar->dev);
  116. if (ret)
  117. return ERR_PTR(ret);
  118. return fw;
  119. }
  120. static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
  121. size_t data_len)
  122. {
  123. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  124. u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
  125. u32 board_ext_data_addr;
  126. int ret;
  127. ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
  128. if (ret) {
  129. ath10k_err(ar, "could not read board ext data addr (%d)\n",
  130. ret);
  131. return ret;
  132. }
  133. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  134. "boot push board extended data addr 0x%x\n",
  135. board_ext_data_addr);
  136. if (board_ext_data_addr == 0)
  137. return 0;
  138. if (data_len != (board_data_size + board_ext_data_size)) {
  139. ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
  140. data_len, board_data_size, board_ext_data_size);
  141. return -EINVAL;
  142. }
  143. ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
  144. data + board_data_size,
  145. board_ext_data_size);
  146. if (ret) {
  147. ath10k_err(ar, "could not write board ext data (%d)\n", ret);
  148. return ret;
  149. }
  150. ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
  151. (board_ext_data_size << 16) | 1);
  152. if (ret) {
  153. ath10k_err(ar, "could not write board ext data bit (%d)\n",
  154. ret);
  155. return ret;
  156. }
  157. return 0;
  158. }
  159. static int ath10k_download_board_data(struct ath10k *ar, const void *data,
  160. size_t data_len)
  161. {
  162. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  163. u32 address;
  164. int ret;
  165. ret = ath10k_push_board_ext_data(ar, data, data_len);
  166. if (ret) {
  167. ath10k_err(ar, "could not push board ext data (%d)\n", ret);
  168. goto exit;
  169. }
  170. ret = ath10k_bmi_read32(ar, hi_board_data, &address);
  171. if (ret) {
  172. ath10k_err(ar, "could not read board data addr (%d)\n", ret);
  173. goto exit;
  174. }
  175. ret = ath10k_bmi_write_memory(ar, address, data,
  176. min_t(u32, board_data_size,
  177. data_len));
  178. if (ret) {
  179. ath10k_err(ar, "could not write board data (%d)\n", ret);
  180. goto exit;
  181. }
  182. ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
  183. if (ret) {
  184. ath10k_err(ar, "could not write board data bit (%d)\n", ret);
  185. goto exit;
  186. }
  187. exit:
  188. return ret;
  189. }
  190. static int ath10k_download_cal_file(struct ath10k *ar)
  191. {
  192. int ret;
  193. if (!ar->cal_file)
  194. return -ENOENT;
  195. if (IS_ERR(ar->cal_file))
  196. return PTR_ERR(ar->cal_file);
  197. ret = ath10k_download_board_data(ar, ar->cal_file->data,
  198. ar->cal_file->size);
  199. if (ret) {
  200. ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
  201. return ret;
  202. }
  203. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
  204. return 0;
  205. }
  206. static int ath10k_download_and_run_otp(struct ath10k *ar)
  207. {
  208. u32 result, address = ar->hw_params.patch_load_addr;
  209. int ret;
  210. ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
  211. if (ret) {
  212. ath10k_err(ar, "failed to download board data: %d\n", ret);
  213. return ret;
  214. }
  215. /* OTP is optional */
  216. if (!ar->otp_data || !ar->otp_len) {
  217. ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
  218. ar->otp_data, ar->otp_len);
  219. return 0;
  220. }
  221. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
  222. address, ar->otp_len);
  223. ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
  224. if (ret) {
  225. ath10k_err(ar, "could not write otp (%d)\n", ret);
  226. return ret;
  227. }
  228. ret = ath10k_bmi_execute(ar, address, 0, &result);
  229. if (ret) {
  230. ath10k_err(ar, "could not execute otp (%d)\n", ret);
  231. return ret;
  232. }
  233. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
  234. if (result != 0) {
  235. ath10k_err(ar, "otp calibration failed: %d", result);
  236. return -EINVAL;
  237. }
  238. return 0;
  239. }
  240. static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
  241. {
  242. u32 address, data_len;
  243. const char *mode_name;
  244. const void *data;
  245. int ret;
  246. address = ar->hw_params.patch_load_addr;
  247. switch (mode) {
  248. case ATH10K_FIRMWARE_MODE_NORMAL:
  249. data = ar->firmware_data;
  250. data_len = ar->firmware_len;
  251. mode_name = "normal";
  252. break;
  253. case ATH10K_FIRMWARE_MODE_UTF:
  254. data = ar->testmode.utf->data;
  255. data_len = ar->testmode.utf->size;
  256. mode_name = "utf";
  257. break;
  258. default:
  259. ath10k_err(ar, "unknown firmware mode: %d\n", mode);
  260. return -EINVAL;
  261. }
  262. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  263. "boot uploading firmware image %p len %d mode %s\n",
  264. data, data_len, mode_name);
  265. ret = ath10k_bmi_fast_download(ar, address, data, data_len);
  266. if (ret) {
  267. ath10k_err(ar, "failed to download %s firmware: %d\n",
  268. mode_name, ret);
  269. return ret;
  270. }
  271. return ret;
  272. }
  273. static void ath10k_core_free_firmware_files(struct ath10k *ar)
  274. {
  275. if (ar->board && !IS_ERR(ar->board))
  276. release_firmware(ar->board);
  277. if (ar->otp && !IS_ERR(ar->otp))
  278. release_firmware(ar->otp);
  279. if (ar->firmware && !IS_ERR(ar->firmware))
  280. release_firmware(ar->firmware);
  281. if (ar->cal_file && !IS_ERR(ar->cal_file))
  282. release_firmware(ar->cal_file);
  283. ar->board = NULL;
  284. ar->board_data = NULL;
  285. ar->board_len = 0;
  286. ar->otp = NULL;
  287. ar->otp_data = NULL;
  288. ar->otp_len = 0;
  289. ar->firmware = NULL;
  290. ar->firmware_data = NULL;
  291. ar->firmware_len = 0;
  292. ar->cal_file = NULL;
  293. }
  294. static int ath10k_fetch_cal_file(struct ath10k *ar)
  295. {
  296. char filename[100];
  297. /* cal-<bus>-<id>.bin */
  298. scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
  299. ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
  300. ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
  301. if (IS_ERR(ar->cal_file))
  302. /* calibration file is optional, don't print any warnings */
  303. return PTR_ERR(ar->cal_file);
  304. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
  305. ATH10K_FW_DIR, filename);
  306. return 0;
  307. }
  308. static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
  309. {
  310. int ret = 0;
  311. if (ar->hw_params.fw.fw == NULL) {
  312. ath10k_err(ar, "firmware file not defined\n");
  313. return -EINVAL;
  314. }
  315. if (ar->hw_params.fw.board == NULL) {
  316. ath10k_err(ar, "board data file not defined");
  317. return -EINVAL;
  318. }
  319. ar->board = ath10k_fetch_fw_file(ar,
  320. ar->hw_params.fw.dir,
  321. ar->hw_params.fw.board);
  322. if (IS_ERR(ar->board)) {
  323. ret = PTR_ERR(ar->board);
  324. ath10k_err(ar, "could not fetch board data (%d)\n", ret);
  325. goto err;
  326. }
  327. ar->board_data = ar->board->data;
  328. ar->board_len = ar->board->size;
  329. ar->firmware = ath10k_fetch_fw_file(ar,
  330. ar->hw_params.fw.dir,
  331. ar->hw_params.fw.fw);
  332. if (IS_ERR(ar->firmware)) {
  333. ret = PTR_ERR(ar->firmware);
  334. ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
  335. goto err;
  336. }
  337. ar->firmware_data = ar->firmware->data;
  338. ar->firmware_len = ar->firmware->size;
  339. /* OTP may be undefined. If so, don't fetch it at all */
  340. if (ar->hw_params.fw.otp == NULL)
  341. return 0;
  342. ar->otp = ath10k_fetch_fw_file(ar,
  343. ar->hw_params.fw.dir,
  344. ar->hw_params.fw.otp);
  345. if (IS_ERR(ar->otp)) {
  346. ret = PTR_ERR(ar->otp);
  347. ath10k_err(ar, "could not fetch otp (%d)\n", ret);
  348. goto err;
  349. }
  350. ar->otp_data = ar->otp->data;
  351. ar->otp_len = ar->otp->size;
  352. return 0;
  353. err:
  354. ath10k_core_free_firmware_files(ar);
  355. return ret;
  356. }
  357. static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
  358. {
  359. size_t magic_len, len, ie_len;
  360. int ie_id, i, index, bit, ret;
  361. struct ath10k_fw_ie *hdr;
  362. const u8 *data;
  363. __le32 *timestamp;
  364. /* first fetch the firmware file (firmware-*.bin) */
  365. ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
  366. if (IS_ERR(ar->firmware)) {
  367. ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
  368. ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
  369. return PTR_ERR(ar->firmware);
  370. }
  371. data = ar->firmware->data;
  372. len = ar->firmware->size;
  373. /* magic also includes the null byte, check that as well */
  374. magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
  375. if (len < magic_len) {
  376. ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
  377. ar->hw_params.fw.dir, name, len);
  378. ret = -EINVAL;
  379. goto err;
  380. }
  381. if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
  382. ath10k_err(ar, "invalid firmware magic\n");
  383. ret = -EINVAL;
  384. goto err;
  385. }
  386. /* jump over the padding */
  387. magic_len = ALIGN(magic_len, 4);
  388. len -= magic_len;
  389. data += magic_len;
  390. /* loop elements */
  391. while (len > sizeof(struct ath10k_fw_ie)) {
  392. hdr = (struct ath10k_fw_ie *)data;
  393. ie_id = le32_to_cpu(hdr->id);
  394. ie_len = le32_to_cpu(hdr->len);
  395. len -= sizeof(*hdr);
  396. data += sizeof(*hdr);
  397. if (len < ie_len) {
  398. ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
  399. ie_id, len, ie_len);
  400. ret = -EINVAL;
  401. goto err;
  402. }
  403. switch (ie_id) {
  404. case ATH10K_FW_IE_FW_VERSION:
  405. if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
  406. break;
  407. memcpy(ar->hw->wiphy->fw_version, data, ie_len);
  408. ar->hw->wiphy->fw_version[ie_len] = '\0';
  409. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  410. "found fw version %s\n",
  411. ar->hw->wiphy->fw_version);
  412. break;
  413. case ATH10K_FW_IE_TIMESTAMP:
  414. if (ie_len != sizeof(u32))
  415. break;
  416. timestamp = (__le32 *)data;
  417. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
  418. le32_to_cpup(timestamp));
  419. break;
  420. case ATH10K_FW_IE_FEATURES:
  421. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  422. "found firmware features ie (%zd B)\n",
  423. ie_len);
  424. for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
  425. index = i / 8;
  426. bit = i % 8;
  427. if (index == ie_len)
  428. break;
  429. if (data[index] & (1 << bit)) {
  430. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  431. "Enabling feature bit: %i\n",
  432. i);
  433. __set_bit(i, ar->fw_features);
  434. }
  435. }
  436. ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
  437. ar->fw_features,
  438. sizeof(ar->fw_features));
  439. break;
  440. case ATH10K_FW_IE_FW_IMAGE:
  441. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  442. "found fw image ie (%zd B)\n",
  443. ie_len);
  444. ar->firmware_data = data;
  445. ar->firmware_len = ie_len;
  446. break;
  447. case ATH10K_FW_IE_OTP_IMAGE:
  448. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  449. "found otp image ie (%zd B)\n",
  450. ie_len);
  451. ar->otp_data = data;
  452. ar->otp_len = ie_len;
  453. break;
  454. default:
  455. ath10k_warn(ar, "Unknown FW IE: %u\n",
  456. le32_to_cpu(hdr->id));
  457. break;
  458. }
  459. /* jump over the padding */
  460. ie_len = ALIGN(ie_len, 4);
  461. len -= ie_len;
  462. data += ie_len;
  463. }
  464. if (!ar->firmware_data || !ar->firmware_len) {
  465. ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
  466. ar->hw_params.fw.dir, name);
  467. ret = -ENOMEDIUM;
  468. goto err;
  469. }
  470. if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
  471. !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
  472. ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
  473. ret = -EINVAL;
  474. goto err;
  475. }
  476. /* now fetch the board file */
  477. if (ar->hw_params.fw.board == NULL) {
  478. ath10k_err(ar, "board data file not defined");
  479. ret = -EINVAL;
  480. goto err;
  481. }
  482. ar->board = ath10k_fetch_fw_file(ar,
  483. ar->hw_params.fw.dir,
  484. ar->hw_params.fw.board);
  485. if (IS_ERR(ar->board)) {
  486. ret = PTR_ERR(ar->board);
  487. ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
  488. ar->hw_params.fw.dir, ar->hw_params.fw.board,
  489. ret);
  490. goto err;
  491. }
  492. ar->board_data = ar->board->data;
  493. ar->board_len = ar->board->size;
  494. return 0;
  495. err:
  496. ath10k_core_free_firmware_files(ar);
  497. return ret;
  498. }
  499. static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
  500. {
  501. int ret;
  502. /* calibration file is optional, don't check for any errors */
  503. ath10k_fetch_cal_file(ar);
  504. ar->fw_api = 3;
  505. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  506. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
  507. if (ret == 0)
  508. goto success;
  509. ar->fw_api = 2;
  510. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  511. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
  512. if (ret == 0)
  513. goto success;
  514. ar->fw_api = 1;
  515. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  516. ret = ath10k_core_fetch_firmware_api_1(ar);
  517. if (ret)
  518. return ret;
  519. success:
  520. ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
  521. return 0;
  522. }
  523. static int ath10k_download_cal_data(struct ath10k *ar)
  524. {
  525. int ret;
  526. ret = ath10k_download_cal_file(ar);
  527. if (ret == 0) {
  528. ar->cal_mode = ATH10K_CAL_MODE_FILE;
  529. goto done;
  530. }
  531. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  532. "boot did not find a calibration file, try OTP next: %d\n",
  533. ret);
  534. ret = ath10k_download_and_run_otp(ar);
  535. if (ret) {
  536. ath10k_err(ar, "failed to run otp: %d\n", ret);
  537. return ret;
  538. }
  539. ar->cal_mode = ATH10K_CAL_MODE_OTP;
  540. done:
  541. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
  542. ath10k_cal_mode_str(ar->cal_mode));
  543. return 0;
  544. }
  545. static int ath10k_init_uart(struct ath10k *ar)
  546. {
  547. int ret;
  548. /*
  549. * Explicitly setting UART prints to zero as target turns it on
  550. * based on scratch registers.
  551. */
  552. ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
  553. if (ret) {
  554. ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
  555. return ret;
  556. }
  557. if (!uart_print)
  558. return 0;
  559. ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
  560. if (ret) {
  561. ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
  562. return ret;
  563. }
  564. ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
  565. if (ret) {
  566. ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
  567. return ret;
  568. }
  569. /* Set the UART baud rate to 19200. */
  570. ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
  571. if (ret) {
  572. ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
  573. return ret;
  574. }
  575. ath10k_info(ar, "UART prints enabled\n");
  576. return 0;
  577. }
  578. static int ath10k_init_hw_params(struct ath10k *ar)
  579. {
  580. const struct ath10k_hw_params *uninitialized_var(hw_params);
  581. int i;
  582. for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
  583. hw_params = &ath10k_hw_params_list[i];
  584. if (hw_params->id == ar->target_version)
  585. break;
  586. }
  587. if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
  588. ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
  589. ar->target_version);
  590. return -EINVAL;
  591. }
  592. ar->hw_params = *hw_params;
  593. ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
  594. ar->hw_params.name, ar->target_version);
  595. return 0;
  596. }
  597. static void ath10k_core_restart(struct work_struct *work)
  598. {
  599. struct ath10k *ar = container_of(work, struct ath10k, restart_work);
  600. mutex_lock(&ar->conf_mutex);
  601. switch (ar->state) {
  602. case ATH10K_STATE_ON:
  603. ar->state = ATH10K_STATE_RESTARTING;
  604. ath10k_hif_stop(ar);
  605. ath10k_scan_finish(ar);
  606. ieee80211_restart_hw(ar->hw);
  607. break;
  608. case ATH10K_STATE_OFF:
  609. /* this can happen if driver is being unloaded
  610. * or if the crash happens during FW probing */
  611. ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
  612. break;
  613. case ATH10K_STATE_RESTARTING:
  614. /* hw restart might be requested from multiple places */
  615. break;
  616. case ATH10K_STATE_RESTARTED:
  617. ar->state = ATH10K_STATE_WEDGED;
  618. /* fall through */
  619. case ATH10K_STATE_WEDGED:
  620. ath10k_warn(ar, "device is wedged, will not restart\n");
  621. break;
  622. case ATH10K_STATE_UTF:
  623. ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
  624. break;
  625. }
  626. mutex_unlock(&ar->conf_mutex);
  627. }
  628. int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
  629. {
  630. int status;
  631. lockdep_assert_held(&ar->conf_mutex);
  632. ath10k_bmi_start(ar);
  633. if (ath10k_init_configure_target(ar)) {
  634. status = -EINVAL;
  635. goto err;
  636. }
  637. status = ath10k_download_cal_data(ar);
  638. if (status)
  639. goto err;
  640. status = ath10k_download_fw(ar, mode);
  641. if (status)
  642. goto err;
  643. status = ath10k_init_uart(ar);
  644. if (status)
  645. goto err;
  646. ar->htc.htc_ops.target_send_suspend_complete =
  647. ath10k_send_suspend_complete;
  648. status = ath10k_htc_init(ar);
  649. if (status) {
  650. ath10k_err(ar, "could not init HTC (%d)\n", status);
  651. goto err;
  652. }
  653. status = ath10k_bmi_done(ar);
  654. if (status)
  655. goto err;
  656. status = ath10k_wmi_attach(ar);
  657. if (status) {
  658. ath10k_err(ar, "WMI attach failed: %d\n", status);
  659. goto err;
  660. }
  661. status = ath10k_htt_init(ar);
  662. if (status) {
  663. ath10k_err(ar, "failed to init htt: %d\n", status);
  664. goto err_wmi_detach;
  665. }
  666. status = ath10k_htt_tx_alloc(&ar->htt);
  667. if (status) {
  668. ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
  669. goto err_wmi_detach;
  670. }
  671. status = ath10k_htt_rx_alloc(&ar->htt);
  672. if (status) {
  673. ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
  674. goto err_htt_tx_detach;
  675. }
  676. status = ath10k_hif_start(ar);
  677. if (status) {
  678. ath10k_err(ar, "could not start HIF: %d\n", status);
  679. goto err_htt_rx_detach;
  680. }
  681. status = ath10k_htc_wait_target(&ar->htc);
  682. if (status) {
  683. ath10k_err(ar, "failed to connect to HTC: %d\n", status);
  684. goto err_hif_stop;
  685. }
  686. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  687. status = ath10k_htt_connect(&ar->htt);
  688. if (status) {
  689. ath10k_err(ar, "failed to connect htt (%d)\n", status);
  690. goto err_hif_stop;
  691. }
  692. }
  693. status = ath10k_wmi_connect(ar);
  694. if (status) {
  695. ath10k_err(ar, "could not connect wmi: %d\n", status);
  696. goto err_hif_stop;
  697. }
  698. status = ath10k_htc_start(&ar->htc);
  699. if (status) {
  700. ath10k_err(ar, "failed to start htc: %d\n", status);
  701. goto err_hif_stop;
  702. }
  703. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  704. status = ath10k_wmi_wait_for_service_ready(ar);
  705. if (status <= 0) {
  706. ath10k_warn(ar, "wmi service ready event not received");
  707. status = -ETIMEDOUT;
  708. goto err_hif_stop;
  709. }
  710. }
  711. ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
  712. ar->hw->wiphy->fw_version);
  713. status = ath10k_wmi_cmd_init(ar);
  714. if (status) {
  715. ath10k_err(ar, "could not send WMI init command (%d)\n",
  716. status);
  717. goto err_hif_stop;
  718. }
  719. status = ath10k_wmi_wait_for_unified_ready(ar);
  720. if (status <= 0) {
  721. ath10k_err(ar, "wmi unified ready event not received\n");
  722. status = -ETIMEDOUT;
  723. goto err_hif_stop;
  724. }
  725. /* we don't care about HTT in UTF mode */
  726. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  727. status = ath10k_htt_setup(&ar->htt);
  728. if (status) {
  729. ath10k_err(ar, "failed to setup htt: %d\n", status);
  730. goto err_hif_stop;
  731. }
  732. }
  733. status = ath10k_debug_start(ar);
  734. if (status)
  735. goto err_hif_stop;
  736. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  737. ar->free_vdev_map = (1LL << TARGET_10X_NUM_VDEVS) - 1;
  738. else
  739. ar->free_vdev_map = (1LL << TARGET_NUM_VDEVS) - 1;
  740. INIT_LIST_HEAD(&ar->arvifs);
  741. return 0;
  742. err_hif_stop:
  743. ath10k_hif_stop(ar);
  744. err_htt_rx_detach:
  745. ath10k_htt_rx_free(&ar->htt);
  746. err_htt_tx_detach:
  747. ath10k_htt_tx_free(&ar->htt);
  748. err_wmi_detach:
  749. ath10k_wmi_detach(ar);
  750. err:
  751. return status;
  752. }
  753. EXPORT_SYMBOL(ath10k_core_start);
  754. int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
  755. {
  756. int ret;
  757. reinit_completion(&ar->target_suspend);
  758. ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
  759. if (ret) {
  760. ath10k_warn(ar, "could not suspend target (%d)\n", ret);
  761. return ret;
  762. }
  763. ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
  764. if (ret == 0) {
  765. ath10k_warn(ar, "suspend timed out - target pause event never came\n");
  766. return -ETIMEDOUT;
  767. }
  768. return 0;
  769. }
  770. void ath10k_core_stop(struct ath10k *ar)
  771. {
  772. lockdep_assert_held(&ar->conf_mutex);
  773. /* try to suspend target */
  774. if (ar->state != ATH10K_STATE_RESTARTING &&
  775. ar->state != ATH10K_STATE_UTF)
  776. ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
  777. ath10k_debug_stop(ar);
  778. ath10k_hif_stop(ar);
  779. ath10k_htt_tx_free(&ar->htt);
  780. ath10k_htt_rx_free(&ar->htt);
  781. ath10k_wmi_detach(ar);
  782. }
  783. EXPORT_SYMBOL(ath10k_core_stop);
  784. /* mac80211 manages fw/hw initialization through start/stop hooks. However in
  785. * order to know what hw capabilities should be advertised to mac80211 it is
  786. * necessary to load the firmware (and tear it down immediately since start
  787. * hook will try to init it again) before registering */
  788. static int ath10k_core_probe_fw(struct ath10k *ar)
  789. {
  790. struct bmi_target_info target_info;
  791. int ret = 0;
  792. ret = ath10k_hif_power_up(ar);
  793. if (ret) {
  794. ath10k_err(ar, "could not start pci hif (%d)\n", ret);
  795. return ret;
  796. }
  797. memset(&target_info, 0, sizeof(target_info));
  798. ret = ath10k_bmi_get_target_info(ar, &target_info);
  799. if (ret) {
  800. ath10k_err(ar, "could not get target info (%d)\n", ret);
  801. ath10k_hif_power_down(ar);
  802. return ret;
  803. }
  804. ar->target_version = target_info.version;
  805. ar->hw->wiphy->hw_version = target_info.version;
  806. ret = ath10k_init_hw_params(ar);
  807. if (ret) {
  808. ath10k_err(ar, "could not get hw params (%d)\n", ret);
  809. ath10k_hif_power_down(ar);
  810. return ret;
  811. }
  812. ret = ath10k_core_fetch_firmware_files(ar);
  813. if (ret) {
  814. ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
  815. ath10k_hif_power_down(ar);
  816. return ret;
  817. }
  818. mutex_lock(&ar->conf_mutex);
  819. ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
  820. if (ret) {
  821. ath10k_err(ar, "could not init core (%d)\n", ret);
  822. ath10k_core_free_firmware_files(ar);
  823. ath10k_hif_power_down(ar);
  824. mutex_unlock(&ar->conf_mutex);
  825. return ret;
  826. }
  827. ath10k_print_driver_info(ar);
  828. ath10k_core_stop(ar);
  829. mutex_unlock(&ar->conf_mutex);
  830. ath10k_hif_power_down(ar);
  831. return 0;
  832. }
  833. static int ath10k_core_check_chip_id(struct ath10k *ar)
  834. {
  835. u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
  836. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
  837. ar->chip_id, hw_revision);
  838. /* Check that we are not using hw1.0 (some of them have same pci id
  839. * as hw2.0) before doing anything else as ath10k crashes horribly
  840. * due to missing hw1.0 workarounds. */
  841. switch (hw_revision) {
  842. case QCA988X_HW_1_0_CHIP_ID_REV:
  843. ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n");
  844. return -EOPNOTSUPP;
  845. case QCA988X_HW_2_0_CHIP_ID_REV:
  846. /* known hardware revision, continue normally */
  847. return 0;
  848. default:
  849. ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n",
  850. ar->chip_id);
  851. return 0;
  852. }
  853. return 0;
  854. }
  855. static void ath10k_core_register_work(struct work_struct *work)
  856. {
  857. struct ath10k *ar = container_of(work, struct ath10k, register_work);
  858. int status;
  859. status = ath10k_core_probe_fw(ar);
  860. if (status) {
  861. ath10k_err(ar, "could not probe fw (%d)\n", status);
  862. goto err;
  863. }
  864. status = ath10k_mac_register(ar);
  865. if (status) {
  866. ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
  867. goto err_release_fw;
  868. }
  869. status = ath10k_debug_register(ar);
  870. if (status) {
  871. ath10k_err(ar, "unable to initialize debugfs\n");
  872. goto err_unregister_mac;
  873. }
  874. status = ath10k_spectral_create(ar);
  875. if (status) {
  876. ath10k_err(ar, "failed to initialize spectral\n");
  877. goto err_debug_destroy;
  878. }
  879. set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
  880. return;
  881. err_debug_destroy:
  882. ath10k_debug_destroy(ar);
  883. err_unregister_mac:
  884. ath10k_mac_unregister(ar);
  885. err_release_fw:
  886. ath10k_core_free_firmware_files(ar);
  887. err:
  888. /* TODO: It's probably a good idea to release device from the driver
  889. * but calling device_release_driver() here will cause a deadlock.
  890. */
  891. return;
  892. }
  893. int ath10k_core_register(struct ath10k *ar, u32 chip_id)
  894. {
  895. int status;
  896. ar->chip_id = chip_id;
  897. status = ath10k_core_check_chip_id(ar);
  898. if (status) {
  899. ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id);
  900. return status;
  901. }
  902. queue_work(ar->workqueue, &ar->register_work);
  903. return 0;
  904. }
  905. EXPORT_SYMBOL(ath10k_core_register);
  906. void ath10k_core_unregister(struct ath10k *ar)
  907. {
  908. cancel_work_sync(&ar->register_work);
  909. if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
  910. return;
  911. /* Stop spectral before unregistering from mac80211 to remove the
  912. * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
  913. * would be already be free'd recursively, leading to a double free.
  914. */
  915. ath10k_spectral_destroy(ar);
  916. /* We must unregister from mac80211 before we stop HTC and HIF.
  917. * Otherwise we will fail to submit commands to FW and mac80211 will be
  918. * unhappy about callback failures. */
  919. ath10k_mac_unregister(ar);
  920. ath10k_testmode_destroy(ar);
  921. ath10k_core_free_firmware_files(ar);
  922. ath10k_debug_unregister(ar);
  923. }
  924. EXPORT_SYMBOL(ath10k_core_unregister);
  925. struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
  926. enum ath10k_bus bus,
  927. const struct ath10k_hif_ops *hif_ops)
  928. {
  929. struct ath10k *ar;
  930. int ret;
  931. ar = ath10k_mac_create(priv_size);
  932. if (!ar)
  933. return NULL;
  934. ar->ath_common.priv = ar;
  935. ar->ath_common.hw = ar->hw;
  936. ar->p2p = !!ath10k_p2p;
  937. ar->dev = dev;
  938. ar->hif.ops = hif_ops;
  939. ar->hif.bus = bus;
  940. init_completion(&ar->scan.started);
  941. init_completion(&ar->scan.completed);
  942. init_completion(&ar->scan.on_channel);
  943. init_completion(&ar->target_suspend);
  944. init_completion(&ar->install_key_done);
  945. init_completion(&ar->vdev_setup_done);
  946. INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
  947. ar->workqueue = create_singlethread_workqueue("ath10k_wq");
  948. if (!ar->workqueue)
  949. goto err_free_mac;
  950. mutex_init(&ar->conf_mutex);
  951. spin_lock_init(&ar->data_lock);
  952. INIT_LIST_HEAD(&ar->peers);
  953. init_waitqueue_head(&ar->peer_mapping_wq);
  954. init_completion(&ar->offchan_tx_completed);
  955. INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
  956. skb_queue_head_init(&ar->offchan_tx_queue);
  957. INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
  958. skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
  959. INIT_WORK(&ar->register_work, ath10k_core_register_work);
  960. INIT_WORK(&ar->restart_work, ath10k_core_restart);
  961. ret = ath10k_debug_create(ar);
  962. if (ret)
  963. goto err_free_wq;
  964. return ar;
  965. err_free_wq:
  966. destroy_workqueue(ar->workqueue);
  967. err_free_mac:
  968. ath10k_mac_destroy(ar);
  969. return NULL;
  970. }
  971. EXPORT_SYMBOL(ath10k_core_create);
  972. void ath10k_core_destroy(struct ath10k *ar)
  973. {
  974. flush_workqueue(ar->workqueue);
  975. destroy_workqueue(ar->workqueue);
  976. ath10k_debug_destroy(ar);
  977. ath10k_mac_destroy(ar);
  978. }
  979. EXPORT_SYMBOL(ath10k_core_destroy);
  980. MODULE_AUTHOR("Qualcomm Atheros");
  981. MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
  982. MODULE_LICENSE("Dual BSD/GPL");