isphist.c 14 KB

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  1. /*
  2. * isphist.c
  3. *
  4. * TI OMAP3 ISP - Histogram module
  5. *
  6. * Copyright (C) 2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: David Cohen <dacohen@gmail.com>
  10. * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  11. * Sakari Ailus <sakari.ailus@iki.fi>
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. */
  17. #include <linux/delay.h>
  18. #include <linux/slab.h>
  19. #include <linux/uaccess.h>
  20. #include <linux/device.h>
  21. #include "isp.h"
  22. #include "ispreg.h"
  23. #include "isphist.h"
  24. #define OMAP24XX_DMA_NO_DEVICE 0
  25. #define HIST_CONFIG_DMA 1
  26. #define HIST_USING_DMA(hist) ((hist)->dma_ch >= 0)
  27. /*
  28. * hist_reset_mem - clear Histogram memory before start stats engine.
  29. */
  30. static void hist_reset_mem(struct ispstat *hist)
  31. {
  32. struct isp_device *isp = hist->isp;
  33. struct omap3isp_hist_config *conf = hist->priv;
  34. unsigned int i;
  35. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_HIST, ISPHIST_ADDR);
  36. /*
  37. * By setting it, the histogram internal buffer is being cleared at the
  38. * same time it's being read. This bit must be cleared afterwards.
  39. */
  40. isp_reg_set(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_CNT, ISPHIST_CNT_CLEAR);
  41. /*
  42. * We'll clear 4 words at each iteration for optimization. It avoids
  43. * 3/4 of the jumps. We also know HIST_MEM_SIZE is divisible by 4.
  44. */
  45. for (i = OMAP3ISP_HIST_MEM_SIZE / 4; i > 0; i--) {
  46. isp_reg_readl(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_DATA);
  47. isp_reg_readl(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_DATA);
  48. isp_reg_readl(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_DATA);
  49. isp_reg_readl(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_DATA);
  50. }
  51. isp_reg_clr(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_CNT, ISPHIST_CNT_CLEAR);
  52. hist->wait_acc_frames = conf->num_acc_frames;
  53. }
  54. static void hist_dma_config(struct ispstat *hist)
  55. {
  56. struct isp_device *isp = hist->isp;
  57. hist->dma_config.data_type = OMAP_DMA_DATA_TYPE_S32;
  58. hist->dma_config.sync_mode = OMAP_DMA_SYNC_ELEMENT;
  59. hist->dma_config.frame_count = 1;
  60. hist->dma_config.src_amode = OMAP_DMA_AMODE_CONSTANT;
  61. hist->dma_config.src_start = isp->mmio_base_phys[OMAP3_ISP_IOMEM_HIST]
  62. + ISPHIST_DATA;
  63. hist->dma_config.dst_amode = OMAP_DMA_AMODE_POST_INC;
  64. hist->dma_config.src_or_dst_synch = OMAP_DMA_SRC_SYNC;
  65. }
  66. /*
  67. * hist_setup_regs - Helper function to update Histogram registers.
  68. */
  69. static void hist_setup_regs(struct ispstat *hist, void *priv)
  70. {
  71. struct isp_device *isp = hist->isp;
  72. struct omap3isp_hist_config *conf = priv;
  73. int c;
  74. u32 cnt;
  75. u32 wb_gain;
  76. u32 reg_hor[OMAP3ISP_HIST_MAX_REGIONS];
  77. u32 reg_ver[OMAP3ISP_HIST_MAX_REGIONS];
  78. if (!hist->update || hist->state == ISPSTAT_DISABLED ||
  79. hist->state == ISPSTAT_DISABLING)
  80. return;
  81. cnt = conf->cfa << ISPHIST_CNT_CFA_SHIFT;
  82. wb_gain = conf->wg[0] << ISPHIST_WB_GAIN_WG00_SHIFT;
  83. wb_gain |= conf->wg[1] << ISPHIST_WB_GAIN_WG01_SHIFT;
  84. wb_gain |= conf->wg[2] << ISPHIST_WB_GAIN_WG02_SHIFT;
  85. if (conf->cfa == OMAP3ISP_HIST_CFA_BAYER)
  86. wb_gain |= conf->wg[3] << ISPHIST_WB_GAIN_WG03_SHIFT;
  87. /* Regions size and position */
  88. for (c = 0; c < OMAP3ISP_HIST_MAX_REGIONS; c++) {
  89. if (c < conf->num_regions) {
  90. reg_hor[c] = (conf->region[c].h_start <<
  91. ISPHIST_REG_START_SHIFT)
  92. | (conf->region[c].h_end <<
  93. ISPHIST_REG_END_SHIFT);
  94. reg_ver[c] = (conf->region[c].v_start <<
  95. ISPHIST_REG_START_SHIFT)
  96. | (conf->region[c].v_end <<
  97. ISPHIST_REG_END_SHIFT);
  98. } else {
  99. reg_hor[c] = 0;
  100. reg_ver[c] = 0;
  101. }
  102. }
  103. cnt |= conf->hist_bins << ISPHIST_CNT_BINS_SHIFT;
  104. switch (conf->hist_bins) {
  105. case OMAP3ISP_HIST_BINS_256:
  106. cnt |= (ISPHIST_IN_BIT_WIDTH_CCDC - 8) <<
  107. ISPHIST_CNT_SHIFT_SHIFT;
  108. break;
  109. case OMAP3ISP_HIST_BINS_128:
  110. cnt |= (ISPHIST_IN_BIT_WIDTH_CCDC - 7) <<
  111. ISPHIST_CNT_SHIFT_SHIFT;
  112. break;
  113. case OMAP3ISP_HIST_BINS_64:
  114. cnt |= (ISPHIST_IN_BIT_WIDTH_CCDC - 6) <<
  115. ISPHIST_CNT_SHIFT_SHIFT;
  116. break;
  117. default: /* OMAP3ISP_HIST_BINS_32 */
  118. cnt |= (ISPHIST_IN_BIT_WIDTH_CCDC - 5) <<
  119. ISPHIST_CNT_SHIFT_SHIFT;
  120. break;
  121. }
  122. hist_reset_mem(hist);
  123. isp_reg_writel(isp, cnt, OMAP3_ISP_IOMEM_HIST, ISPHIST_CNT);
  124. isp_reg_writel(isp, wb_gain, OMAP3_ISP_IOMEM_HIST, ISPHIST_WB_GAIN);
  125. isp_reg_writel(isp, reg_hor[0], OMAP3_ISP_IOMEM_HIST, ISPHIST_R0_HORZ);
  126. isp_reg_writel(isp, reg_ver[0], OMAP3_ISP_IOMEM_HIST, ISPHIST_R0_VERT);
  127. isp_reg_writel(isp, reg_hor[1], OMAP3_ISP_IOMEM_HIST, ISPHIST_R1_HORZ);
  128. isp_reg_writel(isp, reg_ver[1], OMAP3_ISP_IOMEM_HIST, ISPHIST_R1_VERT);
  129. isp_reg_writel(isp, reg_hor[2], OMAP3_ISP_IOMEM_HIST, ISPHIST_R2_HORZ);
  130. isp_reg_writel(isp, reg_ver[2], OMAP3_ISP_IOMEM_HIST, ISPHIST_R2_VERT);
  131. isp_reg_writel(isp, reg_hor[3], OMAP3_ISP_IOMEM_HIST, ISPHIST_R3_HORZ);
  132. isp_reg_writel(isp, reg_ver[3], OMAP3_ISP_IOMEM_HIST, ISPHIST_R3_VERT);
  133. hist->update = 0;
  134. hist->config_counter += hist->inc_config;
  135. hist->inc_config = 0;
  136. hist->buf_size = conf->buf_size;
  137. }
  138. static void hist_enable(struct ispstat *hist, int enable)
  139. {
  140. if (enable) {
  141. isp_reg_set(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_PCR,
  142. ISPHIST_PCR_ENABLE);
  143. omap3isp_subclk_enable(hist->isp, OMAP3_ISP_SUBCLK_HIST);
  144. } else {
  145. isp_reg_clr(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_PCR,
  146. ISPHIST_PCR_ENABLE);
  147. omap3isp_subclk_disable(hist->isp, OMAP3_ISP_SUBCLK_HIST);
  148. }
  149. }
  150. static int hist_busy(struct ispstat *hist)
  151. {
  152. return isp_reg_readl(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_PCR)
  153. & ISPHIST_PCR_BUSY;
  154. }
  155. static void hist_dma_cb(int lch, u16 ch_status, void *data)
  156. {
  157. struct ispstat *hist = data;
  158. if (ch_status & ~OMAP_DMA_BLOCK_IRQ) {
  159. dev_dbg(hist->isp->dev, "hist: DMA error. status = 0x%04x\n",
  160. ch_status);
  161. omap_stop_dma(lch);
  162. hist_reset_mem(hist);
  163. atomic_set(&hist->buf_err, 1);
  164. }
  165. isp_reg_clr(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_CNT,
  166. ISPHIST_CNT_CLEAR);
  167. omap3isp_stat_dma_isr(hist);
  168. if (hist->state != ISPSTAT_DISABLED)
  169. omap3isp_hist_dma_done(hist->isp);
  170. }
  171. static int hist_buf_dma(struct ispstat *hist)
  172. {
  173. dma_addr_t dma_addr = hist->active_buf->dma_addr;
  174. if (unlikely(!dma_addr)) {
  175. dev_dbg(hist->isp->dev, "hist: invalid DMA buffer address\n");
  176. hist_reset_mem(hist);
  177. return STAT_NO_BUF;
  178. }
  179. isp_reg_writel(hist->isp, 0, OMAP3_ISP_IOMEM_HIST, ISPHIST_ADDR);
  180. isp_reg_set(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_CNT,
  181. ISPHIST_CNT_CLEAR);
  182. omap3isp_flush(hist->isp);
  183. hist->dma_config.dst_start = dma_addr;
  184. hist->dma_config.elem_count = hist->buf_size / sizeof(u32);
  185. omap_set_dma_params(hist->dma_ch, &hist->dma_config);
  186. omap_start_dma(hist->dma_ch);
  187. return STAT_BUF_WAITING_DMA;
  188. }
  189. static int hist_buf_pio(struct ispstat *hist)
  190. {
  191. struct isp_device *isp = hist->isp;
  192. u32 *buf = hist->active_buf->virt_addr;
  193. unsigned int i;
  194. if (!buf) {
  195. dev_dbg(isp->dev, "hist: invalid PIO buffer address\n");
  196. hist_reset_mem(hist);
  197. return STAT_NO_BUF;
  198. }
  199. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_HIST, ISPHIST_ADDR);
  200. /*
  201. * By setting it, the histogram internal buffer is being cleared at the
  202. * same time it's being read. This bit must be cleared just after all
  203. * data is acquired.
  204. */
  205. isp_reg_set(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_CNT, ISPHIST_CNT_CLEAR);
  206. /*
  207. * We'll read 4 times a 4-bytes-word at each iteration for
  208. * optimization. It avoids 3/4 of the jumps. We also know buf_size is
  209. * divisible by 16.
  210. */
  211. for (i = hist->buf_size / 16; i > 0; i--) {
  212. *buf++ = isp_reg_readl(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_DATA);
  213. *buf++ = isp_reg_readl(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_DATA);
  214. *buf++ = isp_reg_readl(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_DATA);
  215. *buf++ = isp_reg_readl(isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_DATA);
  216. }
  217. isp_reg_clr(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_CNT,
  218. ISPHIST_CNT_CLEAR);
  219. return STAT_BUF_DONE;
  220. }
  221. /*
  222. * hist_buf_process - Callback from ISP driver for HIST interrupt.
  223. */
  224. static int hist_buf_process(struct ispstat *hist)
  225. {
  226. struct omap3isp_hist_config *user_cfg = hist->priv;
  227. int ret;
  228. if (atomic_read(&hist->buf_err) || hist->state != ISPSTAT_ENABLED) {
  229. hist_reset_mem(hist);
  230. return STAT_NO_BUF;
  231. }
  232. if (--(hist->wait_acc_frames))
  233. return STAT_NO_BUF;
  234. if (HIST_USING_DMA(hist))
  235. ret = hist_buf_dma(hist);
  236. else
  237. ret = hist_buf_pio(hist);
  238. hist->wait_acc_frames = user_cfg->num_acc_frames;
  239. return ret;
  240. }
  241. static u32 hist_get_buf_size(struct omap3isp_hist_config *conf)
  242. {
  243. return OMAP3ISP_HIST_MEM_SIZE_BINS(conf->hist_bins) * conf->num_regions;
  244. }
  245. /*
  246. * hist_validate_params - Helper function to check user given params.
  247. * @new_conf: Pointer to user configuration structure.
  248. *
  249. * Returns 0 on success configuration.
  250. */
  251. static int hist_validate_params(struct ispstat *hist, void *new_conf)
  252. {
  253. struct omap3isp_hist_config *user_cfg = new_conf;
  254. int c;
  255. u32 buf_size;
  256. if (user_cfg->cfa > OMAP3ISP_HIST_CFA_FOVEONX3)
  257. return -EINVAL;
  258. /* Regions size and position */
  259. if ((user_cfg->num_regions < OMAP3ISP_HIST_MIN_REGIONS) ||
  260. (user_cfg->num_regions > OMAP3ISP_HIST_MAX_REGIONS))
  261. return -EINVAL;
  262. /* Regions */
  263. for (c = 0; c < user_cfg->num_regions; c++) {
  264. if (user_cfg->region[c].h_start & ~ISPHIST_REG_START_END_MASK)
  265. return -EINVAL;
  266. if (user_cfg->region[c].h_end & ~ISPHIST_REG_START_END_MASK)
  267. return -EINVAL;
  268. if (user_cfg->region[c].v_start & ~ISPHIST_REG_START_END_MASK)
  269. return -EINVAL;
  270. if (user_cfg->region[c].v_end & ~ISPHIST_REG_START_END_MASK)
  271. return -EINVAL;
  272. if (user_cfg->region[c].h_start > user_cfg->region[c].h_end)
  273. return -EINVAL;
  274. if (user_cfg->region[c].v_start > user_cfg->region[c].v_end)
  275. return -EINVAL;
  276. }
  277. switch (user_cfg->num_regions) {
  278. case 1:
  279. if (user_cfg->hist_bins > OMAP3ISP_HIST_BINS_256)
  280. return -EINVAL;
  281. break;
  282. case 2:
  283. if (user_cfg->hist_bins > OMAP3ISP_HIST_BINS_128)
  284. return -EINVAL;
  285. break;
  286. default: /* 3 or 4 */
  287. if (user_cfg->hist_bins > OMAP3ISP_HIST_BINS_64)
  288. return -EINVAL;
  289. break;
  290. }
  291. buf_size = hist_get_buf_size(user_cfg);
  292. if (buf_size > user_cfg->buf_size)
  293. /* User's buf_size request wasn't enough */
  294. user_cfg->buf_size = buf_size;
  295. else if (user_cfg->buf_size > OMAP3ISP_HIST_MAX_BUF_SIZE)
  296. user_cfg->buf_size = OMAP3ISP_HIST_MAX_BUF_SIZE;
  297. return 0;
  298. }
  299. static int hist_comp_params(struct ispstat *hist,
  300. struct omap3isp_hist_config *user_cfg)
  301. {
  302. struct omap3isp_hist_config *cur_cfg = hist->priv;
  303. int c;
  304. if (cur_cfg->cfa != user_cfg->cfa)
  305. return 1;
  306. if (cur_cfg->num_acc_frames != user_cfg->num_acc_frames)
  307. return 1;
  308. if (cur_cfg->hist_bins != user_cfg->hist_bins)
  309. return 1;
  310. for (c = 0; c < OMAP3ISP_HIST_MAX_WG; c++) {
  311. if (c == 3 && user_cfg->cfa == OMAP3ISP_HIST_CFA_FOVEONX3)
  312. break;
  313. else if (cur_cfg->wg[c] != user_cfg->wg[c])
  314. return 1;
  315. }
  316. if (cur_cfg->num_regions != user_cfg->num_regions)
  317. return 1;
  318. /* Regions */
  319. for (c = 0; c < user_cfg->num_regions; c++) {
  320. if (cur_cfg->region[c].h_start != user_cfg->region[c].h_start)
  321. return 1;
  322. if (cur_cfg->region[c].h_end != user_cfg->region[c].h_end)
  323. return 1;
  324. if (cur_cfg->region[c].v_start != user_cfg->region[c].v_start)
  325. return 1;
  326. if (cur_cfg->region[c].v_end != user_cfg->region[c].v_end)
  327. return 1;
  328. }
  329. return 0;
  330. }
  331. /*
  332. * hist_update_params - Helper function to check and store user given params.
  333. * @new_conf: Pointer to user configuration structure.
  334. */
  335. static void hist_set_params(struct ispstat *hist, void *new_conf)
  336. {
  337. struct omap3isp_hist_config *user_cfg = new_conf;
  338. struct omap3isp_hist_config *cur_cfg = hist->priv;
  339. if (!hist->configured || hist_comp_params(hist, user_cfg)) {
  340. memcpy(cur_cfg, user_cfg, sizeof(*user_cfg));
  341. if (user_cfg->num_acc_frames == 0)
  342. user_cfg->num_acc_frames = 1;
  343. hist->inc_config++;
  344. hist->update = 1;
  345. /*
  346. * User might be asked for a bigger buffer than necessary for
  347. * this configuration. In order to return the right amount of
  348. * data during buffer request, let's calculate the size here
  349. * instead of stick with user_cfg->buf_size.
  350. */
  351. cur_cfg->buf_size = hist_get_buf_size(cur_cfg);
  352. }
  353. }
  354. static long hist_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  355. {
  356. struct ispstat *stat = v4l2_get_subdevdata(sd);
  357. switch (cmd) {
  358. case VIDIOC_OMAP3ISP_HIST_CFG:
  359. return omap3isp_stat_config(stat, arg);
  360. case VIDIOC_OMAP3ISP_STAT_REQ:
  361. return omap3isp_stat_request_statistics(stat, arg);
  362. case VIDIOC_OMAP3ISP_STAT_EN: {
  363. int *en = arg;
  364. return omap3isp_stat_enable(stat, !!*en);
  365. }
  366. }
  367. return -ENOIOCTLCMD;
  368. }
  369. static const struct ispstat_ops hist_ops = {
  370. .validate_params = hist_validate_params,
  371. .set_params = hist_set_params,
  372. .setup_regs = hist_setup_regs,
  373. .enable = hist_enable,
  374. .busy = hist_busy,
  375. .buf_process = hist_buf_process,
  376. };
  377. static const struct v4l2_subdev_core_ops hist_subdev_core_ops = {
  378. .ioctl = hist_ioctl,
  379. .subscribe_event = omap3isp_stat_subscribe_event,
  380. .unsubscribe_event = omap3isp_stat_unsubscribe_event,
  381. };
  382. static const struct v4l2_subdev_video_ops hist_subdev_video_ops = {
  383. .s_stream = omap3isp_stat_s_stream,
  384. };
  385. static const struct v4l2_subdev_ops hist_subdev_ops = {
  386. .core = &hist_subdev_core_ops,
  387. .video = &hist_subdev_video_ops,
  388. };
  389. /*
  390. * omap3isp_hist_init - Module Initialization.
  391. */
  392. int omap3isp_hist_init(struct isp_device *isp)
  393. {
  394. struct ispstat *hist = &isp->isp_hist;
  395. struct omap3isp_hist_config *hist_cfg;
  396. int ret = -1;
  397. hist_cfg = devm_kzalloc(isp->dev, sizeof(*hist_cfg), GFP_KERNEL);
  398. if (hist_cfg == NULL)
  399. return -ENOMEM;
  400. hist->isp = isp;
  401. if (HIST_CONFIG_DMA)
  402. ret = omap_request_dma(OMAP24XX_DMA_NO_DEVICE, "DMA_ISP_HIST",
  403. hist_dma_cb, hist, &hist->dma_ch);
  404. if (ret) {
  405. if (HIST_CONFIG_DMA)
  406. dev_warn(isp->dev, "hist: DMA request channel failed. "
  407. "Using PIO only.\n");
  408. hist->dma_ch = -1;
  409. } else {
  410. dev_dbg(isp->dev, "hist: DMA channel = %d\n", hist->dma_ch);
  411. hist_dma_config(hist);
  412. omap_enable_dma_irq(hist->dma_ch, OMAP_DMA_BLOCK_IRQ);
  413. }
  414. hist->ops = &hist_ops;
  415. hist->priv = hist_cfg;
  416. hist->event_type = V4L2_EVENT_OMAP3ISP_HIST;
  417. ret = omap3isp_stat_init(hist, "histogram", &hist_subdev_ops);
  418. if (ret) {
  419. if (HIST_USING_DMA(hist))
  420. omap_free_dma(hist->dma_ch);
  421. }
  422. return ret;
  423. }
  424. /*
  425. * omap3isp_hist_cleanup - Module cleanup.
  426. */
  427. void omap3isp_hist_cleanup(struct isp_device *isp)
  428. {
  429. if (HIST_USING_DMA(&isp->isp_hist))
  430. omap_free_dma(isp->isp_hist.dma_ch);
  431. omap3isp_stat_cleanup(&isp->isp_hist);
  432. }