mr.c 12 KB

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  1. /*
  2. * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/slab.h>
  34. #include "mlx4_ib.h"
  35. static u32 convert_access(int acc)
  36. {
  37. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX4_PERM_ATOMIC : 0) |
  38. (acc & IB_ACCESS_REMOTE_WRITE ? MLX4_PERM_REMOTE_WRITE : 0) |
  39. (acc & IB_ACCESS_REMOTE_READ ? MLX4_PERM_REMOTE_READ : 0) |
  40. (acc & IB_ACCESS_LOCAL_WRITE ? MLX4_PERM_LOCAL_WRITE : 0) |
  41. (acc & IB_ACCESS_MW_BIND ? MLX4_PERM_BIND_MW : 0) |
  42. MLX4_PERM_LOCAL_READ;
  43. }
  44. static enum mlx4_mw_type to_mlx4_type(enum ib_mw_type type)
  45. {
  46. switch (type) {
  47. case IB_MW_TYPE_1: return MLX4_MW_TYPE_1;
  48. case IB_MW_TYPE_2: return MLX4_MW_TYPE_2;
  49. default: return -1;
  50. }
  51. }
  52. struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc)
  53. {
  54. struct mlx4_ib_mr *mr;
  55. int err;
  56. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  57. if (!mr)
  58. return ERR_PTR(-ENOMEM);
  59. err = mlx4_mr_alloc(to_mdev(pd->device)->dev, to_mpd(pd)->pdn, 0,
  60. ~0ull, convert_access(acc), 0, 0, &mr->mmr);
  61. if (err)
  62. goto err_free;
  63. err = mlx4_mr_enable(to_mdev(pd->device)->dev, &mr->mmr);
  64. if (err)
  65. goto err_mr;
  66. mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
  67. mr->umem = NULL;
  68. return &mr->ibmr;
  69. err_mr:
  70. (void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr);
  71. err_free:
  72. kfree(mr);
  73. return ERR_PTR(err);
  74. }
  75. int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
  76. struct ib_umem *umem)
  77. {
  78. u64 *pages;
  79. int i, k, entry;
  80. int n;
  81. int len;
  82. int err = 0;
  83. struct scatterlist *sg;
  84. pages = (u64 *) __get_free_page(GFP_KERNEL);
  85. if (!pages)
  86. return -ENOMEM;
  87. i = n = 0;
  88. for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
  89. len = sg_dma_len(sg) >> mtt->page_shift;
  90. for (k = 0; k < len; ++k) {
  91. pages[i++] = sg_dma_address(sg) +
  92. umem->page_size * k;
  93. /*
  94. * Be friendly to mlx4_write_mtt() and
  95. * pass it chunks of appropriate size.
  96. */
  97. if (i == PAGE_SIZE / sizeof (u64)) {
  98. err = mlx4_write_mtt(dev->dev, mtt, n,
  99. i, pages);
  100. if (err)
  101. goto out;
  102. n += i;
  103. i = 0;
  104. }
  105. }
  106. }
  107. if (i)
  108. err = mlx4_write_mtt(dev->dev, mtt, n, i, pages);
  109. out:
  110. free_page((unsigned long) pages);
  111. return err;
  112. }
  113. struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  114. u64 virt_addr, int access_flags,
  115. struct ib_udata *udata)
  116. {
  117. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  118. struct mlx4_ib_mr *mr;
  119. int shift;
  120. int err;
  121. int n;
  122. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  123. if (!mr)
  124. return ERR_PTR(-ENOMEM);
  125. /* Force registering the memory as writable. */
  126. /* Used for memory re-registeration. HCA protects the access */
  127. mr->umem = ib_umem_get(pd->uobject->context, start, length,
  128. access_flags | IB_ACCESS_LOCAL_WRITE, 0);
  129. if (IS_ERR(mr->umem)) {
  130. err = PTR_ERR(mr->umem);
  131. goto err_free;
  132. }
  133. n = ib_umem_page_count(mr->umem);
  134. shift = ilog2(mr->umem->page_size);
  135. err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, virt_addr, length,
  136. convert_access(access_flags), n, shift, &mr->mmr);
  137. if (err)
  138. goto err_umem;
  139. err = mlx4_ib_umem_write_mtt(dev, &mr->mmr.mtt, mr->umem);
  140. if (err)
  141. goto err_mr;
  142. err = mlx4_mr_enable(dev->dev, &mr->mmr);
  143. if (err)
  144. goto err_mr;
  145. mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
  146. return &mr->ibmr;
  147. err_mr:
  148. (void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr);
  149. err_umem:
  150. ib_umem_release(mr->umem);
  151. err_free:
  152. kfree(mr);
  153. return ERR_PTR(err);
  154. }
  155. int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,
  156. u64 start, u64 length, u64 virt_addr,
  157. int mr_access_flags, struct ib_pd *pd,
  158. struct ib_udata *udata)
  159. {
  160. struct mlx4_ib_dev *dev = to_mdev(mr->device);
  161. struct mlx4_ib_mr *mmr = to_mmr(mr);
  162. struct mlx4_mpt_entry *mpt_entry;
  163. struct mlx4_mpt_entry **pmpt_entry = &mpt_entry;
  164. int err;
  165. /* Since we synchronize this call and mlx4_ib_dereg_mr via uverbs,
  166. * we assume that the calls can't run concurrently. Otherwise, a
  167. * race exists.
  168. */
  169. err = mlx4_mr_hw_get_mpt(dev->dev, &mmr->mmr, &pmpt_entry);
  170. if (err)
  171. return err;
  172. if (flags & IB_MR_REREG_PD) {
  173. err = mlx4_mr_hw_change_pd(dev->dev, *pmpt_entry,
  174. to_mpd(pd)->pdn);
  175. if (err)
  176. goto release_mpt_entry;
  177. }
  178. if (flags & IB_MR_REREG_ACCESS) {
  179. err = mlx4_mr_hw_change_access(dev->dev, *pmpt_entry,
  180. convert_access(mr_access_flags));
  181. if (err)
  182. goto release_mpt_entry;
  183. }
  184. if (flags & IB_MR_REREG_TRANS) {
  185. int shift;
  186. int err;
  187. int n;
  188. mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
  189. ib_umem_release(mmr->umem);
  190. mmr->umem = ib_umem_get(mr->uobject->context, start, length,
  191. mr_access_flags |
  192. IB_ACCESS_LOCAL_WRITE,
  193. 0);
  194. if (IS_ERR(mmr->umem)) {
  195. err = PTR_ERR(mmr->umem);
  196. /* Prevent mlx4_ib_dereg_mr from free'ing invalid pointer */
  197. mmr->umem = NULL;
  198. goto release_mpt_entry;
  199. }
  200. n = ib_umem_page_count(mmr->umem);
  201. shift = ilog2(mmr->umem->page_size);
  202. err = mlx4_mr_rereg_mem_write(dev->dev, &mmr->mmr,
  203. virt_addr, length, n, shift,
  204. *pmpt_entry);
  205. if (err) {
  206. ib_umem_release(mmr->umem);
  207. goto release_mpt_entry;
  208. }
  209. mmr->mmr.iova = virt_addr;
  210. mmr->mmr.size = length;
  211. err = mlx4_ib_umem_write_mtt(dev, &mmr->mmr.mtt, mmr->umem);
  212. if (err) {
  213. mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
  214. ib_umem_release(mmr->umem);
  215. goto release_mpt_entry;
  216. }
  217. }
  218. /* If we couldn't transfer the MR to the HCA, just remember to
  219. * return a failure. But dereg_mr will free the resources.
  220. */
  221. err = mlx4_mr_hw_write_mpt(dev->dev, &mmr->mmr, pmpt_entry);
  222. if (!err && flags & IB_MR_REREG_ACCESS)
  223. mmr->mmr.access = mr_access_flags;
  224. release_mpt_entry:
  225. mlx4_mr_hw_put_mpt(dev->dev, pmpt_entry);
  226. return err;
  227. }
  228. int mlx4_ib_dereg_mr(struct ib_mr *ibmr)
  229. {
  230. struct mlx4_ib_mr *mr = to_mmr(ibmr);
  231. int ret;
  232. ret = mlx4_mr_free(to_mdev(ibmr->device)->dev, &mr->mmr);
  233. if (ret)
  234. return ret;
  235. if (mr->umem)
  236. ib_umem_release(mr->umem);
  237. kfree(mr);
  238. return 0;
  239. }
  240. struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type)
  241. {
  242. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  243. struct mlx4_ib_mw *mw;
  244. int err;
  245. mw = kmalloc(sizeof(*mw), GFP_KERNEL);
  246. if (!mw)
  247. return ERR_PTR(-ENOMEM);
  248. err = mlx4_mw_alloc(dev->dev, to_mpd(pd)->pdn,
  249. to_mlx4_type(type), &mw->mmw);
  250. if (err)
  251. goto err_free;
  252. err = mlx4_mw_enable(dev->dev, &mw->mmw);
  253. if (err)
  254. goto err_mw;
  255. mw->ibmw.rkey = mw->mmw.key;
  256. return &mw->ibmw;
  257. err_mw:
  258. mlx4_mw_free(dev->dev, &mw->mmw);
  259. err_free:
  260. kfree(mw);
  261. return ERR_PTR(err);
  262. }
  263. int mlx4_ib_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
  264. struct ib_mw_bind *mw_bind)
  265. {
  266. struct ib_send_wr wr;
  267. struct ib_send_wr *bad_wr;
  268. int ret;
  269. memset(&wr, 0, sizeof(wr));
  270. wr.opcode = IB_WR_BIND_MW;
  271. wr.wr_id = mw_bind->wr_id;
  272. wr.send_flags = mw_bind->send_flags;
  273. wr.wr.bind_mw.mw = mw;
  274. wr.wr.bind_mw.bind_info = mw_bind->bind_info;
  275. wr.wr.bind_mw.rkey = ib_inc_rkey(mw->rkey);
  276. ret = mlx4_ib_post_send(qp, &wr, &bad_wr);
  277. if (!ret)
  278. mw->rkey = wr.wr.bind_mw.rkey;
  279. return ret;
  280. }
  281. int mlx4_ib_dealloc_mw(struct ib_mw *ibmw)
  282. {
  283. struct mlx4_ib_mw *mw = to_mmw(ibmw);
  284. mlx4_mw_free(to_mdev(ibmw->device)->dev, &mw->mmw);
  285. kfree(mw);
  286. return 0;
  287. }
  288. struct ib_mr *mlx4_ib_alloc_fast_reg_mr(struct ib_pd *pd,
  289. int max_page_list_len)
  290. {
  291. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  292. struct mlx4_ib_mr *mr;
  293. int err;
  294. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  295. if (!mr)
  296. return ERR_PTR(-ENOMEM);
  297. err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, 0, 0, 0,
  298. max_page_list_len, 0, &mr->mmr);
  299. if (err)
  300. goto err_free;
  301. err = mlx4_mr_enable(dev->dev, &mr->mmr);
  302. if (err)
  303. goto err_mr;
  304. mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
  305. mr->umem = NULL;
  306. return &mr->ibmr;
  307. err_mr:
  308. (void) mlx4_mr_free(dev->dev, &mr->mmr);
  309. err_free:
  310. kfree(mr);
  311. return ERR_PTR(err);
  312. }
  313. struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
  314. int page_list_len)
  315. {
  316. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  317. struct mlx4_ib_fast_reg_page_list *mfrpl;
  318. int size = page_list_len * sizeof (u64);
  319. if (page_list_len > MLX4_MAX_FAST_REG_PAGES)
  320. return ERR_PTR(-EINVAL);
  321. mfrpl = kmalloc(sizeof *mfrpl, GFP_KERNEL);
  322. if (!mfrpl)
  323. return ERR_PTR(-ENOMEM);
  324. mfrpl->ibfrpl.page_list = kmalloc(size, GFP_KERNEL);
  325. if (!mfrpl->ibfrpl.page_list)
  326. goto err_free;
  327. mfrpl->mapped_page_list = dma_alloc_coherent(&dev->dev->pdev->dev,
  328. size, &mfrpl->map,
  329. GFP_KERNEL);
  330. if (!mfrpl->mapped_page_list)
  331. goto err_free;
  332. WARN_ON(mfrpl->map & 0x3f);
  333. return &mfrpl->ibfrpl;
  334. err_free:
  335. kfree(mfrpl->ibfrpl.page_list);
  336. kfree(mfrpl);
  337. return ERR_PTR(-ENOMEM);
  338. }
  339. void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list)
  340. {
  341. struct mlx4_ib_dev *dev = to_mdev(page_list->device);
  342. struct mlx4_ib_fast_reg_page_list *mfrpl = to_mfrpl(page_list);
  343. int size = page_list->max_page_list_len * sizeof (u64);
  344. dma_free_coherent(&dev->dev->pdev->dev, size, mfrpl->mapped_page_list,
  345. mfrpl->map);
  346. kfree(mfrpl->ibfrpl.page_list);
  347. kfree(mfrpl);
  348. }
  349. struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int acc,
  350. struct ib_fmr_attr *fmr_attr)
  351. {
  352. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  353. struct mlx4_ib_fmr *fmr;
  354. int err = -ENOMEM;
  355. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  356. if (!fmr)
  357. return ERR_PTR(-ENOMEM);
  358. err = mlx4_fmr_alloc(dev->dev, to_mpd(pd)->pdn, convert_access(acc),
  359. fmr_attr->max_pages, fmr_attr->max_maps,
  360. fmr_attr->page_shift, &fmr->mfmr);
  361. if (err)
  362. goto err_free;
  363. err = mlx4_fmr_enable(to_mdev(pd->device)->dev, &fmr->mfmr);
  364. if (err)
  365. goto err_mr;
  366. fmr->ibfmr.rkey = fmr->ibfmr.lkey = fmr->mfmr.mr.key;
  367. return &fmr->ibfmr;
  368. err_mr:
  369. (void) mlx4_mr_free(to_mdev(pd->device)->dev, &fmr->mfmr.mr);
  370. err_free:
  371. kfree(fmr);
  372. return ERR_PTR(err);
  373. }
  374. int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  375. int npages, u64 iova)
  376. {
  377. struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
  378. struct mlx4_ib_dev *dev = to_mdev(ifmr->ibfmr.device);
  379. return mlx4_map_phys_fmr(dev->dev, &ifmr->mfmr, page_list, npages, iova,
  380. &ifmr->ibfmr.lkey, &ifmr->ibfmr.rkey);
  381. }
  382. int mlx4_ib_unmap_fmr(struct list_head *fmr_list)
  383. {
  384. struct ib_fmr *ibfmr;
  385. int err;
  386. struct mlx4_dev *mdev = NULL;
  387. list_for_each_entry(ibfmr, fmr_list, list) {
  388. if (mdev && to_mdev(ibfmr->device)->dev != mdev)
  389. return -EINVAL;
  390. mdev = to_mdev(ibfmr->device)->dev;
  391. }
  392. if (!mdev)
  393. return 0;
  394. list_for_each_entry(ibfmr, fmr_list, list) {
  395. struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
  396. mlx4_fmr_unmap(mdev, &ifmr->mfmr, &ifmr->ibfmr.lkey, &ifmr->ibfmr.rkey);
  397. }
  398. /*
  399. * Make sure all MPT status updates are visible before issuing
  400. * SYNC_TPT firmware command.
  401. */
  402. wmb();
  403. err = mlx4_SYNC_TPT(mdev);
  404. if (err)
  405. pr_warn("SYNC_TPT error %d when "
  406. "unmapping FMRs\n", err);
  407. return 0;
  408. }
  409. int mlx4_ib_fmr_dealloc(struct ib_fmr *ibfmr)
  410. {
  411. struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
  412. struct mlx4_ib_dev *dev = to_mdev(ibfmr->device);
  413. int err;
  414. err = mlx4_fmr_free(dev->dev, &ifmr->mfmr);
  415. if (!err)
  416. kfree(ifmr);
  417. return err;
  418. }