bmg160.c 28 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228
  1. /*
  2. * BMG160 Gyro Sensor driver
  3. * Copyright (c) 2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/i2c.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/slab.h>
  19. #include <linux/acpi.h>
  20. #include <linux/gpio/consumer.h>
  21. #include <linux/pm.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/iio/iio.h>
  24. #include <linux/iio/sysfs.h>
  25. #include <linux/iio/buffer.h>
  26. #include <linux/iio/trigger.h>
  27. #include <linux/iio/events.h>
  28. #include <linux/iio/trigger_consumer.h>
  29. #include <linux/iio/triggered_buffer.h>
  30. #define BMG160_DRV_NAME "bmg160"
  31. #define BMG160_IRQ_NAME "bmg160_event"
  32. #define BMG160_GPIO_NAME "gpio_int"
  33. #define BMG160_REG_CHIP_ID 0x00
  34. #define BMG160_CHIP_ID_VAL 0x0F
  35. #define BMG160_REG_PMU_LPW 0x11
  36. #define BMG160_MODE_NORMAL 0x00
  37. #define BMG160_MODE_DEEP_SUSPEND 0x20
  38. #define BMG160_MODE_SUSPEND 0x80
  39. #define BMG160_REG_RANGE 0x0F
  40. #define BMG160_RANGE_2000DPS 0
  41. #define BMG160_RANGE_1000DPS 1
  42. #define BMG160_RANGE_500DPS 2
  43. #define BMG160_RANGE_250DPS 3
  44. #define BMG160_RANGE_125DPS 4
  45. #define BMG160_REG_PMU_BW 0x10
  46. #define BMG160_NO_FILTER 0
  47. #define BMG160_DEF_BW 100
  48. #define BMG160_REG_INT_MAP_0 0x17
  49. #define BMG160_INT_MAP_0_BIT_ANY BIT(1)
  50. #define BMG160_REG_INT_MAP_1 0x18
  51. #define BMG160_INT_MAP_1_BIT_NEW_DATA BIT(0)
  52. #define BMG160_REG_INT_RST_LATCH 0x21
  53. #define BMG160_INT_MODE_LATCH_RESET 0x80
  54. #define BMG160_INT_MODE_LATCH_INT 0x0F
  55. #define BMG160_INT_MODE_NON_LATCH_INT 0x00
  56. #define BMG160_REG_INT_EN_0 0x15
  57. #define BMG160_DATA_ENABLE_INT BIT(7)
  58. #define BMG160_REG_XOUT_L 0x02
  59. #define BMG160_AXIS_TO_REG(axis) (BMG160_REG_XOUT_L + (axis * 2))
  60. #define BMG160_REG_SLOPE_THRES 0x1B
  61. #define BMG160_SLOPE_THRES_MASK 0x0F
  62. #define BMG160_REG_MOTION_INTR 0x1C
  63. #define BMG160_INT_MOTION_X BIT(0)
  64. #define BMG160_INT_MOTION_Y BIT(1)
  65. #define BMG160_INT_MOTION_Z BIT(2)
  66. #define BMG160_ANY_DUR_MASK 0x30
  67. #define BMG160_ANY_DUR_SHIFT 4
  68. #define BMG160_REG_INT_STATUS_2 0x0B
  69. #define BMG160_ANY_MOTION_MASK 0x07
  70. #define BMG160_REG_TEMP 0x08
  71. #define BMG160_TEMP_CENTER_VAL 23
  72. #define BMG160_MAX_STARTUP_TIME_MS 80
  73. #define BMG160_AUTO_SUSPEND_DELAY_MS 2000
  74. struct bmg160_data {
  75. struct i2c_client *client;
  76. struct iio_trigger *dready_trig;
  77. struct iio_trigger *motion_trig;
  78. struct mutex mutex;
  79. s16 buffer[8];
  80. u8 bw_bits;
  81. u32 dps_range;
  82. int ev_enable_state;
  83. int slope_thres;
  84. bool dready_trigger_on;
  85. bool motion_trigger_on;
  86. int64_t timestamp;
  87. };
  88. enum bmg160_axis {
  89. AXIS_X,
  90. AXIS_Y,
  91. AXIS_Z,
  92. };
  93. static const struct {
  94. int val;
  95. int bw_bits;
  96. } bmg160_samp_freq_table[] = { {100, 0x07},
  97. {200, 0x06},
  98. {400, 0x03},
  99. {1000, 0x02},
  100. {2000, 0x01} };
  101. static const struct {
  102. int scale;
  103. int dps_range;
  104. } bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
  105. { 532, BMG160_RANGE_1000DPS},
  106. { 266, BMG160_RANGE_500DPS},
  107. { 133, BMG160_RANGE_250DPS},
  108. { 66, BMG160_RANGE_125DPS} };
  109. static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
  110. {
  111. int ret;
  112. ret = i2c_smbus_write_byte_data(data->client,
  113. BMG160_REG_PMU_LPW, mode);
  114. if (ret < 0) {
  115. dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
  116. return ret;
  117. }
  118. return 0;
  119. }
  120. static int bmg160_convert_freq_to_bit(int val)
  121. {
  122. int i;
  123. for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
  124. if (bmg160_samp_freq_table[i].val == val)
  125. return bmg160_samp_freq_table[i].bw_bits;
  126. }
  127. return -EINVAL;
  128. }
  129. static int bmg160_set_bw(struct bmg160_data *data, int val)
  130. {
  131. int ret;
  132. int bw_bits;
  133. bw_bits = bmg160_convert_freq_to_bit(val);
  134. if (bw_bits < 0)
  135. return bw_bits;
  136. ret = i2c_smbus_write_byte_data(data->client, BMG160_REG_PMU_BW,
  137. bw_bits);
  138. if (ret < 0) {
  139. dev_err(&data->client->dev, "Error writing reg_pmu_bw\n");
  140. return ret;
  141. }
  142. data->bw_bits = bw_bits;
  143. return 0;
  144. }
  145. static int bmg160_chip_init(struct bmg160_data *data)
  146. {
  147. int ret;
  148. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_CHIP_ID);
  149. if (ret < 0) {
  150. dev_err(&data->client->dev, "Error reading reg_chip_id\n");
  151. return ret;
  152. }
  153. dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
  154. if (ret != BMG160_CHIP_ID_VAL) {
  155. dev_err(&data->client->dev, "invalid chip %x\n", ret);
  156. return -ENODEV;
  157. }
  158. ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
  159. if (ret < 0)
  160. return ret;
  161. /* Wait upto 500 ms to be ready after changing mode */
  162. usleep_range(500, 1000);
  163. /* Set Bandwidth */
  164. ret = bmg160_set_bw(data, BMG160_DEF_BW);
  165. if (ret < 0)
  166. return ret;
  167. /* Set Default Range */
  168. ret = i2c_smbus_write_byte_data(data->client,
  169. BMG160_REG_RANGE,
  170. BMG160_RANGE_500DPS);
  171. if (ret < 0) {
  172. dev_err(&data->client->dev, "Error writing reg_range\n");
  173. return ret;
  174. }
  175. data->dps_range = BMG160_RANGE_500DPS;
  176. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_SLOPE_THRES);
  177. if (ret < 0) {
  178. dev_err(&data->client->dev, "Error reading reg_slope_thres\n");
  179. return ret;
  180. }
  181. data->slope_thres = ret;
  182. /* Set default interrupt mode */
  183. ret = i2c_smbus_write_byte_data(data->client,
  184. BMG160_REG_INT_RST_LATCH,
  185. BMG160_INT_MODE_LATCH_INT |
  186. BMG160_INT_MODE_LATCH_RESET);
  187. if (ret < 0) {
  188. dev_err(&data->client->dev,
  189. "Error writing reg_motion_intr\n");
  190. return ret;
  191. }
  192. return 0;
  193. }
  194. static int bmg160_set_power_state(struct bmg160_data *data, bool on)
  195. {
  196. #ifdef CONFIG_PM_RUNTIME
  197. int ret;
  198. if (on)
  199. ret = pm_runtime_get_sync(&data->client->dev);
  200. else {
  201. pm_runtime_mark_last_busy(&data->client->dev);
  202. ret = pm_runtime_put_autosuspend(&data->client->dev);
  203. }
  204. if (ret < 0) {
  205. dev_err(&data->client->dev,
  206. "Failed: bmg160_set_power_state for %d\n", on);
  207. return ret;
  208. }
  209. #endif
  210. return 0;
  211. }
  212. static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
  213. bool status)
  214. {
  215. int ret;
  216. /* Enable/Disable INT_MAP0 mapping */
  217. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_0);
  218. if (ret < 0) {
  219. dev_err(&data->client->dev, "Error reading reg_int_map0\n");
  220. return ret;
  221. }
  222. if (status)
  223. ret |= BMG160_INT_MAP_0_BIT_ANY;
  224. else
  225. ret &= ~BMG160_INT_MAP_0_BIT_ANY;
  226. ret = i2c_smbus_write_byte_data(data->client,
  227. BMG160_REG_INT_MAP_0,
  228. ret);
  229. if (ret < 0) {
  230. dev_err(&data->client->dev, "Error writing reg_int_map0\n");
  231. return ret;
  232. }
  233. /* Enable/Disable slope interrupts */
  234. if (status) {
  235. /* Update slope thres */
  236. ret = i2c_smbus_write_byte_data(data->client,
  237. BMG160_REG_SLOPE_THRES,
  238. data->slope_thres);
  239. if (ret < 0) {
  240. dev_err(&data->client->dev,
  241. "Error writing reg_slope_thres\n");
  242. return ret;
  243. }
  244. ret = i2c_smbus_write_byte_data(data->client,
  245. BMG160_REG_MOTION_INTR,
  246. BMG160_INT_MOTION_X |
  247. BMG160_INT_MOTION_Y |
  248. BMG160_INT_MOTION_Z);
  249. if (ret < 0) {
  250. dev_err(&data->client->dev,
  251. "Error writing reg_motion_intr\n");
  252. return ret;
  253. }
  254. /*
  255. * New data interrupt is always non-latched,
  256. * which will have higher priority, so no need
  257. * to set latched mode, we will be flooded anyway with INTR
  258. */
  259. if (!data->dready_trigger_on) {
  260. ret = i2c_smbus_write_byte_data(data->client,
  261. BMG160_REG_INT_RST_LATCH,
  262. BMG160_INT_MODE_LATCH_INT |
  263. BMG160_INT_MODE_LATCH_RESET);
  264. if (ret < 0) {
  265. dev_err(&data->client->dev,
  266. "Error writing reg_rst_latch\n");
  267. return ret;
  268. }
  269. }
  270. ret = i2c_smbus_write_byte_data(data->client,
  271. BMG160_REG_INT_EN_0,
  272. BMG160_DATA_ENABLE_INT);
  273. } else
  274. ret = i2c_smbus_write_byte_data(data->client,
  275. BMG160_REG_INT_EN_0,
  276. 0);
  277. if (ret < 0) {
  278. dev_err(&data->client->dev, "Error writing reg_int_en0\n");
  279. return ret;
  280. }
  281. return 0;
  282. }
  283. static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
  284. bool status)
  285. {
  286. int ret;
  287. /* Enable/Disable INT_MAP1 mapping */
  288. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_1);
  289. if (ret < 0) {
  290. dev_err(&data->client->dev, "Error reading reg_int_map1\n");
  291. return ret;
  292. }
  293. if (status)
  294. ret |= BMG160_INT_MAP_1_BIT_NEW_DATA;
  295. else
  296. ret &= ~BMG160_INT_MAP_1_BIT_NEW_DATA;
  297. ret = i2c_smbus_write_byte_data(data->client,
  298. BMG160_REG_INT_MAP_1,
  299. ret);
  300. if (ret < 0) {
  301. dev_err(&data->client->dev, "Error writing reg_int_map1\n");
  302. return ret;
  303. }
  304. if (status) {
  305. ret = i2c_smbus_write_byte_data(data->client,
  306. BMG160_REG_INT_RST_LATCH,
  307. BMG160_INT_MODE_NON_LATCH_INT |
  308. BMG160_INT_MODE_LATCH_RESET);
  309. if (ret < 0) {
  310. dev_err(&data->client->dev,
  311. "Error writing reg_rst_latch\n");
  312. return ret;
  313. }
  314. ret = i2c_smbus_write_byte_data(data->client,
  315. BMG160_REG_INT_EN_0,
  316. BMG160_DATA_ENABLE_INT);
  317. } else {
  318. /* Restore interrupt mode */
  319. ret = i2c_smbus_write_byte_data(data->client,
  320. BMG160_REG_INT_RST_LATCH,
  321. BMG160_INT_MODE_LATCH_INT |
  322. BMG160_INT_MODE_LATCH_RESET);
  323. if (ret < 0) {
  324. dev_err(&data->client->dev,
  325. "Error writing reg_rst_latch\n");
  326. return ret;
  327. }
  328. ret = i2c_smbus_write_byte_data(data->client,
  329. BMG160_REG_INT_EN_0,
  330. 0);
  331. }
  332. if (ret < 0) {
  333. dev_err(&data->client->dev, "Error writing reg_int_en0\n");
  334. return ret;
  335. }
  336. return 0;
  337. }
  338. static int bmg160_get_bw(struct bmg160_data *data, int *val)
  339. {
  340. int i;
  341. for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
  342. if (bmg160_samp_freq_table[i].bw_bits == data->bw_bits) {
  343. *val = bmg160_samp_freq_table[i].val;
  344. return IIO_VAL_INT;
  345. }
  346. }
  347. return -EINVAL;
  348. }
  349. static int bmg160_set_scale(struct bmg160_data *data, int val)
  350. {
  351. int ret, i;
  352. for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
  353. if (bmg160_scale_table[i].scale == val) {
  354. ret = i2c_smbus_write_byte_data(
  355. data->client,
  356. BMG160_REG_RANGE,
  357. bmg160_scale_table[i].dps_range);
  358. if (ret < 0) {
  359. dev_err(&data->client->dev,
  360. "Error writing reg_range\n");
  361. return ret;
  362. }
  363. data->dps_range = bmg160_scale_table[i].dps_range;
  364. return 0;
  365. }
  366. }
  367. return -EINVAL;
  368. }
  369. static int bmg160_get_temp(struct bmg160_data *data, int *val)
  370. {
  371. int ret;
  372. mutex_lock(&data->mutex);
  373. ret = bmg160_set_power_state(data, true);
  374. if (ret < 0) {
  375. mutex_unlock(&data->mutex);
  376. return ret;
  377. }
  378. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_TEMP);
  379. if (ret < 0) {
  380. dev_err(&data->client->dev, "Error reading reg_temp\n");
  381. bmg160_set_power_state(data, false);
  382. mutex_unlock(&data->mutex);
  383. return ret;
  384. }
  385. *val = sign_extend32(ret, 7);
  386. ret = bmg160_set_power_state(data, false);
  387. mutex_unlock(&data->mutex);
  388. if (ret < 0)
  389. return ret;
  390. return IIO_VAL_INT;
  391. }
  392. static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
  393. {
  394. int ret;
  395. mutex_lock(&data->mutex);
  396. ret = bmg160_set_power_state(data, true);
  397. if (ret < 0) {
  398. mutex_unlock(&data->mutex);
  399. return ret;
  400. }
  401. ret = i2c_smbus_read_word_data(data->client, BMG160_AXIS_TO_REG(axis));
  402. if (ret < 0) {
  403. dev_err(&data->client->dev, "Error reading axis %d\n", axis);
  404. bmg160_set_power_state(data, false);
  405. mutex_unlock(&data->mutex);
  406. return ret;
  407. }
  408. *val = sign_extend32(ret, 15);
  409. ret = bmg160_set_power_state(data, false);
  410. mutex_unlock(&data->mutex);
  411. if (ret < 0)
  412. return ret;
  413. return IIO_VAL_INT;
  414. }
  415. static int bmg160_read_raw(struct iio_dev *indio_dev,
  416. struct iio_chan_spec const *chan,
  417. int *val, int *val2, long mask)
  418. {
  419. struct bmg160_data *data = iio_priv(indio_dev);
  420. int ret;
  421. switch (mask) {
  422. case IIO_CHAN_INFO_RAW:
  423. switch (chan->type) {
  424. case IIO_TEMP:
  425. return bmg160_get_temp(data, val);
  426. case IIO_ANGL_VEL:
  427. if (iio_buffer_enabled(indio_dev))
  428. return -EBUSY;
  429. else
  430. return bmg160_get_axis(data, chan->scan_index,
  431. val);
  432. default:
  433. return -EINVAL;
  434. }
  435. case IIO_CHAN_INFO_OFFSET:
  436. if (chan->type == IIO_TEMP) {
  437. *val = BMG160_TEMP_CENTER_VAL;
  438. return IIO_VAL_INT;
  439. } else
  440. return -EINVAL;
  441. case IIO_CHAN_INFO_SCALE:
  442. *val = 0;
  443. switch (chan->type) {
  444. case IIO_TEMP:
  445. *val2 = 500000;
  446. return IIO_VAL_INT_PLUS_MICRO;
  447. case IIO_ANGL_VEL:
  448. {
  449. int i;
  450. for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
  451. if (bmg160_scale_table[i].dps_range ==
  452. data->dps_range) {
  453. *val2 = bmg160_scale_table[i].scale;
  454. return IIO_VAL_INT_PLUS_MICRO;
  455. }
  456. }
  457. return -EINVAL;
  458. }
  459. default:
  460. return -EINVAL;
  461. }
  462. case IIO_CHAN_INFO_SAMP_FREQ:
  463. *val2 = 0;
  464. mutex_lock(&data->mutex);
  465. ret = bmg160_get_bw(data, val);
  466. mutex_unlock(&data->mutex);
  467. return ret;
  468. default:
  469. return -EINVAL;
  470. }
  471. }
  472. static int bmg160_write_raw(struct iio_dev *indio_dev,
  473. struct iio_chan_spec const *chan,
  474. int val, int val2, long mask)
  475. {
  476. struct bmg160_data *data = iio_priv(indio_dev);
  477. int ret;
  478. switch (mask) {
  479. case IIO_CHAN_INFO_SAMP_FREQ:
  480. mutex_lock(&data->mutex);
  481. /*
  482. * Section 4.2 of spec
  483. * In suspend mode, the only supported operations are reading
  484. * registers as well as writing to the (0x14) softreset
  485. * register. Since we will be in suspend mode by default, change
  486. * mode to power on for other writes.
  487. */
  488. ret = bmg160_set_power_state(data, true);
  489. if (ret < 0) {
  490. mutex_unlock(&data->mutex);
  491. return ret;
  492. }
  493. ret = bmg160_set_bw(data, val);
  494. if (ret < 0) {
  495. bmg160_set_power_state(data, false);
  496. mutex_unlock(&data->mutex);
  497. return ret;
  498. }
  499. ret = bmg160_set_power_state(data, false);
  500. mutex_unlock(&data->mutex);
  501. return ret;
  502. case IIO_CHAN_INFO_SCALE:
  503. if (val)
  504. return -EINVAL;
  505. mutex_lock(&data->mutex);
  506. /* Refer to comments above for the suspend mode ops */
  507. ret = bmg160_set_power_state(data, true);
  508. if (ret < 0) {
  509. mutex_unlock(&data->mutex);
  510. return ret;
  511. }
  512. ret = bmg160_set_scale(data, val2);
  513. if (ret < 0) {
  514. bmg160_set_power_state(data, false);
  515. mutex_unlock(&data->mutex);
  516. return ret;
  517. }
  518. ret = bmg160_set_power_state(data, false);
  519. mutex_unlock(&data->mutex);
  520. return ret;
  521. default:
  522. return -EINVAL;
  523. }
  524. return -EINVAL;
  525. }
  526. static int bmg160_read_event(struct iio_dev *indio_dev,
  527. const struct iio_chan_spec *chan,
  528. enum iio_event_type type,
  529. enum iio_event_direction dir,
  530. enum iio_event_info info,
  531. int *val, int *val2)
  532. {
  533. struct bmg160_data *data = iio_priv(indio_dev);
  534. *val2 = 0;
  535. switch (info) {
  536. case IIO_EV_INFO_VALUE:
  537. *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
  538. break;
  539. default:
  540. return -EINVAL;
  541. }
  542. return IIO_VAL_INT;
  543. }
  544. static int bmg160_write_event(struct iio_dev *indio_dev,
  545. const struct iio_chan_spec *chan,
  546. enum iio_event_type type,
  547. enum iio_event_direction dir,
  548. enum iio_event_info info,
  549. int val, int val2)
  550. {
  551. struct bmg160_data *data = iio_priv(indio_dev);
  552. switch (info) {
  553. case IIO_EV_INFO_VALUE:
  554. if (data->ev_enable_state)
  555. return -EBUSY;
  556. data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
  557. data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
  558. break;
  559. default:
  560. return -EINVAL;
  561. }
  562. return 0;
  563. }
  564. static int bmg160_read_event_config(struct iio_dev *indio_dev,
  565. const struct iio_chan_spec *chan,
  566. enum iio_event_type type,
  567. enum iio_event_direction dir)
  568. {
  569. struct bmg160_data *data = iio_priv(indio_dev);
  570. return data->ev_enable_state;
  571. }
  572. static int bmg160_write_event_config(struct iio_dev *indio_dev,
  573. const struct iio_chan_spec *chan,
  574. enum iio_event_type type,
  575. enum iio_event_direction dir,
  576. int state)
  577. {
  578. struct bmg160_data *data = iio_priv(indio_dev);
  579. int ret;
  580. if (state && data->ev_enable_state)
  581. return 0;
  582. mutex_lock(&data->mutex);
  583. if (!state && data->motion_trigger_on) {
  584. data->ev_enable_state = 0;
  585. mutex_unlock(&data->mutex);
  586. return 0;
  587. }
  588. /*
  589. * We will expect the enable and disable to do operation in
  590. * in reverse order. This will happen here anyway as our
  591. * resume operation uses sync mode runtime pm calls, the
  592. * suspend operation will be delayed by autosuspend delay
  593. * So the disable operation will still happen in reverse of
  594. * enable operation. When runtime pm is disabled the mode
  595. * is always on so sequence doesn't matter
  596. */
  597. ret = bmg160_set_power_state(data, state);
  598. if (ret < 0) {
  599. mutex_unlock(&data->mutex);
  600. return ret;
  601. }
  602. ret = bmg160_setup_any_motion_interrupt(data, state);
  603. if (ret < 0) {
  604. mutex_unlock(&data->mutex);
  605. return ret;
  606. }
  607. data->ev_enable_state = state;
  608. mutex_unlock(&data->mutex);
  609. return 0;
  610. }
  611. static int bmg160_validate_trigger(struct iio_dev *indio_dev,
  612. struct iio_trigger *trig)
  613. {
  614. struct bmg160_data *data = iio_priv(indio_dev);
  615. if (data->dready_trig != trig && data->motion_trig != trig)
  616. return -EINVAL;
  617. return 0;
  618. }
  619. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
  620. static IIO_CONST_ATTR(in_anglvel_scale_available,
  621. "0.001065 0.000532 0.000266 0.000133 0.000066");
  622. static struct attribute *bmg160_attributes[] = {
  623. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  624. &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
  625. NULL,
  626. };
  627. static const struct attribute_group bmg160_attrs_group = {
  628. .attrs = bmg160_attributes,
  629. };
  630. static const struct iio_event_spec bmg160_event = {
  631. .type = IIO_EV_TYPE_ROC,
  632. .dir = IIO_EV_DIR_RISING | IIO_EV_DIR_FALLING,
  633. .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
  634. BIT(IIO_EV_INFO_ENABLE)
  635. };
  636. #define BMG160_CHANNEL(_axis) { \
  637. .type = IIO_ANGL_VEL, \
  638. .modified = 1, \
  639. .channel2 = IIO_MOD_##_axis, \
  640. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  641. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
  642. BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  643. .scan_index = AXIS_##_axis, \
  644. .scan_type = { \
  645. .sign = 's', \
  646. .realbits = 16, \
  647. .storagebits = 16, \
  648. }, \
  649. .event_spec = &bmg160_event, \
  650. .num_event_specs = 1 \
  651. }
  652. static const struct iio_chan_spec bmg160_channels[] = {
  653. {
  654. .type = IIO_TEMP,
  655. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  656. BIT(IIO_CHAN_INFO_SCALE) |
  657. BIT(IIO_CHAN_INFO_OFFSET),
  658. .scan_index = -1,
  659. },
  660. BMG160_CHANNEL(X),
  661. BMG160_CHANNEL(Y),
  662. BMG160_CHANNEL(Z),
  663. IIO_CHAN_SOFT_TIMESTAMP(3),
  664. };
  665. static const struct iio_info bmg160_info = {
  666. .attrs = &bmg160_attrs_group,
  667. .read_raw = bmg160_read_raw,
  668. .write_raw = bmg160_write_raw,
  669. .read_event_value = bmg160_read_event,
  670. .write_event_value = bmg160_write_event,
  671. .write_event_config = bmg160_write_event_config,
  672. .read_event_config = bmg160_read_event_config,
  673. .validate_trigger = bmg160_validate_trigger,
  674. .driver_module = THIS_MODULE,
  675. };
  676. static irqreturn_t bmg160_trigger_handler(int irq, void *p)
  677. {
  678. struct iio_poll_func *pf = p;
  679. struct iio_dev *indio_dev = pf->indio_dev;
  680. struct bmg160_data *data = iio_priv(indio_dev);
  681. int bit, ret, i = 0;
  682. mutex_lock(&data->mutex);
  683. for_each_set_bit(bit, indio_dev->buffer->scan_mask,
  684. indio_dev->masklength) {
  685. ret = i2c_smbus_read_word_data(data->client,
  686. BMG160_AXIS_TO_REG(bit));
  687. if (ret < 0) {
  688. mutex_unlock(&data->mutex);
  689. goto err;
  690. }
  691. data->buffer[i++] = ret;
  692. }
  693. mutex_unlock(&data->mutex);
  694. iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
  695. data->timestamp);
  696. err:
  697. iio_trigger_notify_done(indio_dev->trig);
  698. return IRQ_HANDLED;
  699. }
  700. static int bmg160_trig_try_reen(struct iio_trigger *trig)
  701. {
  702. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  703. struct bmg160_data *data = iio_priv(indio_dev);
  704. int ret;
  705. /* new data interrupts don't need ack */
  706. if (data->dready_trigger_on)
  707. return 0;
  708. /* Set latched mode interrupt and clear any latched interrupt */
  709. ret = i2c_smbus_write_byte_data(data->client,
  710. BMG160_REG_INT_RST_LATCH,
  711. BMG160_INT_MODE_LATCH_INT |
  712. BMG160_INT_MODE_LATCH_RESET);
  713. if (ret < 0) {
  714. dev_err(&data->client->dev, "Error writing reg_rst_latch\n");
  715. return ret;
  716. }
  717. return 0;
  718. }
  719. static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
  720. bool state)
  721. {
  722. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  723. struct bmg160_data *data = iio_priv(indio_dev);
  724. int ret;
  725. mutex_lock(&data->mutex);
  726. if (!state && data->ev_enable_state && data->motion_trigger_on) {
  727. data->motion_trigger_on = false;
  728. mutex_unlock(&data->mutex);
  729. return 0;
  730. }
  731. /*
  732. * Refer to comment in bmg160_write_event_config for
  733. * enable/disable operation order
  734. */
  735. ret = bmg160_set_power_state(data, state);
  736. if (ret < 0) {
  737. mutex_unlock(&data->mutex);
  738. return ret;
  739. }
  740. if (data->motion_trig == trig)
  741. ret = bmg160_setup_any_motion_interrupt(data, state);
  742. else
  743. ret = bmg160_setup_new_data_interrupt(data, state);
  744. if (ret < 0) {
  745. mutex_unlock(&data->mutex);
  746. return ret;
  747. }
  748. if (data->motion_trig == trig)
  749. data->motion_trigger_on = state;
  750. else
  751. data->dready_trigger_on = state;
  752. mutex_unlock(&data->mutex);
  753. return 0;
  754. }
  755. static const struct iio_trigger_ops bmg160_trigger_ops = {
  756. .set_trigger_state = bmg160_data_rdy_trigger_set_state,
  757. .try_reenable = bmg160_trig_try_reen,
  758. .owner = THIS_MODULE,
  759. };
  760. static irqreturn_t bmg160_event_handler(int irq, void *private)
  761. {
  762. struct iio_dev *indio_dev = private;
  763. struct bmg160_data *data = iio_priv(indio_dev);
  764. int ret;
  765. int dir;
  766. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_STATUS_2);
  767. if (ret < 0) {
  768. dev_err(&data->client->dev, "Error reading reg_int_status2\n");
  769. goto ack_intr_status;
  770. }
  771. if (ret & 0x08)
  772. dir = IIO_EV_DIR_RISING;
  773. else
  774. dir = IIO_EV_DIR_FALLING;
  775. if (ret & BMG160_ANY_MOTION_MASK)
  776. iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
  777. 0,
  778. IIO_MOD_X_OR_Y_OR_Z,
  779. IIO_EV_TYPE_ROC,
  780. dir),
  781. data->timestamp);
  782. ack_intr_status:
  783. if (!data->dready_trigger_on) {
  784. ret = i2c_smbus_write_byte_data(data->client,
  785. BMG160_REG_INT_RST_LATCH,
  786. BMG160_INT_MODE_LATCH_INT |
  787. BMG160_INT_MODE_LATCH_RESET);
  788. if (ret < 0)
  789. dev_err(&data->client->dev,
  790. "Error writing reg_rst_latch\n");
  791. }
  792. return IRQ_HANDLED;
  793. }
  794. static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
  795. {
  796. struct iio_dev *indio_dev = private;
  797. struct bmg160_data *data = iio_priv(indio_dev);
  798. data->timestamp = iio_get_time_ns();
  799. if (data->dready_trigger_on)
  800. iio_trigger_poll(data->dready_trig);
  801. else if (data->motion_trigger_on)
  802. iio_trigger_poll(data->motion_trig);
  803. if (data->ev_enable_state)
  804. return IRQ_WAKE_THREAD;
  805. else
  806. return IRQ_HANDLED;
  807. }
  808. static int bmg160_gpio_probe(struct i2c_client *client,
  809. struct bmg160_data *data)
  810. {
  811. struct device *dev;
  812. struct gpio_desc *gpio;
  813. int ret;
  814. if (!client)
  815. return -EINVAL;
  816. dev = &client->dev;
  817. /* data ready gpio interrupt pin */
  818. gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0);
  819. if (IS_ERR(gpio)) {
  820. dev_err(dev, "acpi gpio get index failed\n");
  821. return PTR_ERR(gpio);
  822. }
  823. ret = gpiod_direction_input(gpio);
  824. if (ret)
  825. return ret;
  826. ret = gpiod_to_irq(gpio);
  827. dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
  828. return ret;
  829. }
  830. static const char *bmg160_match_acpi_device(struct device *dev)
  831. {
  832. const struct acpi_device_id *id;
  833. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  834. if (!id)
  835. return NULL;
  836. return dev_name(dev);
  837. }
  838. static int bmg160_probe(struct i2c_client *client,
  839. const struct i2c_device_id *id)
  840. {
  841. struct bmg160_data *data;
  842. struct iio_dev *indio_dev;
  843. int ret;
  844. const char *name = NULL;
  845. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  846. if (!indio_dev)
  847. return -ENOMEM;
  848. data = iio_priv(indio_dev);
  849. i2c_set_clientdata(client, indio_dev);
  850. data->client = client;
  851. ret = bmg160_chip_init(data);
  852. if (ret < 0)
  853. return ret;
  854. mutex_init(&data->mutex);
  855. if (id)
  856. name = id->name;
  857. if (ACPI_HANDLE(&client->dev))
  858. name = bmg160_match_acpi_device(&client->dev);
  859. indio_dev->dev.parent = &client->dev;
  860. indio_dev->channels = bmg160_channels;
  861. indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
  862. indio_dev->name = name;
  863. indio_dev->modes = INDIO_DIRECT_MODE;
  864. indio_dev->info = &bmg160_info;
  865. if (client->irq <= 0)
  866. client->irq = bmg160_gpio_probe(client, data);
  867. if (client->irq > 0) {
  868. ret = devm_request_threaded_irq(&client->dev,
  869. client->irq,
  870. bmg160_data_rdy_trig_poll,
  871. bmg160_event_handler,
  872. IRQF_TRIGGER_RISING,
  873. BMG160_IRQ_NAME,
  874. indio_dev);
  875. if (ret)
  876. return ret;
  877. data->dready_trig = devm_iio_trigger_alloc(&client->dev,
  878. "%s-dev%d",
  879. indio_dev->name,
  880. indio_dev->id);
  881. if (!data->dready_trig)
  882. return -ENOMEM;
  883. data->motion_trig = devm_iio_trigger_alloc(&client->dev,
  884. "%s-any-motion-dev%d",
  885. indio_dev->name,
  886. indio_dev->id);
  887. if (!data->motion_trig)
  888. return -ENOMEM;
  889. data->dready_trig->dev.parent = &client->dev;
  890. data->dready_trig->ops = &bmg160_trigger_ops;
  891. iio_trigger_set_drvdata(data->dready_trig, indio_dev);
  892. ret = iio_trigger_register(data->dready_trig);
  893. if (ret)
  894. return ret;
  895. data->motion_trig->dev.parent = &client->dev;
  896. data->motion_trig->ops = &bmg160_trigger_ops;
  897. iio_trigger_set_drvdata(data->motion_trig, indio_dev);
  898. ret = iio_trigger_register(data->motion_trig);
  899. if (ret) {
  900. data->motion_trig = NULL;
  901. goto err_trigger_unregister;
  902. }
  903. ret = iio_triggered_buffer_setup(indio_dev,
  904. NULL,
  905. bmg160_trigger_handler,
  906. NULL);
  907. if (ret < 0) {
  908. dev_err(&client->dev,
  909. "iio triggered buffer setup failed\n");
  910. goto err_trigger_unregister;
  911. }
  912. }
  913. ret = iio_device_register(indio_dev);
  914. if (ret < 0) {
  915. dev_err(&client->dev, "unable to register iio device\n");
  916. goto err_buffer_cleanup;
  917. }
  918. ret = pm_runtime_set_active(&client->dev);
  919. if (ret)
  920. goto err_iio_unregister;
  921. pm_runtime_enable(&client->dev);
  922. pm_runtime_set_autosuspend_delay(&client->dev,
  923. BMG160_AUTO_SUSPEND_DELAY_MS);
  924. pm_runtime_use_autosuspend(&client->dev);
  925. return 0;
  926. err_iio_unregister:
  927. iio_device_unregister(indio_dev);
  928. err_buffer_cleanup:
  929. if (data->dready_trig)
  930. iio_triggered_buffer_cleanup(indio_dev);
  931. err_trigger_unregister:
  932. if (data->dready_trig)
  933. iio_trigger_unregister(data->dready_trig);
  934. if (data->motion_trig)
  935. iio_trigger_unregister(data->motion_trig);
  936. return ret;
  937. }
  938. static int bmg160_remove(struct i2c_client *client)
  939. {
  940. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  941. struct bmg160_data *data = iio_priv(indio_dev);
  942. pm_runtime_disable(&client->dev);
  943. pm_runtime_set_suspended(&client->dev);
  944. pm_runtime_put_noidle(&client->dev);
  945. iio_device_unregister(indio_dev);
  946. if (data->dready_trig) {
  947. iio_triggered_buffer_cleanup(indio_dev);
  948. iio_trigger_unregister(data->dready_trig);
  949. iio_trigger_unregister(data->motion_trig);
  950. }
  951. mutex_lock(&data->mutex);
  952. bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
  953. mutex_unlock(&data->mutex);
  954. return 0;
  955. }
  956. #ifdef CONFIG_PM_SLEEP
  957. static int bmg160_suspend(struct device *dev)
  958. {
  959. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  960. struct bmg160_data *data = iio_priv(indio_dev);
  961. mutex_lock(&data->mutex);
  962. bmg160_set_mode(data, BMG160_MODE_SUSPEND);
  963. mutex_unlock(&data->mutex);
  964. return 0;
  965. }
  966. static int bmg160_resume(struct device *dev)
  967. {
  968. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  969. struct bmg160_data *data = iio_priv(indio_dev);
  970. mutex_lock(&data->mutex);
  971. if (data->dready_trigger_on || data->motion_trigger_on ||
  972. data->ev_enable_state)
  973. bmg160_set_mode(data, BMG160_MODE_NORMAL);
  974. mutex_unlock(&data->mutex);
  975. return 0;
  976. }
  977. #endif
  978. #ifdef CONFIG_PM_RUNTIME
  979. static int bmg160_runtime_suspend(struct device *dev)
  980. {
  981. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  982. struct bmg160_data *data = iio_priv(indio_dev);
  983. return bmg160_set_mode(data, BMG160_MODE_SUSPEND);
  984. }
  985. static int bmg160_runtime_resume(struct device *dev)
  986. {
  987. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  988. struct bmg160_data *data = iio_priv(indio_dev);
  989. int ret;
  990. ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
  991. if (ret < 0)
  992. return ret;
  993. msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
  994. return 0;
  995. }
  996. #endif
  997. static const struct dev_pm_ops bmg160_pm_ops = {
  998. SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
  999. SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
  1000. bmg160_runtime_resume, NULL)
  1001. };
  1002. static const struct acpi_device_id bmg160_acpi_match[] = {
  1003. {"BMG0160", 0},
  1004. {"BMI055B", 0},
  1005. {},
  1006. };
  1007. MODULE_DEVICE_TABLE(acpi, bmg160_acpi_match);
  1008. static const struct i2c_device_id bmg160_id[] = {
  1009. {"bmg160", 0},
  1010. {"bmi055_gyro", 0},
  1011. {}
  1012. };
  1013. MODULE_DEVICE_TABLE(i2c, bmg160_id);
  1014. static struct i2c_driver bmg160_driver = {
  1015. .driver = {
  1016. .name = BMG160_DRV_NAME,
  1017. .acpi_match_table = ACPI_PTR(bmg160_acpi_match),
  1018. .pm = &bmg160_pm_ops,
  1019. },
  1020. .probe = bmg160_probe,
  1021. .remove = bmg160_remove,
  1022. .id_table = bmg160_id,
  1023. };
  1024. module_i2c_driver(bmg160_driver);
  1025. MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
  1026. MODULE_LICENSE("GPL v2");
  1027. MODULE_DESCRIPTION("BMG160 Gyro driver");