nouveau_ttm.c 11 KB

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  1. /*
  2. * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA,
  3. * All Rights Reserved.
  4. * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA,
  5. * All Rights Reserved.
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the "Software"),
  9. * to deal in the Software without restriction, including without limitation
  10. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  11. * and/or sell copies of the Software, and to permit persons to whom the
  12. * Software is furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. */
  26. #include "nouveau_drm.h"
  27. #include "nouveau_ttm.h"
  28. #include "nouveau_gem.h"
  29. static int
  30. nouveau_vram_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
  31. {
  32. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  33. struct nouveau_fb *pfb = nvkm_fb(&drm->device);
  34. man->priv = pfb;
  35. return 0;
  36. }
  37. static int
  38. nouveau_vram_manager_fini(struct ttm_mem_type_manager *man)
  39. {
  40. man->priv = NULL;
  41. return 0;
  42. }
  43. static inline void
  44. nouveau_mem_node_cleanup(struct nouveau_mem *node)
  45. {
  46. if (node->vma[0].node) {
  47. nouveau_vm_unmap(&node->vma[0]);
  48. nouveau_vm_put(&node->vma[0]);
  49. }
  50. if (node->vma[1].node) {
  51. nouveau_vm_unmap(&node->vma[1]);
  52. nouveau_vm_put(&node->vma[1]);
  53. }
  54. }
  55. static void
  56. nouveau_vram_manager_del(struct ttm_mem_type_manager *man,
  57. struct ttm_mem_reg *mem)
  58. {
  59. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  60. struct nouveau_fb *pfb = nvkm_fb(&drm->device);
  61. nouveau_mem_node_cleanup(mem->mm_node);
  62. pfb->ram->put(pfb, (struct nouveau_mem **)&mem->mm_node);
  63. }
  64. static int
  65. nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
  66. struct ttm_buffer_object *bo,
  67. const struct ttm_place *place,
  68. struct ttm_mem_reg *mem)
  69. {
  70. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  71. struct nouveau_fb *pfb = nvkm_fb(&drm->device);
  72. struct nouveau_bo *nvbo = nouveau_bo(bo);
  73. struct nouveau_mem *node;
  74. u32 size_nc = 0;
  75. int ret;
  76. if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG)
  77. size_nc = 1 << nvbo->page_shift;
  78. ret = pfb->ram->get(pfb, mem->num_pages << PAGE_SHIFT,
  79. mem->page_alignment << PAGE_SHIFT, size_nc,
  80. (nvbo->tile_flags >> 8) & 0x3ff, &node);
  81. if (ret) {
  82. mem->mm_node = NULL;
  83. return (ret == -ENOSPC) ? 0 : ret;
  84. }
  85. node->page_shift = nvbo->page_shift;
  86. mem->mm_node = node;
  87. mem->start = node->offset >> PAGE_SHIFT;
  88. return 0;
  89. }
  90. static void
  91. nouveau_vram_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
  92. {
  93. struct nouveau_fb *pfb = man->priv;
  94. struct nouveau_mm *mm = &pfb->vram;
  95. struct nouveau_mm_node *r;
  96. u32 total = 0, free = 0;
  97. mutex_lock(&nv_subdev(pfb)->mutex);
  98. list_for_each_entry(r, &mm->nodes, nl_entry) {
  99. printk(KERN_DEBUG "%s %d: 0x%010llx 0x%010llx\n",
  100. prefix, r->type, ((u64)r->offset << 12),
  101. (((u64)r->offset + r->length) << 12));
  102. total += r->length;
  103. if (!r->type)
  104. free += r->length;
  105. }
  106. mutex_unlock(&nv_subdev(pfb)->mutex);
  107. printk(KERN_DEBUG "%s total: 0x%010llx free: 0x%010llx\n",
  108. prefix, (u64)total << 12, (u64)free << 12);
  109. printk(KERN_DEBUG "%s block: 0x%08x\n",
  110. prefix, mm->block_size << 12);
  111. }
  112. const struct ttm_mem_type_manager_func nouveau_vram_manager = {
  113. nouveau_vram_manager_init,
  114. nouveau_vram_manager_fini,
  115. nouveau_vram_manager_new,
  116. nouveau_vram_manager_del,
  117. nouveau_vram_manager_debug
  118. };
  119. static int
  120. nouveau_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
  121. {
  122. return 0;
  123. }
  124. static int
  125. nouveau_gart_manager_fini(struct ttm_mem_type_manager *man)
  126. {
  127. return 0;
  128. }
  129. static void
  130. nouveau_gart_manager_del(struct ttm_mem_type_manager *man,
  131. struct ttm_mem_reg *mem)
  132. {
  133. nouveau_mem_node_cleanup(mem->mm_node);
  134. kfree(mem->mm_node);
  135. mem->mm_node = NULL;
  136. }
  137. static int
  138. nouveau_gart_manager_new(struct ttm_mem_type_manager *man,
  139. struct ttm_buffer_object *bo,
  140. const struct ttm_place *place,
  141. struct ttm_mem_reg *mem)
  142. {
  143. struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
  144. struct nouveau_bo *nvbo = nouveau_bo(bo);
  145. struct nouveau_mem *node;
  146. node = kzalloc(sizeof(*node), GFP_KERNEL);
  147. if (!node)
  148. return -ENOMEM;
  149. node->page_shift = 12;
  150. switch (drm->device.info.family) {
  151. case NV_DEVICE_INFO_V0_TESLA:
  152. if (drm->device.info.chipset != 0x50)
  153. node->memtype = (nvbo->tile_flags & 0x7f00) >> 8;
  154. break;
  155. case NV_DEVICE_INFO_V0_FERMI:
  156. case NV_DEVICE_INFO_V0_KEPLER:
  157. node->memtype = (nvbo->tile_flags & 0xff00) >> 8;
  158. break;
  159. default:
  160. break;
  161. }
  162. mem->mm_node = node;
  163. mem->start = 0;
  164. return 0;
  165. }
  166. static void
  167. nouveau_gart_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
  168. {
  169. }
  170. const struct ttm_mem_type_manager_func nouveau_gart_manager = {
  171. nouveau_gart_manager_init,
  172. nouveau_gart_manager_fini,
  173. nouveau_gart_manager_new,
  174. nouveau_gart_manager_del,
  175. nouveau_gart_manager_debug
  176. };
  177. /*XXX*/
  178. #include <core/subdev/vm/nv04.h>
  179. static int
  180. nv04_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
  181. {
  182. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  183. struct nouveau_vmmgr *vmm = nvkm_vmmgr(&drm->device);
  184. struct nv04_vmmgr_priv *priv = (void *)vmm;
  185. struct nouveau_vm *vm = NULL;
  186. nouveau_vm_ref(priv->vm, &vm, NULL);
  187. man->priv = vm;
  188. return 0;
  189. }
  190. static int
  191. nv04_gart_manager_fini(struct ttm_mem_type_manager *man)
  192. {
  193. struct nouveau_vm *vm = man->priv;
  194. nouveau_vm_ref(NULL, &vm, NULL);
  195. man->priv = NULL;
  196. return 0;
  197. }
  198. static void
  199. nv04_gart_manager_del(struct ttm_mem_type_manager *man, struct ttm_mem_reg *mem)
  200. {
  201. struct nouveau_mem *node = mem->mm_node;
  202. if (node->vma[0].node)
  203. nouveau_vm_put(&node->vma[0]);
  204. kfree(mem->mm_node);
  205. mem->mm_node = NULL;
  206. }
  207. static int
  208. nv04_gart_manager_new(struct ttm_mem_type_manager *man,
  209. struct ttm_buffer_object *bo,
  210. const struct ttm_place *place,
  211. struct ttm_mem_reg *mem)
  212. {
  213. struct nouveau_mem *node;
  214. int ret;
  215. node = kzalloc(sizeof(*node), GFP_KERNEL);
  216. if (!node)
  217. return -ENOMEM;
  218. node->page_shift = 12;
  219. ret = nouveau_vm_get(man->priv, mem->num_pages << 12, node->page_shift,
  220. NV_MEM_ACCESS_RW, &node->vma[0]);
  221. if (ret) {
  222. kfree(node);
  223. return ret;
  224. }
  225. mem->mm_node = node;
  226. mem->start = node->vma[0].offset >> PAGE_SHIFT;
  227. return 0;
  228. }
  229. static void
  230. nv04_gart_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
  231. {
  232. }
  233. const struct ttm_mem_type_manager_func nv04_gart_manager = {
  234. nv04_gart_manager_init,
  235. nv04_gart_manager_fini,
  236. nv04_gart_manager_new,
  237. nv04_gart_manager_del,
  238. nv04_gart_manager_debug
  239. };
  240. int
  241. nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
  242. {
  243. struct drm_file *file_priv = filp->private_data;
  244. struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev);
  245. if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
  246. return -EINVAL;
  247. return ttm_bo_mmap(filp, vma, &drm->ttm.bdev);
  248. }
  249. static int
  250. nouveau_ttm_mem_global_init(struct drm_global_reference *ref)
  251. {
  252. return ttm_mem_global_init(ref->object);
  253. }
  254. static void
  255. nouveau_ttm_mem_global_release(struct drm_global_reference *ref)
  256. {
  257. ttm_mem_global_release(ref->object);
  258. }
  259. int
  260. nouveau_ttm_global_init(struct nouveau_drm *drm)
  261. {
  262. struct drm_global_reference *global_ref;
  263. int ret;
  264. global_ref = &drm->ttm.mem_global_ref;
  265. global_ref->global_type = DRM_GLOBAL_TTM_MEM;
  266. global_ref->size = sizeof(struct ttm_mem_global);
  267. global_ref->init = &nouveau_ttm_mem_global_init;
  268. global_ref->release = &nouveau_ttm_mem_global_release;
  269. ret = drm_global_item_ref(global_ref);
  270. if (unlikely(ret != 0)) {
  271. DRM_ERROR("Failed setting up TTM memory accounting\n");
  272. drm->ttm.mem_global_ref.release = NULL;
  273. return ret;
  274. }
  275. drm->ttm.bo_global_ref.mem_glob = global_ref->object;
  276. global_ref = &drm->ttm.bo_global_ref.ref;
  277. global_ref->global_type = DRM_GLOBAL_TTM_BO;
  278. global_ref->size = sizeof(struct ttm_bo_global);
  279. global_ref->init = &ttm_bo_global_init;
  280. global_ref->release = &ttm_bo_global_release;
  281. ret = drm_global_item_ref(global_ref);
  282. if (unlikely(ret != 0)) {
  283. DRM_ERROR("Failed setting up TTM BO subsystem\n");
  284. drm_global_item_unref(&drm->ttm.mem_global_ref);
  285. drm->ttm.mem_global_ref.release = NULL;
  286. return ret;
  287. }
  288. return 0;
  289. }
  290. void
  291. nouveau_ttm_global_release(struct nouveau_drm *drm)
  292. {
  293. if (drm->ttm.mem_global_ref.release == NULL)
  294. return;
  295. drm_global_item_unref(&drm->ttm.bo_global_ref.ref);
  296. drm_global_item_unref(&drm->ttm.mem_global_ref);
  297. drm->ttm.mem_global_ref.release = NULL;
  298. }
  299. int
  300. nouveau_ttm_init(struct nouveau_drm *drm)
  301. {
  302. struct drm_device *dev = drm->dev;
  303. u32 bits;
  304. int ret;
  305. bits = nvkm_vmmgr(&drm->device)->dma_bits;
  306. if (nv_device_is_pci(nvkm_device(&drm->device))) {
  307. if (drm->agp.stat == ENABLED ||
  308. !pci_dma_supported(dev->pdev, DMA_BIT_MASK(bits)))
  309. bits = 32;
  310. ret = pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(bits));
  311. if (ret)
  312. return ret;
  313. ret = pci_set_consistent_dma_mask(dev->pdev,
  314. DMA_BIT_MASK(bits));
  315. if (ret)
  316. pci_set_consistent_dma_mask(dev->pdev,
  317. DMA_BIT_MASK(32));
  318. }
  319. ret = nouveau_ttm_global_init(drm);
  320. if (ret)
  321. return ret;
  322. ret = ttm_bo_device_init(&drm->ttm.bdev,
  323. drm->ttm.bo_global_ref.ref.object,
  324. &nouveau_bo_driver,
  325. dev->anon_inode->i_mapping,
  326. DRM_FILE_PAGE_OFFSET,
  327. bits <= 32 ? true : false);
  328. if (ret) {
  329. NV_ERROR(drm, "error initialising bo driver, %d\n", ret);
  330. return ret;
  331. }
  332. /* VRAM init */
  333. drm->gem.vram_available = drm->device.info.ram_user;
  334. ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM,
  335. drm->gem.vram_available >> PAGE_SHIFT);
  336. if (ret) {
  337. NV_ERROR(drm, "VRAM mm init failed, %d\n", ret);
  338. return ret;
  339. }
  340. drm->ttm.mtrr = arch_phys_wc_add(nv_device_resource_start(nvkm_device(&drm->device), 1),
  341. nv_device_resource_len(nvkm_device(&drm->device), 1));
  342. /* GART init */
  343. if (drm->agp.stat != ENABLED) {
  344. drm->gem.gart_available = nvkm_vmmgr(&drm->device)->limit;
  345. } else {
  346. drm->gem.gart_available = drm->agp.size;
  347. }
  348. ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT,
  349. drm->gem.gart_available >> PAGE_SHIFT);
  350. if (ret) {
  351. NV_ERROR(drm, "GART mm init failed, %d\n", ret);
  352. return ret;
  353. }
  354. NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20));
  355. NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20));
  356. return 0;
  357. }
  358. void
  359. nouveau_ttm_fini(struct nouveau_drm *drm)
  360. {
  361. mutex_lock(&drm->dev->struct_mutex);
  362. ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  363. ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT);
  364. mutex_unlock(&drm->dev->struct_mutex);
  365. ttm_bo_device_release(&drm->ttm.bdev);
  366. nouveau_ttm_global_release(drm);
  367. arch_phys_wc_del(drm->ttm.mtrr);
  368. drm->ttm.mtrr = 0;
  369. }