Kconfig 12 KB

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  1. #
  2. # DMA engine configuration
  3. #
  4. menuconfig DMADEVICES
  5. bool "DMA Engine support"
  6. depends on HAS_DMA
  7. help
  8. DMA engines can do asynchronous data transfers without
  9. involving the host CPU. Currently, this framework can be
  10. used to offload memory copies in the network stack and
  11. RAID operations in the MD driver. This menu only presents
  12. DMA Device drivers supported by the configured arch, it may
  13. be empty in some cases.
  14. config DMADEVICES_DEBUG
  15. bool "DMA Engine debugging"
  16. depends on DMADEVICES != n
  17. help
  18. This is an option for use by developers; most people should
  19. say N here. This enables DMA engine core and driver debugging.
  20. config DMADEVICES_VDEBUG
  21. bool "DMA Engine verbose debugging"
  22. depends on DMADEVICES_DEBUG != n
  23. help
  24. This is an option for use by developers; most people should
  25. say N here. This enables deeper (more verbose) debugging of
  26. the DMA engine core and drivers.
  27. if DMADEVICES
  28. comment "DMA Devices"
  29. config INTEL_MIC_X100_DMA
  30. tristate "Intel MIC X100 DMA Driver"
  31. depends on 64BIT && X86 && INTEL_MIC_BUS
  32. select DMA_ENGINE
  33. help
  34. This enables DMA support for the Intel Many Integrated Core
  35. (MIC) family of PCIe form factor coprocessor X100 devices that
  36. run a 64 bit Linux OS. This driver will be used by both MIC
  37. host and card drivers.
  38. If you are building host kernel with a MIC device or a card
  39. kernel for a MIC device, then say M (recommended) or Y, else
  40. say N. If unsure say N.
  41. More information about the Intel MIC family as well as the Linux
  42. OS and tools for MIC to use with this driver are available from
  43. <http://software.intel.com/en-us/mic-developer>.
  44. config INTEL_MID_DMAC
  45. tristate "Intel MID DMA support for Peripheral DMA controllers"
  46. depends on PCI && X86
  47. select DMA_ENGINE
  48. default n
  49. help
  50. Enable support for the Intel(R) MID DMA engine present
  51. in Intel MID chipsets.
  52. Say Y here if you have such a chipset.
  53. If unsure, say N.
  54. config ASYNC_TX_ENABLE_CHANNEL_SWITCH
  55. bool
  56. config AMBA_PL08X
  57. bool "ARM PrimeCell PL080 or PL081 support"
  58. depends on ARM_AMBA
  59. select DMA_ENGINE
  60. select DMA_VIRTUAL_CHANNELS
  61. help
  62. Platform has a PL08x DMAC device
  63. which can provide DMA engine support
  64. config INTEL_IOATDMA
  65. tristate "Intel I/OAT DMA support"
  66. depends on PCI && X86
  67. select DMA_ENGINE
  68. select DMA_ENGINE_RAID
  69. select DCA
  70. help
  71. Enable support for the Intel(R) I/OAT DMA engine present
  72. in recent Intel Xeon chipsets.
  73. Say Y here if you have such a chipset.
  74. If unsure, say N.
  75. config INTEL_IOP_ADMA
  76. tristate "Intel IOP ADMA support"
  77. depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  78. select DMA_ENGINE
  79. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  80. help
  81. Enable support for the Intel(R) IOP Series RAID engines.
  82. source "drivers/dma/dw/Kconfig"
  83. config AT_HDMAC
  84. tristate "Atmel AHB DMA support"
  85. depends on ARCH_AT91
  86. select DMA_ENGINE
  87. help
  88. Support the Atmel AHB DMA controller.
  89. config FSL_DMA
  90. tristate "Freescale Elo series DMA support"
  91. depends on FSL_SOC
  92. select DMA_ENGINE
  93. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  94. ---help---
  95. Enable support for the Freescale Elo series DMA controllers.
  96. The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
  97. EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
  98. some Txxx and Bxxx parts.
  99. config MPC512X_DMA
  100. tristate "Freescale MPC512x built-in DMA engine support"
  101. depends on PPC_MPC512x || PPC_MPC831x
  102. select DMA_ENGINE
  103. ---help---
  104. Enable support for the Freescale MPC512x built-in DMA engine.
  105. source "drivers/dma/bestcomm/Kconfig"
  106. config MV_XOR
  107. bool "Marvell XOR engine support"
  108. depends on PLAT_ORION
  109. select DMA_ENGINE
  110. select DMA_ENGINE_RAID
  111. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  112. ---help---
  113. Enable support for the Marvell XOR engine.
  114. config MX3_IPU
  115. bool "MX3x Image Processing Unit support"
  116. depends on ARCH_MXC
  117. select DMA_ENGINE
  118. default y
  119. help
  120. If you plan to use the Image Processing unit in the i.MX3x, say
  121. Y here. If unsure, select Y.
  122. config MX3_IPU_IRQS
  123. int "Number of dynamically mapped interrupts for IPU"
  124. depends on MX3_IPU
  125. range 2 137
  126. default 4
  127. help
  128. Out of 137 interrupt sources on i.MX31 IPU only very few are used.
  129. To avoid bloating the irq_desc[] array we allocate a sufficient
  130. number of IRQ slots and map them dynamically to specific sources.
  131. config TXX9_DMAC
  132. tristate "Toshiba TXx9 SoC DMA support"
  133. depends on MACH_TX49XX || MACH_TX39XX
  134. select DMA_ENGINE
  135. help
  136. Support the TXx9 SoC internal DMA controller. This can be
  137. integrated in chips such as the Toshiba TX4927/38/39.
  138. config TEGRA20_APB_DMA
  139. bool "NVIDIA Tegra20 APB DMA support"
  140. depends on ARCH_TEGRA
  141. select DMA_ENGINE
  142. help
  143. Support for the NVIDIA Tegra20 APB DMA controller driver. The
  144. DMA controller is having multiple DMA channel which can be
  145. configured for different peripherals like audio, UART, SPI,
  146. I2C etc which is in APB bus.
  147. This DMA controller transfers data from memory to peripheral fifo
  148. or vice versa. It does not support memory to memory data transfer.
  149. config S3C24XX_DMAC
  150. tristate "Samsung S3C24XX DMA support"
  151. depends on ARCH_S3C24XX && !S3C24XX_DMA
  152. select DMA_ENGINE
  153. select DMA_VIRTUAL_CHANNELS
  154. help
  155. Support for the Samsung S3C24XX DMA controller driver. The
  156. DMA controller is having multiple DMA channels which can be
  157. configured for different peripherals like audio, UART, SPI.
  158. The DMA controller can transfer data from memory to peripheral,
  159. periphal to memory, periphal to periphal and memory to memory.
  160. source "drivers/dma/sh/Kconfig"
  161. config COH901318
  162. bool "ST-Ericsson COH901318 DMA support"
  163. select DMA_ENGINE
  164. depends on ARCH_U300
  165. help
  166. Enable support for ST-Ericsson COH 901 318 DMA.
  167. config STE_DMA40
  168. bool "ST-Ericsson DMA40 support"
  169. depends on ARCH_U8500
  170. select DMA_ENGINE
  171. help
  172. Support for ST-Ericsson DMA40 controller
  173. config AMCC_PPC440SPE_ADMA
  174. tristate "AMCC PPC440SPe ADMA support"
  175. depends on 440SPe || 440SP
  176. select DMA_ENGINE
  177. select DMA_ENGINE_RAID
  178. select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  179. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  180. help
  181. Enable support for the AMCC PPC440SPe RAID engines.
  182. config TIMB_DMA
  183. tristate "Timberdale FPGA DMA support"
  184. depends on MFD_TIMBERDALE
  185. select DMA_ENGINE
  186. help
  187. Enable support for the Timberdale FPGA DMA engine.
  188. config SIRF_DMA
  189. tristate "CSR SiRFprimaII/SiRFmarco DMA support"
  190. depends on ARCH_SIRF
  191. select DMA_ENGINE
  192. help
  193. Enable support for the CSR SiRFprimaII DMA engine.
  194. config TI_EDMA
  195. bool "TI EDMA support"
  196. depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE
  197. select DMA_ENGINE
  198. select DMA_VIRTUAL_CHANNELS
  199. select TI_PRIV_EDMA
  200. default n
  201. help
  202. Enable support for the TI EDMA controller. This DMA
  203. engine is found on TI DaVinci and AM33xx parts.
  204. config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  205. bool
  206. config PL330_DMA
  207. tristate "DMA API Driver for PL330"
  208. select DMA_ENGINE
  209. depends on ARM_AMBA
  210. help
  211. Select if your platform has one or more PL330 DMACs.
  212. You need to provide platform specific settings via
  213. platform_data for a dma-pl330 device.
  214. config PCH_DMA
  215. tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
  216. depends on PCI && (X86_32 || COMPILE_TEST)
  217. select DMA_ENGINE
  218. help
  219. Enable support for Intel EG20T PCH DMA engine.
  220. This driver also can be used for LAPIS Semiconductor IOH(Input/
  221. Output Hub), ML7213, ML7223 and ML7831.
  222. ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
  223. for MP(Media Phone) use and ML7831 IOH is for general purpose use.
  224. ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
  225. ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
  226. config IMX_SDMA
  227. tristate "i.MX SDMA support"
  228. depends on ARCH_MXC
  229. select DMA_ENGINE
  230. help
  231. Support the i.MX SDMA engine. This engine is integrated into
  232. Freescale i.MX25/31/35/51/53/6 chips.
  233. config IMX_DMA
  234. tristate "i.MX DMA support"
  235. depends on ARCH_MXC
  236. select DMA_ENGINE
  237. help
  238. Support the i.MX DMA engine. This engine is integrated into
  239. Freescale i.MX1/21/27 chips.
  240. config MXS_DMA
  241. bool "MXS DMA support"
  242. depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
  243. select STMP_DEVICE
  244. select DMA_ENGINE
  245. help
  246. Support the MXS DMA engine. This engine including APBH-DMA
  247. and APBX-DMA is integrated into Freescale i.MX23/28/MX6Q/MX6DL chips.
  248. config EP93XX_DMA
  249. bool "Cirrus Logic EP93xx DMA support"
  250. depends on ARCH_EP93XX
  251. select DMA_ENGINE
  252. help
  253. Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
  254. config DMA_SA11X0
  255. tristate "SA-11x0 DMA support"
  256. depends on ARCH_SA1100
  257. select DMA_ENGINE
  258. select DMA_VIRTUAL_CHANNELS
  259. help
  260. Support the DMA engine found on Intel StrongARM SA-1100 and
  261. SA-1110 SoCs. This DMA engine can only be used with on-chip
  262. devices.
  263. config MMP_TDMA
  264. bool "MMP Two-Channel DMA support"
  265. depends on ARCH_MMP
  266. select DMA_ENGINE
  267. select MMP_SRAM
  268. help
  269. Support the MMP Two-Channel DMA engine.
  270. This engine used for MMP Audio DMA and pxa910 SQU.
  271. It needs sram driver under mach-mmp.
  272. Say Y here if you enabled MMP ADMA, otherwise say N.
  273. config DMA_OMAP
  274. tristate "OMAP DMA support"
  275. depends on ARCH_OMAP
  276. select DMA_ENGINE
  277. select DMA_VIRTUAL_CHANNELS
  278. config DMA_BCM2835
  279. tristate "BCM2835 DMA engine support"
  280. depends on ARCH_BCM2835
  281. select DMA_ENGINE
  282. select DMA_VIRTUAL_CHANNELS
  283. config TI_CPPI41
  284. tristate "AM33xx CPPI41 DMA support"
  285. depends on ARCH_OMAP
  286. select DMA_ENGINE
  287. help
  288. The Communications Port Programming Interface (CPPI) 4.1 DMA engine
  289. is currently used by the USB driver on AM335x platforms.
  290. config MMP_PDMA
  291. bool "MMP PDMA support"
  292. depends on (ARCH_MMP || ARCH_PXA)
  293. select DMA_ENGINE
  294. help
  295. Support the MMP PDMA engine for PXA and MMP platform.
  296. config DMA_JZ4740
  297. tristate "JZ4740 DMA support"
  298. depends on MACH_JZ4740
  299. select DMA_ENGINE
  300. select DMA_VIRTUAL_CHANNELS
  301. config K3_DMA
  302. tristate "Hisilicon K3 DMA support"
  303. depends on ARCH_HI3xxx
  304. select DMA_ENGINE
  305. select DMA_VIRTUAL_CHANNELS
  306. help
  307. Support the DMA engine for Hisilicon K3 platform
  308. devices.
  309. config MOXART_DMA
  310. tristate "MOXART DMA support"
  311. depends on ARCH_MOXART
  312. select DMA_ENGINE
  313. select DMA_OF
  314. select DMA_VIRTUAL_CHANNELS
  315. help
  316. Enable support for the MOXA ART SoC DMA controller.
  317. config FSL_EDMA
  318. tristate "Freescale eDMA engine support"
  319. depends on OF
  320. select DMA_ENGINE
  321. select DMA_VIRTUAL_CHANNELS
  322. help
  323. Support the Freescale eDMA engine with programmable channel
  324. multiplexing capability for DMA request sources(slot).
  325. This module can be found on Freescale Vybrid and LS-1 SoCs.
  326. config XILINX_VDMA
  327. tristate "Xilinx AXI VDMA Engine"
  328. depends on (ARCH_ZYNQ || MICROBLAZE)
  329. select DMA_ENGINE
  330. help
  331. Enable support for Xilinx AXI VDMA Soft IP.
  332. This engine provides high-bandwidth direct memory access
  333. between memory and AXI4-Stream video type target
  334. peripherals including peripherals which support AXI4-
  335. Stream Video Protocol. It has two stream interfaces/
  336. channels, Memory Mapped to Stream (MM2S) and Stream to
  337. Memory Mapped (S2MM) for the data transfers.
  338. config DMA_SUN6I
  339. tristate "Allwinner A31 SoCs DMA support"
  340. depends on MACH_SUN6I || COMPILE_TEST
  341. depends on RESET_CONTROLLER
  342. select DMA_ENGINE
  343. select DMA_VIRTUAL_CHANNELS
  344. help
  345. Support for the DMA engine for Allwinner A31 SoCs.
  346. config NBPFAXI_DMA
  347. tristate "Renesas Type-AXI NBPF DMA support"
  348. select DMA_ENGINE
  349. depends on ARM || COMPILE_TEST
  350. help
  351. Support for "Type-AXI" NBPF DMA IPs from Renesas
  352. config DMA_ENGINE
  353. bool
  354. config DMA_VIRTUAL_CHANNELS
  355. tristate
  356. config DMA_ACPI
  357. def_bool y
  358. depends on ACPI
  359. config DMA_OF
  360. def_bool y
  361. depends on OF
  362. select DMA_ENGINE
  363. comment "DMA Clients"
  364. depends on DMA_ENGINE
  365. config ASYNC_TX_DMA
  366. bool "Async_tx: Offload support for the async_tx api"
  367. depends on DMA_ENGINE
  368. help
  369. This allows the async_tx api to take advantage of offload engines for
  370. memcpy, memset, xor, and raid6 p+q operations. If your platform has
  371. a dma engine that can perform raid operations and you have enabled
  372. MD_RAID456 say Y.
  373. If unsure, say N.
  374. config DMATEST
  375. tristate "DMA Test client"
  376. depends on DMA_ENGINE
  377. help
  378. Simple DMA test client. Say N unless you're debugging a
  379. DMA Device driver.
  380. config DMA_ENGINE_RAID
  381. bool
  382. config QCOM_BAM_DMA
  383. tristate "QCOM BAM DMA support"
  384. depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
  385. select DMA_ENGINE
  386. select DMA_VIRTUAL_CHANNELS
  387. ---help---
  388. Enable support for the QCOM BAM DMA controller. This controller
  389. provides DMA capabilities for a variety of on-chip devices.
  390. endif