intel_pstate.c 22 KB

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  1. /*
  2. * intel_pstate.c: Native P state management for Intel processors
  3. *
  4. * (C) Copyright 2012 Intel Corporation
  5. * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; version 2
  10. * of the License.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/module.h>
  15. #include <linux/ktime.h>
  16. #include <linux/hrtimer.h>
  17. #include <linux/tick.h>
  18. #include <linux/slab.h>
  19. #include <linux/sched.h>
  20. #include <linux/list.h>
  21. #include <linux/cpu.h>
  22. #include <linux/cpufreq.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/types.h>
  25. #include <linux/fs.h>
  26. #include <linux/debugfs.h>
  27. #include <linux/acpi.h>
  28. #include <trace/events/power.h>
  29. #include <asm/div64.h>
  30. #include <asm/msr.h>
  31. #include <asm/cpu_device_id.h>
  32. #define BYT_RATIOS 0x66a
  33. #define BYT_VIDS 0x66b
  34. #define BYT_TURBO_RATIOS 0x66c
  35. #define BYT_TURBO_VIDS 0x66d
  36. #define FRAC_BITS 8
  37. #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
  38. #define fp_toint(X) ((X) >> FRAC_BITS)
  39. static inline int32_t mul_fp(int32_t x, int32_t y)
  40. {
  41. return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
  42. }
  43. static inline int32_t div_fp(int32_t x, int32_t y)
  44. {
  45. return div_s64((int64_t)x << FRAC_BITS, y);
  46. }
  47. struct sample {
  48. int32_t core_pct_busy;
  49. u64 aperf;
  50. u64 mperf;
  51. int freq;
  52. ktime_t time;
  53. };
  54. struct pstate_data {
  55. int current_pstate;
  56. int min_pstate;
  57. int max_pstate;
  58. int turbo_pstate;
  59. };
  60. struct vid_data {
  61. int min;
  62. int max;
  63. int turbo;
  64. int32_t ratio;
  65. };
  66. struct _pid {
  67. int setpoint;
  68. int32_t integral;
  69. int32_t p_gain;
  70. int32_t i_gain;
  71. int32_t d_gain;
  72. int deadband;
  73. int32_t last_err;
  74. };
  75. struct cpudata {
  76. int cpu;
  77. struct timer_list timer;
  78. struct pstate_data pstate;
  79. struct vid_data vid;
  80. struct _pid pid;
  81. ktime_t last_sample_time;
  82. u64 prev_aperf;
  83. u64 prev_mperf;
  84. struct sample sample;
  85. };
  86. static struct cpudata **all_cpu_data;
  87. struct pstate_adjust_policy {
  88. int sample_rate_ms;
  89. int deadband;
  90. int setpoint;
  91. int p_gain_pct;
  92. int d_gain_pct;
  93. int i_gain_pct;
  94. };
  95. struct pstate_funcs {
  96. int (*get_max)(void);
  97. int (*get_min)(void);
  98. int (*get_turbo)(void);
  99. void (*set)(struct cpudata*, int pstate);
  100. void (*get_vid)(struct cpudata *);
  101. };
  102. struct cpu_defaults {
  103. struct pstate_adjust_policy pid_policy;
  104. struct pstate_funcs funcs;
  105. };
  106. static struct pstate_adjust_policy pid_params;
  107. static struct pstate_funcs pstate_funcs;
  108. struct perf_limits {
  109. int no_turbo;
  110. int turbo_disabled;
  111. int max_perf_pct;
  112. int min_perf_pct;
  113. int32_t max_perf;
  114. int32_t min_perf;
  115. int max_policy_pct;
  116. int max_sysfs_pct;
  117. };
  118. static struct perf_limits limits = {
  119. .no_turbo = 0,
  120. .max_perf_pct = 100,
  121. .max_perf = int_tofp(1),
  122. .min_perf_pct = 0,
  123. .min_perf = 0,
  124. .max_policy_pct = 100,
  125. .max_sysfs_pct = 100,
  126. };
  127. static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
  128. int deadband, int integral) {
  129. pid->setpoint = setpoint;
  130. pid->deadband = deadband;
  131. pid->integral = int_tofp(integral);
  132. pid->last_err = int_tofp(setpoint) - int_tofp(busy);
  133. }
  134. static inline void pid_p_gain_set(struct _pid *pid, int percent)
  135. {
  136. pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
  137. }
  138. static inline void pid_i_gain_set(struct _pid *pid, int percent)
  139. {
  140. pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
  141. }
  142. static inline void pid_d_gain_set(struct _pid *pid, int percent)
  143. {
  144. pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
  145. }
  146. static signed int pid_calc(struct _pid *pid, int32_t busy)
  147. {
  148. signed int result;
  149. int32_t pterm, dterm, fp_error;
  150. int32_t integral_limit;
  151. fp_error = int_tofp(pid->setpoint) - busy;
  152. if (abs(fp_error) <= int_tofp(pid->deadband))
  153. return 0;
  154. pterm = mul_fp(pid->p_gain, fp_error);
  155. pid->integral += fp_error;
  156. /* limit the integral term */
  157. integral_limit = int_tofp(30);
  158. if (pid->integral > integral_limit)
  159. pid->integral = integral_limit;
  160. if (pid->integral < -integral_limit)
  161. pid->integral = -integral_limit;
  162. dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
  163. pid->last_err = fp_error;
  164. result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
  165. result = result + (1 << (FRAC_BITS-1));
  166. return (signed int)fp_toint(result);
  167. }
  168. static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
  169. {
  170. pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
  171. pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
  172. pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
  173. pid_reset(&cpu->pid, pid_params.setpoint, 100, pid_params.deadband, 0);
  174. }
  175. static inline void intel_pstate_reset_all_pid(void)
  176. {
  177. unsigned int cpu;
  178. for_each_online_cpu(cpu) {
  179. if (all_cpu_data[cpu])
  180. intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
  181. }
  182. }
  183. /************************** debugfs begin ************************/
  184. static int pid_param_set(void *data, u64 val)
  185. {
  186. *(u32 *)data = val;
  187. intel_pstate_reset_all_pid();
  188. return 0;
  189. }
  190. static int pid_param_get(void *data, u64 *val)
  191. {
  192. *val = *(u32 *)data;
  193. return 0;
  194. }
  195. DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get, pid_param_set, "%llu\n");
  196. struct pid_param {
  197. char *name;
  198. void *value;
  199. };
  200. static struct pid_param pid_files[] = {
  201. {"sample_rate_ms", &pid_params.sample_rate_ms},
  202. {"d_gain_pct", &pid_params.d_gain_pct},
  203. {"i_gain_pct", &pid_params.i_gain_pct},
  204. {"deadband", &pid_params.deadband},
  205. {"setpoint", &pid_params.setpoint},
  206. {"p_gain_pct", &pid_params.p_gain_pct},
  207. {NULL, NULL}
  208. };
  209. static void __init intel_pstate_debug_expose_params(void)
  210. {
  211. struct dentry *debugfs_parent;
  212. int i = 0;
  213. debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
  214. if (IS_ERR_OR_NULL(debugfs_parent))
  215. return;
  216. while (pid_files[i].name) {
  217. debugfs_create_file(pid_files[i].name, 0660,
  218. debugfs_parent, pid_files[i].value,
  219. &fops_pid_param);
  220. i++;
  221. }
  222. }
  223. /************************** debugfs end ************************/
  224. /************************** sysfs begin ************************/
  225. #define show_one(file_name, object) \
  226. static ssize_t show_##file_name \
  227. (struct kobject *kobj, struct attribute *attr, char *buf) \
  228. { \
  229. return sprintf(buf, "%u\n", limits.object); \
  230. }
  231. static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
  232. const char *buf, size_t count)
  233. {
  234. unsigned int input;
  235. int ret;
  236. ret = sscanf(buf, "%u", &input);
  237. if (ret != 1)
  238. return -EINVAL;
  239. limits.no_turbo = clamp_t(int, input, 0 , 1);
  240. if (limits.turbo_disabled) {
  241. pr_warn("Turbo disabled by BIOS or unavailable on processor\n");
  242. limits.no_turbo = limits.turbo_disabled;
  243. }
  244. return count;
  245. }
  246. static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
  247. const char *buf, size_t count)
  248. {
  249. unsigned int input;
  250. int ret;
  251. ret = sscanf(buf, "%u", &input);
  252. if (ret != 1)
  253. return -EINVAL;
  254. limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
  255. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  256. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  257. return count;
  258. }
  259. static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
  260. const char *buf, size_t count)
  261. {
  262. unsigned int input;
  263. int ret;
  264. ret = sscanf(buf, "%u", &input);
  265. if (ret != 1)
  266. return -EINVAL;
  267. limits.min_perf_pct = clamp_t(int, input, 0 , 100);
  268. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  269. return count;
  270. }
  271. show_one(no_turbo, no_turbo);
  272. show_one(max_perf_pct, max_perf_pct);
  273. show_one(min_perf_pct, min_perf_pct);
  274. define_one_global_rw(no_turbo);
  275. define_one_global_rw(max_perf_pct);
  276. define_one_global_rw(min_perf_pct);
  277. static struct attribute *intel_pstate_attributes[] = {
  278. &no_turbo.attr,
  279. &max_perf_pct.attr,
  280. &min_perf_pct.attr,
  281. NULL
  282. };
  283. static struct attribute_group intel_pstate_attr_group = {
  284. .attrs = intel_pstate_attributes,
  285. };
  286. static void __init intel_pstate_sysfs_expose_params(void)
  287. {
  288. struct kobject *intel_pstate_kobject;
  289. int rc;
  290. intel_pstate_kobject = kobject_create_and_add("intel_pstate",
  291. &cpu_subsys.dev_root->kobj);
  292. BUG_ON(!intel_pstate_kobject);
  293. rc = sysfs_create_group(intel_pstate_kobject, &intel_pstate_attr_group);
  294. BUG_ON(rc);
  295. }
  296. /************************** sysfs end ************************/
  297. static int byt_get_min_pstate(void)
  298. {
  299. u64 value;
  300. rdmsrl(BYT_RATIOS, value);
  301. return (value >> 8) & 0x7F;
  302. }
  303. static int byt_get_max_pstate(void)
  304. {
  305. u64 value;
  306. rdmsrl(BYT_RATIOS, value);
  307. return (value >> 16) & 0x7F;
  308. }
  309. static int byt_get_turbo_pstate(void)
  310. {
  311. u64 value;
  312. rdmsrl(BYT_TURBO_RATIOS, value);
  313. return value & 0x7F;
  314. }
  315. static void byt_set_pstate(struct cpudata *cpudata, int pstate)
  316. {
  317. u64 val;
  318. int32_t vid_fp;
  319. u32 vid;
  320. val = pstate << 8;
  321. if (limits.no_turbo && !limits.turbo_disabled)
  322. val |= (u64)1 << 32;
  323. vid_fp = cpudata->vid.min + mul_fp(
  324. int_tofp(pstate - cpudata->pstate.min_pstate),
  325. cpudata->vid.ratio);
  326. vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
  327. vid = fp_toint(vid_fp);
  328. if (pstate > cpudata->pstate.max_pstate)
  329. vid = cpudata->vid.turbo;
  330. val |= vid;
  331. wrmsrl(MSR_IA32_PERF_CTL, val);
  332. }
  333. static void byt_get_vid(struct cpudata *cpudata)
  334. {
  335. u64 value;
  336. rdmsrl(BYT_VIDS, value);
  337. cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
  338. cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
  339. cpudata->vid.ratio = div_fp(
  340. cpudata->vid.max - cpudata->vid.min,
  341. int_tofp(cpudata->pstate.max_pstate -
  342. cpudata->pstate.min_pstate));
  343. rdmsrl(BYT_TURBO_VIDS, value);
  344. cpudata->vid.turbo = value & 0x7f;
  345. }
  346. static int core_get_min_pstate(void)
  347. {
  348. u64 value;
  349. rdmsrl(MSR_PLATFORM_INFO, value);
  350. return (value >> 40) & 0xFF;
  351. }
  352. static int core_get_max_pstate(void)
  353. {
  354. u64 value;
  355. rdmsrl(MSR_PLATFORM_INFO, value);
  356. return (value >> 8) & 0xFF;
  357. }
  358. static int core_get_turbo_pstate(void)
  359. {
  360. u64 value;
  361. int nont, ret;
  362. rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
  363. nont = core_get_max_pstate();
  364. ret = (value) & 255;
  365. if (ret <= nont)
  366. ret = nont;
  367. return ret;
  368. }
  369. static void core_set_pstate(struct cpudata *cpudata, int pstate)
  370. {
  371. u64 val;
  372. val = pstate << 8;
  373. if (limits.no_turbo && !limits.turbo_disabled)
  374. val |= (u64)1 << 32;
  375. wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
  376. }
  377. static struct cpu_defaults core_params = {
  378. .pid_policy = {
  379. .sample_rate_ms = 10,
  380. .deadband = 0,
  381. .setpoint = 97,
  382. .p_gain_pct = 20,
  383. .d_gain_pct = 0,
  384. .i_gain_pct = 0,
  385. },
  386. .funcs = {
  387. .get_max = core_get_max_pstate,
  388. .get_min = core_get_min_pstate,
  389. .get_turbo = core_get_turbo_pstate,
  390. .set = core_set_pstate,
  391. },
  392. };
  393. static struct cpu_defaults byt_params = {
  394. .pid_policy = {
  395. .sample_rate_ms = 10,
  396. .deadband = 0,
  397. .setpoint = 97,
  398. .p_gain_pct = 14,
  399. .d_gain_pct = 0,
  400. .i_gain_pct = 4,
  401. },
  402. .funcs = {
  403. .get_max = byt_get_max_pstate,
  404. .get_min = byt_get_min_pstate,
  405. .get_turbo = byt_get_turbo_pstate,
  406. .set = byt_set_pstate,
  407. .get_vid = byt_get_vid,
  408. },
  409. };
  410. static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
  411. {
  412. int max_perf = cpu->pstate.turbo_pstate;
  413. int max_perf_adj;
  414. int min_perf;
  415. if (limits.no_turbo)
  416. max_perf = cpu->pstate.max_pstate;
  417. max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
  418. *max = clamp_t(int, max_perf_adj,
  419. cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
  420. min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
  421. *min = clamp_t(int, min_perf, cpu->pstate.min_pstate, max_perf);
  422. }
  423. static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
  424. {
  425. int max_perf, min_perf;
  426. intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
  427. pstate = clamp_t(int, pstate, min_perf, max_perf);
  428. if (pstate == cpu->pstate.current_pstate)
  429. return;
  430. trace_cpu_frequency(pstate * 100000, cpu->cpu);
  431. cpu->pstate.current_pstate = pstate;
  432. pstate_funcs.set(cpu, pstate);
  433. }
  434. static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
  435. {
  436. cpu->pstate.min_pstate = pstate_funcs.get_min();
  437. cpu->pstate.max_pstate = pstate_funcs.get_max();
  438. cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
  439. if (pstate_funcs.get_vid)
  440. pstate_funcs.get_vid(cpu);
  441. intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
  442. }
  443. static inline void intel_pstate_calc_busy(struct cpudata *cpu)
  444. {
  445. struct sample *sample = &cpu->sample;
  446. int64_t core_pct;
  447. core_pct = int_tofp(sample->aperf) * int_tofp(100);
  448. core_pct = div64_u64(core_pct, int_tofp(sample->mperf));
  449. sample->freq = fp_toint(
  450. mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct));
  451. sample->core_pct_busy = (int32_t)core_pct;
  452. }
  453. static inline void intel_pstate_sample(struct cpudata *cpu)
  454. {
  455. u64 aperf, mperf;
  456. unsigned long flags;
  457. local_irq_save(flags);
  458. rdmsrl(MSR_IA32_APERF, aperf);
  459. rdmsrl(MSR_IA32_MPERF, mperf);
  460. local_irq_restore(flags);
  461. cpu->last_sample_time = cpu->sample.time;
  462. cpu->sample.time = ktime_get();
  463. cpu->sample.aperf = aperf;
  464. cpu->sample.mperf = mperf;
  465. cpu->sample.aperf -= cpu->prev_aperf;
  466. cpu->sample.mperf -= cpu->prev_mperf;
  467. intel_pstate_calc_busy(cpu);
  468. cpu->prev_aperf = aperf;
  469. cpu->prev_mperf = mperf;
  470. }
  471. static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
  472. {
  473. int delay;
  474. delay = msecs_to_jiffies(pid_params.sample_rate_ms);
  475. mod_timer_pinned(&cpu->timer, jiffies + delay);
  476. }
  477. static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
  478. {
  479. int32_t core_busy, max_pstate, current_pstate, sample_ratio;
  480. u32 duration_us;
  481. u32 sample_time;
  482. core_busy = cpu->sample.core_pct_busy;
  483. max_pstate = int_tofp(cpu->pstate.max_pstate);
  484. current_pstate = int_tofp(cpu->pstate.current_pstate);
  485. core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
  486. sample_time = pid_params.sample_rate_ms * USEC_PER_MSEC;
  487. duration_us = (u32) ktime_us_delta(cpu->sample.time,
  488. cpu->last_sample_time);
  489. if (duration_us > sample_time * 3) {
  490. sample_ratio = div_fp(int_tofp(sample_time),
  491. int_tofp(duration_us));
  492. core_busy = mul_fp(core_busy, sample_ratio);
  493. }
  494. return core_busy;
  495. }
  496. static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
  497. {
  498. int32_t busy_scaled;
  499. struct _pid *pid;
  500. signed int ctl;
  501. pid = &cpu->pid;
  502. busy_scaled = intel_pstate_get_scaled_busy(cpu);
  503. ctl = pid_calc(pid, busy_scaled);
  504. /* Negative values of ctl increase the pstate and vice versa */
  505. intel_pstate_set_pstate(cpu, cpu->pstate.current_pstate - ctl);
  506. }
  507. static void intel_pstate_timer_func(unsigned long __data)
  508. {
  509. struct cpudata *cpu = (struct cpudata *) __data;
  510. struct sample *sample;
  511. intel_pstate_sample(cpu);
  512. sample = &cpu->sample;
  513. intel_pstate_adjust_busy_pstate(cpu);
  514. trace_pstate_sample(fp_toint(sample->core_pct_busy),
  515. fp_toint(intel_pstate_get_scaled_busy(cpu)),
  516. cpu->pstate.current_pstate,
  517. sample->mperf,
  518. sample->aperf,
  519. sample->freq);
  520. intel_pstate_set_sample_time(cpu);
  521. }
  522. #define ICPU(model, policy) \
  523. { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
  524. (unsigned long)&policy }
  525. static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
  526. ICPU(0x2a, core_params),
  527. ICPU(0x2d, core_params),
  528. ICPU(0x37, byt_params),
  529. ICPU(0x3a, core_params),
  530. ICPU(0x3c, core_params),
  531. ICPU(0x3d, core_params),
  532. ICPU(0x3e, core_params),
  533. ICPU(0x3f, core_params),
  534. ICPU(0x45, core_params),
  535. ICPU(0x46, core_params),
  536. ICPU(0x4c, byt_params),
  537. ICPU(0x4f, core_params),
  538. ICPU(0x56, core_params),
  539. {}
  540. };
  541. MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
  542. static int intel_pstate_init_cpu(unsigned int cpunum)
  543. {
  544. struct cpudata *cpu;
  545. all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
  546. if (!all_cpu_data[cpunum])
  547. return -ENOMEM;
  548. cpu = all_cpu_data[cpunum];
  549. cpu->cpu = cpunum;
  550. intel_pstate_get_cpu_pstates(cpu);
  551. init_timer_deferrable(&cpu->timer);
  552. cpu->timer.function = intel_pstate_timer_func;
  553. cpu->timer.data = (unsigned long)cpu;
  554. cpu->timer.expires = jiffies + HZ/100;
  555. intel_pstate_busy_pid_reset(cpu);
  556. intel_pstate_sample(cpu);
  557. add_timer_on(&cpu->timer, cpunum);
  558. pr_debug("Intel pstate controlling: cpu %d\n", cpunum);
  559. return 0;
  560. }
  561. static unsigned int intel_pstate_get(unsigned int cpu_num)
  562. {
  563. struct sample *sample;
  564. struct cpudata *cpu;
  565. cpu = all_cpu_data[cpu_num];
  566. if (!cpu)
  567. return 0;
  568. sample = &cpu->sample;
  569. return sample->freq;
  570. }
  571. static int intel_pstate_set_policy(struct cpufreq_policy *policy)
  572. {
  573. if (!policy->cpuinfo.max_freq)
  574. return -ENODEV;
  575. if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
  576. limits.min_perf_pct = 100;
  577. limits.min_perf = int_tofp(1);
  578. limits.max_perf_pct = 100;
  579. limits.max_perf = int_tofp(1);
  580. limits.no_turbo = limits.turbo_disabled;
  581. return 0;
  582. }
  583. limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
  584. limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
  585. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  586. limits.max_policy_pct = (policy->max * 100) / policy->cpuinfo.max_freq;
  587. limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
  588. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  589. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  590. return 0;
  591. }
  592. static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
  593. {
  594. cpufreq_verify_within_cpu_limits(policy);
  595. if (policy->policy != CPUFREQ_POLICY_POWERSAVE &&
  596. policy->policy != CPUFREQ_POLICY_PERFORMANCE)
  597. return -EINVAL;
  598. return 0;
  599. }
  600. static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
  601. {
  602. int cpu_num = policy->cpu;
  603. struct cpudata *cpu = all_cpu_data[cpu_num];
  604. pr_info("intel_pstate CPU %d exiting\n", cpu_num);
  605. del_timer_sync(&all_cpu_data[cpu_num]->timer);
  606. intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
  607. kfree(all_cpu_data[cpu_num]);
  608. all_cpu_data[cpu_num] = NULL;
  609. }
  610. static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
  611. {
  612. struct cpudata *cpu;
  613. int rc;
  614. u64 misc_en;
  615. rc = intel_pstate_init_cpu(policy->cpu);
  616. if (rc)
  617. return rc;
  618. cpu = all_cpu_data[policy->cpu];
  619. rdmsrl(MSR_IA32_MISC_ENABLE, misc_en);
  620. if (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ||
  621. cpu->pstate.max_pstate == cpu->pstate.turbo_pstate) {
  622. limits.turbo_disabled = 1;
  623. limits.no_turbo = 1;
  624. }
  625. if (limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
  626. policy->policy = CPUFREQ_POLICY_PERFORMANCE;
  627. else
  628. policy->policy = CPUFREQ_POLICY_POWERSAVE;
  629. policy->min = cpu->pstate.min_pstate * 100000;
  630. policy->max = cpu->pstate.turbo_pstate * 100000;
  631. /* cpuinfo and default policy values */
  632. policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
  633. policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
  634. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  635. cpumask_set_cpu(policy->cpu, policy->cpus);
  636. return 0;
  637. }
  638. static struct cpufreq_driver intel_pstate_driver = {
  639. .flags = CPUFREQ_CONST_LOOPS,
  640. .verify = intel_pstate_verify_policy,
  641. .setpolicy = intel_pstate_set_policy,
  642. .get = intel_pstate_get,
  643. .init = intel_pstate_cpu_init,
  644. .stop_cpu = intel_pstate_stop_cpu,
  645. .name = "intel_pstate",
  646. };
  647. static int __initdata no_load;
  648. static int intel_pstate_msrs_not_valid(void)
  649. {
  650. /* Check that all the msr's we are using are valid. */
  651. u64 aperf, mperf, tmp;
  652. rdmsrl(MSR_IA32_APERF, aperf);
  653. rdmsrl(MSR_IA32_MPERF, mperf);
  654. if (!pstate_funcs.get_max() ||
  655. !pstate_funcs.get_min() ||
  656. !pstate_funcs.get_turbo())
  657. return -ENODEV;
  658. rdmsrl(MSR_IA32_APERF, tmp);
  659. if (!(tmp - aperf))
  660. return -ENODEV;
  661. rdmsrl(MSR_IA32_MPERF, tmp);
  662. if (!(tmp - mperf))
  663. return -ENODEV;
  664. return 0;
  665. }
  666. static void copy_pid_params(struct pstate_adjust_policy *policy)
  667. {
  668. pid_params.sample_rate_ms = policy->sample_rate_ms;
  669. pid_params.p_gain_pct = policy->p_gain_pct;
  670. pid_params.i_gain_pct = policy->i_gain_pct;
  671. pid_params.d_gain_pct = policy->d_gain_pct;
  672. pid_params.deadband = policy->deadband;
  673. pid_params.setpoint = policy->setpoint;
  674. }
  675. static void copy_cpu_funcs(struct pstate_funcs *funcs)
  676. {
  677. pstate_funcs.get_max = funcs->get_max;
  678. pstate_funcs.get_min = funcs->get_min;
  679. pstate_funcs.get_turbo = funcs->get_turbo;
  680. pstate_funcs.set = funcs->set;
  681. pstate_funcs.get_vid = funcs->get_vid;
  682. }
  683. #if IS_ENABLED(CONFIG_ACPI)
  684. #include <acpi/processor.h>
  685. static bool intel_pstate_no_acpi_pss(void)
  686. {
  687. int i;
  688. for_each_possible_cpu(i) {
  689. acpi_status status;
  690. union acpi_object *pss;
  691. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  692. struct acpi_processor *pr = per_cpu(processors, i);
  693. if (!pr)
  694. continue;
  695. status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
  696. if (ACPI_FAILURE(status))
  697. continue;
  698. pss = buffer.pointer;
  699. if (pss && pss->type == ACPI_TYPE_PACKAGE) {
  700. kfree(pss);
  701. return false;
  702. }
  703. kfree(pss);
  704. }
  705. return true;
  706. }
  707. struct hw_vendor_info {
  708. u16 valid;
  709. char oem_id[ACPI_OEM_ID_SIZE];
  710. char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
  711. };
  712. /* Hardware vendor-specific info that has its own power management modes */
  713. static struct hw_vendor_info vendor_info[] = {
  714. {1, "HP ", "ProLiant"},
  715. {0, "", ""},
  716. };
  717. static bool intel_pstate_platform_pwr_mgmt_exists(void)
  718. {
  719. struct acpi_table_header hdr;
  720. struct hw_vendor_info *v_info;
  721. if (acpi_disabled ||
  722. ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
  723. return false;
  724. for (v_info = vendor_info; v_info->valid; v_info++) {
  725. if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE) &&
  726. !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
  727. intel_pstate_no_acpi_pss())
  728. return true;
  729. }
  730. return false;
  731. }
  732. #else /* CONFIG_ACPI not enabled */
  733. static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
  734. #endif /* CONFIG_ACPI */
  735. static int __init intel_pstate_init(void)
  736. {
  737. int cpu, rc = 0;
  738. const struct x86_cpu_id *id;
  739. struct cpu_defaults *cpu_info;
  740. if (no_load)
  741. return -ENODEV;
  742. id = x86_match_cpu(intel_pstate_cpu_ids);
  743. if (!id)
  744. return -ENODEV;
  745. /*
  746. * The Intel pstate driver will be ignored if the platform
  747. * firmware has its own power management modes.
  748. */
  749. if (intel_pstate_platform_pwr_mgmt_exists())
  750. return -ENODEV;
  751. cpu_info = (struct cpu_defaults *)id->driver_data;
  752. copy_pid_params(&cpu_info->pid_policy);
  753. copy_cpu_funcs(&cpu_info->funcs);
  754. if (intel_pstate_msrs_not_valid())
  755. return -ENODEV;
  756. pr_info("Intel P-state driver initializing.\n");
  757. all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
  758. if (!all_cpu_data)
  759. return -ENOMEM;
  760. rc = cpufreq_register_driver(&intel_pstate_driver);
  761. if (rc)
  762. goto out;
  763. intel_pstate_debug_expose_params();
  764. intel_pstate_sysfs_expose_params();
  765. return rc;
  766. out:
  767. get_online_cpus();
  768. for_each_online_cpu(cpu) {
  769. if (all_cpu_data[cpu]) {
  770. del_timer_sync(&all_cpu_data[cpu]->timer);
  771. kfree(all_cpu_data[cpu]);
  772. }
  773. }
  774. put_online_cpus();
  775. vfree(all_cpu_data);
  776. return -ENODEV;
  777. }
  778. device_initcall(intel_pstate_init);
  779. static int __init intel_pstate_setup(char *str)
  780. {
  781. if (!str)
  782. return -EINVAL;
  783. if (!strcmp(str, "disable"))
  784. no_load = 1;
  785. return 0;
  786. }
  787. early_param("intel_pstate", intel_pstate_setup);
  788. MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
  789. MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
  790. MODULE_LICENSE("GPL");