aesni-intel_glue.c 44 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/module.h>
  25. #include <linux/err.h>
  26. #include <crypto/algapi.h>
  27. #include <crypto/aes.h>
  28. #include <crypto/cryptd.h>
  29. #include <crypto/ctr.h>
  30. #include <crypto/b128ops.h>
  31. #include <crypto/lrw.h>
  32. #include <crypto/xts.h>
  33. #include <asm/cpu_device_id.h>
  34. #include <asm/i387.h>
  35. #include <asm/crypto/aes.h>
  36. #include <crypto/ablk_helper.h>
  37. #include <crypto/scatterwalk.h>
  38. #include <crypto/internal/aead.h>
  39. #include <linux/workqueue.h>
  40. #include <linux/spinlock.h>
  41. #ifdef CONFIG_X86_64
  42. #include <asm/crypto/glue_helper.h>
  43. #endif
  44. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  45. #define HAS_PCBC
  46. #endif
  47. /* This data is stored at the end of the crypto_tfm struct.
  48. * It's a type of per "session" data storage location.
  49. * This needs to be 16 byte aligned.
  50. */
  51. struct aesni_rfc4106_gcm_ctx {
  52. u8 hash_subkey[16];
  53. struct crypto_aes_ctx aes_key_expanded;
  54. u8 nonce[4];
  55. struct cryptd_aead *cryptd_tfm;
  56. };
  57. struct aesni_gcm_set_hash_subkey_result {
  58. int err;
  59. struct completion completion;
  60. };
  61. struct aesni_hash_subkey_req_data {
  62. u8 iv[16];
  63. struct aesni_gcm_set_hash_subkey_result result;
  64. struct scatterlist sg;
  65. };
  66. #define AESNI_ALIGN (16)
  67. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  68. #define RFC4106_HASH_SUBKEY_SIZE 16
  69. struct aesni_lrw_ctx {
  70. struct lrw_table_ctx lrw_table;
  71. u8 raw_aes_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  72. };
  73. struct aesni_xts_ctx {
  74. u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  75. u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  76. };
  77. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  78. unsigned int key_len);
  79. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  80. const u8 *in);
  81. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  82. const u8 *in);
  83. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  84. const u8 *in, unsigned int len);
  85. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  86. const u8 *in, unsigned int len);
  87. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  88. const u8 *in, unsigned int len, u8 *iv);
  89. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  90. const u8 *in, unsigned int len, u8 *iv);
  91. int crypto_fpu_init(void);
  92. void crypto_fpu_exit(void);
  93. #define AVX_GEN2_OPTSIZE 640
  94. #define AVX_GEN4_OPTSIZE 4096
  95. #ifdef CONFIG_X86_64
  96. static void (*aesni_ctr_enc_tfm)(struct crypto_aes_ctx *ctx, u8 *out,
  97. const u8 *in, unsigned int len, u8 *iv);
  98. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  99. const u8 *in, unsigned int len, u8 *iv);
  100. asmlinkage void aesni_xts_crypt8(struct crypto_aes_ctx *ctx, u8 *out,
  101. const u8 *in, bool enc, u8 *iv);
  102. /* asmlinkage void aesni_gcm_enc()
  103. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  104. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  105. * const u8 *in, Plaintext input
  106. * unsigned long plaintext_len, Length of data in bytes for encryption.
  107. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  108. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  109. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  110. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  111. * const u8 *aad, Additional Authentication Data (AAD)
  112. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  113. * is going to be 8 or 12 bytes
  114. * u8 *auth_tag, Authenticated Tag output.
  115. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  116. * Valid values are 16 (most likely), 12 or 8.
  117. */
  118. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  119. const u8 *in, unsigned long plaintext_len, u8 *iv,
  120. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  121. u8 *auth_tag, unsigned long auth_tag_len);
  122. /* asmlinkage void aesni_gcm_dec()
  123. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  124. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  125. * const u8 *in, Ciphertext input
  126. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  127. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  128. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  129. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  130. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  131. * const u8 *aad, Additional Authentication Data (AAD)
  132. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  133. * to be 8 or 12 bytes
  134. * u8 *auth_tag, Authenticated Tag output.
  135. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  136. * Valid values are 16 (most likely), 12 or 8.
  137. */
  138. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  139. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  140. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  141. u8 *auth_tag, unsigned long auth_tag_len);
  142. #ifdef CONFIG_AS_AVX
  143. asmlinkage void aes_ctr_enc_128_avx_by8(const u8 *in, u8 *iv,
  144. void *keys, u8 *out, unsigned int num_bytes);
  145. asmlinkage void aes_ctr_enc_192_avx_by8(const u8 *in, u8 *iv,
  146. void *keys, u8 *out, unsigned int num_bytes);
  147. asmlinkage void aes_ctr_enc_256_avx_by8(const u8 *in, u8 *iv,
  148. void *keys, u8 *out, unsigned int num_bytes);
  149. /*
  150. * asmlinkage void aesni_gcm_precomp_avx_gen2()
  151. * gcm_data *my_ctx_data, context data
  152. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  153. */
  154. asmlinkage void aesni_gcm_precomp_avx_gen2(void *my_ctx_data, u8 *hash_subkey);
  155. asmlinkage void aesni_gcm_enc_avx_gen2(void *ctx, u8 *out,
  156. const u8 *in, unsigned long plaintext_len, u8 *iv,
  157. const u8 *aad, unsigned long aad_len,
  158. u8 *auth_tag, unsigned long auth_tag_len);
  159. asmlinkage void aesni_gcm_dec_avx_gen2(void *ctx, u8 *out,
  160. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  161. const u8 *aad, unsigned long aad_len,
  162. u8 *auth_tag, unsigned long auth_tag_len);
  163. static void aesni_gcm_enc_avx(void *ctx, u8 *out,
  164. const u8 *in, unsigned long plaintext_len, u8 *iv,
  165. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  166. u8 *auth_tag, unsigned long auth_tag_len)
  167. {
  168. if (plaintext_len < AVX_GEN2_OPTSIZE) {
  169. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  170. aad_len, auth_tag, auth_tag_len);
  171. } else {
  172. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  173. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  174. aad_len, auth_tag, auth_tag_len);
  175. }
  176. }
  177. static void aesni_gcm_dec_avx(void *ctx, u8 *out,
  178. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  179. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  180. u8 *auth_tag, unsigned long auth_tag_len)
  181. {
  182. if (ciphertext_len < AVX_GEN2_OPTSIZE) {
  183. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey, aad,
  184. aad_len, auth_tag, auth_tag_len);
  185. } else {
  186. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  187. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  188. aad_len, auth_tag, auth_tag_len);
  189. }
  190. }
  191. #endif
  192. #ifdef CONFIG_AS_AVX2
  193. /*
  194. * asmlinkage void aesni_gcm_precomp_avx_gen4()
  195. * gcm_data *my_ctx_data, context data
  196. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  197. */
  198. asmlinkage void aesni_gcm_precomp_avx_gen4(void *my_ctx_data, u8 *hash_subkey);
  199. asmlinkage void aesni_gcm_enc_avx_gen4(void *ctx, u8 *out,
  200. const u8 *in, unsigned long plaintext_len, u8 *iv,
  201. const u8 *aad, unsigned long aad_len,
  202. u8 *auth_tag, unsigned long auth_tag_len);
  203. asmlinkage void aesni_gcm_dec_avx_gen4(void *ctx, u8 *out,
  204. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  205. const u8 *aad, unsigned long aad_len,
  206. u8 *auth_tag, unsigned long auth_tag_len);
  207. static void aesni_gcm_enc_avx2(void *ctx, u8 *out,
  208. const u8 *in, unsigned long plaintext_len, u8 *iv,
  209. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  210. u8 *auth_tag, unsigned long auth_tag_len)
  211. {
  212. if (plaintext_len < AVX_GEN2_OPTSIZE) {
  213. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  214. aad_len, auth_tag, auth_tag_len);
  215. } else if (plaintext_len < AVX_GEN4_OPTSIZE) {
  216. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  217. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  218. aad_len, auth_tag, auth_tag_len);
  219. } else {
  220. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  221. aesni_gcm_enc_avx_gen4(ctx, out, in, plaintext_len, iv, aad,
  222. aad_len, auth_tag, auth_tag_len);
  223. }
  224. }
  225. static void aesni_gcm_dec_avx2(void *ctx, u8 *out,
  226. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  227. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  228. u8 *auth_tag, unsigned long auth_tag_len)
  229. {
  230. if (ciphertext_len < AVX_GEN2_OPTSIZE) {
  231. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey,
  232. aad, aad_len, auth_tag, auth_tag_len);
  233. } else if (ciphertext_len < AVX_GEN4_OPTSIZE) {
  234. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  235. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  236. aad_len, auth_tag, auth_tag_len);
  237. } else {
  238. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  239. aesni_gcm_dec_avx_gen4(ctx, out, in, ciphertext_len, iv, aad,
  240. aad_len, auth_tag, auth_tag_len);
  241. }
  242. }
  243. #endif
  244. static void (*aesni_gcm_enc_tfm)(void *ctx, u8 *out,
  245. const u8 *in, unsigned long plaintext_len, u8 *iv,
  246. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  247. u8 *auth_tag, unsigned long auth_tag_len);
  248. static void (*aesni_gcm_dec_tfm)(void *ctx, u8 *out,
  249. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  250. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  251. u8 *auth_tag, unsigned long auth_tag_len);
  252. static inline struct
  253. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  254. {
  255. return
  256. (struct aesni_rfc4106_gcm_ctx *)
  257. PTR_ALIGN((u8 *)
  258. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  259. }
  260. #endif
  261. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  262. {
  263. unsigned long addr = (unsigned long)raw_ctx;
  264. unsigned long align = AESNI_ALIGN;
  265. if (align <= crypto_tfm_ctx_alignment())
  266. align = 1;
  267. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  268. }
  269. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  270. const u8 *in_key, unsigned int key_len)
  271. {
  272. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  273. u32 *flags = &tfm->crt_flags;
  274. int err;
  275. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  276. key_len != AES_KEYSIZE_256) {
  277. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  278. return -EINVAL;
  279. }
  280. if (!irq_fpu_usable())
  281. err = crypto_aes_expand_key(ctx, in_key, key_len);
  282. else {
  283. kernel_fpu_begin();
  284. err = aesni_set_key(ctx, in_key, key_len);
  285. kernel_fpu_end();
  286. }
  287. return err;
  288. }
  289. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  290. unsigned int key_len)
  291. {
  292. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  293. }
  294. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  295. {
  296. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  297. if (!irq_fpu_usable())
  298. crypto_aes_encrypt_x86(ctx, dst, src);
  299. else {
  300. kernel_fpu_begin();
  301. aesni_enc(ctx, dst, src);
  302. kernel_fpu_end();
  303. }
  304. }
  305. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  306. {
  307. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  308. if (!irq_fpu_usable())
  309. crypto_aes_decrypt_x86(ctx, dst, src);
  310. else {
  311. kernel_fpu_begin();
  312. aesni_dec(ctx, dst, src);
  313. kernel_fpu_end();
  314. }
  315. }
  316. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  317. {
  318. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  319. aesni_enc(ctx, dst, src);
  320. }
  321. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  322. {
  323. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  324. aesni_dec(ctx, dst, src);
  325. }
  326. static int ecb_encrypt(struct blkcipher_desc *desc,
  327. struct scatterlist *dst, struct scatterlist *src,
  328. unsigned int nbytes)
  329. {
  330. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  331. struct blkcipher_walk walk;
  332. int err;
  333. blkcipher_walk_init(&walk, dst, src, nbytes);
  334. err = blkcipher_walk_virt(desc, &walk);
  335. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  336. kernel_fpu_begin();
  337. while ((nbytes = walk.nbytes)) {
  338. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  339. nbytes & AES_BLOCK_MASK);
  340. nbytes &= AES_BLOCK_SIZE - 1;
  341. err = blkcipher_walk_done(desc, &walk, nbytes);
  342. }
  343. kernel_fpu_end();
  344. return err;
  345. }
  346. static int ecb_decrypt(struct blkcipher_desc *desc,
  347. struct scatterlist *dst, struct scatterlist *src,
  348. unsigned int nbytes)
  349. {
  350. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  351. struct blkcipher_walk walk;
  352. int err;
  353. blkcipher_walk_init(&walk, dst, src, nbytes);
  354. err = blkcipher_walk_virt(desc, &walk);
  355. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  356. kernel_fpu_begin();
  357. while ((nbytes = walk.nbytes)) {
  358. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  359. nbytes & AES_BLOCK_MASK);
  360. nbytes &= AES_BLOCK_SIZE - 1;
  361. err = blkcipher_walk_done(desc, &walk, nbytes);
  362. }
  363. kernel_fpu_end();
  364. return err;
  365. }
  366. static int cbc_encrypt(struct blkcipher_desc *desc,
  367. struct scatterlist *dst, struct scatterlist *src,
  368. unsigned int nbytes)
  369. {
  370. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  371. struct blkcipher_walk walk;
  372. int err;
  373. blkcipher_walk_init(&walk, dst, src, nbytes);
  374. err = blkcipher_walk_virt(desc, &walk);
  375. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  376. kernel_fpu_begin();
  377. while ((nbytes = walk.nbytes)) {
  378. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  379. nbytes & AES_BLOCK_MASK, walk.iv);
  380. nbytes &= AES_BLOCK_SIZE - 1;
  381. err = blkcipher_walk_done(desc, &walk, nbytes);
  382. }
  383. kernel_fpu_end();
  384. return err;
  385. }
  386. static int cbc_decrypt(struct blkcipher_desc *desc,
  387. struct scatterlist *dst, struct scatterlist *src,
  388. unsigned int nbytes)
  389. {
  390. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  391. struct blkcipher_walk walk;
  392. int err;
  393. blkcipher_walk_init(&walk, dst, src, nbytes);
  394. err = blkcipher_walk_virt(desc, &walk);
  395. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  396. kernel_fpu_begin();
  397. while ((nbytes = walk.nbytes)) {
  398. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  399. nbytes & AES_BLOCK_MASK, walk.iv);
  400. nbytes &= AES_BLOCK_SIZE - 1;
  401. err = blkcipher_walk_done(desc, &walk, nbytes);
  402. }
  403. kernel_fpu_end();
  404. return err;
  405. }
  406. #ifdef CONFIG_X86_64
  407. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  408. struct blkcipher_walk *walk)
  409. {
  410. u8 *ctrblk = walk->iv;
  411. u8 keystream[AES_BLOCK_SIZE];
  412. u8 *src = walk->src.virt.addr;
  413. u8 *dst = walk->dst.virt.addr;
  414. unsigned int nbytes = walk->nbytes;
  415. aesni_enc(ctx, keystream, ctrblk);
  416. crypto_xor(keystream, src, nbytes);
  417. memcpy(dst, keystream, nbytes);
  418. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  419. }
  420. #ifdef CONFIG_AS_AVX
  421. static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
  422. const u8 *in, unsigned int len, u8 *iv)
  423. {
  424. /*
  425. * based on key length, override with the by8 version
  426. * of ctr mode encryption/decryption for improved performance
  427. * aes_set_key_common() ensures that key length is one of
  428. * {128,192,256}
  429. */
  430. if (ctx->key_length == AES_KEYSIZE_128)
  431. aes_ctr_enc_128_avx_by8(in, iv, (void *)ctx, out, len);
  432. else if (ctx->key_length == AES_KEYSIZE_192)
  433. aes_ctr_enc_192_avx_by8(in, iv, (void *)ctx, out, len);
  434. else
  435. aes_ctr_enc_256_avx_by8(in, iv, (void *)ctx, out, len);
  436. }
  437. #endif
  438. static int ctr_crypt(struct blkcipher_desc *desc,
  439. struct scatterlist *dst, struct scatterlist *src,
  440. unsigned int nbytes)
  441. {
  442. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  443. struct blkcipher_walk walk;
  444. int err;
  445. blkcipher_walk_init(&walk, dst, src, nbytes);
  446. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  447. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  448. kernel_fpu_begin();
  449. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  450. aesni_ctr_enc_tfm(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  451. nbytes & AES_BLOCK_MASK, walk.iv);
  452. nbytes &= AES_BLOCK_SIZE - 1;
  453. err = blkcipher_walk_done(desc, &walk, nbytes);
  454. }
  455. if (walk.nbytes) {
  456. ctr_crypt_final(ctx, &walk);
  457. err = blkcipher_walk_done(desc, &walk, 0);
  458. }
  459. kernel_fpu_end();
  460. return err;
  461. }
  462. #endif
  463. static int ablk_ecb_init(struct crypto_tfm *tfm)
  464. {
  465. return ablk_init_common(tfm, "__driver-ecb-aes-aesni");
  466. }
  467. static int ablk_cbc_init(struct crypto_tfm *tfm)
  468. {
  469. return ablk_init_common(tfm, "__driver-cbc-aes-aesni");
  470. }
  471. #ifdef CONFIG_X86_64
  472. static int ablk_ctr_init(struct crypto_tfm *tfm)
  473. {
  474. return ablk_init_common(tfm, "__driver-ctr-aes-aesni");
  475. }
  476. #endif
  477. #ifdef HAS_PCBC
  478. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  479. {
  480. return ablk_init_common(tfm, "fpu(pcbc(__driver-aes-aesni))");
  481. }
  482. #endif
  483. static void lrw_xts_encrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  484. {
  485. aesni_ecb_enc(ctx, blks, blks, nbytes);
  486. }
  487. static void lrw_xts_decrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  488. {
  489. aesni_ecb_dec(ctx, blks, blks, nbytes);
  490. }
  491. static int lrw_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  492. unsigned int keylen)
  493. {
  494. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  495. int err;
  496. err = aes_set_key_common(tfm, ctx->raw_aes_ctx, key,
  497. keylen - AES_BLOCK_SIZE);
  498. if (err)
  499. return err;
  500. return lrw_init_table(&ctx->lrw_table, key + keylen - AES_BLOCK_SIZE);
  501. }
  502. static void lrw_aesni_exit_tfm(struct crypto_tfm *tfm)
  503. {
  504. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  505. lrw_free_table(&ctx->lrw_table);
  506. }
  507. static int lrw_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  508. struct scatterlist *src, unsigned int nbytes)
  509. {
  510. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  511. be128 buf[8];
  512. struct lrw_crypt_req req = {
  513. .tbuf = buf,
  514. .tbuflen = sizeof(buf),
  515. .table_ctx = &ctx->lrw_table,
  516. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  517. .crypt_fn = lrw_xts_encrypt_callback,
  518. };
  519. int ret;
  520. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  521. kernel_fpu_begin();
  522. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  523. kernel_fpu_end();
  524. return ret;
  525. }
  526. static int lrw_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  527. struct scatterlist *src, unsigned int nbytes)
  528. {
  529. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  530. be128 buf[8];
  531. struct lrw_crypt_req req = {
  532. .tbuf = buf,
  533. .tbuflen = sizeof(buf),
  534. .table_ctx = &ctx->lrw_table,
  535. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  536. .crypt_fn = lrw_xts_decrypt_callback,
  537. };
  538. int ret;
  539. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  540. kernel_fpu_begin();
  541. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  542. kernel_fpu_end();
  543. return ret;
  544. }
  545. static int xts_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  546. unsigned int keylen)
  547. {
  548. struct aesni_xts_ctx *ctx = crypto_tfm_ctx(tfm);
  549. u32 *flags = &tfm->crt_flags;
  550. int err;
  551. /* key consists of keys of equal size concatenated, therefore
  552. * the length must be even
  553. */
  554. if (keylen % 2) {
  555. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  556. return -EINVAL;
  557. }
  558. /* first half of xts-key is for crypt */
  559. err = aes_set_key_common(tfm, ctx->raw_crypt_ctx, key, keylen / 2);
  560. if (err)
  561. return err;
  562. /* second half of xts-key is for tweak */
  563. return aes_set_key_common(tfm, ctx->raw_tweak_ctx, key + keylen / 2,
  564. keylen / 2);
  565. }
  566. static void aesni_xts_tweak(void *ctx, u8 *out, const u8 *in)
  567. {
  568. aesni_enc(ctx, out, in);
  569. }
  570. #ifdef CONFIG_X86_64
  571. static void aesni_xts_enc(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  572. {
  573. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_enc));
  574. }
  575. static void aesni_xts_dec(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  576. {
  577. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_dec));
  578. }
  579. static void aesni_xts_enc8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  580. {
  581. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, true, (u8 *)iv);
  582. }
  583. static void aesni_xts_dec8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  584. {
  585. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, false, (u8 *)iv);
  586. }
  587. static const struct common_glue_ctx aesni_enc_xts = {
  588. .num_funcs = 2,
  589. .fpu_blocks_limit = 1,
  590. .funcs = { {
  591. .num_blocks = 8,
  592. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc8) }
  593. }, {
  594. .num_blocks = 1,
  595. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc) }
  596. } }
  597. };
  598. static const struct common_glue_ctx aesni_dec_xts = {
  599. .num_funcs = 2,
  600. .fpu_blocks_limit = 1,
  601. .funcs = { {
  602. .num_blocks = 8,
  603. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec8) }
  604. }, {
  605. .num_blocks = 1,
  606. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec) }
  607. } }
  608. };
  609. static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  610. struct scatterlist *src, unsigned int nbytes)
  611. {
  612. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  613. return glue_xts_crypt_128bit(&aesni_enc_xts, desc, dst, src, nbytes,
  614. XTS_TWEAK_CAST(aesni_xts_tweak),
  615. aes_ctx(ctx->raw_tweak_ctx),
  616. aes_ctx(ctx->raw_crypt_ctx));
  617. }
  618. static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  619. struct scatterlist *src, unsigned int nbytes)
  620. {
  621. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  622. return glue_xts_crypt_128bit(&aesni_dec_xts, desc, dst, src, nbytes,
  623. XTS_TWEAK_CAST(aesni_xts_tweak),
  624. aes_ctx(ctx->raw_tweak_ctx),
  625. aes_ctx(ctx->raw_crypt_ctx));
  626. }
  627. #else
  628. static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  629. struct scatterlist *src, unsigned int nbytes)
  630. {
  631. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  632. be128 buf[8];
  633. struct xts_crypt_req req = {
  634. .tbuf = buf,
  635. .tbuflen = sizeof(buf),
  636. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  637. .tweak_fn = aesni_xts_tweak,
  638. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  639. .crypt_fn = lrw_xts_encrypt_callback,
  640. };
  641. int ret;
  642. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  643. kernel_fpu_begin();
  644. ret = xts_crypt(desc, dst, src, nbytes, &req);
  645. kernel_fpu_end();
  646. return ret;
  647. }
  648. static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  649. struct scatterlist *src, unsigned int nbytes)
  650. {
  651. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  652. be128 buf[8];
  653. struct xts_crypt_req req = {
  654. .tbuf = buf,
  655. .tbuflen = sizeof(buf),
  656. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  657. .tweak_fn = aesni_xts_tweak,
  658. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  659. .crypt_fn = lrw_xts_decrypt_callback,
  660. };
  661. int ret;
  662. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  663. kernel_fpu_begin();
  664. ret = xts_crypt(desc, dst, src, nbytes, &req);
  665. kernel_fpu_end();
  666. return ret;
  667. }
  668. #endif
  669. #ifdef CONFIG_X86_64
  670. static int rfc4106_init(struct crypto_tfm *tfm)
  671. {
  672. struct cryptd_aead *cryptd_tfm;
  673. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  674. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  675. struct crypto_aead *cryptd_child;
  676. struct aesni_rfc4106_gcm_ctx *child_ctx;
  677. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  678. if (IS_ERR(cryptd_tfm))
  679. return PTR_ERR(cryptd_tfm);
  680. cryptd_child = cryptd_aead_child(cryptd_tfm);
  681. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  682. memcpy(child_ctx, ctx, sizeof(*ctx));
  683. ctx->cryptd_tfm = cryptd_tfm;
  684. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  685. + crypto_aead_reqsize(&cryptd_tfm->base);
  686. return 0;
  687. }
  688. static void rfc4106_exit(struct crypto_tfm *tfm)
  689. {
  690. struct aesni_rfc4106_gcm_ctx *ctx =
  691. (struct aesni_rfc4106_gcm_ctx *)
  692. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  693. if (!IS_ERR(ctx->cryptd_tfm))
  694. cryptd_free_aead(ctx->cryptd_tfm);
  695. return;
  696. }
  697. static void
  698. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  699. {
  700. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  701. if (err == -EINPROGRESS)
  702. return;
  703. result->err = err;
  704. complete(&result->completion);
  705. }
  706. static int
  707. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  708. {
  709. struct crypto_ablkcipher *ctr_tfm;
  710. struct ablkcipher_request *req;
  711. int ret = -EINVAL;
  712. struct aesni_hash_subkey_req_data *req_data;
  713. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  714. if (IS_ERR(ctr_tfm))
  715. return PTR_ERR(ctr_tfm);
  716. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  717. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  718. if (ret)
  719. goto out_free_ablkcipher;
  720. ret = -ENOMEM;
  721. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  722. if (!req)
  723. goto out_free_ablkcipher;
  724. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  725. if (!req_data)
  726. goto out_free_request;
  727. memset(req_data->iv, 0, sizeof(req_data->iv));
  728. /* Clear the data in the hash sub key container to zero.*/
  729. /* We want to cipher all zeros to create the hash sub key. */
  730. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  731. init_completion(&req_data->result.completion);
  732. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  733. ablkcipher_request_set_tfm(req, ctr_tfm);
  734. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  735. CRYPTO_TFM_REQ_MAY_BACKLOG,
  736. rfc4106_set_hash_subkey_done,
  737. &req_data->result);
  738. ablkcipher_request_set_crypt(req, &req_data->sg,
  739. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  740. ret = crypto_ablkcipher_encrypt(req);
  741. if (ret == -EINPROGRESS || ret == -EBUSY) {
  742. ret = wait_for_completion_interruptible
  743. (&req_data->result.completion);
  744. if (!ret)
  745. ret = req_data->result.err;
  746. }
  747. kfree(req_data);
  748. out_free_request:
  749. ablkcipher_request_free(req);
  750. out_free_ablkcipher:
  751. crypto_free_ablkcipher(ctr_tfm);
  752. return ret;
  753. }
  754. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  755. unsigned int key_len)
  756. {
  757. int ret = 0;
  758. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  759. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  760. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  761. struct aesni_rfc4106_gcm_ctx *child_ctx =
  762. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  763. u8 *new_key_align, *new_key_mem = NULL;
  764. if (key_len < 4) {
  765. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  766. return -EINVAL;
  767. }
  768. /*Account for 4 byte nonce at the end.*/
  769. key_len -= 4;
  770. if (key_len != AES_KEYSIZE_128) {
  771. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  772. return -EINVAL;
  773. }
  774. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  775. /*This must be on a 16 byte boundary!*/
  776. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  777. return -EINVAL;
  778. if ((unsigned long)key % AESNI_ALIGN) {
  779. /*key is not aligned: use an auxuliar aligned pointer*/
  780. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  781. if (!new_key_mem)
  782. return -ENOMEM;
  783. new_key_align = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  784. memcpy(new_key_align, key, key_len);
  785. key = new_key_align;
  786. }
  787. if (!irq_fpu_usable())
  788. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  789. key, key_len);
  790. else {
  791. kernel_fpu_begin();
  792. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  793. kernel_fpu_end();
  794. }
  795. /*This must be on a 16 byte boundary!*/
  796. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  797. ret = -EINVAL;
  798. goto exit;
  799. }
  800. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  801. memcpy(child_ctx, ctx, sizeof(*ctx));
  802. exit:
  803. kfree(new_key_mem);
  804. return ret;
  805. }
  806. /* This is the Integrity Check Value (aka the authentication tag length and can
  807. * be 8, 12 or 16 bytes long. */
  808. static int rfc4106_set_authsize(struct crypto_aead *parent,
  809. unsigned int authsize)
  810. {
  811. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  812. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  813. switch (authsize) {
  814. case 8:
  815. case 12:
  816. case 16:
  817. break;
  818. default:
  819. return -EINVAL;
  820. }
  821. crypto_aead_crt(parent)->authsize = authsize;
  822. crypto_aead_crt(cryptd_child)->authsize = authsize;
  823. return 0;
  824. }
  825. static int rfc4106_encrypt(struct aead_request *req)
  826. {
  827. int ret;
  828. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  829. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  830. if (!irq_fpu_usable()) {
  831. struct aead_request *cryptd_req =
  832. (struct aead_request *) aead_request_ctx(req);
  833. memcpy(cryptd_req, req, sizeof(*req));
  834. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  835. return crypto_aead_encrypt(cryptd_req);
  836. } else {
  837. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  838. kernel_fpu_begin();
  839. ret = cryptd_child->base.crt_aead.encrypt(req);
  840. kernel_fpu_end();
  841. return ret;
  842. }
  843. }
  844. static int rfc4106_decrypt(struct aead_request *req)
  845. {
  846. int ret;
  847. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  848. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  849. if (!irq_fpu_usable()) {
  850. struct aead_request *cryptd_req =
  851. (struct aead_request *) aead_request_ctx(req);
  852. memcpy(cryptd_req, req, sizeof(*req));
  853. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  854. return crypto_aead_decrypt(cryptd_req);
  855. } else {
  856. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  857. kernel_fpu_begin();
  858. ret = cryptd_child->base.crt_aead.decrypt(req);
  859. kernel_fpu_end();
  860. return ret;
  861. }
  862. }
  863. static int __driver_rfc4106_encrypt(struct aead_request *req)
  864. {
  865. u8 one_entry_in_sg = 0;
  866. u8 *src, *dst, *assoc;
  867. __be32 counter = cpu_to_be32(1);
  868. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  869. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  870. void *aes_ctx = &(ctx->aes_key_expanded);
  871. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  872. u8 iv_tab[16+AESNI_ALIGN];
  873. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  874. struct scatter_walk src_sg_walk;
  875. struct scatter_walk assoc_sg_walk;
  876. struct scatter_walk dst_sg_walk;
  877. unsigned int i;
  878. /* Assuming we are supporting rfc4106 64-bit extended */
  879. /* sequence numbers We need to have the AAD length equal */
  880. /* to 8 or 12 bytes */
  881. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  882. return -EINVAL;
  883. /* IV below built */
  884. for (i = 0; i < 4; i++)
  885. *(iv+i) = ctx->nonce[i];
  886. for (i = 0; i < 8; i++)
  887. *(iv+4+i) = req->iv[i];
  888. *((__be32 *)(iv+12)) = counter;
  889. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  890. one_entry_in_sg = 1;
  891. scatterwalk_start(&src_sg_walk, req->src);
  892. scatterwalk_start(&assoc_sg_walk, req->assoc);
  893. src = scatterwalk_map(&src_sg_walk);
  894. assoc = scatterwalk_map(&assoc_sg_walk);
  895. dst = src;
  896. if (unlikely(req->src != req->dst)) {
  897. scatterwalk_start(&dst_sg_walk, req->dst);
  898. dst = scatterwalk_map(&dst_sg_walk);
  899. }
  900. } else {
  901. /* Allocate memory for src, dst, assoc */
  902. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  903. GFP_ATOMIC);
  904. if (unlikely(!src))
  905. return -ENOMEM;
  906. assoc = (src + req->cryptlen + auth_tag_len);
  907. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  908. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  909. req->assoclen, 0);
  910. dst = src;
  911. }
  912. aesni_gcm_enc_tfm(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  913. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  914. + ((unsigned long)req->cryptlen), auth_tag_len);
  915. /* The authTag (aka the Integrity Check Value) needs to be written
  916. * back to the packet. */
  917. if (one_entry_in_sg) {
  918. if (unlikely(req->src != req->dst)) {
  919. scatterwalk_unmap(dst);
  920. scatterwalk_done(&dst_sg_walk, 0, 0);
  921. }
  922. scatterwalk_unmap(src);
  923. scatterwalk_unmap(assoc);
  924. scatterwalk_done(&src_sg_walk, 0, 0);
  925. scatterwalk_done(&assoc_sg_walk, 0, 0);
  926. } else {
  927. scatterwalk_map_and_copy(dst, req->dst, 0,
  928. req->cryptlen + auth_tag_len, 1);
  929. kfree(src);
  930. }
  931. return 0;
  932. }
  933. static int __driver_rfc4106_decrypt(struct aead_request *req)
  934. {
  935. u8 one_entry_in_sg = 0;
  936. u8 *src, *dst, *assoc;
  937. unsigned long tempCipherLen = 0;
  938. __be32 counter = cpu_to_be32(1);
  939. int retval = 0;
  940. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  941. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  942. void *aes_ctx = &(ctx->aes_key_expanded);
  943. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  944. u8 iv_and_authTag[32+AESNI_ALIGN];
  945. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  946. u8 *authTag = iv + 16;
  947. struct scatter_walk src_sg_walk;
  948. struct scatter_walk assoc_sg_walk;
  949. struct scatter_walk dst_sg_walk;
  950. unsigned int i;
  951. if (unlikely((req->cryptlen < auth_tag_len) ||
  952. (req->assoclen != 8 && req->assoclen != 12)))
  953. return -EINVAL;
  954. /* Assuming we are supporting rfc4106 64-bit extended */
  955. /* sequence numbers We need to have the AAD length */
  956. /* equal to 8 or 12 bytes */
  957. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  958. /* IV below built */
  959. for (i = 0; i < 4; i++)
  960. *(iv+i) = ctx->nonce[i];
  961. for (i = 0; i < 8; i++)
  962. *(iv+4+i) = req->iv[i];
  963. *((__be32 *)(iv+12)) = counter;
  964. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  965. one_entry_in_sg = 1;
  966. scatterwalk_start(&src_sg_walk, req->src);
  967. scatterwalk_start(&assoc_sg_walk, req->assoc);
  968. src = scatterwalk_map(&src_sg_walk);
  969. assoc = scatterwalk_map(&assoc_sg_walk);
  970. dst = src;
  971. if (unlikely(req->src != req->dst)) {
  972. scatterwalk_start(&dst_sg_walk, req->dst);
  973. dst = scatterwalk_map(&dst_sg_walk);
  974. }
  975. } else {
  976. /* Allocate memory for src, dst, assoc */
  977. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  978. if (!src)
  979. return -ENOMEM;
  980. assoc = (src + req->cryptlen + auth_tag_len);
  981. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  982. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  983. req->assoclen, 0);
  984. dst = src;
  985. }
  986. aesni_gcm_dec_tfm(aes_ctx, dst, src, tempCipherLen, iv,
  987. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  988. authTag, auth_tag_len);
  989. /* Compare generated tag with passed in tag. */
  990. retval = crypto_memneq(src + tempCipherLen, authTag, auth_tag_len) ?
  991. -EBADMSG : 0;
  992. if (one_entry_in_sg) {
  993. if (unlikely(req->src != req->dst)) {
  994. scatterwalk_unmap(dst);
  995. scatterwalk_done(&dst_sg_walk, 0, 0);
  996. }
  997. scatterwalk_unmap(src);
  998. scatterwalk_unmap(assoc);
  999. scatterwalk_done(&src_sg_walk, 0, 0);
  1000. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1001. } else {
  1002. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  1003. kfree(src);
  1004. }
  1005. return retval;
  1006. }
  1007. #endif
  1008. static struct crypto_alg aesni_algs[] = { {
  1009. .cra_name = "aes",
  1010. .cra_driver_name = "aes-aesni",
  1011. .cra_priority = 300,
  1012. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  1013. .cra_blocksize = AES_BLOCK_SIZE,
  1014. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1015. AESNI_ALIGN - 1,
  1016. .cra_alignmask = 0,
  1017. .cra_module = THIS_MODULE,
  1018. .cra_u = {
  1019. .cipher = {
  1020. .cia_min_keysize = AES_MIN_KEY_SIZE,
  1021. .cia_max_keysize = AES_MAX_KEY_SIZE,
  1022. .cia_setkey = aes_set_key,
  1023. .cia_encrypt = aes_encrypt,
  1024. .cia_decrypt = aes_decrypt
  1025. }
  1026. }
  1027. }, {
  1028. .cra_name = "__aes-aesni",
  1029. .cra_driver_name = "__driver-aes-aesni",
  1030. .cra_priority = 0,
  1031. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  1032. .cra_blocksize = AES_BLOCK_SIZE,
  1033. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1034. AESNI_ALIGN - 1,
  1035. .cra_alignmask = 0,
  1036. .cra_module = THIS_MODULE,
  1037. .cra_u = {
  1038. .cipher = {
  1039. .cia_min_keysize = AES_MIN_KEY_SIZE,
  1040. .cia_max_keysize = AES_MAX_KEY_SIZE,
  1041. .cia_setkey = aes_set_key,
  1042. .cia_encrypt = __aes_encrypt,
  1043. .cia_decrypt = __aes_decrypt
  1044. }
  1045. }
  1046. }, {
  1047. .cra_name = "__ecb-aes-aesni",
  1048. .cra_driver_name = "__driver-ecb-aes-aesni",
  1049. .cra_priority = 0,
  1050. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1051. .cra_blocksize = AES_BLOCK_SIZE,
  1052. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1053. AESNI_ALIGN - 1,
  1054. .cra_alignmask = 0,
  1055. .cra_type = &crypto_blkcipher_type,
  1056. .cra_module = THIS_MODULE,
  1057. .cra_u = {
  1058. .blkcipher = {
  1059. .min_keysize = AES_MIN_KEY_SIZE,
  1060. .max_keysize = AES_MAX_KEY_SIZE,
  1061. .setkey = aes_set_key,
  1062. .encrypt = ecb_encrypt,
  1063. .decrypt = ecb_decrypt,
  1064. },
  1065. },
  1066. }, {
  1067. .cra_name = "__cbc-aes-aesni",
  1068. .cra_driver_name = "__driver-cbc-aes-aesni",
  1069. .cra_priority = 0,
  1070. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1071. .cra_blocksize = AES_BLOCK_SIZE,
  1072. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1073. AESNI_ALIGN - 1,
  1074. .cra_alignmask = 0,
  1075. .cra_type = &crypto_blkcipher_type,
  1076. .cra_module = THIS_MODULE,
  1077. .cra_u = {
  1078. .blkcipher = {
  1079. .min_keysize = AES_MIN_KEY_SIZE,
  1080. .max_keysize = AES_MAX_KEY_SIZE,
  1081. .setkey = aes_set_key,
  1082. .encrypt = cbc_encrypt,
  1083. .decrypt = cbc_decrypt,
  1084. },
  1085. },
  1086. }, {
  1087. .cra_name = "ecb(aes)",
  1088. .cra_driver_name = "ecb-aes-aesni",
  1089. .cra_priority = 400,
  1090. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1091. .cra_blocksize = AES_BLOCK_SIZE,
  1092. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1093. .cra_alignmask = 0,
  1094. .cra_type = &crypto_ablkcipher_type,
  1095. .cra_module = THIS_MODULE,
  1096. .cra_init = ablk_ecb_init,
  1097. .cra_exit = ablk_exit,
  1098. .cra_u = {
  1099. .ablkcipher = {
  1100. .min_keysize = AES_MIN_KEY_SIZE,
  1101. .max_keysize = AES_MAX_KEY_SIZE,
  1102. .setkey = ablk_set_key,
  1103. .encrypt = ablk_encrypt,
  1104. .decrypt = ablk_decrypt,
  1105. },
  1106. },
  1107. }, {
  1108. .cra_name = "cbc(aes)",
  1109. .cra_driver_name = "cbc-aes-aesni",
  1110. .cra_priority = 400,
  1111. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1112. .cra_blocksize = AES_BLOCK_SIZE,
  1113. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1114. .cra_alignmask = 0,
  1115. .cra_type = &crypto_ablkcipher_type,
  1116. .cra_module = THIS_MODULE,
  1117. .cra_init = ablk_cbc_init,
  1118. .cra_exit = ablk_exit,
  1119. .cra_u = {
  1120. .ablkcipher = {
  1121. .min_keysize = AES_MIN_KEY_SIZE,
  1122. .max_keysize = AES_MAX_KEY_SIZE,
  1123. .ivsize = AES_BLOCK_SIZE,
  1124. .setkey = ablk_set_key,
  1125. .encrypt = ablk_encrypt,
  1126. .decrypt = ablk_decrypt,
  1127. },
  1128. },
  1129. #ifdef CONFIG_X86_64
  1130. }, {
  1131. .cra_name = "__ctr-aes-aesni",
  1132. .cra_driver_name = "__driver-ctr-aes-aesni",
  1133. .cra_priority = 0,
  1134. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1135. .cra_blocksize = 1,
  1136. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1137. AESNI_ALIGN - 1,
  1138. .cra_alignmask = 0,
  1139. .cra_type = &crypto_blkcipher_type,
  1140. .cra_module = THIS_MODULE,
  1141. .cra_u = {
  1142. .blkcipher = {
  1143. .min_keysize = AES_MIN_KEY_SIZE,
  1144. .max_keysize = AES_MAX_KEY_SIZE,
  1145. .ivsize = AES_BLOCK_SIZE,
  1146. .setkey = aes_set_key,
  1147. .encrypt = ctr_crypt,
  1148. .decrypt = ctr_crypt,
  1149. },
  1150. },
  1151. }, {
  1152. .cra_name = "ctr(aes)",
  1153. .cra_driver_name = "ctr-aes-aesni",
  1154. .cra_priority = 400,
  1155. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1156. .cra_blocksize = 1,
  1157. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1158. .cra_alignmask = 0,
  1159. .cra_type = &crypto_ablkcipher_type,
  1160. .cra_module = THIS_MODULE,
  1161. .cra_init = ablk_ctr_init,
  1162. .cra_exit = ablk_exit,
  1163. .cra_u = {
  1164. .ablkcipher = {
  1165. .min_keysize = AES_MIN_KEY_SIZE,
  1166. .max_keysize = AES_MAX_KEY_SIZE,
  1167. .ivsize = AES_BLOCK_SIZE,
  1168. .setkey = ablk_set_key,
  1169. .encrypt = ablk_encrypt,
  1170. .decrypt = ablk_encrypt,
  1171. .geniv = "chainiv",
  1172. },
  1173. },
  1174. }, {
  1175. .cra_name = "__gcm-aes-aesni",
  1176. .cra_driver_name = "__driver-gcm-aes-aesni",
  1177. .cra_priority = 0,
  1178. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  1179. .cra_blocksize = 1,
  1180. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  1181. AESNI_ALIGN,
  1182. .cra_alignmask = 0,
  1183. .cra_type = &crypto_aead_type,
  1184. .cra_module = THIS_MODULE,
  1185. .cra_u = {
  1186. .aead = {
  1187. .encrypt = __driver_rfc4106_encrypt,
  1188. .decrypt = __driver_rfc4106_decrypt,
  1189. },
  1190. },
  1191. }, {
  1192. .cra_name = "rfc4106(gcm(aes))",
  1193. .cra_driver_name = "rfc4106-gcm-aesni",
  1194. .cra_priority = 400,
  1195. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  1196. .cra_blocksize = 1,
  1197. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  1198. AESNI_ALIGN,
  1199. .cra_alignmask = 0,
  1200. .cra_type = &crypto_nivaead_type,
  1201. .cra_module = THIS_MODULE,
  1202. .cra_init = rfc4106_init,
  1203. .cra_exit = rfc4106_exit,
  1204. .cra_u = {
  1205. .aead = {
  1206. .setkey = rfc4106_set_key,
  1207. .setauthsize = rfc4106_set_authsize,
  1208. .encrypt = rfc4106_encrypt,
  1209. .decrypt = rfc4106_decrypt,
  1210. .geniv = "seqiv",
  1211. .ivsize = 8,
  1212. .maxauthsize = 16,
  1213. },
  1214. },
  1215. #endif
  1216. #ifdef HAS_PCBC
  1217. }, {
  1218. .cra_name = "pcbc(aes)",
  1219. .cra_driver_name = "pcbc-aes-aesni",
  1220. .cra_priority = 400,
  1221. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1222. .cra_blocksize = AES_BLOCK_SIZE,
  1223. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1224. .cra_alignmask = 0,
  1225. .cra_type = &crypto_ablkcipher_type,
  1226. .cra_module = THIS_MODULE,
  1227. .cra_init = ablk_pcbc_init,
  1228. .cra_exit = ablk_exit,
  1229. .cra_u = {
  1230. .ablkcipher = {
  1231. .min_keysize = AES_MIN_KEY_SIZE,
  1232. .max_keysize = AES_MAX_KEY_SIZE,
  1233. .ivsize = AES_BLOCK_SIZE,
  1234. .setkey = ablk_set_key,
  1235. .encrypt = ablk_encrypt,
  1236. .decrypt = ablk_decrypt,
  1237. },
  1238. },
  1239. #endif
  1240. }, {
  1241. .cra_name = "__lrw-aes-aesni",
  1242. .cra_driver_name = "__driver-lrw-aes-aesni",
  1243. .cra_priority = 0,
  1244. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1245. .cra_blocksize = AES_BLOCK_SIZE,
  1246. .cra_ctxsize = sizeof(struct aesni_lrw_ctx),
  1247. .cra_alignmask = 0,
  1248. .cra_type = &crypto_blkcipher_type,
  1249. .cra_module = THIS_MODULE,
  1250. .cra_exit = lrw_aesni_exit_tfm,
  1251. .cra_u = {
  1252. .blkcipher = {
  1253. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1254. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1255. .ivsize = AES_BLOCK_SIZE,
  1256. .setkey = lrw_aesni_setkey,
  1257. .encrypt = lrw_encrypt,
  1258. .decrypt = lrw_decrypt,
  1259. },
  1260. },
  1261. }, {
  1262. .cra_name = "__xts-aes-aesni",
  1263. .cra_driver_name = "__driver-xts-aes-aesni",
  1264. .cra_priority = 0,
  1265. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1266. .cra_blocksize = AES_BLOCK_SIZE,
  1267. .cra_ctxsize = sizeof(struct aesni_xts_ctx),
  1268. .cra_alignmask = 0,
  1269. .cra_type = &crypto_blkcipher_type,
  1270. .cra_module = THIS_MODULE,
  1271. .cra_u = {
  1272. .blkcipher = {
  1273. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1274. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1275. .ivsize = AES_BLOCK_SIZE,
  1276. .setkey = xts_aesni_setkey,
  1277. .encrypt = xts_encrypt,
  1278. .decrypt = xts_decrypt,
  1279. },
  1280. },
  1281. }, {
  1282. .cra_name = "lrw(aes)",
  1283. .cra_driver_name = "lrw-aes-aesni",
  1284. .cra_priority = 400,
  1285. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1286. .cra_blocksize = AES_BLOCK_SIZE,
  1287. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1288. .cra_alignmask = 0,
  1289. .cra_type = &crypto_ablkcipher_type,
  1290. .cra_module = THIS_MODULE,
  1291. .cra_init = ablk_init,
  1292. .cra_exit = ablk_exit,
  1293. .cra_u = {
  1294. .ablkcipher = {
  1295. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1296. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1297. .ivsize = AES_BLOCK_SIZE,
  1298. .setkey = ablk_set_key,
  1299. .encrypt = ablk_encrypt,
  1300. .decrypt = ablk_decrypt,
  1301. },
  1302. },
  1303. }, {
  1304. .cra_name = "xts(aes)",
  1305. .cra_driver_name = "xts-aes-aesni",
  1306. .cra_priority = 400,
  1307. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1308. .cra_blocksize = AES_BLOCK_SIZE,
  1309. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1310. .cra_alignmask = 0,
  1311. .cra_type = &crypto_ablkcipher_type,
  1312. .cra_module = THIS_MODULE,
  1313. .cra_init = ablk_init,
  1314. .cra_exit = ablk_exit,
  1315. .cra_u = {
  1316. .ablkcipher = {
  1317. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1318. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1319. .ivsize = AES_BLOCK_SIZE,
  1320. .setkey = ablk_set_key,
  1321. .encrypt = ablk_encrypt,
  1322. .decrypt = ablk_decrypt,
  1323. },
  1324. },
  1325. } };
  1326. static const struct x86_cpu_id aesni_cpu_id[] = {
  1327. X86_FEATURE_MATCH(X86_FEATURE_AES),
  1328. {}
  1329. };
  1330. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1331. static int __init aesni_init(void)
  1332. {
  1333. int err;
  1334. if (!x86_match_cpu(aesni_cpu_id))
  1335. return -ENODEV;
  1336. #ifdef CONFIG_X86_64
  1337. #ifdef CONFIG_AS_AVX2
  1338. if (boot_cpu_has(X86_FEATURE_AVX2)) {
  1339. pr_info("AVX2 version of gcm_enc/dec engaged.\n");
  1340. aesni_gcm_enc_tfm = aesni_gcm_enc_avx2;
  1341. aesni_gcm_dec_tfm = aesni_gcm_dec_avx2;
  1342. } else
  1343. #endif
  1344. #ifdef CONFIG_AS_AVX
  1345. if (boot_cpu_has(X86_FEATURE_AVX)) {
  1346. pr_info("AVX version of gcm_enc/dec engaged.\n");
  1347. aesni_gcm_enc_tfm = aesni_gcm_enc_avx;
  1348. aesni_gcm_dec_tfm = aesni_gcm_dec_avx;
  1349. } else
  1350. #endif
  1351. {
  1352. pr_info("SSE version of gcm_enc/dec engaged.\n");
  1353. aesni_gcm_enc_tfm = aesni_gcm_enc;
  1354. aesni_gcm_dec_tfm = aesni_gcm_dec;
  1355. }
  1356. aesni_ctr_enc_tfm = aesni_ctr_enc;
  1357. #ifdef CONFIG_AS_AVX
  1358. if (cpu_has_avx) {
  1359. /* optimize performance of ctr mode encryption transform */
  1360. aesni_ctr_enc_tfm = aesni_ctr_enc_avx_tfm;
  1361. pr_info("AES CTR mode by8 optimization enabled\n");
  1362. }
  1363. #endif
  1364. #endif
  1365. err = crypto_fpu_init();
  1366. if (err)
  1367. return err;
  1368. return crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1369. }
  1370. static void __exit aesni_exit(void)
  1371. {
  1372. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1373. crypto_fpu_exit();
  1374. }
  1375. module_init(aesni_init);
  1376. module_exit(aesni_exit);
  1377. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1378. MODULE_LICENSE("GPL");
  1379. MODULE_ALIAS("aes");