uprobes.c 8.2 KB

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  1. /*
  2. * User-space Probes (UProbes) for s390
  3. *
  4. * Copyright IBM Corp. 2014
  5. * Author(s): Jan Willeke,
  6. */
  7. #include <linux/kprobes.h>
  8. #include <linux/uaccess.h>
  9. #include <linux/uprobes.h>
  10. #include <linux/compat.h>
  11. #include <linux/kdebug.h>
  12. #include <asm/switch_to.h>
  13. #include <asm/facility.h>
  14. #include <asm/dis.h>
  15. #include "entry.h"
  16. #define UPROBE_TRAP_NR UINT_MAX
  17. int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,
  18. unsigned long addr)
  19. {
  20. return probe_is_prohibited_opcode(auprobe->insn);
  21. }
  22. int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
  23. {
  24. if (psw_bits(regs->psw).eaba == PSW_AMODE_24BIT)
  25. return -EINVAL;
  26. if (!is_compat_task() && psw_bits(regs->psw).eaba == PSW_AMODE_31BIT)
  27. return -EINVAL;
  28. clear_pt_regs_flag(regs, PIF_PER_TRAP);
  29. auprobe->saved_per = psw_bits(regs->psw).r;
  30. auprobe->saved_int_code = regs->int_code;
  31. regs->int_code = UPROBE_TRAP_NR;
  32. regs->psw.addr = current->utask->xol_vaddr;
  33. set_tsk_thread_flag(current, TIF_UPROBE_SINGLESTEP);
  34. update_cr_regs(current);
  35. return 0;
  36. }
  37. bool arch_uprobe_xol_was_trapped(struct task_struct *tsk)
  38. {
  39. struct pt_regs *regs = task_pt_regs(tsk);
  40. if (regs->int_code != UPROBE_TRAP_NR)
  41. return true;
  42. return false;
  43. }
  44. int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
  45. {
  46. int fixup = probe_get_fixup_type(auprobe->insn);
  47. struct uprobe_task *utask = current->utask;
  48. clear_tsk_thread_flag(current, TIF_UPROBE_SINGLESTEP);
  49. update_cr_regs(current);
  50. psw_bits(regs->psw).r = auprobe->saved_per;
  51. regs->int_code = auprobe->saved_int_code;
  52. if (fixup & FIXUP_PSW_NORMAL)
  53. regs->psw.addr += utask->vaddr - utask->xol_vaddr;
  54. if (fixup & FIXUP_RETURN_REGISTER) {
  55. int reg = (auprobe->insn[0] & 0xf0) >> 4;
  56. regs->gprs[reg] += utask->vaddr - utask->xol_vaddr;
  57. }
  58. if (fixup & FIXUP_BRANCH_NOT_TAKEN) {
  59. int ilen = insn_length(auprobe->insn[0] >> 8);
  60. if (regs->psw.addr - utask->xol_vaddr == ilen)
  61. regs->psw.addr = utask->vaddr + ilen;
  62. }
  63. /* If per tracing was active generate trap */
  64. if (regs->psw.mask & PSW_MASK_PER)
  65. do_per_trap(regs);
  66. return 0;
  67. }
  68. int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val,
  69. void *data)
  70. {
  71. struct die_args *args = data;
  72. struct pt_regs *regs = args->regs;
  73. if (!user_mode(regs))
  74. return NOTIFY_DONE;
  75. if (regs->int_code & 0x200) /* Trap during transaction */
  76. return NOTIFY_DONE;
  77. switch (val) {
  78. case DIE_BPT:
  79. if (uprobe_pre_sstep_notifier(regs))
  80. return NOTIFY_STOP;
  81. break;
  82. case DIE_SSTEP:
  83. if (uprobe_post_sstep_notifier(regs))
  84. return NOTIFY_STOP;
  85. default:
  86. break;
  87. }
  88. return NOTIFY_DONE;
  89. }
  90. void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
  91. {
  92. clear_thread_flag(TIF_UPROBE_SINGLESTEP);
  93. regs->int_code = auprobe->saved_int_code;
  94. regs->psw.addr = current->utask->vaddr;
  95. }
  96. unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline,
  97. struct pt_regs *regs)
  98. {
  99. unsigned long orig;
  100. orig = regs->gprs[14];
  101. regs->gprs[14] = trampoline;
  102. return orig;
  103. }
  104. /* Instruction Emulation */
  105. static void adjust_psw_addr(psw_t *psw, unsigned long len)
  106. {
  107. psw->addr = __rewind_psw(*psw, -len);
  108. }
  109. #define EMU_ILLEGAL_OP 1
  110. #define EMU_SPECIFICATION 2
  111. #define EMU_ADDRESSING 3
  112. #define emu_load_ril(ptr, output) \
  113. ({ \
  114. unsigned int mask = sizeof(*(ptr)) - 1; \
  115. __typeof__(*(ptr)) input; \
  116. int __rc = 0; \
  117. \
  118. if (!test_facility(34)) \
  119. __rc = EMU_ILLEGAL_OP; \
  120. else if ((u64 __force)ptr & mask) \
  121. __rc = EMU_SPECIFICATION; \
  122. else if (get_user(input, ptr)) \
  123. __rc = EMU_ADDRESSING; \
  124. else \
  125. *(output) = input; \
  126. __rc; \
  127. })
  128. #define emu_store_ril(ptr, input) \
  129. ({ \
  130. unsigned int mask = sizeof(*(ptr)) - 1; \
  131. int __rc = 0; \
  132. \
  133. if (!test_facility(34)) \
  134. __rc = EMU_ILLEGAL_OP; \
  135. else if ((u64 __force)ptr & mask) \
  136. __rc = EMU_SPECIFICATION; \
  137. else if (put_user(*(input), ptr)) \
  138. __rc = EMU_ADDRESSING; \
  139. __rc; \
  140. })
  141. #define emu_cmp_ril(regs, ptr, cmp) \
  142. ({ \
  143. unsigned int mask = sizeof(*(ptr)) - 1; \
  144. __typeof__(*(ptr)) input; \
  145. int __rc = 0; \
  146. \
  147. if (!test_facility(34)) \
  148. __rc = EMU_ILLEGAL_OP; \
  149. else if ((u64 __force)ptr & mask) \
  150. __rc = EMU_SPECIFICATION; \
  151. else if (get_user(input, ptr)) \
  152. __rc = EMU_ADDRESSING; \
  153. else if (input > *(cmp)) \
  154. psw_bits((regs)->psw).cc = 1; \
  155. else if (input < *(cmp)) \
  156. psw_bits((regs)->psw).cc = 2; \
  157. else \
  158. psw_bits((regs)->psw).cc = 0; \
  159. __rc; \
  160. })
  161. struct insn_ril {
  162. u8 opc0;
  163. u8 reg : 4;
  164. u8 opc1 : 4;
  165. s32 disp;
  166. } __packed;
  167. union split_register {
  168. u64 u64;
  169. u32 u32[2];
  170. u16 u16[4];
  171. s64 s64;
  172. s32 s32[2];
  173. s16 s16[4];
  174. };
  175. /*
  176. * pc relative instructions are emulated, since parameters may not be
  177. * accessible from the xol area due to range limitations.
  178. */
  179. static void handle_insn_ril(struct arch_uprobe *auprobe, struct pt_regs *regs)
  180. {
  181. union split_register *rx;
  182. struct insn_ril *insn;
  183. unsigned int ilen;
  184. void *uptr;
  185. int rc = 0;
  186. insn = (struct insn_ril *) &auprobe->insn;
  187. rx = (union split_register *) &regs->gprs[insn->reg];
  188. uptr = (void *)(regs->psw.addr + (insn->disp * 2));
  189. ilen = insn_length(insn->opc0);
  190. switch (insn->opc0) {
  191. case 0xc0:
  192. switch (insn->opc1) {
  193. case 0x00: /* larl */
  194. rx->u64 = (unsigned long)uptr;
  195. break;
  196. }
  197. break;
  198. case 0xc4:
  199. switch (insn->opc1) {
  200. case 0x02: /* llhrl */
  201. rc = emu_load_ril((u16 __user *)uptr, &rx->u32[1]);
  202. break;
  203. case 0x04: /* lghrl */
  204. rc = emu_load_ril((s16 __user *)uptr, &rx->u64);
  205. break;
  206. case 0x05: /* lhrl */
  207. rc = emu_load_ril((s16 __user *)uptr, &rx->u32[1]);
  208. break;
  209. case 0x06: /* llghrl */
  210. rc = emu_load_ril((u16 __user *)uptr, &rx->u64);
  211. break;
  212. case 0x08: /* lgrl */
  213. rc = emu_load_ril((u64 __user *)uptr, &rx->u64);
  214. break;
  215. case 0x0c: /* lgfrl */
  216. rc = emu_load_ril((s32 __user *)uptr, &rx->u64);
  217. break;
  218. case 0x0d: /* lrl */
  219. rc = emu_load_ril((u32 __user *)uptr, &rx->u32[1]);
  220. break;
  221. case 0x0e: /* llgfrl */
  222. rc = emu_load_ril((u32 __user *)uptr, &rx->u64);
  223. break;
  224. case 0x07: /* sthrl */
  225. rc = emu_store_ril((u16 __user *)uptr, &rx->u16[3]);
  226. break;
  227. case 0x0b: /* stgrl */
  228. rc = emu_store_ril((u64 __user *)uptr, &rx->u64);
  229. break;
  230. case 0x0f: /* strl */
  231. rc = emu_store_ril((u32 __user *)uptr, &rx->u32[1]);
  232. break;
  233. }
  234. break;
  235. case 0xc6:
  236. switch (insn->opc1) {
  237. case 0x02: /* pfdrl */
  238. if (!test_facility(34))
  239. rc = EMU_ILLEGAL_OP;
  240. break;
  241. case 0x04: /* cghrl */
  242. rc = emu_cmp_ril(regs, (s16 __user *)uptr, &rx->s64);
  243. break;
  244. case 0x05: /* chrl */
  245. rc = emu_cmp_ril(regs, (s16 __user *)uptr, &rx->s32[1]);
  246. break;
  247. case 0x06: /* clghrl */
  248. rc = emu_cmp_ril(regs, (u16 __user *)uptr, &rx->u64);
  249. break;
  250. case 0x07: /* clhrl */
  251. rc = emu_cmp_ril(regs, (u16 __user *)uptr, &rx->u32[1]);
  252. break;
  253. case 0x08: /* cgrl */
  254. rc = emu_cmp_ril(regs, (s64 __user *)uptr, &rx->s64);
  255. break;
  256. case 0x0a: /* clgrl */
  257. rc = emu_cmp_ril(regs, (u64 __user *)uptr, &rx->u64);
  258. break;
  259. case 0x0c: /* cgfrl */
  260. rc = emu_cmp_ril(regs, (s32 __user *)uptr, &rx->s64);
  261. break;
  262. case 0x0d: /* crl */
  263. rc = emu_cmp_ril(regs, (s32 __user *)uptr, &rx->s32[1]);
  264. break;
  265. case 0x0e: /* clgfrl */
  266. rc = emu_cmp_ril(regs, (u32 __user *)uptr, &rx->u64);
  267. break;
  268. case 0x0f: /* clrl */
  269. rc = emu_cmp_ril(regs, (u32 __user *)uptr, &rx->u32[1]);
  270. break;
  271. }
  272. break;
  273. }
  274. adjust_psw_addr(&regs->psw, ilen);
  275. switch (rc) {
  276. case EMU_ILLEGAL_OP:
  277. regs->int_code = ilen << 16 | 0x0001;
  278. do_report_trap(regs, SIGILL, ILL_ILLOPC, NULL);
  279. break;
  280. case EMU_SPECIFICATION:
  281. regs->int_code = ilen << 16 | 0x0006;
  282. do_report_trap(regs, SIGILL, ILL_ILLOPC , NULL);
  283. break;
  284. case EMU_ADDRESSING:
  285. regs->int_code = ilen << 16 | 0x0005;
  286. do_report_trap(regs, SIGSEGV, SEGV_MAPERR, NULL);
  287. break;
  288. }
  289. }
  290. bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
  291. {
  292. if ((psw_bits(regs->psw).eaba == PSW_AMODE_24BIT) ||
  293. ((psw_bits(regs->psw).eaba == PSW_AMODE_31BIT) &&
  294. !is_compat_task())) {
  295. regs->psw.addr = __rewind_psw(regs->psw, UPROBE_SWBP_INSN_SIZE);
  296. do_report_trap(regs, SIGILL, ILL_ILLADR, NULL);
  297. return true;
  298. }
  299. if (probe_is_insn_relative_long(auprobe->insn)) {
  300. handle_insn_ril(auprobe, regs);
  301. return true;
  302. }
  303. return false;
  304. }