time.c 46 KB

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  1. /*
  2. * Time of day based timer functions.
  3. *
  4. * S390 version
  5. * Copyright IBM Corp. 1999, 2008
  6. * Author(s): Hartmut Penner (hp@de.ibm.com),
  7. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  8. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  9. *
  10. * Derived from "arch/i386/kernel/time.c"
  11. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  12. */
  13. #define KMSG_COMPONENT "time"
  14. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  15. #include <linux/kernel_stat.h>
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/device.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/timekeeper_internal.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/gfp.h>
  38. #include <linux/kprobes.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/delay.h>
  41. #include <asm/div64.h>
  42. #include <asm/vdso.h>
  43. #include <asm/irq.h>
  44. #include <asm/irq_regs.h>
  45. #include <asm/vtimer.h>
  46. #include <asm/etr.h>
  47. #include <asm/cio.h>
  48. #include "entry.h"
  49. /* change this if you have some constant time drift */
  50. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  51. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  52. u64 sched_clock_base_cc = -1; /* Force to data section. */
  53. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  54. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  55. /*
  56. * Scheduler clock - returns current time in nanosec units.
  57. */
  58. unsigned long long notrace __kprobes sched_clock(void)
  59. {
  60. return tod_to_ns(get_tod_clock_monotonic());
  61. }
  62. /*
  63. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  64. */
  65. unsigned long long monotonic_clock(void)
  66. {
  67. return sched_clock();
  68. }
  69. EXPORT_SYMBOL(monotonic_clock);
  70. void tod_to_timeval(__u64 todval, struct timespec *xt)
  71. {
  72. unsigned long long sec;
  73. sec = todval >> 12;
  74. do_div(sec, 1000000);
  75. xt->tv_sec = sec;
  76. todval -= (sec * 1000000) << 12;
  77. xt->tv_nsec = ((todval * 1000) >> 12);
  78. }
  79. EXPORT_SYMBOL(tod_to_timeval);
  80. void clock_comparator_work(void)
  81. {
  82. struct clock_event_device *cd;
  83. S390_lowcore.clock_comparator = -1ULL;
  84. cd = this_cpu_ptr(&comparators);
  85. cd->event_handler(cd);
  86. }
  87. /*
  88. * Fixup the clock comparator.
  89. */
  90. static void fixup_clock_comparator(unsigned long long delta)
  91. {
  92. /* If nobody is waiting there's nothing to fix. */
  93. if (S390_lowcore.clock_comparator == -1ULL)
  94. return;
  95. S390_lowcore.clock_comparator += delta;
  96. set_clock_comparator(S390_lowcore.clock_comparator);
  97. }
  98. static int s390_next_event(unsigned long delta,
  99. struct clock_event_device *evt)
  100. {
  101. S390_lowcore.clock_comparator = get_tod_clock() + delta;
  102. set_clock_comparator(S390_lowcore.clock_comparator);
  103. return 0;
  104. }
  105. static void s390_set_mode(enum clock_event_mode mode,
  106. struct clock_event_device *evt)
  107. {
  108. }
  109. /*
  110. * Set up lowcore and control register of the current cpu to
  111. * enable TOD clock and clock comparator interrupts.
  112. */
  113. void init_cpu_timer(void)
  114. {
  115. struct clock_event_device *cd;
  116. int cpu;
  117. S390_lowcore.clock_comparator = -1ULL;
  118. set_clock_comparator(S390_lowcore.clock_comparator);
  119. cpu = smp_processor_id();
  120. cd = &per_cpu(comparators, cpu);
  121. cd->name = "comparator";
  122. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  123. cd->mult = 16777;
  124. cd->shift = 12;
  125. cd->min_delta_ns = 1;
  126. cd->max_delta_ns = LONG_MAX;
  127. cd->rating = 400;
  128. cd->cpumask = cpumask_of(cpu);
  129. cd->set_next_event = s390_next_event;
  130. cd->set_mode = s390_set_mode;
  131. clockevents_register_device(cd);
  132. /* Enable clock comparator timer interrupt. */
  133. __ctl_set_bit(0,11);
  134. /* Always allow the timing alert external interrupt. */
  135. __ctl_set_bit(0, 4);
  136. }
  137. static void clock_comparator_interrupt(struct ext_code ext_code,
  138. unsigned int param32,
  139. unsigned long param64)
  140. {
  141. inc_irq_stat(IRQEXT_CLK);
  142. if (S390_lowcore.clock_comparator == -1ULL)
  143. set_clock_comparator(S390_lowcore.clock_comparator);
  144. }
  145. static void etr_timing_alert(struct etr_irq_parm *);
  146. static void stp_timing_alert(struct stp_irq_parm *);
  147. static void timing_alert_interrupt(struct ext_code ext_code,
  148. unsigned int param32, unsigned long param64)
  149. {
  150. inc_irq_stat(IRQEXT_TLA);
  151. if (param32 & 0x00c40000)
  152. etr_timing_alert((struct etr_irq_parm *) &param32);
  153. if (param32 & 0x00038000)
  154. stp_timing_alert((struct stp_irq_parm *) &param32);
  155. }
  156. static void etr_reset(void);
  157. static void stp_reset(void);
  158. void read_persistent_clock(struct timespec *ts)
  159. {
  160. tod_to_timeval(get_tod_clock() - TOD_UNIX_EPOCH, ts);
  161. }
  162. void read_boot_clock(struct timespec *ts)
  163. {
  164. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  165. }
  166. static cycle_t read_tod_clock(struct clocksource *cs)
  167. {
  168. return get_tod_clock();
  169. }
  170. static struct clocksource clocksource_tod = {
  171. .name = "tod",
  172. .rating = 400,
  173. .read = read_tod_clock,
  174. .mask = -1ULL,
  175. .mult = 1000,
  176. .shift = 12,
  177. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  178. };
  179. struct clocksource * __init clocksource_default_clock(void)
  180. {
  181. return &clocksource_tod;
  182. }
  183. void update_vsyscall(struct timekeeper *tk)
  184. {
  185. u64 nsecps;
  186. if (tk->tkr.clock != &clocksource_tod)
  187. return;
  188. /* Make userspace gettimeofday spin until we're done. */
  189. ++vdso_data->tb_update_count;
  190. smp_wmb();
  191. vdso_data->xtime_tod_stamp = tk->tkr.cycle_last;
  192. vdso_data->xtime_clock_sec = tk->xtime_sec;
  193. vdso_data->xtime_clock_nsec = tk->tkr.xtime_nsec;
  194. vdso_data->wtom_clock_sec =
  195. tk->xtime_sec + tk->wall_to_monotonic.tv_sec;
  196. vdso_data->wtom_clock_nsec = tk->tkr.xtime_nsec +
  197. + ((u64) tk->wall_to_monotonic.tv_nsec << tk->tkr.shift);
  198. nsecps = (u64) NSEC_PER_SEC << tk->tkr.shift;
  199. while (vdso_data->wtom_clock_nsec >= nsecps) {
  200. vdso_data->wtom_clock_nsec -= nsecps;
  201. vdso_data->wtom_clock_sec++;
  202. }
  203. vdso_data->xtime_coarse_sec = tk->xtime_sec;
  204. vdso_data->xtime_coarse_nsec =
  205. (long)(tk->tkr.xtime_nsec >> tk->tkr.shift);
  206. vdso_data->wtom_coarse_sec =
  207. vdso_data->xtime_coarse_sec + tk->wall_to_monotonic.tv_sec;
  208. vdso_data->wtom_coarse_nsec =
  209. vdso_data->xtime_coarse_nsec + tk->wall_to_monotonic.tv_nsec;
  210. while (vdso_data->wtom_coarse_nsec >= NSEC_PER_SEC) {
  211. vdso_data->wtom_coarse_nsec -= NSEC_PER_SEC;
  212. vdso_data->wtom_coarse_sec++;
  213. }
  214. vdso_data->tk_mult = tk->tkr.mult;
  215. vdso_data->tk_shift = tk->tkr.shift;
  216. smp_wmb();
  217. ++vdso_data->tb_update_count;
  218. }
  219. extern struct timezone sys_tz;
  220. void update_vsyscall_tz(void)
  221. {
  222. /* Make userspace gettimeofday spin until we're done. */
  223. ++vdso_data->tb_update_count;
  224. smp_wmb();
  225. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  226. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  227. smp_wmb();
  228. ++vdso_data->tb_update_count;
  229. }
  230. /*
  231. * Initialize the TOD clock and the CPU timer of
  232. * the boot cpu.
  233. */
  234. void __init time_init(void)
  235. {
  236. /* Reset time synchronization interfaces. */
  237. etr_reset();
  238. stp_reset();
  239. /* request the clock comparator external interrupt */
  240. if (register_external_irq(EXT_IRQ_CLK_COMP, clock_comparator_interrupt))
  241. panic("Couldn't request external interrupt 0x1004");
  242. /* request the timing alert external interrupt */
  243. if (register_external_irq(EXT_IRQ_TIMING_ALERT, timing_alert_interrupt))
  244. panic("Couldn't request external interrupt 0x1406");
  245. if (clocksource_register(&clocksource_tod) != 0)
  246. panic("Could not register TOD clock source");
  247. /* Enable TOD clock interrupts on the boot cpu. */
  248. init_cpu_timer();
  249. /* Enable cpu timer interrupts on the boot cpu. */
  250. vtime_init();
  251. }
  252. /*
  253. * The time is "clock". old is what we think the time is.
  254. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  255. * "delay" is an approximation how long the synchronization took. If
  256. * the time correction is positive, then "delay" is subtracted from
  257. * the time difference and only the remaining part is passed to ntp.
  258. */
  259. static unsigned long long adjust_time(unsigned long long old,
  260. unsigned long long clock,
  261. unsigned long long delay)
  262. {
  263. unsigned long long delta, ticks;
  264. struct timex adjust;
  265. if (clock > old) {
  266. /* It is later than we thought. */
  267. delta = ticks = clock - old;
  268. delta = ticks = (delta < delay) ? 0 : delta - delay;
  269. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  270. adjust.offset = ticks * (1000000 / HZ);
  271. } else {
  272. /* It is earlier than we thought. */
  273. delta = ticks = old - clock;
  274. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  275. delta = -delta;
  276. adjust.offset = -ticks * (1000000 / HZ);
  277. }
  278. sched_clock_base_cc += delta;
  279. if (adjust.offset != 0) {
  280. pr_notice("The ETR interface has adjusted the clock "
  281. "by %li microseconds\n", adjust.offset);
  282. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  283. do_adjtimex(&adjust);
  284. }
  285. return delta;
  286. }
  287. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  288. static DEFINE_MUTEX(clock_sync_mutex);
  289. static unsigned long clock_sync_flags;
  290. #define CLOCK_SYNC_HAS_ETR 0
  291. #define CLOCK_SYNC_HAS_STP 1
  292. #define CLOCK_SYNC_ETR 2
  293. #define CLOCK_SYNC_STP 3
  294. /*
  295. * The synchronous get_clock function. It will write the current clock
  296. * value to the clock pointer and return 0 if the clock is in sync with
  297. * the external time source. If the clock mode is local it will return
  298. * -EOPNOTSUPP and -EAGAIN if the clock is not in sync with the external
  299. * reference.
  300. */
  301. int get_sync_clock(unsigned long long *clock)
  302. {
  303. atomic_t *sw_ptr;
  304. unsigned int sw0, sw1;
  305. sw_ptr = &get_cpu_var(clock_sync_word);
  306. sw0 = atomic_read(sw_ptr);
  307. *clock = get_tod_clock();
  308. sw1 = atomic_read(sw_ptr);
  309. put_cpu_var(clock_sync_word);
  310. if (sw0 == sw1 && (sw0 & 0x80000000U))
  311. /* Success: time is in sync. */
  312. return 0;
  313. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  314. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  315. return -EOPNOTSUPP;
  316. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  317. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  318. return -EACCES;
  319. return -EAGAIN;
  320. }
  321. EXPORT_SYMBOL(get_sync_clock);
  322. /*
  323. * Make get_sync_clock return -EAGAIN.
  324. */
  325. static void disable_sync_clock(void *dummy)
  326. {
  327. atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word);
  328. /*
  329. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  330. * fail until the sync bit is turned back on. In addition
  331. * increase the "sequence" counter to avoid the race of an
  332. * etr event and the complete recovery against get_sync_clock.
  333. */
  334. atomic_clear_mask(0x80000000, sw_ptr);
  335. atomic_inc(sw_ptr);
  336. }
  337. /*
  338. * Make get_sync_clock return 0 again.
  339. * Needs to be called from a context disabled for preemption.
  340. */
  341. static void enable_sync_clock(void)
  342. {
  343. atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word);
  344. atomic_set_mask(0x80000000, sw_ptr);
  345. }
  346. /*
  347. * Function to check if the clock is in sync.
  348. */
  349. static inline int check_sync_clock(void)
  350. {
  351. atomic_t *sw_ptr;
  352. int rc;
  353. sw_ptr = &get_cpu_var(clock_sync_word);
  354. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  355. put_cpu_var(clock_sync_word);
  356. return rc;
  357. }
  358. /* Single threaded workqueue used for etr and stp sync events */
  359. static struct workqueue_struct *time_sync_wq;
  360. static void __init time_init_wq(void)
  361. {
  362. if (time_sync_wq)
  363. return;
  364. time_sync_wq = create_singlethread_workqueue("timesync");
  365. }
  366. /*
  367. * External Time Reference (ETR) code.
  368. */
  369. static int etr_port0_online;
  370. static int etr_port1_online;
  371. static int etr_steai_available;
  372. static int __init early_parse_etr(char *p)
  373. {
  374. if (strncmp(p, "off", 3) == 0)
  375. etr_port0_online = etr_port1_online = 0;
  376. else if (strncmp(p, "port0", 5) == 0)
  377. etr_port0_online = 1;
  378. else if (strncmp(p, "port1", 5) == 0)
  379. etr_port1_online = 1;
  380. else if (strncmp(p, "on", 2) == 0)
  381. etr_port0_online = etr_port1_online = 1;
  382. return 0;
  383. }
  384. early_param("etr", early_parse_etr);
  385. enum etr_event {
  386. ETR_EVENT_PORT0_CHANGE,
  387. ETR_EVENT_PORT1_CHANGE,
  388. ETR_EVENT_PORT_ALERT,
  389. ETR_EVENT_SYNC_CHECK,
  390. ETR_EVENT_SWITCH_LOCAL,
  391. ETR_EVENT_UPDATE,
  392. };
  393. /*
  394. * Valid bit combinations of the eacr register are (x = don't care):
  395. * e0 e1 dp p0 p1 ea es sl
  396. * 0 0 x 0 0 0 0 0 initial, disabled state
  397. * 0 0 x 0 1 1 0 0 port 1 online
  398. * 0 0 x 1 0 1 0 0 port 0 online
  399. * 0 0 x 1 1 1 0 0 both ports online
  400. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  401. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  402. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  403. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  404. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  405. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  406. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  407. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  408. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  409. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  410. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  411. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  412. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  413. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  414. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  415. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  416. */
  417. static struct etr_eacr etr_eacr;
  418. static u64 etr_tolec; /* time of last eacr update */
  419. static struct etr_aib etr_port0;
  420. static int etr_port0_uptodate;
  421. static struct etr_aib etr_port1;
  422. static int etr_port1_uptodate;
  423. static unsigned long etr_events;
  424. static struct timer_list etr_timer;
  425. static void etr_timeout(unsigned long dummy);
  426. static void etr_work_fn(struct work_struct *work);
  427. static DEFINE_MUTEX(etr_work_mutex);
  428. static DECLARE_WORK(etr_work, etr_work_fn);
  429. /*
  430. * Reset ETR attachment.
  431. */
  432. static void etr_reset(void)
  433. {
  434. etr_eacr = (struct etr_eacr) {
  435. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  436. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  437. .es = 0, .sl = 0 };
  438. if (etr_setr(&etr_eacr) == 0) {
  439. etr_tolec = get_tod_clock();
  440. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  441. if (etr_port0_online && etr_port1_online)
  442. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  443. } else if (etr_port0_online || etr_port1_online) {
  444. pr_warning("The real or virtual hardware system does "
  445. "not provide an ETR interface\n");
  446. etr_port0_online = etr_port1_online = 0;
  447. }
  448. }
  449. static int __init etr_init(void)
  450. {
  451. struct etr_aib aib;
  452. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  453. return 0;
  454. time_init_wq();
  455. /* Check if this machine has the steai instruction. */
  456. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  457. etr_steai_available = 1;
  458. setup_timer(&etr_timer, etr_timeout, 0UL);
  459. if (etr_port0_online) {
  460. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  461. queue_work(time_sync_wq, &etr_work);
  462. }
  463. if (etr_port1_online) {
  464. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  465. queue_work(time_sync_wq, &etr_work);
  466. }
  467. return 0;
  468. }
  469. arch_initcall(etr_init);
  470. /*
  471. * Two sorts of ETR machine checks. The architecture reads:
  472. * "When a machine-check niterruption occurs and if a switch-to-local or
  473. * ETR-sync-check interrupt request is pending but disabled, this pending
  474. * disabled interruption request is indicated and is cleared".
  475. * Which means that we can get etr_switch_to_local events from the machine
  476. * check handler although the interruption condition is disabled. Lovely..
  477. */
  478. /*
  479. * Switch to local machine check. This is called when the last usable
  480. * ETR port goes inactive. After switch to local the clock is not in sync.
  481. */
  482. void etr_switch_to_local(void)
  483. {
  484. if (!etr_eacr.sl)
  485. return;
  486. disable_sync_clock(NULL);
  487. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  488. etr_eacr.es = etr_eacr.sl = 0;
  489. etr_setr(&etr_eacr);
  490. queue_work(time_sync_wq, &etr_work);
  491. }
  492. }
  493. /*
  494. * ETR sync check machine check. This is called when the ETR OTE and the
  495. * local clock OTE are farther apart than the ETR sync check tolerance.
  496. * After a ETR sync check the clock is not in sync. The machine check
  497. * is broadcasted to all cpus at the same time.
  498. */
  499. void etr_sync_check(void)
  500. {
  501. if (!etr_eacr.es)
  502. return;
  503. disable_sync_clock(NULL);
  504. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  505. etr_eacr.es = 0;
  506. etr_setr(&etr_eacr);
  507. queue_work(time_sync_wq, &etr_work);
  508. }
  509. }
  510. /*
  511. * ETR timing alert. There are two causes:
  512. * 1) port state change, check the usability of the port
  513. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  514. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  515. * or ETR-data word 4 (edf4) has changed.
  516. */
  517. static void etr_timing_alert(struct etr_irq_parm *intparm)
  518. {
  519. if (intparm->pc0)
  520. /* ETR port 0 state change. */
  521. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  522. if (intparm->pc1)
  523. /* ETR port 1 state change. */
  524. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  525. if (intparm->eai)
  526. /*
  527. * ETR port alert on either port 0, 1 or both.
  528. * Both ports are not up-to-date now.
  529. */
  530. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  531. queue_work(time_sync_wq, &etr_work);
  532. }
  533. static void etr_timeout(unsigned long dummy)
  534. {
  535. set_bit(ETR_EVENT_UPDATE, &etr_events);
  536. queue_work(time_sync_wq, &etr_work);
  537. }
  538. /*
  539. * Check if the etr mode is pss.
  540. */
  541. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  542. {
  543. return eacr.es && !eacr.sl;
  544. }
  545. /*
  546. * Check if the etr mode is etr.
  547. */
  548. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  549. {
  550. return eacr.es && eacr.sl;
  551. }
  552. /*
  553. * Check if the port can be used for TOD synchronization.
  554. * For PPS mode the port has to receive OTEs. For ETR mode
  555. * the port has to receive OTEs, the ETR stepping bit has to
  556. * be zero and the validity bits for data frame 1, 2, and 3
  557. * have to be 1.
  558. */
  559. static int etr_port_valid(struct etr_aib *aib, int port)
  560. {
  561. unsigned int psc;
  562. /* Check that this port is receiving OTEs. */
  563. if (aib->tsp == 0)
  564. return 0;
  565. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  566. if (psc == etr_lpsc_pps_mode)
  567. return 1;
  568. if (psc == etr_lpsc_operational_step)
  569. return !aib->esw.y && aib->slsw.v1 &&
  570. aib->slsw.v2 && aib->slsw.v3;
  571. return 0;
  572. }
  573. /*
  574. * Check if two ports are on the same network.
  575. */
  576. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  577. {
  578. // FIXME: any other fields we have to compare?
  579. return aib1->edf1.net_id == aib2->edf1.net_id;
  580. }
  581. /*
  582. * Wrapper for etr_stei that converts physical port states
  583. * to logical port states to be consistent with the output
  584. * of stetr (see etr_psc vs. etr_lpsc).
  585. */
  586. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  587. {
  588. BUG_ON(etr_steai(aib, func) != 0);
  589. /* Convert port state to logical port state. */
  590. if (aib->esw.psc0 == 1)
  591. aib->esw.psc0 = 2;
  592. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  593. aib->esw.psc0 = 1;
  594. if (aib->esw.psc1 == 1)
  595. aib->esw.psc1 = 2;
  596. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  597. aib->esw.psc1 = 1;
  598. }
  599. /*
  600. * Check if the aib a2 is still connected to the same attachment as
  601. * aib a1, the etv values differ by one and a2 is valid.
  602. */
  603. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  604. {
  605. int state_a1, state_a2;
  606. /* Paranoia check: e0/e1 should better be the same. */
  607. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  608. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  609. return 0;
  610. /* Still connected to the same etr ? */
  611. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  612. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  613. if (state_a1 == etr_lpsc_operational_step) {
  614. if (state_a2 != etr_lpsc_operational_step ||
  615. a1->edf1.net_id != a2->edf1.net_id ||
  616. a1->edf1.etr_id != a2->edf1.etr_id ||
  617. a1->edf1.etr_pn != a2->edf1.etr_pn)
  618. return 0;
  619. } else if (state_a2 != etr_lpsc_pps_mode)
  620. return 0;
  621. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  622. if (a1->edf2.etv + 1 != a2->edf2.etv)
  623. return 0;
  624. if (!etr_port_valid(a2, p))
  625. return 0;
  626. return 1;
  627. }
  628. struct clock_sync_data {
  629. atomic_t cpus;
  630. int in_sync;
  631. unsigned long long fixup_cc;
  632. int etr_port;
  633. struct etr_aib *etr_aib;
  634. };
  635. static void clock_sync_cpu(struct clock_sync_data *sync)
  636. {
  637. atomic_dec(&sync->cpus);
  638. enable_sync_clock();
  639. /*
  640. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  641. * is called on all other cpus while the TOD clocks is stopped.
  642. * __udelay will stop the cpu on an enabled wait psw until the
  643. * TOD is running again.
  644. */
  645. while (sync->in_sync == 0) {
  646. __udelay(1);
  647. /*
  648. * A different cpu changes *in_sync. Therefore use
  649. * barrier() to force memory access.
  650. */
  651. barrier();
  652. }
  653. if (sync->in_sync != 1)
  654. /* Didn't work. Clear per-cpu in sync bit again. */
  655. disable_sync_clock(NULL);
  656. /*
  657. * This round of TOD syncing is done. Set the clock comparator
  658. * to the next tick and let the processor continue.
  659. */
  660. fixup_clock_comparator(sync->fixup_cc);
  661. }
  662. /*
  663. * Sync the TOD clock using the port referred to by aibp. This port
  664. * has to be enabled and the other port has to be disabled. The
  665. * last eacr update has to be more than 1.6 seconds in the past.
  666. */
  667. static int etr_sync_clock(void *data)
  668. {
  669. static int first;
  670. unsigned long long clock, old_clock, delay, delta;
  671. struct clock_sync_data *etr_sync;
  672. struct etr_aib *sync_port, *aib;
  673. int port;
  674. int rc;
  675. etr_sync = data;
  676. if (xchg(&first, 1) == 1) {
  677. /* Slave */
  678. clock_sync_cpu(etr_sync);
  679. return 0;
  680. }
  681. /* Wait until all other cpus entered the sync function. */
  682. while (atomic_read(&etr_sync->cpus) != 0)
  683. cpu_relax();
  684. port = etr_sync->etr_port;
  685. aib = etr_sync->etr_aib;
  686. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  687. enable_sync_clock();
  688. /* Set clock to next OTE. */
  689. __ctl_set_bit(14, 21);
  690. __ctl_set_bit(0, 29);
  691. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  692. old_clock = get_tod_clock();
  693. if (set_tod_clock(clock) == 0) {
  694. __udelay(1); /* Wait for the clock to start. */
  695. __ctl_clear_bit(0, 29);
  696. __ctl_clear_bit(14, 21);
  697. etr_stetr(aib);
  698. /* Adjust Linux timing variables. */
  699. delay = (unsigned long long)
  700. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  701. delta = adjust_time(old_clock, clock, delay);
  702. etr_sync->fixup_cc = delta;
  703. fixup_clock_comparator(delta);
  704. /* Verify that the clock is properly set. */
  705. if (!etr_aib_follows(sync_port, aib, port)) {
  706. /* Didn't work. */
  707. disable_sync_clock(NULL);
  708. etr_sync->in_sync = -EAGAIN;
  709. rc = -EAGAIN;
  710. } else {
  711. etr_sync->in_sync = 1;
  712. rc = 0;
  713. }
  714. } else {
  715. /* Could not set the clock ?!? */
  716. __ctl_clear_bit(0, 29);
  717. __ctl_clear_bit(14, 21);
  718. disable_sync_clock(NULL);
  719. etr_sync->in_sync = -EAGAIN;
  720. rc = -EAGAIN;
  721. }
  722. xchg(&first, 0);
  723. return rc;
  724. }
  725. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  726. {
  727. struct clock_sync_data etr_sync;
  728. struct etr_aib *sync_port;
  729. int follows;
  730. int rc;
  731. /* Check if the current aib is adjacent to the sync port aib. */
  732. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  733. follows = etr_aib_follows(sync_port, aib, port);
  734. memcpy(sync_port, aib, sizeof(*aib));
  735. if (!follows)
  736. return -EAGAIN;
  737. memset(&etr_sync, 0, sizeof(etr_sync));
  738. etr_sync.etr_aib = aib;
  739. etr_sync.etr_port = port;
  740. get_online_cpus();
  741. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  742. rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
  743. put_online_cpus();
  744. return rc;
  745. }
  746. /*
  747. * Handle the immediate effects of the different events.
  748. * The port change event is used for online/offline changes.
  749. */
  750. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  751. {
  752. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  753. eacr.es = 0;
  754. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  755. eacr.es = eacr.sl = 0;
  756. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  757. etr_port0_uptodate = etr_port1_uptodate = 0;
  758. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  759. if (eacr.e0)
  760. /*
  761. * Port change of an enabled port. We have to
  762. * assume that this can have caused an stepping
  763. * port switch.
  764. */
  765. etr_tolec = get_tod_clock();
  766. eacr.p0 = etr_port0_online;
  767. if (!eacr.p0)
  768. eacr.e0 = 0;
  769. etr_port0_uptodate = 0;
  770. }
  771. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  772. if (eacr.e1)
  773. /*
  774. * Port change of an enabled port. We have to
  775. * assume that this can have caused an stepping
  776. * port switch.
  777. */
  778. etr_tolec = get_tod_clock();
  779. eacr.p1 = etr_port1_online;
  780. if (!eacr.p1)
  781. eacr.e1 = 0;
  782. etr_port1_uptodate = 0;
  783. }
  784. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  785. return eacr;
  786. }
  787. /*
  788. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  789. * one of the ports needs an update.
  790. */
  791. static void etr_set_tolec_timeout(unsigned long long now)
  792. {
  793. unsigned long micros;
  794. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  795. (!etr_eacr.p1 || etr_port1_uptodate))
  796. return;
  797. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  798. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  799. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  800. }
  801. /*
  802. * Set up a time that expires after 1/2 second.
  803. */
  804. static void etr_set_sync_timeout(void)
  805. {
  806. mod_timer(&etr_timer, jiffies + HZ/2);
  807. }
  808. /*
  809. * Update the aib information for one or both ports.
  810. */
  811. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  812. struct etr_eacr eacr)
  813. {
  814. /* With both ports disabled the aib information is useless. */
  815. if (!eacr.e0 && !eacr.e1)
  816. return eacr;
  817. /* Update port0 or port1 with aib stored in etr_work_fn. */
  818. if (aib->esw.q == 0) {
  819. /* Information for port 0 stored. */
  820. if (eacr.p0 && !etr_port0_uptodate) {
  821. etr_port0 = *aib;
  822. if (etr_port0_online)
  823. etr_port0_uptodate = 1;
  824. }
  825. } else {
  826. /* Information for port 1 stored. */
  827. if (eacr.p1 && !etr_port1_uptodate) {
  828. etr_port1 = *aib;
  829. if (etr_port0_online)
  830. etr_port1_uptodate = 1;
  831. }
  832. }
  833. /*
  834. * Do not try to get the alternate port aib if the clock
  835. * is not in sync yet.
  836. */
  837. if (!eacr.es || !check_sync_clock())
  838. return eacr;
  839. /*
  840. * If steai is available we can get the information about
  841. * the other port immediately. If only stetr is available the
  842. * data-port bit toggle has to be used.
  843. */
  844. if (etr_steai_available) {
  845. if (eacr.p0 && !etr_port0_uptodate) {
  846. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  847. etr_port0_uptodate = 1;
  848. }
  849. if (eacr.p1 && !etr_port1_uptodate) {
  850. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  851. etr_port1_uptodate = 1;
  852. }
  853. } else {
  854. /*
  855. * One port was updated above, if the other
  856. * port is not uptodate toggle dp bit.
  857. */
  858. if ((eacr.p0 && !etr_port0_uptodate) ||
  859. (eacr.p1 && !etr_port1_uptodate))
  860. eacr.dp ^= 1;
  861. else
  862. eacr.dp = 0;
  863. }
  864. return eacr;
  865. }
  866. /*
  867. * Write new etr control register if it differs from the current one.
  868. * Return 1 if etr_tolec has been updated as well.
  869. */
  870. static void etr_update_eacr(struct etr_eacr eacr)
  871. {
  872. int dp_changed;
  873. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  874. /* No change, return. */
  875. return;
  876. /*
  877. * The disable of an active port of the change of the data port
  878. * bit can/will cause a change in the data port.
  879. */
  880. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  881. (etr_eacr.dp ^ eacr.dp) != 0;
  882. etr_eacr = eacr;
  883. etr_setr(&etr_eacr);
  884. if (dp_changed)
  885. etr_tolec = get_tod_clock();
  886. }
  887. /*
  888. * ETR work. In this function you'll find the main logic. In
  889. * particular this is the only function that calls etr_update_eacr(),
  890. * it "controls" the etr control register.
  891. */
  892. static void etr_work_fn(struct work_struct *work)
  893. {
  894. unsigned long long now;
  895. struct etr_eacr eacr;
  896. struct etr_aib aib;
  897. int sync_port;
  898. /* prevent multiple execution. */
  899. mutex_lock(&etr_work_mutex);
  900. /* Create working copy of etr_eacr. */
  901. eacr = etr_eacr;
  902. /* Check for the different events and their immediate effects. */
  903. eacr = etr_handle_events(eacr);
  904. /* Check if ETR is supposed to be active. */
  905. eacr.ea = eacr.p0 || eacr.p1;
  906. if (!eacr.ea) {
  907. /* Both ports offline. Reset everything. */
  908. eacr.dp = eacr.es = eacr.sl = 0;
  909. on_each_cpu(disable_sync_clock, NULL, 1);
  910. del_timer_sync(&etr_timer);
  911. etr_update_eacr(eacr);
  912. goto out_unlock;
  913. }
  914. /* Store aib to get the current ETR status word. */
  915. BUG_ON(etr_stetr(&aib) != 0);
  916. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  917. now = get_tod_clock();
  918. /*
  919. * Update the port information if the last stepping port change
  920. * or data port change is older than 1.6 seconds.
  921. */
  922. if (now >= etr_tolec + (1600000 << 12))
  923. eacr = etr_handle_update(&aib, eacr);
  924. /*
  925. * Select ports to enable. The preferred synchronization mode is PPS.
  926. * If a port can be enabled depends on a number of things:
  927. * 1) The port needs to be online and uptodate. A port is not
  928. * disabled just because it is not uptodate, but it is only
  929. * enabled if it is uptodate.
  930. * 2) The port needs to have the same mode (pps / etr).
  931. * 3) The port needs to be usable -> etr_port_valid() == 1
  932. * 4) To enable the second port the clock needs to be in sync.
  933. * 5) If both ports are useable and are ETR ports, the network id
  934. * has to be the same.
  935. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  936. */
  937. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  938. eacr.sl = 0;
  939. eacr.e0 = 1;
  940. if (!etr_mode_is_pps(etr_eacr))
  941. eacr.es = 0;
  942. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  943. eacr.e1 = 0;
  944. // FIXME: uptodate checks ?
  945. else if (etr_port0_uptodate && etr_port1_uptodate)
  946. eacr.e1 = 1;
  947. sync_port = (etr_port0_uptodate &&
  948. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  949. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  950. eacr.sl = 0;
  951. eacr.e0 = 0;
  952. eacr.e1 = 1;
  953. if (!etr_mode_is_pps(etr_eacr))
  954. eacr.es = 0;
  955. sync_port = (etr_port1_uptodate &&
  956. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  957. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  958. eacr.sl = 1;
  959. eacr.e0 = 1;
  960. if (!etr_mode_is_etr(etr_eacr))
  961. eacr.es = 0;
  962. if (!eacr.es || !eacr.p1 ||
  963. aib.esw.psc1 != etr_lpsc_operational_alt)
  964. eacr.e1 = 0;
  965. else if (etr_port0_uptodate && etr_port1_uptodate &&
  966. etr_compare_network(&etr_port0, &etr_port1))
  967. eacr.e1 = 1;
  968. sync_port = (etr_port0_uptodate &&
  969. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  970. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  971. eacr.sl = 1;
  972. eacr.e0 = 0;
  973. eacr.e1 = 1;
  974. if (!etr_mode_is_etr(etr_eacr))
  975. eacr.es = 0;
  976. sync_port = (etr_port1_uptodate &&
  977. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  978. } else {
  979. /* Both ports not usable. */
  980. eacr.es = eacr.sl = 0;
  981. sync_port = -1;
  982. }
  983. /*
  984. * If the clock is in sync just update the eacr and return.
  985. * If there is no valid sync port wait for a port update.
  986. */
  987. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  988. etr_update_eacr(eacr);
  989. etr_set_tolec_timeout(now);
  990. goto out_unlock;
  991. }
  992. /*
  993. * Prepare control register for clock syncing
  994. * (reset data port bit, set sync check control.
  995. */
  996. eacr.dp = 0;
  997. eacr.es = 1;
  998. /*
  999. * Update eacr and try to synchronize the clock. If the update
  1000. * of eacr caused a stepping port switch (or if we have to
  1001. * assume that a stepping port switch has occurred) or the
  1002. * clock syncing failed, reset the sync check control bit
  1003. * and set up a timer to try again after 0.5 seconds
  1004. */
  1005. etr_update_eacr(eacr);
  1006. if (now < etr_tolec + (1600000 << 12) ||
  1007. etr_sync_clock_stop(&aib, sync_port) != 0) {
  1008. /* Sync failed. Try again in 1/2 second. */
  1009. eacr.es = 0;
  1010. etr_update_eacr(eacr);
  1011. etr_set_sync_timeout();
  1012. } else
  1013. etr_set_tolec_timeout(now);
  1014. out_unlock:
  1015. mutex_unlock(&etr_work_mutex);
  1016. }
  1017. /*
  1018. * Sysfs interface functions
  1019. */
  1020. static struct bus_type etr_subsys = {
  1021. .name = "etr",
  1022. .dev_name = "etr",
  1023. };
  1024. static struct device etr_port0_dev = {
  1025. .id = 0,
  1026. .bus = &etr_subsys,
  1027. };
  1028. static struct device etr_port1_dev = {
  1029. .id = 1,
  1030. .bus = &etr_subsys,
  1031. };
  1032. /*
  1033. * ETR subsys attributes
  1034. */
  1035. static ssize_t etr_stepping_port_show(struct device *dev,
  1036. struct device_attribute *attr,
  1037. char *buf)
  1038. {
  1039. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1040. }
  1041. static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1042. static ssize_t etr_stepping_mode_show(struct device *dev,
  1043. struct device_attribute *attr,
  1044. char *buf)
  1045. {
  1046. char *mode_str;
  1047. if (etr_mode_is_pps(etr_eacr))
  1048. mode_str = "pps";
  1049. else if (etr_mode_is_etr(etr_eacr))
  1050. mode_str = "etr";
  1051. else
  1052. mode_str = "local";
  1053. return sprintf(buf, "%s\n", mode_str);
  1054. }
  1055. static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1056. /*
  1057. * ETR port attributes
  1058. */
  1059. static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
  1060. {
  1061. if (dev == &etr_port0_dev)
  1062. return etr_port0_online ? &etr_port0 : NULL;
  1063. else
  1064. return etr_port1_online ? &etr_port1 : NULL;
  1065. }
  1066. static ssize_t etr_online_show(struct device *dev,
  1067. struct device_attribute *attr,
  1068. char *buf)
  1069. {
  1070. unsigned int online;
  1071. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1072. return sprintf(buf, "%i\n", online);
  1073. }
  1074. static ssize_t etr_online_store(struct device *dev,
  1075. struct device_attribute *attr,
  1076. const char *buf, size_t count)
  1077. {
  1078. unsigned int value;
  1079. value = simple_strtoul(buf, NULL, 0);
  1080. if (value != 0 && value != 1)
  1081. return -EINVAL;
  1082. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1083. return -EOPNOTSUPP;
  1084. mutex_lock(&clock_sync_mutex);
  1085. if (dev == &etr_port0_dev) {
  1086. if (etr_port0_online == value)
  1087. goto out; /* Nothing to do. */
  1088. etr_port0_online = value;
  1089. if (etr_port0_online && etr_port1_online)
  1090. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1091. else
  1092. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1093. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1094. queue_work(time_sync_wq, &etr_work);
  1095. } else {
  1096. if (etr_port1_online == value)
  1097. goto out; /* Nothing to do. */
  1098. etr_port1_online = value;
  1099. if (etr_port0_online && etr_port1_online)
  1100. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1101. else
  1102. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1103. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1104. queue_work(time_sync_wq, &etr_work);
  1105. }
  1106. out:
  1107. mutex_unlock(&clock_sync_mutex);
  1108. return count;
  1109. }
  1110. static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
  1111. static ssize_t etr_stepping_control_show(struct device *dev,
  1112. struct device_attribute *attr,
  1113. char *buf)
  1114. {
  1115. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1116. etr_eacr.e0 : etr_eacr.e1);
  1117. }
  1118. static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1119. static ssize_t etr_mode_code_show(struct device *dev,
  1120. struct device_attribute *attr, char *buf)
  1121. {
  1122. if (!etr_port0_online && !etr_port1_online)
  1123. /* Status word is not uptodate if both ports are offline. */
  1124. return -ENODATA;
  1125. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1126. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1127. }
  1128. static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1129. static ssize_t etr_untuned_show(struct device *dev,
  1130. struct device_attribute *attr, char *buf)
  1131. {
  1132. struct etr_aib *aib = etr_aib_from_dev(dev);
  1133. if (!aib || !aib->slsw.v1)
  1134. return -ENODATA;
  1135. return sprintf(buf, "%i\n", aib->edf1.u);
  1136. }
  1137. static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1138. static ssize_t etr_network_id_show(struct device *dev,
  1139. struct device_attribute *attr, char *buf)
  1140. {
  1141. struct etr_aib *aib = etr_aib_from_dev(dev);
  1142. if (!aib || !aib->slsw.v1)
  1143. return -ENODATA;
  1144. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1145. }
  1146. static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
  1147. static ssize_t etr_id_show(struct device *dev,
  1148. struct device_attribute *attr, char *buf)
  1149. {
  1150. struct etr_aib *aib = etr_aib_from_dev(dev);
  1151. if (!aib || !aib->slsw.v1)
  1152. return -ENODATA;
  1153. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1154. }
  1155. static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
  1156. static ssize_t etr_port_number_show(struct device *dev,
  1157. struct device_attribute *attr, char *buf)
  1158. {
  1159. struct etr_aib *aib = etr_aib_from_dev(dev);
  1160. if (!aib || !aib->slsw.v1)
  1161. return -ENODATA;
  1162. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1163. }
  1164. static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
  1165. static ssize_t etr_coupled_show(struct device *dev,
  1166. struct device_attribute *attr, char *buf)
  1167. {
  1168. struct etr_aib *aib = etr_aib_from_dev(dev);
  1169. if (!aib || !aib->slsw.v3)
  1170. return -ENODATA;
  1171. return sprintf(buf, "%i\n", aib->edf3.c);
  1172. }
  1173. static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1174. static ssize_t etr_local_time_show(struct device *dev,
  1175. struct device_attribute *attr, char *buf)
  1176. {
  1177. struct etr_aib *aib = etr_aib_from_dev(dev);
  1178. if (!aib || !aib->slsw.v3)
  1179. return -ENODATA;
  1180. return sprintf(buf, "%i\n", aib->edf3.blto);
  1181. }
  1182. static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1183. static ssize_t etr_utc_offset_show(struct device *dev,
  1184. struct device_attribute *attr, char *buf)
  1185. {
  1186. struct etr_aib *aib = etr_aib_from_dev(dev);
  1187. if (!aib || !aib->slsw.v3)
  1188. return -ENODATA;
  1189. return sprintf(buf, "%i\n", aib->edf3.buo);
  1190. }
  1191. static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1192. static struct device_attribute *etr_port_attributes[] = {
  1193. &dev_attr_online,
  1194. &dev_attr_stepping_control,
  1195. &dev_attr_state_code,
  1196. &dev_attr_untuned,
  1197. &dev_attr_network,
  1198. &dev_attr_id,
  1199. &dev_attr_port,
  1200. &dev_attr_coupled,
  1201. &dev_attr_local_time,
  1202. &dev_attr_utc_offset,
  1203. NULL
  1204. };
  1205. static int __init etr_register_port(struct device *dev)
  1206. {
  1207. struct device_attribute **attr;
  1208. int rc;
  1209. rc = device_register(dev);
  1210. if (rc)
  1211. goto out;
  1212. for (attr = etr_port_attributes; *attr; attr++) {
  1213. rc = device_create_file(dev, *attr);
  1214. if (rc)
  1215. goto out_unreg;
  1216. }
  1217. return 0;
  1218. out_unreg:
  1219. for (; attr >= etr_port_attributes; attr--)
  1220. device_remove_file(dev, *attr);
  1221. device_unregister(dev);
  1222. out:
  1223. return rc;
  1224. }
  1225. static void __init etr_unregister_port(struct device *dev)
  1226. {
  1227. struct device_attribute **attr;
  1228. for (attr = etr_port_attributes; *attr; attr++)
  1229. device_remove_file(dev, *attr);
  1230. device_unregister(dev);
  1231. }
  1232. static int __init etr_init_sysfs(void)
  1233. {
  1234. int rc;
  1235. rc = subsys_system_register(&etr_subsys, NULL);
  1236. if (rc)
  1237. goto out;
  1238. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1239. if (rc)
  1240. goto out_unreg_subsys;
  1241. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1242. if (rc)
  1243. goto out_remove_stepping_port;
  1244. rc = etr_register_port(&etr_port0_dev);
  1245. if (rc)
  1246. goto out_remove_stepping_mode;
  1247. rc = etr_register_port(&etr_port1_dev);
  1248. if (rc)
  1249. goto out_remove_port0;
  1250. return 0;
  1251. out_remove_port0:
  1252. etr_unregister_port(&etr_port0_dev);
  1253. out_remove_stepping_mode:
  1254. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1255. out_remove_stepping_port:
  1256. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1257. out_unreg_subsys:
  1258. bus_unregister(&etr_subsys);
  1259. out:
  1260. return rc;
  1261. }
  1262. device_initcall(etr_init_sysfs);
  1263. /*
  1264. * Server Time Protocol (STP) code.
  1265. */
  1266. static int stp_online;
  1267. static struct stp_sstpi stp_info;
  1268. static void *stp_page;
  1269. static void stp_work_fn(struct work_struct *work);
  1270. static DEFINE_MUTEX(stp_work_mutex);
  1271. static DECLARE_WORK(stp_work, stp_work_fn);
  1272. static struct timer_list stp_timer;
  1273. static int __init early_parse_stp(char *p)
  1274. {
  1275. if (strncmp(p, "off", 3) == 0)
  1276. stp_online = 0;
  1277. else if (strncmp(p, "on", 2) == 0)
  1278. stp_online = 1;
  1279. return 0;
  1280. }
  1281. early_param("stp", early_parse_stp);
  1282. /*
  1283. * Reset STP attachment.
  1284. */
  1285. static void __init stp_reset(void)
  1286. {
  1287. int rc;
  1288. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1289. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1290. if (rc == 0)
  1291. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1292. else if (stp_online) {
  1293. pr_warning("The real or virtual hardware system does "
  1294. "not provide an STP interface\n");
  1295. free_page((unsigned long) stp_page);
  1296. stp_page = NULL;
  1297. stp_online = 0;
  1298. }
  1299. }
  1300. static void stp_timeout(unsigned long dummy)
  1301. {
  1302. queue_work(time_sync_wq, &stp_work);
  1303. }
  1304. static int __init stp_init(void)
  1305. {
  1306. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1307. return 0;
  1308. setup_timer(&stp_timer, stp_timeout, 0UL);
  1309. time_init_wq();
  1310. if (!stp_online)
  1311. return 0;
  1312. queue_work(time_sync_wq, &stp_work);
  1313. return 0;
  1314. }
  1315. arch_initcall(stp_init);
  1316. /*
  1317. * STP timing alert. There are three causes:
  1318. * 1) timing status change
  1319. * 2) link availability change
  1320. * 3) time control parameter change
  1321. * In all three cases we are only interested in the clock source state.
  1322. * If a STP clock source is now available use it.
  1323. */
  1324. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1325. {
  1326. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1327. queue_work(time_sync_wq, &stp_work);
  1328. }
  1329. /*
  1330. * STP sync check machine check. This is called when the timing state
  1331. * changes from the synchronized state to the unsynchronized state.
  1332. * After a STP sync check the clock is not in sync. The machine check
  1333. * is broadcasted to all cpus at the same time.
  1334. */
  1335. void stp_sync_check(void)
  1336. {
  1337. disable_sync_clock(NULL);
  1338. queue_work(time_sync_wq, &stp_work);
  1339. }
  1340. /*
  1341. * STP island condition machine check. This is called when an attached
  1342. * server attempts to communicate over an STP link and the servers
  1343. * have matching CTN ids and have a valid stratum-1 configuration
  1344. * but the configurations do not match.
  1345. */
  1346. void stp_island_check(void)
  1347. {
  1348. disable_sync_clock(NULL);
  1349. queue_work(time_sync_wq, &stp_work);
  1350. }
  1351. static int stp_sync_clock(void *data)
  1352. {
  1353. static int first;
  1354. unsigned long long old_clock, delta;
  1355. struct clock_sync_data *stp_sync;
  1356. int rc;
  1357. stp_sync = data;
  1358. if (xchg(&first, 1) == 1) {
  1359. /* Slave */
  1360. clock_sync_cpu(stp_sync);
  1361. return 0;
  1362. }
  1363. /* Wait until all other cpus entered the sync function. */
  1364. while (atomic_read(&stp_sync->cpus) != 0)
  1365. cpu_relax();
  1366. enable_sync_clock();
  1367. rc = 0;
  1368. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1369. stp_info.todoff[2] || stp_info.todoff[3] ||
  1370. stp_info.tmd != 2) {
  1371. old_clock = get_tod_clock();
  1372. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1373. if (rc == 0) {
  1374. delta = adjust_time(old_clock, get_tod_clock(), 0);
  1375. fixup_clock_comparator(delta);
  1376. rc = chsc_sstpi(stp_page, &stp_info,
  1377. sizeof(struct stp_sstpi));
  1378. if (rc == 0 && stp_info.tmd != 2)
  1379. rc = -EAGAIN;
  1380. }
  1381. }
  1382. if (rc) {
  1383. disable_sync_clock(NULL);
  1384. stp_sync->in_sync = -EAGAIN;
  1385. } else
  1386. stp_sync->in_sync = 1;
  1387. xchg(&first, 0);
  1388. return 0;
  1389. }
  1390. /*
  1391. * STP work. Check for the STP state and take over the clock
  1392. * synchronization if the STP clock source is usable.
  1393. */
  1394. static void stp_work_fn(struct work_struct *work)
  1395. {
  1396. struct clock_sync_data stp_sync;
  1397. int rc;
  1398. /* prevent multiple execution. */
  1399. mutex_lock(&stp_work_mutex);
  1400. if (!stp_online) {
  1401. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1402. del_timer_sync(&stp_timer);
  1403. goto out_unlock;
  1404. }
  1405. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1406. if (rc)
  1407. goto out_unlock;
  1408. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1409. if (rc || stp_info.c == 0)
  1410. goto out_unlock;
  1411. /* Skip synchronization if the clock is already in sync. */
  1412. if (check_sync_clock())
  1413. goto out_unlock;
  1414. memset(&stp_sync, 0, sizeof(stp_sync));
  1415. get_online_cpus();
  1416. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1417. stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
  1418. put_online_cpus();
  1419. if (!check_sync_clock())
  1420. /*
  1421. * There is a usable clock but the synchonization failed.
  1422. * Retry after a second.
  1423. */
  1424. mod_timer(&stp_timer, jiffies + HZ);
  1425. out_unlock:
  1426. mutex_unlock(&stp_work_mutex);
  1427. }
  1428. /*
  1429. * STP subsys sysfs interface functions
  1430. */
  1431. static struct bus_type stp_subsys = {
  1432. .name = "stp",
  1433. .dev_name = "stp",
  1434. };
  1435. static ssize_t stp_ctn_id_show(struct device *dev,
  1436. struct device_attribute *attr,
  1437. char *buf)
  1438. {
  1439. if (!stp_online)
  1440. return -ENODATA;
  1441. return sprintf(buf, "%016llx\n",
  1442. *(unsigned long long *) stp_info.ctnid);
  1443. }
  1444. static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1445. static ssize_t stp_ctn_type_show(struct device *dev,
  1446. struct device_attribute *attr,
  1447. char *buf)
  1448. {
  1449. if (!stp_online)
  1450. return -ENODATA;
  1451. return sprintf(buf, "%i\n", stp_info.ctn);
  1452. }
  1453. static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1454. static ssize_t stp_dst_offset_show(struct device *dev,
  1455. struct device_attribute *attr,
  1456. char *buf)
  1457. {
  1458. if (!stp_online || !(stp_info.vbits & 0x2000))
  1459. return -ENODATA;
  1460. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1461. }
  1462. static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1463. static ssize_t stp_leap_seconds_show(struct device *dev,
  1464. struct device_attribute *attr,
  1465. char *buf)
  1466. {
  1467. if (!stp_online || !(stp_info.vbits & 0x8000))
  1468. return -ENODATA;
  1469. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1470. }
  1471. static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1472. static ssize_t stp_stratum_show(struct device *dev,
  1473. struct device_attribute *attr,
  1474. char *buf)
  1475. {
  1476. if (!stp_online)
  1477. return -ENODATA;
  1478. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1479. }
  1480. static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1481. static ssize_t stp_time_offset_show(struct device *dev,
  1482. struct device_attribute *attr,
  1483. char *buf)
  1484. {
  1485. if (!stp_online || !(stp_info.vbits & 0x0800))
  1486. return -ENODATA;
  1487. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1488. }
  1489. static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1490. static ssize_t stp_time_zone_offset_show(struct device *dev,
  1491. struct device_attribute *attr,
  1492. char *buf)
  1493. {
  1494. if (!stp_online || !(stp_info.vbits & 0x4000))
  1495. return -ENODATA;
  1496. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1497. }
  1498. static DEVICE_ATTR(time_zone_offset, 0400,
  1499. stp_time_zone_offset_show, NULL);
  1500. static ssize_t stp_timing_mode_show(struct device *dev,
  1501. struct device_attribute *attr,
  1502. char *buf)
  1503. {
  1504. if (!stp_online)
  1505. return -ENODATA;
  1506. return sprintf(buf, "%i\n", stp_info.tmd);
  1507. }
  1508. static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1509. static ssize_t stp_timing_state_show(struct device *dev,
  1510. struct device_attribute *attr,
  1511. char *buf)
  1512. {
  1513. if (!stp_online)
  1514. return -ENODATA;
  1515. return sprintf(buf, "%i\n", stp_info.tst);
  1516. }
  1517. static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1518. static ssize_t stp_online_show(struct device *dev,
  1519. struct device_attribute *attr,
  1520. char *buf)
  1521. {
  1522. return sprintf(buf, "%i\n", stp_online);
  1523. }
  1524. static ssize_t stp_online_store(struct device *dev,
  1525. struct device_attribute *attr,
  1526. const char *buf, size_t count)
  1527. {
  1528. unsigned int value;
  1529. value = simple_strtoul(buf, NULL, 0);
  1530. if (value != 0 && value != 1)
  1531. return -EINVAL;
  1532. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1533. return -EOPNOTSUPP;
  1534. mutex_lock(&clock_sync_mutex);
  1535. stp_online = value;
  1536. if (stp_online)
  1537. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1538. else
  1539. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1540. queue_work(time_sync_wq, &stp_work);
  1541. mutex_unlock(&clock_sync_mutex);
  1542. return count;
  1543. }
  1544. /*
  1545. * Can't use DEVICE_ATTR because the attribute should be named
  1546. * stp/online but dev_attr_online already exists in this file ..
  1547. */
  1548. static struct device_attribute dev_attr_stp_online = {
  1549. .attr = { .name = "online", .mode = 0600 },
  1550. .show = stp_online_show,
  1551. .store = stp_online_store,
  1552. };
  1553. static struct device_attribute *stp_attributes[] = {
  1554. &dev_attr_ctn_id,
  1555. &dev_attr_ctn_type,
  1556. &dev_attr_dst_offset,
  1557. &dev_attr_leap_seconds,
  1558. &dev_attr_stp_online,
  1559. &dev_attr_stratum,
  1560. &dev_attr_time_offset,
  1561. &dev_attr_time_zone_offset,
  1562. &dev_attr_timing_mode,
  1563. &dev_attr_timing_state,
  1564. NULL
  1565. };
  1566. static int __init stp_init_sysfs(void)
  1567. {
  1568. struct device_attribute **attr;
  1569. int rc;
  1570. rc = subsys_system_register(&stp_subsys, NULL);
  1571. if (rc)
  1572. goto out;
  1573. for (attr = stp_attributes; *attr; attr++) {
  1574. rc = device_create_file(stp_subsys.dev_root, *attr);
  1575. if (rc)
  1576. goto out_unreg;
  1577. }
  1578. return 0;
  1579. out_unreg:
  1580. for (; attr >= stp_attributes; attr--)
  1581. device_remove_file(stp_subsys.dev_root, *attr);
  1582. bus_unregister(&stp_subsys);
  1583. out:
  1584. return rc;
  1585. }
  1586. device_initcall(stp_init_sysfs);