bpf_jit_comp.c 17 KB

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  1. /*
  2. * BPF JIT compiler for ARM64
  3. *
  4. * Copyright (C) 2014 Zi Shen Lim <zlim.lnx@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #define pr_fmt(fmt) "bpf_jit: " fmt
  19. #include <linux/filter.h>
  20. #include <linux/moduleloader.h>
  21. #include <linux/printk.h>
  22. #include <linux/skbuff.h>
  23. #include <linux/slab.h>
  24. #include <asm/byteorder.h>
  25. #include <asm/cacheflush.h>
  26. #include "bpf_jit.h"
  27. int bpf_jit_enable __read_mostly;
  28. #define TMP_REG_1 (MAX_BPF_REG + 0)
  29. #define TMP_REG_2 (MAX_BPF_REG + 1)
  30. /* Map BPF registers to A64 registers */
  31. static const int bpf2a64[] = {
  32. /* return value from in-kernel function, and exit value from eBPF */
  33. [BPF_REG_0] = A64_R(7),
  34. /* arguments from eBPF program to in-kernel function */
  35. [BPF_REG_1] = A64_R(0),
  36. [BPF_REG_2] = A64_R(1),
  37. [BPF_REG_3] = A64_R(2),
  38. [BPF_REG_4] = A64_R(3),
  39. [BPF_REG_5] = A64_R(4),
  40. /* callee saved registers that in-kernel function will preserve */
  41. [BPF_REG_6] = A64_R(19),
  42. [BPF_REG_7] = A64_R(20),
  43. [BPF_REG_8] = A64_R(21),
  44. [BPF_REG_9] = A64_R(22),
  45. /* read-only frame pointer to access stack */
  46. [BPF_REG_FP] = A64_FP,
  47. /* temporary register for internal BPF JIT */
  48. [TMP_REG_1] = A64_R(23),
  49. [TMP_REG_2] = A64_R(24),
  50. };
  51. struct jit_ctx {
  52. const struct bpf_prog *prog;
  53. int idx;
  54. int tmp_used;
  55. int body_offset;
  56. int *offset;
  57. u32 *image;
  58. };
  59. static inline void emit(const u32 insn, struct jit_ctx *ctx)
  60. {
  61. if (ctx->image != NULL)
  62. ctx->image[ctx->idx] = cpu_to_le32(insn);
  63. ctx->idx++;
  64. }
  65. static inline void emit_a64_mov_i64(const int reg, const u64 val,
  66. struct jit_ctx *ctx)
  67. {
  68. u64 tmp = val;
  69. int shift = 0;
  70. emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx);
  71. tmp >>= 16;
  72. shift += 16;
  73. while (tmp) {
  74. if (tmp & 0xffff)
  75. emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);
  76. tmp >>= 16;
  77. shift += 16;
  78. }
  79. }
  80. static inline void emit_a64_mov_i(const int is64, const int reg,
  81. const s32 val, struct jit_ctx *ctx)
  82. {
  83. u16 hi = val >> 16;
  84. u16 lo = val & 0xffff;
  85. if (hi & 0x8000) {
  86. if (hi == 0xffff) {
  87. emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx);
  88. } else {
  89. emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx);
  90. emit(A64_MOVK(is64, reg, lo, 0), ctx);
  91. }
  92. } else {
  93. emit(A64_MOVZ(is64, reg, lo, 0), ctx);
  94. if (hi)
  95. emit(A64_MOVK(is64, reg, hi, 16), ctx);
  96. }
  97. }
  98. static inline int bpf2a64_offset(int bpf_to, int bpf_from,
  99. const struct jit_ctx *ctx)
  100. {
  101. int to = ctx->offset[bpf_to + 1];
  102. /* -1 to account for the Branch instruction */
  103. int from = ctx->offset[bpf_from + 1] - 1;
  104. return to - from;
  105. }
  106. static inline int epilogue_offset(const struct jit_ctx *ctx)
  107. {
  108. int to = ctx->offset[ctx->prog->len - 1];
  109. int from = ctx->idx - ctx->body_offset;
  110. return to - from;
  111. }
  112. /* Stack must be multiples of 16B */
  113. #define STACK_ALIGN(sz) (((sz) + 15) & ~15)
  114. static void build_prologue(struct jit_ctx *ctx)
  115. {
  116. const u8 r6 = bpf2a64[BPF_REG_6];
  117. const u8 r7 = bpf2a64[BPF_REG_7];
  118. const u8 r8 = bpf2a64[BPF_REG_8];
  119. const u8 r9 = bpf2a64[BPF_REG_9];
  120. const u8 fp = bpf2a64[BPF_REG_FP];
  121. const u8 ra = bpf2a64[BPF_REG_A];
  122. const u8 rx = bpf2a64[BPF_REG_X];
  123. const u8 tmp1 = bpf2a64[TMP_REG_1];
  124. const u8 tmp2 = bpf2a64[TMP_REG_2];
  125. int stack_size = MAX_BPF_STACK;
  126. stack_size += 4; /* extra for skb_copy_bits buffer */
  127. stack_size = STACK_ALIGN(stack_size);
  128. /* Save callee-saved register */
  129. emit(A64_PUSH(r6, r7, A64_SP), ctx);
  130. emit(A64_PUSH(r8, r9, A64_SP), ctx);
  131. if (ctx->tmp_used)
  132. emit(A64_PUSH(tmp1, tmp2, A64_SP), ctx);
  133. /* Set up BPF stack */
  134. emit(A64_SUB_I(1, A64_SP, A64_SP, stack_size), ctx);
  135. /* Set up frame pointer */
  136. emit(A64_MOV(1, fp, A64_SP), ctx);
  137. /* Clear registers A and X */
  138. emit_a64_mov_i64(ra, 0, ctx);
  139. emit_a64_mov_i64(rx, 0, ctx);
  140. }
  141. static void build_epilogue(struct jit_ctx *ctx)
  142. {
  143. const u8 r0 = bpf2a64[BPF_REG_0];
  144. const u8 r6 = bpf2a64[BPF_REG_6];
  145. const u8 r7 = bpf2a64[BPF_REG_7];
  146. const u8 r8 = bpf2a64[BPF_REG_8];
  147. const u8 r9 = bpf2a64[BPF_REG_9];
  148. const u8 fp = bpf2a64[BPF_REG_FP];
  149. const u8 tmp1 = bpf2a64[TMP_REG_1];
  150. const u8 tmp2 = bpf2a64[TMP_REG_2];
  151. int stack_size = MAX_BPF_STACK;
  152. stack_size += 4; /* extra for skb_copy_bits buffer */
  153. stack_size = STACK_ALIGN(stack_size);
  154. /* We're done with BPF stack */
  155. emit(A64_ADD_I(1, A64_SP, A64_SP, stack_size), ctx);
  156. /* Restore callee-saved register */
  157. if (ctx->tmp_used)
  158. emit(A64_POP(tmp1, tmp2, A64_SP), ctx);
  159. emit(A64_POP(r8, r9, A64_SP), ctx);
  160. emit(A64_POP(r6, r7, A64_SP), ctx);
  161. /* Restore frame pointer */
  162. emit(A64_MOV(1, fp, A64_SP), ctx);
  163. /* Set return value */
  164. emit(A64_MOV(1, A64_R(0), r0), ctx);
  165. emit(A64_RET(A64_LR), ctx);
  166. }
  167. static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
  168. {
  169. const u8 code = insn->code;
  170. const u8 dst = bpf2a64[insn->dst_reg];
  171. const u8 src = bpf2a64[insn->src_reg];
  172. const u8 tmp = bpf2a64[TMP_REG_1];
  173. const u8 tmp2 = bpf2a64[TMP_REG_2];
  174. const s16 off = insn->off;
  175. const s32 imm = insn->imm;
  176. const int i = insn - ctx->prog->insnsi;
  177. const bool is64 = BPF_CLASS(code) == BPF_ALU64;
  178. u8 jmp_cond;
  179. s32 jmp_offset;
  180. switch (code) {
  181. /* dst = src */
  182. case BPF_ALU | BPF_MOV | BPF_X:
  183. case BPF_ALU64 | BPF_MOV | BPF_X:
  184. emit(A64_MOV(is64, dst, src), ctx);
  185. break;
  186. /* dst = dst OP src */
  187. case BPF_ALU | BPF_ADD | BPF_X:
  188. case BPF_ALU64 | BPF_ADD | BPF_X:
  189. emit(A64_ADD(is64, dst, dst, src), ctx);
  190. break;
  191. case BPF_ALU | BPF_SUB | BPF_X:
  192. case BPF_ALU64 | BPF_SUB | BPF_X:
  193. emit(A64_SUB(is64, dst, dst, src), ctx);
  194. break;
  195. case BPF_ALU | BPF_AND | BPF_X:
  196. case BPF_ALU64 | BPF_AND | BPF_X:
  197. emit(A64_AND(is64, dst, dst, src), ctx);
  198. break;
  199. case BPF_ALU | BPF_OR | BPF_X:
  200. case BPF_ALU64 | BPF_OR | BPF_X:
  201. emit(A64_ORR(is64, dst, dst, src), ctx);
  202. break;
  203. case BPF_ALU | BPF_XOR | BPF_X:
  204. case BPF_ALU64 | BPF_XOR | BPF_X:
  205. emit(A64_EOR(is64, dst, dst, src), ctx);
  206. break;
  207. case BPF_ALU | BPF_MUL | BPF_X:
  208. case BPF_ALU64 | BPF_MUL | BPF_X:
  209. emit(A64_MUL(is64, dst, dst, src), ctx);
  210. break;
  211. case BPF_ALU | BPF_DIV | BPF_X:
  212. case BPF_ALU64 | BPF_DIV | BPF_X:
  213. emit(A64_UDIV(is64, dst, dst, src), ctx);
  214. break;
  215. case BPF_ALU | BPF_MOD | BPF_X:
  216. case BPF_ALU64 | BPF_MOD | BPF_X:
  217. ctx->tmp_used = 1;
  218. emit(A64_UDIV(is64, tmp, dst, src), ctx);
  219. emit(A64_MUL(is64, tmp, tmp, src), ctx);
  220. emit(A64_SUB(is64, dst, dst, tmp), ctx);
  221. break;
  222. /* dst = -dst */
  223. case BPF_ALU | BPF_NEG:
  224. case BPF_ALU64 | BPF_NEG:
  225. emit(A64_NEG(is64, dst, dst), ctx);
  226. break;
  227. /* dst = BSWAP##imm(dst) */
  228. case BPF_ALU | BPF_END | BPF_FROM_LE:
  229. case BPF_ALU | BPF_END | BPF_FROM_BE:
  230. #ifdef CONFIG_CPU_BIG_ENDIAN
  231. if (BPF_SRC(code) == BPF_FROM_BE)
  232. break;
  233. #else /* !CONFIG_CPU_BIG_ENDIAN */
  234. if (BPF_SRC(code) == BPF_FROM_LE)
  235. break;
  236. #endif
  237. switch (imm) {
  238. case 16:
  239. emit(A64_REV16(is64, dst, dst), ctx);
  240. break;
  241. case 32:
  242. emit(A64_REV32(is64, dst, dst), ctx);
  243. break;
  244. case 64:
  245. emit(A64_REV64(dst, dst), ctx);
  246. break;
  247. }
  248. break;
  249. /* dst = imm */
  250. case BPF_ALU | BPF_MOV | BPF_K:
  251. case BPF_ALU64 | BPF_MOV | BPF_K:
  252. emit_a64_mov_i(is64, dst, imm, ctx);
  253. break;
  254. /* dst = dst OP imm */
  255. case BPF_ALU | BPF_ADD | BPF_K:
  256. case BPF_ALU64 | BPF_ADD | BPF_K:
  257. ctx->tmp_used = 1;
  258. emit_a64_mov_i(is64, tmp, imm, ctx);
  259. emit(A64_ADD(is64, dst, dst, tmp), ctx);
  260. break;
  261. case BPF_ALU | BPF_SUB | BPF_K:
  262. case BPF_ALU64 | BPF_SUB | BPF_K:
  263. ctx->tmp_used = 1;
  264. emit_a64_mov_i(is64, tmp, imm, ctx);
  265. emit(A64_SUB(is64, dst, dst, tmp), ctx);
  266. break;
  267. case BPF_ALU | BPF_AND | BPF_K:
  268. case BPF_ALU64 | BPF_AND | BPF_K:
  269. ctx->tmp_used = 1;
  270. emit_a64_mov_i(is64, tmp, imm, ctx);
  271. emit(A64_AND(is64, dst, dst, tmp), ctx);
  272. break;
  273. case BPF_ALU | BPF_OR | BPF_K:
  274. case BPF_ALU64 | BPF_OR | BPF_K:
  275. ctx->tmp_used = 1;
  276. emit_a64_mov_i(is64, tmp, imm, ctx);
  277. emit(A64_ORR(is64, dst, dst, tmp), ctx);
  278. break;
  279. case BPF_ALU | BPF_XOR | BPF_K:
  280. case BPF_ALU64 | BPF_XOR | BPF_K:
  281. ctx->tmp_used = 1;
  282. emit_a64_mov_i(is64, tmp, imm, ctx);
  283. emit(A64_EOR(is64, dst, dst, tmp), ctx);
  284. break;
  285. case BPF_ALU | BPF_MUL | BPF_K:
  286. case BPF_ALU64 | BPF_MUL | BPF_K:
  287. ctx->tmp_used = 1;
  288. emit_a64_mov_i(is64, tmp, imm, ctx);
  289. emit(A64_MUL(is64, dst, dst, tmp), ctx);
  290. break;
  291. case BPF_ALU | BPF_DIV | BPF_K:
  292. case BPF_ALU64 | BPF_DIV | BPF_K:
  293. ctx->tmp_used = 1;
  294. emit_a64_mov_i(is64, tmp, imm, ctx);
  295. emit(A64_UDIV(is64, dst, dst, tmp), ctx);
  296. break;
  297. case BPF_ALU | BPF_MOD | BPF_K:
  298. case BPF_ALU64 | BPF_MOD | BPF_K:
  299. ctx->tmp_used = 1;
  300. emit_a64_mov_i(is64, tmp2, imm, ctx);
  301. emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);
  302. emit(A64_MUL(is64, tmp, tmp, tmp2), ctx);
  303. emit(A64_SUB(is64, dst, dst, tmp), ctx);
  304. break;
  305. case BPF_ALU | BPF_LSH | BPF_K:
  306. case BPF_ALU64 | BPF_LSH | BPF_K:
  307. emit(A64_LSL(is64, dst, dst, imm), ctx);
  308. break;
  309. case BPF_ALU | BPF_RSH | BPF_K:
  310. case BPF_ALU64 | BPF_RSH | BPF_K:
  311. emit(A64_LSR(is64, dst, dst, imm), ctx);
  312. break;
  313. case BPF_ALU | BPF_ARSH | BPF_K:
  314. case BPF_ALU64 | BPF_ARSH | BPF_K:
  315. emit(A64_ASR(is64, dst, dst, imm), ctx);
  316. break;
  317. #define check_imm(bits, imm) do { \
  318. if ((((imm) > 0) && ((imm) >> (bits))) || \
  319. (((imm) < 0) && (~(imm) >> (bits)))) { \
  320. pr_info("[%2d] imm=%d(0x%x) out of range\n", \
  321. i, imm, imm); \
  322. return -EINVAL; \
  323. } \
  324. } while (0)
  325. #define check_imm19(imm) check_imm(19, imm)
  326. #define check_imm26(imm) check_imm(26, imm)
  327. /* JUMP off */
  328. case BPF_JMP | BPF_JA:
  329. jmp_offset = bpf2a64_offset(i + off, i, ctx);
  330. check_imm26(jmp_offset);
  331. emit(A64_B(jmp_offset), ctx);
  332. break;
  333. /* IF (dst COND src) JUMP off */
  334. case BPF_JMP | BPF_JEQ | BPF_X:
  335. case BPF_JMP | BPF_JGT | BPF_X:
  336. case BPF_JMP | BPF_JGE | BPF_X:
  337. case BPF_JMP | BPF_JNE | BPF_X:
  338. case BPF_JMP | BPF_JSGT | BPF_X:
  339. case BPF_JMP | BPF_JSGE | BPF_X:
  340. emit(A64_CMP(1, dst, src), ctx);
  341. emit_cond_jmp:
  342. jmp_offset = bpf2a64_offset(i + off, i, ctx);
  343. check_imm19(jmp_offset);
  344. switch (BPF_OP(code)) {
  345. case BPF_JEQ:
  346. jmp_cond = A64_COND_EQ;
  347. break;
  348. case BPF_JGT:
  349. jmp_cond = A64_COND_HI;
  350. break;
  351. case BPF_JGE:
  352. jmp_cond = A64_COND_CS;
  353. break;
  354. case BPF_JNE:
  355. jmp_cond = A64_COND_NE;
  356. break;
  357. case BPF_JSGT:
  358. jmp_cond = A64_COND_GT;
  359. break;
  360. case BPF_JSGE:
  361. jmp_cond = A64_COND_GE;
  362. break;
  363. default:
  364. return -EFAULT;
  365. }
  366. emit(A64_B_(jmp_cond, jmp_offset), ctx);
  367. break;
  368. case BPF_JMP | BPF_JSET | BPF_X:
  369. emit(A64_TST(1, dst, src), ctx);
  370. goto emit_cond_jmp;
  371. /* IF (dst COND imm) JUMP off */
  372. case BPF_JMP | BPF_JEQ | BPF_K:
  373. case BPF_JMP | BPF_JGT | BPF_K:
  374. case BPF_JMP | BPF_JGE | BPF_K:
  375. case BPF_JMP | BPF_JNE | BPF_K:
  376. case BPF_JMP | BPF_JSGT | BPF_K:
  377. case BPF_JMP | BPF_JSGE | BPF_K:
  378. ctx->tmp_used = 1;
  379. emit_a64_mov_i(1, tmp, imm, ctx);
  380. emit(A64_CMP(1, dst, tmp), ctx);
  381. goto emit_cond_jmp;
  382. case BPF_JMP | BPF_JSET | BPF_K:
  383. ctx->tmp_used = 1;
  384. emit_a64_mov_i(1, tmp, imm, ctx);
  385. emit(A64_TST(1, dst, tmp), ctx);
  386. goto emit_cond_jmp;
  387. /* function call */
  388. case BPF_JMP | BPF_CALL:
  389. {
  390. const u8 r0 = bpf2a64[BPF_REG_0];
  391. const u64 func = (u64)__bpf_call_base + imm;
  392. ctx->tmp_used = 1;
  393. emit_a64_mov_i64(tmp, func, ctx);
  394. emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
  395. emit(A64_MOV(1, A64_FP, A64_SP), ctx);
  396. emit(A64_BLR(tmp), ctx);
  397. emit(A64_MOV(1, r0, A64_R(0)), ctx);
  398. emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
  399. break;
  400. }
  401. /* function return */
  402. case BPF_JMP | BPF_EXIT:
  403. if (i == ctx->prog->len - 1)
  404. break;
  405. jmp_offset = epilogue_offset(ctx);
  406. check_imm26(jmp_offset);
  407. emit(A64_B(jmp_offset), ctx);
  408. break;
  409. /* LDX: dst = *(size *)(src + off) */
  410. case BPF_LDX | BPF_MEM | BPF_W:
  411. case BPF_LDX | BPF_MEM | BPF_H:
  412. case BPF_LDX | BPF_MEM | BPF_B:
  413. case BPF_LDX | BPF_MEM | BPF_DW:
  414. ctx->tmp_used = 1;
  415. emit_a64_mov_i(1, tmp, off, ctx);
  416. switch (BPF_SIZE(code)) {
  417. case BPF_W:
  418. emit(A64_LDR32(dst, src, tmp), ctx);
  419. break;
  420. case BPF_H:
  421. emit(A64_LDRH(dst, src, tmp), ctx);
  422. break;
  423. case BPF_B:
  424. emit(A64_LDRB(dst, src, tmp), ctx);
  425. break;
  426. case BPF_DW:
  427. emit(A64_LDR64(dst, src, tmp), ctx);
  428. break;
  429. }
  430. break;
  431. /* ST: *(size *)(dst + off) = imm */
  432. case BPF_ST | BPF_MEM | BPF_W:
  433. case BPF_ST | BPF_MEM | BPF_H:
  434. case BPF_ST | BPF_MEM | BPF_B:
  435. case BPF_ST | BPF_MEM | BPF_DW:
  436. goto notyet;
  437. /* STX: *(size *)(dst + off) = src */
  438. case BPF_STX | BPF_MEM | BPF_W:
  439. case BPF_STX | BPF_MEM | BPF_H:
  440. case BPF_STX | BPF_MEM | BPF_B:
  441. case BPF_STX | BPF_MEM | BPF_DW:
  442. ctx->tmp_used = 1;
  443. emit_a64_mov_i(1, tmp, off, ctx);
  444. switch (BPF_SIZE(code)) {
  445. case BPF_W:
  446. emit(A64_STR32(src, dst, tmp), ctx);
  447. break;
  448. case BPF_H:
  449. emit(A64_STRH(src, dst, tmp), ctx);
  450. break;
  451. case BPF_B:
  452. emit(A64_STRB(src, dst, tmp), ctx);
  453. break;
  454. case BPF_DW:
  455. emit(A64_STR64(src, dst, tmp), ctx);
  456. break;
  457. }
  458. break;
  459. /* STX XADD: lock *(u32 *)(dst + off) += src */
  460. case BPF_STX | BPF_XADD | BPF_W:
  461. /* STX XADD: lock *(u64 *)(dst + off) += src */
  462. case BPF_STX | BPF_XADD | BPF_DW:
  463. goto notyet;
  464. /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + imm)) */
  465. case BPF_LD | BPF_ABS | BPF_W:
  466. case BPF_LD | BPF_ABS | BPF_H:
  467. case BPF_LD | BPF_ABS | BPF_B:
  468. /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + src + imm)) */
  469. case BPF_LD | BPF_IND | BPF_W:
  470. case BPF_LD | BPF_IND | BPF_H:
  471. case BPF_LD | BPF_IND | BPF_B:
  472. {
  473. const u8 r0 = bpf2a64[BPF_REG_0]; /* r0 = return value */
  474. const u8 r6 = bpf2a64[BPF_REG_6]; /* r6 = pointer to sk_buff */
  475. const u8 fp = bpf2a64[BPF_REG_FP];
  476. const u8 r1 = bpf2a64[BPF_REG_1]; /* r1: struct sk_buff *skb */
  477. const u8 r2 = bpf2a64[BPF_REG_2]; /* r2: int k */
  478. const u8 r3 = bpf2a64[BPF_REG_3]; /* r3: unsigned int size */
  479. const u8 r4 = bpf2a64[BPF_REG_4]; /* r4: void *buffer */
  480. const u8 r5 = bpf2a64[BPF_REG_5]; /* r5: void *(*func)(...) */
  481. int size;
  482. emit(A64_MOV(1, r1, r6), ctx);
  483. emit_a64_mov_i(0, r2, imm, ctx);
  484. if (BPF_MODE(code) == BPF_IND)
  485. emit(A64_ADD(0, r2, r2, src), ctx);
  486. switch (BPF_SIZE(code)) {
  487. case BPF_W:
  488. size = 4;
  489. break;
  490. case BPF_H:
  491. size = 2;
  492. break;
  493. case BPF_B:
  494. size = 1;
  495. break;
  496. default:
  497. return -EINVAL;
  498. }
  499. emit_a64_mov_i64(r3, size, ctx);
  500. emit(A64_ADD_I(1, r4, fp, MAX_BPF_STACK), ctx);
  501. emit_a64_mov_i64(r5, (unsigned long)bpf_load_pointer, ctx);
  502. emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
  503. emit(A64_MOV(1, A64_FP, A64_SP), ctx);
  504. emit(A64_BLR(r5), ctx);
  505. emit(A64_MOV(1, r0, A64_R(0)), ctx);
  506. emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
  507. jmp_offset = epilogue_offset(ctx);
  508. check_imm19(jmp_offset);
  509. emit(A64_CBZ(1, r0, jmp_offset), ctx);
  510. emit(A64_MOV(1, r5, r0), ctx);
  511. switch (BPF_SIZE(code)) {
  512. case BPF_W:
  513. emit(A64_LDR32(r0, r5, A64_ZR), ctx);
  514. #ifndef CONFIG_CPU_BIG_ENDIAN
  515. emit(A64_REV32(0, r0, r0), ctx);
  516. #endif
  517. break;
  518. case BPF_H:
  519. emit(A64_LDRH(r0, r5, A64_ZR), ctx);
  520. #ifndef CONFIG_CPU_BIG_ENDIAN
  521. emit(A64_REV16(0, r0, r0), ctx);
  522. #endif
  523. break;
  524. case BPF_B:
  525. emit(A64_LDRB(r0, r5, A64_ZR), ctx);
  526. break;
  527. }
  528. break;
  529. }
  530. notyet:
  531. pr_info_once("*** NOT YET: opcode %02x ***\n", code);
  532. return -EFAULT;
  533. default:
  534. pr_err_once("unknown opcode %02x\n", code);
  535. return -EINVAL;
  536. }
  537. return 0;
  538. }
  539. static int build_body(struct jit_ctx *ctx)
  540. {
  541. const struct bpf_prog *prog = ctx->prog;
  542. int i;
  543. for (i = 0; i < prog->len; i++) {
  544. const struct bpf_insn *insn = &prog->insnsi[i];
  545. int ret;
  546. if (ctx->image == NULL)
  547. ctx->offset[i] = ctx->idx;
  548. ret = build_insn(insn, ctx);
  549. if (ret)
  550. return ret;
  551. }
  552. return 0;
  553. }
  554. static inline void bpf_flush_icache(void *start, void *end)
  555. {
  556. flush_icache_range((unsigned long)start, (unsigned long)end);
  557. }
  558. void bpf_jit_compile(struct bpf_prog *prog)
  559. {
  560. /* Nothing to do here. We support Internal BPF. */
  561. }
  562. void bpf_int_jit_compile(struct bpf_prog *prog)
  563. {
  564. struct jit_ctx ctx;
  565. int image_size;
  566. if (!bpf_jit_enable)
  567. return;
  568. if (!prog || !prog->len)
  569. return;
  570. memset(&ctx, 0, sizeof(ctx));
  571. ctx.prog = prog;
  572. ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL);
  573. if (ctx.offset == NULL)
  574. return;
  575. /* 1. Initial fake pass to compute ctx->idx. */
  576. /* Fake pass to fill in ctx->offset. */
  577. if (build_body(&ctx))
  578. goto out;
  579. build_prologue(&ctx);
  580. build_epilogue(&ctx);
  581. /* Now we know the actual image size. */
  582. image_size = sizeof(u32) * ctx.idx;
  583. ctx.image = module_alloc(image_size);
  584. if (unlikely(ctx.image == NULL))
  585. goto out;
  586. /* 2. Now, the actual pass. */
  587. ctx.idx = 0;
  588. build_prologue(&ctx);
  589. ctx.body_offset = ctx.idx;
  590. if (build_body(&ctx)) {
  591. module_free(NULL, ctx.image);
  592. goto out;
  593. }
  594. build_epilogue(&ctx);
  595. /* And we're done. */
  596. if (bpf_jit_enable > 1)
  597. bpf_jit_dump(prog->len, image_size, 2, ctx.image);
  598. bpf_flush_icache(ctx.image, ctx.image + ctx.idx);
  599. prog->bpf_func = (void *)ctx.image;
  600. prog->jited = 1;
  601. out:
  602. kfree(ctx.offset);
  603. }
  604. void bpf_jit_free(struct bpf_prog *prog)
  605. {
  606. if (prog->jited)
  607. module_free(NULL, prog->bpf_func);
  608. kfree(prog);
  609. }