dma-mapping.c 12 KB

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  1. /*
  2. * SWIOTLB-based DMA API implementation
  3. *
  4. * Copyright (C) 2012 ARM Ltd.
  5. * Author: Catalin Marinas <catalin.marinas@arm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/gfp.h>
  20. #include <linux/export.h>
  21. #include <linux/slab.h>
  22. #include <linux/genalloc.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/dma-contiguous.h>
  25. #include <linux/vmalloc.h>
  26. #include <linux/swiotlb.h>
  27. #include <asm/cacheflush.h>
  28. struct dma_map_ops *dma_ops;
  29. EXPORT_SYMBOL(dma_ops);
  30. static pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot,
  31. bool coherent)
  32. {
  33. if (!coherent || dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs))
  34. return pgprot_writecombine(prot);
  35. return prot;
  36. }
  37. static struct gen_pool *atomic_pool;
  38. #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
  39. static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
  40. static int __init early_coherent_pool(char *p)
  41. {
  42. atomic_pool_size = memparse(p, &p);
  43. return 0;
  44. }
  45. early_param("coherent_pool", early_coherent_pool);
  46. static void *__alloc_from_pool(size_t size, struct page **ret_page)
  47. {
  48. unsigned long val;
  49. void *ptr = NULL;
  50. if (!atomic_pool) {
  51. WARN(1, "coherent pool not initialised!\n");
  52. return NULL;
  53. }
  54. val = gen_pool_alloc(atomic_pool, size);
  55. if (val) {
  56. phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
  57. *ret_page = phys_to_page(phys);
  58. ptr = (void *)val;
  59. }
  60. return ptr;
  61. }
  62. static bool __in_atomic_pool(void *start, size_t size)
  63. {
  64. return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
  65. }
  66. static int __free_from_pool(void *start, size_t size)
  67. {
  68. if (!__in_atomic_pool(start, size))
  69. return 0;
  70. gen_pool_free(atomic_pool, (unsigned long)start, size);
  71. return 1;
  72. }
  73. static void *__dma_alloc_coherent(struct device *dev, size_t size,
  74. dma_addr_t *dma_handle, gfp_t flags,
  75. struct dma_attrs *attrs)
  76. {
  77. if (dev == NULL) {
  78. WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
  79. return NULL;
  80. }
  81. if (IS_ENABLED(CONFIG_ZONE_DMA) &&
  82. dev->coherent_dma_mask <= DMA_BIT_MASK(32))
  83. flags |= GFP_DMA;
  84. if (IS_ENABLED(CONFIG_DMA_CMA) && (flags & __GFP_WAIT)) {
  85. struct page *page;
  86. size = PAGE_ALIGN(size);
  87. page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
  88. get_order(size));
  89. if (!page)
  90. return NULL;
  91. *dma_handle = phys_to_dma(dev, page_to_phys(page));
  92. return page_address(page);
  93. } else {
  94. return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
  95. }
  96. }
  97. static void __dma_free_coherent(struct device *dev, size_t size,
  98. void *vaddr, dma_addr_t dma_handle,
  99. struct dma_attrs *attrs)
  100. {
  101. bool freed;
  102. phys_addr_t paddr = dma_to_phys(dev, dma_handle);
  103. if (dev == NULL) {
  104. WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
  105. return;
  106. }
  107. freed = dma_release_from_contiguous(dev,
  108. phys_to_page(paddr),
  109. size >> PAGE_SHIFT);
  110. if (!freed)
  111. swiotlb_free_coherent(dev, size, vaddr, dma_handle);
  112. }
  113. static void *__dma_alloc_noncoherent(struct device *dev, size_t size,
  114. dma_addr_t *dma_handle, gfp_t flags,
  115. struct dma_attrs *attrs)
  116. {
  117. struct page *page;
  118. void *ptr, *coherent_ptr;
  119. size = PAGE_ALIGN(size);
  120. if (!(flags & __GFP_WAIT)) {
  121. struct page *page = NULL;
  122. void *addr = __alloc_from_pool(size, &page);
  123. if (addr)
  124. *dma_handle = phys_to_dma(dev, page_to_phys(page));
  125. return addr;
  126. }
  127. ptr = __dma_alloc_coherent(dev, size, dma_handle, flags, attrs);
  128. if (!ptr)
  129. goto no_mem;
  130. /* remove any dirty cache lines on the kernel alias */
  131. __dma_flush_range(ptr, ptr + size);
  132. /* create a coherent mapping */
  133. page = virt_to_page(ptr);
  134. coherent_ptr = dma_common_contiguous_remap(page, size, VM_USERMAP,
  135. __get_dma_pgprot(attrs,
  136. __pgprot(PROT_NORMAL_NC), false),
  137. NULL);
  138. if (!coherent_ptr)
  139. goto no_map;
  140. return coherent_ptr;
  141. no_map:
  142. __dma_free_coherent(dev, size, ptr, *dma_handle, attrs);
  143. no_mem:
  144. *dma_handle = DMA_ERROR_CODE;
  145. return NULL;
  146. }
  147. static void __dma_free_noncoherent(struct device *dev, size_t size,
  148. void *vaddr, dma_addr_t dma_handle,
  149. struct dma_attrs *attrs)
  150. {
  151. void *swiotlb_addr = phys_to_virt(dma_to_phys(dev, dma_handle));
  152. if (__free_from_pool(vaddr, size))
  153. return;
  154. vunmap(vaddr);
  155. __dma_free_coherent(dev, size, swiotlb_addr, dma_handle, attrs);
  156. }
  157. static dma_addr_t __swiotlb_map_page(struct device *dev, struct page *page,
  158. unsigned long offset, size_t size,
  159. enum dma_data_direction dir,
  160. struct dma_attrs *attrs)
  161. {
  162. dma_addr_t dev_addr;
  163. dev_addr = swiotlb_map_page(dev, page, offset, size, dir, attrs);
  164. __dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
  165. return dev_addr;
  166. }
  167. static void __swiotlb_unmap_page(struct device *dev, dma_addr_t dev_addr,
  168. size_t size, enum dma_data_direction dir,
  169. struct dma_attrs *attrs)
  170. {
  171. __dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
  172. swiotlb_unmap_page(dev, dev_addr, size, dir, attrs);
  173. }
  174. static int __swiotlb_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
  175. int nelems, enum dma_data_direction dir,
  176. struct dma_attrs *attrs)
  177. {
  178. struct scatterlist *sg;
  179. int i, ret;
  180. ret = swiotlb_map_sg_attrs(dev, sgl, nelems, dir, attrs);
  181. for_each_sg(sgl, sg, ret, i)
  182. __dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
  183. sg->length, dir);
  184. return ret;
  185. }
  186. static void __swiotlb_unmap_sg_attrs(struct device *dev,
  187. struct scatterlist *sgl, int nelems,
  188. enum dma_data_direction dir,
  189. struct dma_attrs *attrs)
  190. {
  191. struct scatterlist *sg;
  192. int i;
  193. for_each_sg(sgl, sg, nelems, i)
  194. __dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
  195. sg->length, dir);
  196. swiotlb_unmap_sg_attrs(dev, sgl, nelems, dir, attrs);
  197. }
  198. static void __swiotlb_sync_single_for_cpu(struct device *dev,
  199. dma_addr_t dev_addr, size_t size,
  200. enum dma_data_direction dir)
  201. {
  202. __dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
  203. swiotlb_sync_single_for_cpu(dev, dev_addr, size, dir);
  204. }
  205. static void __swiotlb_sync_single_for_device(struct device *dev,
  206. dma_addr_t dev_addr, size_t size,
  207. enum dma_data_direction dir)
  208. {
  209. swiotlb_sync_single_for_device(dev, dev_addr, size, dir);
  210. __dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
  211. }
  212. static void __swiotlb_sync_sg_for_cpu(struct device *dev,
  213. struct scatterlist *sgl, int nelems,
  214. enum dma_data_direction dir)
  215. {
  216. struct scatterlist *sg;
  217. int i;
  218. for_each_sg(sgl, sg, nelems, i)
  219. __dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
  220. sg->length, dir);
  221. swiotlb_sync_sg_for_cpu(dev, sgl, nelems, dir);
  222. }
  223. static void __swiotlb_sync_sg_for_device(struct device *dev,
  224. struct scatterlist *sgl, int nelems,
  225. enum dma_data_direction dir)
  226. {
  227. struct scatterlist *sg;
  228. int i;
  229. swiotlb_sync_sg_for_device(dev, sgl, nelems, dir);
  230. for_each_sg(sgl, sg, nelems, i)
  231. __dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
  232. sg->length, dir);
  233. }
  234. /* vma->vm_page_prot must be set appropriately before calling this function */
  235. static int __dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
  236. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  237. {
  238. int ret = -ENXIO;
  239. unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >>
  240. PAGE_SHIFT;
  241. unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
  242. unsigned long pfn = dma_to_phys(dev, dma_addr) >> PAGE_SHIFT;
  243. unsigned long off = vma->vm_pgoff;
  244. if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
  245. return ret;
  246. if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
  247. ret = remap_pfn_range(vma, vma->vm_start,
  248. pfn + off,
  249. vma->vm_end - vma->vm_start,
  250. vma->vm_page_prot);
  251. }
  252. return ret;
  253. }
  254. static int __swiotlb_mmap_noncoherent(struct device *dev,
  255. struct vm_area_struct *vma,
  256. void *cpu_addr, dma_addr_t dma_addr, size_t size,
  257. struct dma_attrs *attrs)
  258. {
  259. vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot, false);
  260. return __dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
  261. }
  262. static int __swiotlb_mmap_coherent(struct device *dev,
  263. struct vm_area_struct *vma,
  264. void *cpu_addr, dma_addr_t dma_addr, size_t size,
  265. struct dma_attrs *attrs)
  266. {
  267. /* Just use whatever page_prot attributes were specified */
  268. return __dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
  269. }
  270. struct dma_map_ops noncoherent_swiotlb_dma_ops = {
  271. .alloc = __dma_alloc_noncoherent,
  272. .free = __dma_free_noncoherent,
  273. .mmap = __swiotlb_mmap_noncoherent,
  274. .map_page = __swiotlb_map_page,
  275. .unmap_page = __swiotlb_unmap_page,
  276. .map_sg = __swiotlb_map_sg_attrs,
  277. .unmap_sg = __swiotlb_unmap_sg_attrs,
  278. .sync_single_for_cpu = __swiotlb_sync_single_for_cpu,
  279. .sync_single_for_device = __swiotlb_sync_single_for_device,
  280. .sync_sg_for_cpu = __swiotlb_sync_sg_for_cpu,
  281. .sync_sg_for_device = __swiotlb_sync_sg_for_device,
  282. .dma_supported = swiotlb_dma_supported,
  283. .mapping_error = swiotlb_dma_mapping_error,
  284. };
  285. EXPORT_SYMBOL(noncoherent_swiotlb_dma_ops);
  286. struct dma_map_ops coherent_swiotlb_dma_ops = {
  287. .alloc = __dma_alloc_coherent,
  288. .free = __dma_free_coherent,
  289. .mmap = __swiotlb_mmap_coherent,
  290. .map_page = swiotlb_map_page,
  291. .unmap_page = swiotlb_unmap_page,
  292. .map_sg = swiotlb_map_sg_attrs,
  293. .unmap_sg = swiotlb_unmap_sg_attrs,
  294. .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
  295. .sync_single_for_device = swiotlb_sync_single_for_device,
  296. .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
  297. .sync_sg_for_device = swiotlb_sync_sg_for_device,
  298. .dma_supported = swiotlb_dma_supported,
  299. .mapping_error = swiotlb_dma_mapping_error,
  300. };
  301. EXPORT_SYMBOL(coherent_swiotlb_dma_ops);
  302. extern int swiotlb_late_init_with_default_size(size_t default_size);
  303. static int __init atomic_pool_init(void)
  304. {
  305. pgprot_t prot = __pgprot(PROT_NORMAL_NC);
  306. unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT;
  307. struct page *page;
  308. void *addr;
  309. unsigned int pool_size_order = get_order(atomic_pool_size);
  310. if (dev_get_cma_area(NULL))
  311. page = dma_alloc_from_contiguous(NULL, nr_pages,
  312. pool_size_order);
  313. else
  314. page = alloc_pages(GFP_DMA, pool_size_order);
  315. if (page) {
  316. int ret;
  317. void *page_addr = page_address(page);
  318. memset(page_addr, 0, atomic_pool_size);
  319. __dma_flush_range(page_addr, page_addr + atomic_pool_size);
  320. atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
  321. if (!atomic_pool)
  322. goto free_page;
  323. addr = dma_common_contiguous_remap(page, atomic_pool_size,
  324. VM_USERMAP, prot, atomic_pool_init);
  325. if (!addr)
  326. goto destroy_genpool;
  327. ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr,
  328. page_to_phys(page),
  329. atomic_pool_size, -1);
  330. if (ret)
  331. goto remove_mapping;
  332. gen_pool_set_algo(atomic_pool,
  333. gen_pool_first_fit_order_align,
  334. (void *)PAGE_SHIFT);
  335. pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n",
  336. atomic_pool_size / 1024);
  337. return 0;
  338. }
  339. goto out;
  340. remove_mapping:
  341. dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP);
  342. destroy_genpool:
  343. gen_pool_destroy(atomic_pool);
  344. atomic_pool = NULL;
  345. free_page:
  346. if (!dma_release_from_contiguous(NULL, page, nr_pages))
  347. __free_pages(page, pool_size_order);
  348. out:
  349. pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
  350. atomic_pool_size / 1024);
  351. return -ENOMEM;
  352. }
  353. static int __init swiotlb_late_init(void)
  354. {
  355. size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT);
  356. dma_ops = &noncoherent_swiotlb_dma_ops;
  357. return swiotlb_late_init_with_default_size(swiotlb_size);
  358. }
  359. static int __init arm64_dma_init(void)
  360. {
  361. int ret = 0;
  362. ret |= swiotlb_late_init();
  363. ret |= atomic_pool_init();
  364. return ret;
  365. }
  366. arch_initcall(arm64_dma_init);
  367. #define PREALLOC_DMA_DEBUG_ENTRIES 4096
  368. static int __init dma_debug_do_init(void)
  369. {
  370. dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
  371. return 0;
  372. }
  373. fs_initcall(dma_debug_do_init);