debug-monitors.h 4.2 KB

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  1. /*
  2. * Copyright (C) 2012 ARM Ltd.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #ifndef __ASM_DEBUG_MONITORS_H
  17. #define __ASM_DEBUG_MONITORS_H
  18. #ifdef __KERNEL__
  19. /* Low-level stepping controls. */
  20. #define DBG_MDSCR_SS (1 << 0)
  21. #define DBG_SPSR_SS (1 << 21)
  22. /* MDSCR_EL1 enabling bits */
  23. #define DBG_MDSCR_KDE (1 << 13)
  24. #define DBG_MDSCR_MDE (1 << 15)
  25. #define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
  26. #define DBG_ESR_EVT(x) (((x) >> 27) & 0x7)
  27. /* AArch64 */
  28. #define DBG_ESR_EVT_HWBP 0x0
  29. #define DBG_ESR_EVT_HWSS 0x1
  30. #define DBG_ESR_EVT_HWWP 0x2
  31. #define DBG_ESR_EVT_BRK 0x6
  32. /*
  33. * Break point instruction encoding
  34. */
  35. #define BREAK_INSTR_SIZE 4
  36. /*
  37. * ESR values expected for dynamic and compile time BRK instruction
  38. */
  39. #define DBG_ESR_VAL_BRK(x) (0xf2000000 | ((x) & 0xfffff))
  40. /*
  41. * #imm16 values used for BRK instruction generation
  42. * Allowed values for kgbd are 0x400 - 0x7ff
  43. * 0x100: for triggering a fault on purpose (reserved)
  44. * 0x400: for dynamic BRK instruction
  45. * 0x401: for compile time BRK instruction
  46. */
  47. #define FAULT_BRK_IMM 0x100
  48. #define KGDB_DYN_DBG_BRK_IMM 0x400
  49. #define KGDB_COMPILED_DBG_BRK_IMM 0x401
  50. /*
  51. * BRK instruction encoding
  52. * The #imm16 value should be placed at bits[20:5] within BRK ins
  53. */
  54. #define AARCH64_BREAK_MON 0xd4200000
  55. /*
  56. * BRK instruction for provoking a fault on purpose
  57. * Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
  58. */
  59. #define AARCH64_BREAK_FAULT (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
  60. /*
  61. * Extract byte from BRK instruction
  62. */
  63. #define KGDB_DYN_DBG_BRK_INS_BYTE(x) \
  64. ((((AARCH64_BREAK_MON) & 0xffe0001f) >> (x * 8)) & 0xff)
  65. /*
  66. * Extract byte from BRK #imm16
  67. */
  68. #define KGBD_DYN_DBG_BRK_IMM_BYTE(x) \
  69. (((((KGDB_DYN_DBG_BRK_IMM) & 0xffff) << 5) >> (x * 8)) & 0xff)
  70. #define KGDB_DYN_DBG_BRK_BYTE(x) \
  71. (KGDB_DYN_DBG_BRK_INS_BYTE(x) | KGBD_DYN_DBG_BRK_IMM_BYTE(x))
  72. #define KGDB_DYN_BRK_INS_BYTE0 KGDB_DYN_DBG_BRK_BYTE(0)
  73. #define KGDB_DYN_BRK_INS_BYTE1 KGDB_DYN_DBG_BRK_BYTE(1)
  74. #define KGDB_DYN_BRK_INS_BYTE2 KGDB_DYN_DBG_BRK_BYTE(2)
  75. #define KGDB_DYN_BRK_INS_BYTE3 KGDB_DYN_DBG_BRK_BYTE(3)
  76. #define CACHE_FLUSH_IS_SAFE 1
  77. /* AArch32 */
  78. #define DBG_ESR_EVT_BKPT 0x4
  79. #define DBG_ESR_EVT_VECC 0x5
  80. #define AARCH32_BREAK_ARM 0x07f001f0
  81. #define AARCH32_BREAK_THUMB 0xde01
  82. #define AARCH32_BREAK_THUMB2_LO 0xf7f0
  83. #define AARCH32_BREAK_THUMB2_HI 0xa000
  84. #ifndef __ASSEMBLY__
  85. struct task_struct;
  86. #define DBG_ARCH_ID_RESERVED 0 /* In case of ptrace ABI updates. */
  87. #define DBG_HOOK_HANDLED 0
  88. #define DBG_HOOK_ERROR 1
  89. struct step_hook {
  90. struct list_head node;
  91. int (*fn)(struct pt_regs *regs, unsigned int esr);
  92. };
  93. void register_step_hook(struct step_hook *hook);
  94. void unregister_step_hook(struct step_hook *hook);
  95. struct break_hook {
  96. struct list_head node;
  97. u32 esr_val;
  98. u32 esr_mask;
  99. int (*fn)(struct pt_regs *regs, unsigned int esr);
  100. };
  101. void register_break_hook(struct break_hook *hook);
  102. void unregister_break_hook(struct break_hook *hook);
  103. u8 debug_monitors_arch(void);
  104. enum debug_el {
  105. DBG_ACTIVE_EL0 = 0,
  106. DBG_ACTIVE_EL1,
  107. };
  108. void enable_debug_monitors(enum debug_el el);
  109. void disable_debug_monitors(enum debug_el el);
  110. void user_rewind_single_step(struct task_struct *task);
  111. void user_fastforward_single_step(struct task_struct *task);
  112. void kernel_enable_single_step(struct pt_regs *regs);
  113. void kernel_disable_single_step(void);
  114. int kernel_active_single_step(void);
  115. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  116. int reinstall_suspended_bps(struct pt_regs *regs);
  117. #else
  118. static inline int reinstall_suspended_bps(struct pt_regs *regs)
  119. {
  120. return -ENODEV;
  121. }
  122. #endif
  123. int aarch32_break_handler(struct pt_regs *regs);
  124. #endif /* __ASSEMBLY */
  125. #endif /* __KERNEL__ */
  126. #endif /* __ASM_DEBUG_MONITORS_H */