bpf_jit_32.c 23 KB

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  1. /*
  2. * Just-In-Time compiler for BPF filters on 32bit ARM
  3. *
  4. * Copyright (c) 2011 Mircea Gherzan <mgherzan@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; version 2 of the License.
  9. */
  10. #include <linux/bitops.h>
  11. #include <linux/compiler.h>
  12. #include <linux/errno.h>
  13. #include <linux/filter.h>
  14. #include <linux/netdevice.h>
  15. #include <linux/string.h>
  16. #include <linux/slab.h>
  17. #include <linux/if_vlan.h>
  18. #include <asm/cacheflush.h>
  19. #include <asm/hwcap.h>
  20. #include <asm/opcodes.h>
  21. #include "bpf_jit_32.h"
  22. /*
  23. * ABI:
  24. *
  25. * r0 scratch register
  26. * r4 BPF register A
  27. * r5 BPF register X
  28. * r6 pointer to the skb
  29. * r7 skb->data
  30. * r8 skb_headlen(skb)
  31. */
  32. #define r_scratch ARM_R0
  33. /* r1-r3 are (also) used for the unaligned loads on the non-ARMv7 slowpath */
  34. #define r_off ARM_R1
  35. #define r_A ARM_R4
  36. #define r_X ARM_R5
  37. #define r_skb ARM_R6
  38. #define r_skb_data ARM_R7
  39. #define r_skb_hl ARM_R8
  40. #define SCRATCH_SP_OFFSET 0
  41. #define SCRATCH_OFF(k) (SCRATCH_SP_OFFSET + 4 * (k))
  42. #define SEEN_MEM ((1 << BPF_MEMWORDS) - 1)
  43. #define SEEN_MEM_WORD(k) (1 << (k))
  44. #define SEEN_X (1 << BPF_MEMWORDS)
  45. #define SEEN_CALL (1 << (BPF_MEMWORDS + 1))
  46. #define SEEN_SKB (1 << (BPF_MEMWORDS + 2))
  47. #define SEEN_DATA (1 << (BPF_MEMWORDS + 3))
  48. #define FLAG_NEED_X_RESET (1 << 0)
  49. struct jit_ctx {
  50. const struct bpf_prog *skf;
  51. unsigned idx;
  52. unsigned prologue_bytes;
  53. int ret0_fp_idx;
  54. u32 seen;
  55. u32 flags;
  56. u32 *offsets;
  57. u32 *target;
  58. #if __LINUX_ARM_ARCH__ < 7
  59. u16 epilogue_bytes;
  60. u16 imm_count;
  61. u32 *imms;
  62. #endif
  63. };
  64. int bpf_jit_enable __read_mostly;
  65. static u64 jit_get_skb_b(struct sk_buff *skb, unsigned offset)
  66. {
  67. u8 ret;
  68. int err;
  69. err = skb_copy_bits(skb, offset, &ret, 1);
  70. return (u64)err << 32 | ret;
  71. }
  72. static u64 jit_get_skb_h(struct sk_buff *skb, unsigned offset)
  73. {
  74. u16 ret;
  75. int err;
  76. err = skb_copy_bits(skb, offset, &ret, 2);
  77. return (u64)err << 32 | ntohs(ret);
  78. }
  79. static u64 jit_get_skb_w(struct sk_buff *skb, unsigned offset)
  80. {
  81. u32 ret;
  82. int err;
  83. err = skb_copy_bits(skb, offset, &ret, 4);
  84. return (u64)err << 32 | ntohl(ret);
  85. }
  86. /*
  87. * Wrapper that handles both OABI and EABI and assures Thumb2 interworking
  88. * (where the assembly routines like __aeabi_uidiv could cause problems).
  89. */
  90. static u32 jit_udiv(u32 dividend, u32 divisor)
  91. {
  92. return dividend / divisor;
  93. }
  94. static inline void _emit(int cond, u32 inst, struct jit_ctx *ctx)
  95. {
  96. inst |= (cond << 28);
  97. inst = __opcode_to_mem_arm(inst);
  98. if (ctx->target != NULL)
  99. ctx->target[ctx->idx] = inst;
  100. ctx->idx++;
  101. }
  102. /*
  103. * Emit an instruction that will be executed unconditionally.
  104. */
  105. static inline void emit(u32 inst, struct jit_ctx *ctx)
  106. {
  107. _emit(ARM_COND_AL, inst, ctx);
  108. }
  109. static u16 saved_regs(struct jit_ctx *ctx)
  110. {
  111. u16 ret = 0;
  112. if ((ctx->skf->len > 1) ||
  113. (ctx->skf->insns[0].code == (BPF_RET | BPF_A)))
  114. ret |= 1 << r_A;
  115. #ifdef CONFIG_FRAME_POINTER
  116. ret |= (1 << ARM_FP) | (1 << ARM_IP) | (1 << ARM_LR) | (1 << ARM_PC);
  117. #else
  118. if (ctx->seen & SEEN_CALL)
  119. ret |= 1 << ARM_LR;
  120. #endif
  121. if (ctx->seen & (SEEN_DATA | SEEN_SKB))
  122. ret |= 1 << r_skb;
  123. if (ctx->seen & SEEN_DATA)
  124. ret |= (1 << r_skb_data) | (1 << r_skb_hl);
  125. if (ctx->seen & SEEN_X)
  126. ret |= 1 << r_X;
  127. return ret;
  128. }
  129. static inline int mem_words_used(struct jit_ctx *ctx)
  130. {
  131. /* yes, we do waste some stack space IF there are "holes" in the set" */
  132. return fls(ctx->seen & SEEN_MEM);
  133. }
  134. static inline bool is_load_to_a(u16 inst)
  135. {
  136. switch (inst) {
  137. case BPF_LD | BPF_W | BPF_LEN:
  138. case BPF_LD | BPF_W | BPF_ABS:
  139. case BPF_LD | BPF_H | BPF_ABS:
  140. case BPF_LD | BPF_B | BPF_ABS:
  141. return true;
  142. default:
  143. return false;
  144. }
  145. }
  146. static void jit_fill_hole(void *area, unsigned int size)
  147. {
  148. u32 *ptr;
  149. /* We are guaranteed to have aligned memory. */
  150. for (ptr = area; size >= sizeof(u32); size -= sizeof(u32))
  151. *ptr++ = __opcode_to_mem_arm(ARM_INST_UDF);
  152. }
  153. static void build_prologue(struct jit_ctx *ctx)
  154. {
  155. u16 reg_set = saved_regs(ctx);
  156. u16 first_inst = ctx->skf->insns[0].code;
  157. u16 off;
  158. #ifdef CONFIG_FRAME_POINTER
  159. emit(ARM_MOV_R(ARM_IP, ARM_SP), ctx);
  160. emit(ARM_PUSH(reg_set), ctx);
  161. emit(ARM_SUB_I(ARM_FP, ARM_IP, 4), ctx);
  162. #else
  163. if (reg_set)
  164. emit(ARM_PUSH(reg_set), ctx);
  165. #endif
  166. if (ctx->seen & (SEEN_DATA | SEEN_SKB))
  167. emit(ARM_MOV_R(r_skb, ARM_R0), ctx);
  168. if (ctx->seen & SEEN_DATA) {
  169. off = offsetof(struct sk_buff, data);
  170. emit(ARM_LDR_I(r_skb_data, r_skb, off), ctx);
  171. /* headlen = len - data_len */
  172. off = offsetof(struct sk_buff, len);
  173. emit(ARM_LDR_I(r_skb_hl, r_skb, off), ctx);
  174. off = offsetof(struct sk_buff, data_len);
  175. emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
  176. emit(ARM_SUB_R(r_skb_hl, r_skb_hl, r_scratch), ctx);
  177. }
  178. if (ctx->flags & FLAG_NEED_X_RESET)
  179. emit(ARM_MOV_I(r_X, 0), ctx);
  180. /* do not leak kernel data to userspace */
  181. if ((first_inst != (BPF_RET | BPF_K)) && !(is_load_to_a(first_inst)))
  182. emit(ARM_MOV_I(r_A, 0), ctx);
  183. /* stack space for the BPF_MEM words */
  184. if (ctx->seen & SEEN_MEM)
  185. emit(ARM_SUB_I(ARM_SP, ARM_SP, mem_words_used(ctx) * 4), ctx);
  186. }
  187. static void build_epilogue(struct jit_ctx *ctx)
  188. {
  189. u16 reg_set = saved_regs(ctx);
  190. if (ctx->seen & SEEN_MEM)
  191. emit(ARM_ADD_I(ARM_SP, ARM_SP, mem_words_used(ctx) * 4), ctx);
  192. reg_set &= ~(1 << ARM_LR);
  193. #ifdef CONFIG_FRAME_POINTER
  194. /* the first instruction of the prologue was: mov ip, sp */
  195. reg_set &= ~(1 << ARM_IP);
  196. reg_set |= (1 << ARM_SP);
  197. emit(ARM_LDM(ARM_SP, reg_set), ctx);
  198. #else
  199. if (reg_set) {
  200. if (ctx->seen & SEEN_CALL)
  201. reg_set |= 1 << ARM_PC;
  202. emit(ARM_POP(reg_set), ctx);
  203. }
  204. if (!(ctx->seen & SEEN_CALL))
  205. emit(ARM_BX(ARM_LR), ctx);
  206. #endif
  207. }
  208. static int16_t imm8m(u32 x)
  209. {
  210. u32 rot;
  211. for (rot = 0; rot < 16; rot++)
  212. if ((x & ~ror32(0xff, 2 * rot)) == 0)
  213. return rol32(x, 2 * rot) | (rot << 8);
  214. return -1;
  215. }
  216. #if __LINUX_ARM_ARCH__ < 7
  217. static u16 imm_offset(u32 k, struct jit_ctx *ctx)
  218. {
  219. unsigned i = 0, offset;
  220. u16 imm;
  221. /* on the "fake" run we just count them (duplicates included) */
  222. if (ctx->target == NULL) {
  223. ctx->imm_count++;
  224. return 0;
  225. }
  226. while ((i < ctx->imm_count) && ctx->imms[i]) {
  227. if (ctx->imms[i] == k)
  228. break;
  229. i++;
  230. }
  231. if (ctx->imms[i] == 0)
  232. ctx->imms[i] = k;
  233. /* constants go just after the epilogue */
  234. offset = ctx->offsets[ctx->skf->len];
  235. offset += ctx->prologue_bytes;
  236. offset += ctx->epilogue_bytes;
  237. offset += i * 4;
  238. ctx->target[offset / 4] = k;
  239. /* PC in ARM mode == address of the instruction + 8 */
  240. imm = offset - (8 + ctx->idx * 4);
  241. return imm;
  242. }
  243. #endif /* __LINUX_ARM_ARCH__ */
  244. /*
  245. * Move an immediate that's not an imm8m to a core register.
  246. */
  247. static inline void emit_mov_i_no8m(int rd, u32 val, struct jit_ctx *ctx)
  248. {
  249. #if __LINUX_ARM_ARCH__ < 7
  250. emit(ARM_LDR_I(rd, ARM_PC, imm_offset(val, ctx)), ctx);
  251. #else
  252. emit(ARM_MOVW(rd, val & 0xffff), ctx);
  253. if (val > 0xffff)
  254. emit(ARM_MOVT(rd, val >> 16), ctx);
  255. #endif
  256. }
  257. static inline void emit_mov_i(int rd, u32 val, struct jit_ctx *ctx)
  258. {
  259. int imm12 = imm8m(val);
  260. if (imm12 >= 0)
  261. emit(ARM_MOV_I(rd, imm12), ctx);
  262. else
  263. emit_mov_i_no8m(rd, val, ctx);
  264. }
  265. #if __LINUX_ARM_ARCH__ < 6
  266. static void emit_load_be32(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
  267. {
  268. _emit(cond, ARM_LDRB_I(ARM_R3, r_addr, 1), ctx);
  269. _emit(cond, ARM_LDRB_I(ARM_R1, r_addr, 0), ctx);
  270. _emit(cond, ARM_LDRB_I(ARM_R2, r_addr, 3), ctx);
  271. _emit(cond, ARM_LSL_I(ARM_R3, ARM_R3, 16), ctx);
  272. _emit(cond, ARM_LDRB_I(ARM_R0, r_addr, 2), ctx);
  273. _emit(cond, ARM_ORR_S(ARM_R3, ARM_R3, ARM_R1, SRTYPE_LSL, 24), ctx);
  274. _emit(cond, ARM_ORR_R(ARM_R3, ARM_R3, ARM_R2), ctx);
  275. _emit(cond, ARM_ORR_S(r_res, ARM_R3, ARM_R0, SRTYPE_LSL, 8), ctx);
  276. }
  277. static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
  278. {
  279. _emit(cond, ARM_LDRB_I(ARM_R1, r_addr, 0), ctx);
  280. _emit(cond, ARM_LDRB_I(ARM_R2, r_addr, 1), ctx);
  281. _emit(cond, ARM_ORR_S(r_res, ARM_R2, ARM_R1, SRTYPE_LSL, 8), ctx);
  282. }
  283. static inline void emit_swap16(u8 r_dst, u8 r_src, struct jit_ctx *ctx)
  284. {
  285. /* r_dst = (r_src << 8) | (r_src >> 8) */
  286. emit(ARM_LSL_I(ARM_R1, r_src, 8), ctx);
  287. emit(ARM_ORR_S(r_dst, ARM_R1, r_src, SRTYPE_LSR, 8), ctx);
  288. /*
  289. * we need to mask out the bits set in r_dst[23:16] due to
  290. * the first shift instruction.
  291. *
  292. * note that 0x8ff is the encoded immediate 0x00ff0000.
  293. */
  294. emit(ARM_BIC_I(r_dst, r_dst, 0x8ff), ctx);
  295. }
  296. #else /* ARMv6+ */
  297. static void emit_load_be32(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
  298. {
  299. _emit(cond, ARM_LDR_I(r_res, r_addr, 0), ctx);
  300. #ifdef __LITTLE_ENDIAN
  301. _emit(cond, ARM_REV(r_res, r_res), ctx);
  302. #endif
  303. }
  304. static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
  305. {
  306. _emit(cond, ARM_LDRH_I(r_res, r_addr, 0), ctx);
  307. #ifdef __LITTLE_ENDIAN
  308. _emit(cond, ARM_REV16(r_res, r_res), ctx);
  309. #endif
  310. }
  311. static inline void emit_swap16(u8 r_dst __maybe_unused,
  312. u8 r_src __maybe_unused,
  313. struct jit_ctx *ctx __maybe_unused)
  314. {
  315. #ifdef __LITTLE_ENDIAN
  316. emit(ARM_REV16(r_dst, r_src), ctx);
  317. #endif
  318. }
  319. #endif /* __LINUX_ARM_ARCH__ < 6 */
  320. /* Compute the immediate value for a PC-relative branch. */
  321. static inline u32 b_imm(unsigned tgt, struct jit_ctx *ctx)
  322. {
  323. u32 imm;
  324. if (ctx->target == NULL)
  325. return 0;
  326. /*
  327. * BPF allows only forward jumps and the offset of the target is
  328. * still the one computed during the first pass.
  329. */
  330. imm = ctx->offsets[tgt] + ctx->prologue_bytes - (ctx->idx * 4 + 8);
  331. return imm >> 2;
  332. }
  333. #define OP_IMM3(op, r1, r2, imm_val, ctx) \
  334. do { \
  335. imm12 = imm8m(imm_val); \
  336. if (imm12 < 0) { \
  337. emit_mov_i_no8m(r_scratch, imm_val, ctx); \
  338. emit(op ## _R((r1), (r2), r_scratch), ctx); \
  339. } else { \
  340. emit(op ## _I((r1), (r2), imm12), ctx); \
  341. } \
  342. } while (0)
  343. static inline void emit_err_ret(u8 cond, struct jit_ctx *ctx)
  344. {
  345. if (ctx->ret0_fp_idx >= 0) {
  346. _emit(cond, ARM_B(b_imm(ctx->ret0_fp_idx, ctx)), ctx);
  347. /* NOP to keep the size constant between passes */
  348. emit(ARM_MOV_R(ARM_R0, ARM_R0), ctx);
  349. } else {
  350. _emit(cond, ARM_MOV_I(ARM_R0, 0), ctx);
  351. _emit(cond, ARM_B(b_imm(ctx->skf->len, ctx)), ctx);
  352. }
  353. }
  354. static inline void emit_blx_r(u8 tgt_reg, struct jit_ctx *ctx)
  355. {
  356. #if __LINUX_ARM_ARCH__ < 5
  357. emit(ARM_MOV_R(ARM_LR, ARM_PC), ctx);
  358. if (elf_hwcap & HWCAP_THUMB)
  359. emit(ARM_BX(tgt_reg), ctx);
  360. else
  361. emit(ARM_MOV_R(ARM_PC, tgt_reg), ctx);
  362. #else
  363. emit(ARM_BLX_R(tgt_reg), ctx);
  364. #endif
  365. }
  366. static inline void emit_udiv(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx)
  367. {
  368. #if __LINUX_ARM_ARCH__ == 7
  369. if (elf_hwcap & HWCAP_IDIVA) {
  370. emit(ARM_UDIV(rd, rm, rn), ctx);
  371. return;
  372. }
  373. #endif
  374. if (rm != ARM_R0)
  375. emit(ARM_MOV_R(ARM_R0, rm), ctx);
  376. if (rn != ARM_R1)
  377. emit(ARM_MOV_R(ARM_R1, rn), ctx);
  378. ctx->seen |= SEEN_CALL;
  379. emit_mov_i(ARM_R3, (u32)jit_udiv, ctx);
  380. emit_blx_r(ARM_R3, ctx);
  381. if (rd != ARM_R0)
  382. emit(ARM_MOV_R(rd, ARM_R0), ctx);
  383. }
  384. static inline void update_on_xread(struct jit_ctx *ctx)
  385. {
  386. if (!(ctx->seen & SEEN_X))
  387. ctx->flags |= FLAG_NEED_X_RESET;
  388. ctx->seen |= SEEN_X;
  389. }
  390. static int build_body(struct jit_ctx *ctx)
  391. {
  392. void *load_func[] = {jit_get_skb_b, jit_get_skb_h, jit_get_skb_w};
  393. const struct bpf_prog *prog = ctx->skf;
  394. const struct sock_filter *inst;
  395. unsigned i, load_order, off, condt;
  396. int imm12;
  397. u32 k;
  398. for (i = 0; i < prog->len; i++) {
  399. u16 code;
  400. inst = &(prog->insns[i]);
  401. /* K as an immediate value operand */
  402. k = inst->k;
  403. code = bpf_anc_helper(inst);
  404. /* compute offsets only in the fake pass */
  405. if (ctx->target == NULL)
  406. ctx->offsets[i] = ctx->idx * 4;
  407. switch (code) {
  408. case BPF_LD | BPF_IMM:
  409. emit_mov_i(r_A, k, ctx);
  410. break;
  411. case BPF_LD | BPF_W | BPF_LEN:
  412. ctx->seen |= SEEN_SKB;
  413. BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
  414. emit(ARM_LDR_I(r_A, r_skb,
  415. offsetof(struct sk_buff, len)), ctx);
  416. break;
  417. case BPF_LD | BPF_MEM:
  418. /* A = scratch[k] */
  419. ctx->seen |= SEEN_MEM_WORD(k);
  420. emit(ARM_LDR_I(r_A, ARM_SP, SCRATCH_OFF(k)), ctx);
  421. break;
  422. case BPF_LD | BPF_W | BPF_ABS:
  423. load_order = 2;
  424. goto load;
  425. case BPF_LD | BPF_H | BPF_ABS:
  426. load_order = 1;
  427. goto load;
  428. case BPF_LD | BPF_B | BPF_ABS:
  429. load_order = 0;
  430. load:
  431. /* the interpreter will deal with the negative K */
  432. if ((int)k < 0)
  433. return -ENOTSUPP;
  434. emit_mov_i(r_off, k, ctx);
  435. load_common:
  436. ctx->seen |= SEEN_DATA | SEEN_CALL;
  437. if (load_order > 0) {
  438. emit(ARM_SUB_I(r_scratch, r_skb_hl,
  439. 1 << load_order), ctx);
  440. emit(ARM_CMP_R(r_scratch, r_off), ctx);
  441. condt = ARM_COND_HS;
  442. } else {
  443. emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
  444. condt = ARM_COND_HI;
  445. }
  446. _emit(condt, ARM_ADD_R(r_scratch, r_off, r_skb_data),
  447. ctx);
  448. if (load_order == 0)
  449. _emit(condt, ARM_LDRB_I(r_A, r_scratch, 0),
  450. ctx);
  451. else if (load_order == 1)
  452. emit_load_be16(condt, r_A, r_scratch, ctx);
  453. else if (load_order == 2)
  454. emit_load_be32(condt, r_A, r_scratch, ctx);
  455. _emit(condt, ARM_B(b_imm(i + 1, ctx)), ctx);
  456. /* the slowpath */
  457. emit_mov_i(ARM_R3, (u32)load_func[load_order], ctx);
  458. emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
  459. /* the offset is already in R1 */
  460. emit_blx_r(ARM_R3, ctx);
  461. /* check the result of skb_copy_bits */
  462. emit(ARM_CMP_I(ARM_R1, 0), ctx);
  463. emit_err_ret(ARM_COND_NE, ctx);
  464. emit(ARM_MOV_R(r_A, ARM_R0), ctx);
  465. break;
  466. case BPF_LD | BPF_W | BPF_IND:
  467. load_order = 2;
  468. goto load_ind;
  469. case BPF_LD | BPF_H | BPF_IND:
  470. load_order = 1;
  471. goto load_ind;
  472. case BPF_LD | BPF_B | BPF_IND:
  473. load_order = 0;
  474. load_ind:
  475. OP_IMM3(ARM_ADD, r_off, r_X, k, ctx);
  476. goto load_common;
  477. case BPF_LDX | BPF_IMM:
  478. ctx->seen |= SEEN_X;
  479. emit_mov_i(r_X, k, ctx);
  480. break;
  481. case BPF_LDX | BPF_W | BPF_LEN:
  482. ctx->seen |= SEEN_X | SEEN_SKB;
  483. emit(ARM_LDR_I(r_X, r_skb,
  484. offsetof(struct sk_buff, len)), ctx);
  485. break;
  486. case BPF_LDX | BPF_MEM:
  487. ctx->seen |= SEEN_X | SEEN_MEM_WORD(k);
  488. emit(ARM_LDR_I(r_X, ARM_SP, SCRATCH_OFF(k)), ctx);
  489. break;
  490. case BPF_LDX | BPF_B | BPF_MSH:
  491. /* x = ((*(frame + k)) & 0xf) << 2; */
  492. ctx->seen |= SEEN_X | SEEN_DATA | SEEN_CALL;
  493. /* the interpreter should deal with the negative K */
  494. if ((int)k < 0)
  495. return -1;
  496. /* offset in r1: we might have to take the slow path */
  497. emit_mov_i(r_off, k, ctx);
  498. emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
  499. /* load in r0: common with the slowpath */
  500. _emit(ARM_COND_HI, ARM_LDRB_R(ARM_R0, r_skb_data,
  501. ARM_R1), ctx);
  502. /*
  503. * emit_mov_i() might generate one or two instructions,
  504. * the same holds for emit_blx_r()
  505. */
  506. _emit(ARM_COND_HI, ARM_B(b_imm(i + 1, ctx) - 2), ctx);
  507. emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
  508. /* r_off is r1 */
  509. emit_mov_i(ARM_R3, (u32)jit_get_skb_b, ctx);
  510. emit_blx_r(ARM_R3, ctx);
  511. /* check the return value of skb_copy_bits */
  512. emit(ARM_CMP_I(ARM_R1, 0), ctx);
  513. emit_err_ret(ARM_COND_NE, ctx);
  514. emit(ARM_AND_I(r_X, ARM_R0, 0x00f), ctx);
  515. emit(ARM_LSL_I(r_X, r_X, 2), ctx);
  516. break;
  517. case BPF_ST:
  518. ctx->seen |= SEEN_MEM_WORD(k);
  519. emit(ARM_STR_I(r_A, ARM_SP, SCRATCH_OFF(k)), ctx);
  520. break;
  521. case BPF_STX:
  522. update_on_xread(ctx);
  523. ctx->seen |= SEEN_MEM_WORD(k);
  524. emit(ARM_STR_I(r_X, ARM_SP, SCRATCH_OFF(k)), ctx);
  525. break;
  526. case BPF_ALU | BPF_ADD | BPF_K:
  527. /* A += K */
  528. OP_IMM3(ARM_ADD, r_A, r_A, k, ctx);
  529. break;
  530. case BPF_ALU | BPF_ADD | BPF_X:
  531. update_on_xread(ctx);
  532. emit(ARM_ADD_R(r_A, r_A, r_X), ctx);
  533. break;
  534. case BPF_ALU | BPF_SUB | BPF_K:
  535. /* A -= K */
  536. OP_IMM3(ARM_SUB, r_A, r_A, k, ctx);
  537. break;
  538. case BPF_ALU | BPF_SUB | BPF_X:
  539. update_on_xread(ctx);
  540. emit(ARM_SUB_R(r_A, r_A, r_X), ctx);
  541. break;
  542. case BPF_ALU | BPF_MUL | BPF_K:
  543. /* A *= K */
  544. emit_mov_i(r_scratch, k, ctx);
  545. emit(ARM_MUL(r_A, r_A, r_scratch), ctx);
  546. break;
  547. case BPF_ALU | BPF_MUL | BPF_X:
  548. update_on_xread(ctx);
  549. emit(ARM_MUL(r_A, r_A, r_X), ctx);
  550. break;
  551. case BPF_ALU | BPF_DIV | BPF_K:
  552. if (k == 1)
  553. break;
  554. emit_mov_i(r_scratch, k, ctx);
  555. emit_udiv(r_A, r_A, r_scratch, ctx);
  556. break;
  557. case BPF_ALU | BPF_DIV | BPF_X:
  558. update_on_xread(ctx);
  559. emit(ARM_CMP_I(r_X, 0), ctx);
  560. emit_err_ret(ARM_COND_EQ, ctx);
  561. emit_udiv(r_A, r_A, r_X, ctx);
  562. break;
  563. case BPF_ALU | BPF_OR | BPF_K:
  564. /* A |= K */
  565. OP_IMM3(ARM_ORR, r_A, r_A, k, ctx);
  566. break;
  567. case BPF_ALU | BPF_OR | BPF_X:
  568. update_on_xread(ctx);
  569. emit(ARM_ORR_R(r_A, r_A, r_X), ctx);
  570. break;
  571. case BPF_ALU | BPF_XOR | BPF_K:
  572. /* A ^= K; */
  573. OP_IMM3(ARM_EOR, r_A, r_A, k, ctx);
  574. break;
  575. case BPF_ANC | SKF_AD_ALU_XOR_X:
  576. case BPF_ALU | BPF_XOR | BPF_X:
  577. /* A ^= X */
  578. update_on_xread(ctx);
  579. emit(ARM_EOR_R(r_A, r_A, r_X), ctx);
  580. break;
  581. case BPF_ALU | BPF_AND | BPF_K:
  582. /* A &= K */
  583. OP_IMM3(ARM_AND, r_A, r_A, k, ctx);
  584. break;
  585. case BPF_ALU | BPF_AND | BPF_X:
  586. update_on_xread(ctx);
  587. emit(ARM_AND_R(r_A, r_A, r_X), ctx);
  588. break;
  589. case BPF_ALU | BPF_LSH | BPF_K:
  590. if (unlikely(k > 31))
  591. return -1;
  592. emit(ARM_LSL_I(r_A, r_A, k), ctx);
  593. break;
  594. case BPF_ALU | BPF_LSH | BPF_X:
  595. update_on_xread(ctx);
  596. emit(ARM_LSL_R(r_A, r_A, r_X), ctx);
  597. break;
  598. case BPF_ALU | BPF_RSH | BPF_K:
  599. if (unlikely(k > 31))
  600. return -1;
  601. emit(ARM_LSR_I(r_A, r_A, k), ctx);
  602. break;
  603. case BPF_ALU | BPF_RSH | BPF_X:
  604. update_on_xread(ctx);
  605. emit(ARM_LSR_R(r_A, r_A, r_X), ctx);
  606. break;
  607. case BPF_ALU | BPF_NEG:
  608. /* A = -A */
  609. emit(ARM_RSB_I(r_A, r_A, 0), ctx);
  610. break;
  611. case BPF_JMP | BPF_JA:
  612. /* pc += K */
  613. emit(ARM_B(b_imm(i + k + 1, ctx)), ctx);
  614. break;
  615. case BPF_JMP | BPF_JEQ | BPF_K:
  616. /* pc += (A == K) ? pc->jt : pc->jf */
  617. condt = ARM_COND_EQ;
  618. goto cmp_imm;
  619. case BPF_JMP | BPF_JGT | BPF_K:
  620. /* pc += (A > K) ? pc->jt : pc->jf */
  621. condt = ARM_COND_HI;
  622. goto cmp_imm;
  623. case BPF_JMP | BPF_JGE | BPF_K:
  624. /* pc += (A >= K) ? pc->jt : pc->jf */
  625. condt = ARM_COND_HS;
  626. cmp_imm:
  627. imm12 = imm8m(k);
  628. if (imm12 < 0) {
  629. emit_mov_i_no8m(r_scratch, k, ctx);
  630. emit(ARM_CMP_R(r_A, r_scratch), ctx);
  631. } else {
  632. emit(ARM_CMP_I(r_A, imm12), ctx);
  633. }
  634. cond_jump:
  635. if (inst->jt)
  636. _emit(condt, ARM_B(b_imm(i + inst->jt + 1,
  637. ctx)), ctx);
  638. if (inst->jf)
  639. _emit(condt ^ 1, ARM_B(b_imm(i + inst->jf + 1,
  640. ctx)), ctx);
  641. break;
  642. case BPF_JMP | BPF_JEQ | BPF_X:
  643. /* pc += (A == X) ? pc->jt : pc->jf */
  644. condt = ARM_COND_EQ;
  645. goto cmp_x;
  646. case BPF_JMP | BPF_JGT | BPF_X:
  647. /* pc += (A > X) ? pc->jt : pc->jf */
  648. condt = ARM_COND_HI;
  649. goto cmp_x;
  650. case BPF_JMP | BPF_JGE | BPF_X:
  651. /* pc += (A >= X) ? pc->jt : pc->jf */
  652. condt = ARM_COND_CS;
  653. cmp_x:
  654. update_on_xread(ctx);
  655. emit(ARM_CMP_R(r_A, r_X), ctx);
  656. goto cond_jump;
  657. case BPF_JMP | BPF_JSET | BPF_K:
  658. /* pc += (A & K) ? pc->jt : pc->jf */
  659. condt = ARM_COND_NE;
  660. /* not set iff all zeroes iff Z==1 iff EQ */
  661. imm12 = imm8m(k);
  662. if (imm12 < 0) {
  663. emit_mov_i_no8m(r_scratch, k, ctx);
  664. emit(ARM_TST_R(r_A, r_scratch), ctx);
  665. } else {
  666. emit(ARM_TST_I(r_A, imm12), ctx);
  667. }
  668. goto cond_jump;
  669. case BPF_JMP | BPF_JSET | BPF_X:
  670. /* pc += (A & X) ? pc->jt : pc->jf */
  671. update_on_xread(ctx);
  672. condt = ARM_COND_NE;
  673. emit(ARM_TST_R(r_A, r_X), ctx);
  674. goto cond_jump;
  675. case BPF_RET | BPF_A:
  676. emit(ARM_MOV_R(ARM_R0, r_A), ctx);
  677. goto b_epilogue;
  678. case BPF_RET | BPF_K:
  679. if ((k == 0) && (ctx->ret0_fp_idx < 0))
  680. ctx->ret0_fp_idx = i;
  681. emit_mov_i(ARM_R0, k, ctx);
  682. b_epilogue:
  683. if (i != ctx->skf->len - 1)
  684. emit(ARM_B(b_imm(prog->len, ctx)), ctx);
  685. break;
  686. case BPF_MISC | BPF_TAX:
  687. /* X = A */
  688. ctx->seen |= SEEN_X;
  689. emit(ARM_MOV_R(r_X, r_A), ctx);
  690. break;
  691. case BPF_MISC | BPF_TXA:
  692. /* A = X */
  693. update_on_xread(ctx);
  694. emit(ARM_MOV_R(r_A, r_X), ctx);
  695. break;
  696. case BPF_ANC | SKF_AD_PROTOCOL:
  697. /* A = ntohs(skb->protocol) */
  698. ctx->seen |= SEEN_SKB;
  699. BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
  700. protocol) != 2);
  701. off = offsetof(struct sk_buff, protocol);
  702. emit(ARM_LDRH_I(r_scratch, r_skb, off), ctx);
  703. emit_swap16(r_A, r_scratch, ctx);
  704. break;
  705. case BPF_ANC | SKF_AD_CPU:
  706. /* r_scratch = current_thread_info() */
  707. OP_IMM3(ARM_BIC, r_scratch, ARM_SP, THREAD_SIZE - 1, ctx);
  708. /* A = current_thread_info()->cpu */
  709. BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4);
  710. off = offsetof(struct thread_info, cpu);
  711. emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
  712. break;
  713. case BPF_ANC | SKF_AD_IFINDEX:
  714. /* A = skb->dev->ifindex */
  715. ctx->seen |= SEEN_SKB;
  716. off = offsetof(struct sk_buff, dev);
  717. emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
  718. emit(ARM_CMP_I(r_scratch, 0), ctx);
  719. emit_err_ret(ARM_COND_EQ, ctx);
  720. BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
  721. ifindex) != 4);
  722. off = offsetof(struct net_device, ifindex);
  723. emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
  724. break;
  725. case BPF_ANC | SKF_AD_MARK:
  726. ctx->seen |= SEEN_SKB;
  727. BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
  728. off = offsetof(struct sk_buff, mark);
  729. emit(ARM_LDR_I(r_A, r_skb, off), ctx);
  730. break;
  731. case BPF_ANC | SKF_AD_RXHASH:
  732. ctx->seen |= SEEN_SKB;
  733. BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4);
  734. off = offsetof(struct sk_buff, hash);
  735. emit(ARM_LDR_I(r_A, r_skb, off), ctx);
  736. break;
  737. case BPF_ANC | SKF_AD_VLAN_TAG:
  738. case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
  739. ctx->seen |= SEEN_SKB;
  740. BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 2);
  741. off = offsetof(struct sk_buff, vlan_tci);
  742. emit(ARM_LDRH_I(r_A, r_skb, off), ctx);
  743. if (code == (BPF_ANC | SKF_AD_VLAN_TAG))
  744. OP_IMM3(ARM_AND, r_A, r_A, VLAN_VID_MASK, ctx);
  745. else
  746. OP_IMM3(ARM_AND, r_A, r_A, VLAN_TAG_PRESENT, ctx);
  747. break;
  748. case BPF_ANC | SKF_AD_QUEUE:
  749. ctx->seen |= SEEN_SKB;
  750. BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
  751. queue_mapping) != 2);
  752. BUILD_BUG_ON(offsetof(struct sk_buff,
  753. queue_mapping) > 0xff);
  754. off = offsetof(struct sk_buff, queue_mapping);
  755. emit(ARM_LDRH_I(r_A, r_skb, off), ctx);
  756. break;
  757. default:
  758. return -1;
  759. }
  760. }
  761. /* compute offsets only during the first pass */
  762. if (ctx->target == NULL)
  763. ctx->offsets[i] = ctx->idx * 4;
  764. return 0;
  765. }
  766. void bpf_jit_compile(struct bpf_prog *fp)
  767. {
  768. struct bpf_binary_header *header;
  769. struct jit_ctx ctx;
  770. unsigned tmp_idx;
  771. unsigned alloc_size;
  772. u8 *target_ptr;
  773. if (!bpf_jit_enable)
  774. return;
  775. memset(&ctx, 0, sizeof(ctx));
  776. ctx.skf = fp;
  777. ctx.ret0_fp_idx = -1;
  778. ctx.offsets = kzalloc(4 * (ctx.skf->len + 1), GFP_KERNEL);
  779. if (ctx.offsets == NULL)
  780. return;
  781. /* fake pass to fill in the ctx->seen */
  782. if (unlikely(build_body(&ctx)))
  783. goto out;
  784. tmp_idx = ctx.idx;
  785. build_prologue(&ctx);
  786. ctx.prologue_bytes = (ctx.idx - tmp_idx) * 4;
  787. #if __LINUX_ARM_ARCH__ < 7
  788. tmp_idx = ctx.idx;
  789. build_epilogue(&ctx);
  790. ctx.epilogue_bytes = (ctx.idx - tmp_idx) * 4;
  791. ctx.idx += ctx.imm_count;
  792. if (ctx.imm_count) {
  793. ctx.imms = kzalloc(4 * ctx.imm_count, GFP_KERNEL);
  794. if (ctx.imms == NULL)
  795. goto out;
  796. }
  797. #else
  798. /* there's nothing after the epilogue on ARMv7 */
  799. build_epilogue(&ctx);
  800. #endif
  801. alloc_size = 4 * ctx.idx;
  802. header = bpf_jit_binary_alloc(alloc_size, &target_ptr,
  803. 4, jit_fill_hole);
  804. if (header == NULL)
  805. goto out;
  806. ctx.target = (u32 *) target_ptr;
  807. ctx.idx = 0;
  808. build_prologue(&ctx);
  809. build_body(&ctx);
  810. build_epilogue(&ctx);
  811. flush_icache_range((u32)ctx.target, (u32)(ctx.target + ctx.idx));
  812. #if __LINUX_ARM_ARCH__ < 7
  813. if (ctx.imm_count)
  814. kfree(ctx.imms);
  815. #endif
  816. if (bpf_jit_enable > 1)
  817. /* there are 2 passes here */
  818. bpf_jit_dump(fp->len, alloc_size, 2, ctx.target);
  819. set_memory_ro((unsigned long)header, header->pages);
  820. fp->bpf_func = (void *)ctx.target;
  821. fp->jited = true;
  822. out:
  823. kfree(ctx.offsets);
  824. return;
  825. }
  826. void bpf_jit_free(struct bpf_prog *fp)
  827. {
  828. unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
  829. struct bpf_binary_header *header = (void *)addr;
  830. if (!fp->jited)
  831. goto free_filter;
  832. set_memory_rw(addr, header->pages);
  833. bpf_jit_binary_free(header);
  834. free_filter:
  835. bpf_prog_unlock_free(fp);
  836. }