board-lager.c 24 KB

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  1. /*
  2. * Lager board support
  3. *
  4. * Copyright (C) 2013-2014 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Magnus Damm
  6. * Copyright (C) 2014 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/gpio.h>
  22. #include <linux/gpio_keys.h>
  23. #include <linux/i2c.h>
  24. #include <linux/input.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/irq.h>
  27. #include <linux/kernel.h>
  28. #include <linux/leds.h>
  29. #include <linux/mfd/tmio.h>
  30. #include <linux/mmc/host.h>
  31. #include <linux/mmc/sh_mmcif.h>
  32. #include <linux/mmc/sh_mobile_sdhi.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/mtd/mtd.h>
  35. #include <linux/pinctrl/machine.h>
  36. #include <linux/platform_data/camera-rcar.h>
  37. #include <linux/platform_data/gpio-rcar.h>
  38. #include <linux/platform_data/rcar-du.h>
  39. #include <linux/platform_data/usb-rcar-gen2-phy.h>
  40. #include <linux/platform_device.h>
  41. #include <linux/phy.h>
  42. #include <linux/regulator/driver.h>
  43. #include <linux/regulator/fixed.h>
  44. #include <linux/regulator/gpio-regulator.h>
  45. #include <linux/regulator/machine.h>
  46. #include <linux/sh_eth.h>
  47. #include <linux/spi/flash.h>
  48. #include <linux/spi/rspi.h>
  49. #include <linux/spi/spi.h>
  50. #include <linux/usb/phy.h>
  51. #include <linux/usb/renesas_usbhs.h>
  52. #include <media/soc_camera.h>
  53. #include <asm/mach-types.h>
  54. #include <asm/mach/arch.h>
  55. #include <sound/rcar_snd.h>
  56. #include <sound/simple_card.h>
  57. #include "common.h"
  58. #include "irqs.h"
  59. #include "r8a7790.h"
  60. #include "rcar-gen2.h"
  61. /*
  62. * SSI-AK4643
  63. *
  64. * SW1: 1: AK4643
  65. * 2: CN22
  66. * 3: ADV7511
  67. *
  68. * this command is required when playback.
  69. *
  70. * # amixer set "LINEOUT Mixer DACL" on
  71. */
  72. /*
  73. * SDHI0 (CN8)
  74. *
  75. * JP3: pin1
  76. * SW20: pin1
  77. * GP5_24: 1: VDD 3.3V (defult)
  78. * 0: VDD 0.0V
  79. * GP5_29: 1: VccQ 3.3V (defult)
  80. * 0: VccQ 1.8V
  81. *
  82. */
  83. /* DU */
  84. static struct rcar_du_encoder_data lager_du_encoders[] = {
  85. {
  86. .type = RCAR_DU_ENCODER_VGA,
  87. .output = RCAR_DU_OUTPUT_DPAD0,
  88. }, {
  89. .type = RCAR_DU_ENCODER_NONE,
  90. .output = RCAR_DU_OUTPUT_LVDS1,
  91. .connector.lvds.panel = {
  92. .width_mm = 210,
  93. .height_mm = 158,
  94. .mode = {
  95. .pixelclock = 65000000,
  96. .hactive = 1024,
  97. .hfront_porch = 20,
  98. .hback_porch = 160,
  99. .hsync_len = 136,
  100. .vactive = 768,
  101. .vfront_porch = 3,
  102. .vback_porch = 29,
  103. .vsync_len = 6,
  104. },
  105. },
  106. },
  107. };
  108. static const struct rcar_du_platform_data lager_du_pdata __initconst = {
  109. .encoders = lager_du_encoders,
  110. .num_encoders = ARRAY_SIZE(lager_du_encoders),
  111. };
  112. static const struct resource du_resources[] __initconst = {
  113. DEFINE_RES_MEM(0xfeb00000, 0x70000),
  114. DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
  115. DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
  116. DEFINE_RES_IRQ(gic_spi(256)),
  117. DEFINE_RES_IRQ(gic_spi(268)),
  118. DEFINE_RES_IRQ(gic_spi(269)),
  119. };
  120. static void __init lager_add_du_device(void)
  121. {
  122. struct platform_device_info info = {
  123. .name = "rcar-du-r8a7790",
  124. .id = -1,
  125. .res = du_resources,
  126. .num_res = ARRAY_SIZE(du_resources),
  127. .data = &lager_du_pdata,
  128. .size_data = sizeof(lager_du_pdata),
  129. .dma_mask = DMA_BIT_MASK(32),
  130. };
  131. platform_device_register_full(&info);
  132. }
  133. /* LEDS */
  134. static struct gpio_led lager_leds[] = {
  135. {
  136. .name = "led8",
  137. .gpio = RCAR_GP_PIN(5, 17),
  138. .default_state = LEDS_GPIO_DEFSTATE_ON,
  139. }, {
  140. .name = "led7",
  141. .gpio = RCAR_GP_PIN(4, 23),
  142. .default_state = LEDS_GPIO_DEFSTATE_ON,
  143. }, {
  144. .name = "led6",
  145. .gpio = RCAR_GP_PIN(4, 22),
  146. .default_state = LEDS_GPIO_DEFSTATE_ON,
  147. },
  148. };
  149. static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
  150. .leds = lager_leds,
  151. .num_leds = ARRAY_SIZE(lager_leds),
  152. };
  153. /* GPIO KEY */
  154. #define GPIO_KEY(c, g, d, ...) \
  155. { .code = c, .gpio = g, .desc = d, .active_low = 1, \
  156. .wakeup = 1, .debounce_interval = 20 }
  157. static struct gpio_keys_button gpio_buttons[] = {
  158. GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
  159. GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
  160. GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
  161. GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
  162. };
  163. static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
  164. .buttons = gpio_buttons,
  165. .nbuttons = ARRAY_SIZE(gpio_buttons),
  166. };
  167. /* Fixed 3.3V regulator to be used by MMCIF */
  168. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  169. {
  170. REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
  171. };
  172. /*
  173. * SDHI regulator macro
  174. *
  175. ** FIXME**
  176. * Lager board vqmmc is provided via DA9063 PMIC chip,
  177. * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
  178. * but, it doesn't have regulator support at this point.
  179. * It uses gpio-regulator for vqmmc as quick-hack.
  180. */
  181. #define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
  182. static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
  183. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
  184. \
  185. static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
  186. .constraints = { \
  187. .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
  188. }, \
  189. .consumer_supplies = &vcc_sdhi##idx##_consumer, \
  190. .num_consumer_supplies = 1, \
  191. }; \
  192. \
  193. static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
  194. .supply_name = "SDHI" #idx "Vcc", \
  195. .microvolts = 3300000, \
  196. .gpio = vdd_pin, \
  197. .enable_high = 1, \
  198. .init_data = &vcc_sdhi##idx##_init_data, \
  199. }; \
  200. \
  201. static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
  202. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
  203. \
  204. static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
  205. .constraints = { \
  206. .input_uV = 3300000, \
  207. .min_uV = 1800000, \
  208. .max_uV = 3300000, \
  209. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
  210. REGULATOR_CHANGE_STATUS, \
  211. }, \
  212. .consumer_supplies = &vccq_sdhi##idx##_consumer, \
  213. .num_consumer_supplies = 1, \
  214. }; \
  215. \
  216. static struct gpio vccq_sdhi##idx##_gpio = \
  217. { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
  218. \
  219. static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
  220. { .value = 1800000, .gpios = 0 }, \
  221. { .value = 3300000, .gpios = 1 }, \
  222. }; \
  223. \
  224. static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
  225. .supply_name = "vqmmc", \
  226. .gpios = &vccq_sdhi##idx##_gpio, \
  227. .nr_gpios = 1, \
  228. .states = vccq_sdhi##idx##_states, \
  229. .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
  230. .type = REGULATOR_VOLTAGE, \
  231. .init_data = &vccq_sdhi##idx##_init_data, \
  232. };
  233. SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
  234. SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
  235. /* MMCIF */
  236. static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
  237. .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
  238. .clk_ctrl2_present = true,
  239. .ccs_unsupported = true,
  240. };
  241. static const struct resource mmcif1_resources[] __initconst = {
  242. DEFINE_RES_MEM(0xee220000, 0x80),
  243. DEFINE_RES_IRQ(gic_spi(170)),
  244. };
  245. /* Ether */
  246. static const struct sh_eth_plat_data ether_pdata __initconst = {
  247. .phy = 0x1,
  248. .phy_irq = irq_pin(0),
  249. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  250. .phy_interface = PHY_INTERFACE_MODE_RMII,
  251. .ether_link_active_low = 1,
  252. };
  253. static const struct resource ether_resources[] __initconst = {
  254. DEFINE_RES_MEM(0xee700000, 0x400),
  255. DEFINE_RES_IRQ(gic_spi(162)),
  256. };
  257. static const struct platform_device_info ether_info __initconst = {
  258. .name = "r8a7790-ether",
  259. .id = -1,
  260. .res = ether_resources,
  261. .num_res = ARRAY_SIZE(ether_resources),
  262. .data = &ether_pdata,
  263. .size_data = sizeof(ether_pdata),
  264. .dma_mask = DMA_BIT_MASK(32),
  265. };
  266. /* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
  267. static struct mtd_partition spi_flash_part[] = {
  268. /* Reserved for user loader program, read-only */
  269. {
  270. .name = "loader",
  271. .offset = 0,
  272. .size = SZ_256K,
  273. .mask_flags = MTD_WRITEABLE,
  274. },
  275. /* Reserved for user program, read-only */
  276. {
  277. .name = "user",
  278. .offset = MTDPART_OFS_APPEND,
  279. .size = SZ_4M,
  280. .mask_flags = MTD_WRITEABLE,
  281. },
  282. /* All else is writable (e.g. JFFS2) */
  283. {
  284. .name = "flash",
  285. .offset = MTDPART_OFS_APPEND,
  286. .size = MTDPART_SIZ_FULL,
  287. .mask_flags = 0,
  288. },
  289. };
  290. static const struct flash_platform_data spi_flash_data = {
  291. .name = "m25p80",
  292. .parts = spi_flash_part,
  293. .nr_parts = ARRAY_SIZE(spi_flash_part),
  294. .type = "s25fl512s",
  295. };
  296. static const struct rspi_plat_data qspi_pdata __initconst = {
  297. .num_chipselect = 1,
  298. };
  299. static const struct spi_board_info spi_info[] __initconst = {
  300. {
  301. .modalias = "m25p80",
  302. .platform_data = &spi_flash_data,
  303. .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
  304. .max_speed_hz = 30000000,
  305. .bus_num = 0,
  306. .chip_select = 0,
  307. },
  308. };
  309. /* QSPI resource */
  310. static const struct resource qspi_resources[] __initconst = {
  311. DEFINE_RES_MEM(0xe6b10000, 0x1000),
  312. DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
  313. };
  314. /* VIN */
  315. static const struct resource vin_resources[] __initconst = {
  316. /* VIN0 */
  317. DEFINE_RES_MEM(0xe6ef0000, 0x1000),
  318. DEFINE_RES_IRQ(gic_spi(188)),
  319. /* VIN1 */
  320. DEFINE_RES_MEM(0xe6ef1000, 0x1000),
  321. DEFINE_RES_IRQ(gic_spi(189)),
  322. };
  323. static void __init lager_add_vin_device(unsigned idx,
  324. struct rcar_vin_platform_data *pdata)
  325. {
  326. struct platform_device_info vin_info = {
  327. .name = "r8a7790-vin",
  328. .id = idx,
  329. .res = &vin_resources[idx * 2],
  330. .num_res = 2,
  331. .dma_mask = DMA_BIT_MASK(32),
  332. .data = pdata,
  333. .size_data = sizeof(*pdata),
  334. };
  335. BUG_ON(idx > 1);
  336. platform_device_register_full(&vin_info);
  337. }
  338. #define LAGER_CAMERA(idx, name, addr, pdata, flag) \
  339. static struct i2c_board_info i2c_cam##idx##_device = { \
  340. I2C_BOARD_INFO(name, addr), \
  341. }; \
  342. \
  343. static struct rcar_vin_platform_data vin##idx##_pdata = { \
  344. .flags = flag, \
  345. }; \
  346. \
  347. static struct soc_camera_link cam##idx##_link = { \
  348. .bus_id = idx, \
  349. .board_info = &i2c_cam##idx##_device, \
  350. .i2c_adapter_id = 2, \
  351. .module_name = name, \
  352. .priv = pdata, \
  353. }
  354. /* Camera 0 is not currently supported due to adv7612 support missing */
  355. LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
  356. static void __init lager_add_camera1_device(void)
  357. {
  358. platform_device_register_data(NULL, "soc-camera-pdrv", 1,
  359. &cam1_link, sizeof(cam1_link));
  360. lager_add_vin_device(1, &vin1_pdata);
  361. }
  362. /* SATA1 */
  363. static const struct resource sata1_resources[] __initconst = {
  364. DEFINE_RES_MEM(0xee500000, 0x2000),
  365. DEFINE_RES_IRQ(gic_spi(106)),
  366. };
  367. static const struct platform_device_info sata1_info __initconst = {
  368. .name = "sata-r8a7790",
  369. .id = 1,
  370. .res = sata1_resources,
  371. .num_res = ARRAY_SIZE(sata1_resources),
  372. .dma_mask = DMA_BIT_MASK(32),
  373. };
  374. /* USBHS */
  375. static const struct resource usbhs_resources[] __initconst = {
  376. DEFINE_RES_MEM(0xe6590000, 0x100),
  377. DEFINE_RES_IRQ(gic_spi(107)),
  378. };
  379. struct usbhs_private {
  380. struct renesas_usbhs_platform_info info;
  381. struct usb_phy *phy;
  382. };
  383. #define usbhs_get_priv(pdev) \
  384. container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
  385. static int usbhs_power_ctrl(struct platform_device *pdev,
  386. void __iomem *base, int enable)
  387. {
  388. struct usbhs_private *priv = usbhs_get_priv(pdev);
  389. if (!priv->phy)
  390. return -ENODEV;
  391. if (enable) {
  392. int retval = usb_phy_init(priv->phy);
  393. if (!retval)
  394. retval = usb_phy_set_suspend(priv->phy, 0);
  395. return retval;
  396. }
  397. usb_phy_set_suspend(priv->phy, 1);
  398. usb_phy_shutdown(priv->phy);
  399. return 0;
  400. }
  401. static int usbhs_hardware_init(struct platform_device *pdev)
  402. {
  403. struct usbhs_private *priv = usbhs_get_priv(pdev);
  404. struct usb_phy *phy;
  405. int ret;
  406. /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
  407. * setting to avoid VBUS short circuit due to wrong cable.
  408. * PWEN should be pulled up high if USB Function is selected by SW5
  409. */
  410. gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
  411. if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
  412. pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
  413. ret = -ENOTSUPP;
  414. goto error;
  415. }
  416. phy = usb_get_phy_dev(&pdev->dev, 0);
  417. if (IS_ERR(phy)) {
  418. ret = PTR_ERR(phy);
  419. goto error;
  420. }
  421. priv->phy = phy;
  422. return 0;
  423. error:
  424. gpio_free(RCAR_GP_PIN(5, 18));
  425. return ret;
  426. }
  427. static int usbhs_hardware_exit(struct platform_device *pdev)
  428. {
  429. struct usbhs_private *priv = usbhs_get_priv(pdev);
  430. if (!priv->phy)
  431. return 0;
  432. usb_put_phy(priv->phy);
  433. priv->phy = NULL;
  434. gpio_free(RCAR_GP_PIN(5, 18));
  435. return 0;
  436. }
  437. static int usbhs_get_id(struct platform_device *pdev)
  438. {
  439. return USBHS_GADGET;
  440. }
  441. static u32 lager_usbhs_pipe_type[] = {
  442. USB_ENDPOINT_XFER_CONTROL,
  443. USB_ENDPOINT_XFER_ISOC,
  444. USB_ENDPOINT_XFER_ISOC,
  445. USB_ENDPOINT_XFER_BULK,
  446. USB_ENDPOINT_XFER_BULK,
  447. USB_ENDPOINT_XFER_BULK,
  448. USB_ENDPOINT_XFER_INT,
  449. USB_ENDPOINT_XFER_INT,
  450. USB_ENDPOINT_XFER_INT,
  451. USB_ENDPOINT_XFER_BULK,
  452. USB_ENDPOINT_XFER_BULK,
  453. USB_ENDPOINT_XFER_BULK,
  454. USB_ENDPOINT_XFER_BULK,
  455. USB_ENDPOINT_XFER_BULK,
  456. USB_ENDPOINT_XFER_BULK,
  457. USB_ENDPOINT_XFER_BULK,
  458. };
  459. static struct usbhs_private usbhs_priv __initdata = {
  460. .info = {
  461. .platform_callback = {
  462. .power_ctrl = usbhs_power_ctrl,
  463. .hardware_init = usbhs_hardware_init,
  464. .hardware_exit = usbhs_hardware_exit,
  465. .get_id = usbhs_get_id,
  466. },
  467. .driver_param = {
  468. .buswait_bwait = 4,
  469. .pipe_type = lager_usbhs_pipe_type,
  470. .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
  471. },
  472. }
  473. };
  474. static void __init lager_register_usbhs(void)
  475. {
  476. usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
  477. platform_device_register_resndata(NULL,
  478. "renesas_usbhs", -1,
  479. usbhs_resources,
  480. ARRAY_SIZE(usbhs_resources),
  481. &usbhs_priv.info,
  482. sizeof(usbhs_priv.info));
  483. }
  484. /* USBHS PHY */
  485. static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
  486. .chan0_pci = 0, /* Channel 0 is USBHS */
  487. .chan2_pci = 1, /* Channel 2 is PCI USB */
  488. };
  489. static const struct resource usbhs_phy_resources[] __initconst = {
  490. DEFINE_RES_MEM(0xe6590100, 0x100),
  491. };
  492. /* I2C */
  493. static struct i2c_board_info i2c2_devices[] = {
  494. {
  495. I2C_BOARD_INFO("ak4643", 0x12),
  496. }
  497. };
  498. /* Sound */
  499. static struct resource rsnd_resources[] __initdata = {
  500. [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
  501. [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
  502. [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
  503. [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
  504. };
  505. static struct rsnd_ssi_platform_info rsnd_ssi[] = {
  506. RSND_SSI(0, gic_spi(370), 0),
  507. RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
  508. };
  509. static struct rsnd_src_platform_info rsnd_src[2] = {
  510. /* no member at this point */
  511. };
  512. static struct rsnd_dai_platform_info rsnd_dai = {
  513. .playback = { .ssi = &rsnd_ssi[0], },
  514. .capture = { .ssi = &rsnd_ssi[1], },
  515. };
  516. static struct rcar_snd_info rsnd_info = {
  517. .flags = RSND_GEN2,
  518. .ssi_info = rsnd_ssi,
  519. .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
  520. .src_info = rsnd_src,
  521. .src_info_nr = ARRAY_SIZE(rsnd_src),
  522. .dai_info = &rsnd_dai,
  523. .dai_info_nr = 1,
  524. };
  525. static struct asoc_simple_card_info rsnd_card_info = {
  526. .name = "AK4643",
  527. .card = "SSI01-AK4643",
  528. .codec = "ak4642-codec.2-0012",
  529. .platform = "rcar_sound",
  530. .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
  531. .cpu_dai = {
  532. .name = "rcar_sound",
  533. },
  534. .codec_dai = {
  535. .name = "ak4642-hifi",
  536. .sysclk = 11289600,
  537. },
  538. };
  539. static void __init lager_add_rsnd_device(void)
  540. {
  541. struct platform_device_info cardinfo = {
  542. .name = "asoc-simple-card",
  543. .id = -1,
  544. .data = &rsnd_card_info,
  545. .size_data = sizeof(struct asoc_simple_card_info),
  546. .dma_mask = DMA_BIT_MASK(32),
  547. };
  548. i2c_register_board_info(2, i2c2_devices,
  549. ARRAY_SIZE(i2c2_devices));
  550. platform_device_register_resndata(
  551. NULL, "rcar_sound", -1,
  552. rsnd_resources, ARRAY_SIZE(rsnd_resources),
  553. &rsnd_info, sizeof(rsnd_info));
  554. platform_device_register_full(&cardinfo);
  555. }
  556. /* SDHI0 */
  557. static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
  558. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  559. MMC_CAP_POWER_OFF_CARD,
  560. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
  561. TMIO_MMC_WRPROTECT_DISABLE,
  562. };
  563. static struct resource sdhi0_resources[] __initdata = {
  564. DEFINE_RES_MEM(0xee100000, 0x200),
  565. DEFINE_RES_IRQ(gic_spi(165)),
  566. };
  567. /* SDHI2 */
  568. static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
  569. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  570. MMC_CAP_POWER_OFF_CARD,
  571. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
  572. TMIO_MMC_WRPROTECT_DISABLE,
  573. };
  574. static struct resource sdhi2_resources[] __initdata = {
  575. DEFINE_RES_MEM(0xee140000, 0x100),
  576. DEFINE_RES_IRQ(gic_spi(167)),
  577. };
  578. /* Internal PCI1 */
  579. static const struct resource pci1_resources[] __initconst = {
  580. DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
  581. DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
  582. DEFINE_RES_IRQ(gic_spi(112)),
  583. };
  584. static const struct platform_device_info pci1_info __initconst = {
  585. .name = "pci-rcar-gen2",
  586. .id = 1,
  587. .res = pci1_resources,
  588. .num_res = ARRAY_SIZE(pci1_resources),
  589. .dma_mask = DMA_BIT_MASK(32),
  590. };
  591. static void __init lager_add_usb1_device(void)
  592. {
  593. platform_device_register_full(&pci1_info);
  594. }
  595. /* Internal PCI2 */
  596. static const struct resource pci2_resources[] __initconst = {
  597. DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
  598. DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
  599. DEFINE_RES_IRQ(gic_spi(113)),
  600. };
  601. static const struct platform_device_info pci2_info __initconst = {
  602. .name = "pci-rcar-gen2",
  603. .id = 2,
  604. .res = pci2_resources,
  605. .num_res = ARRAY_SIZE(pci2_resources),
  606. .dma_mask = DMA_BIT_MASK(32),
  607. };
  608. static void __init lager_add_usb2_device(void)
  609. {
  610. platform_device_register_full(&pci2_info);
  611. }
  612. static const struct pinctrl_map lager_pinctrl_map[] = {
  613. /* DU (CN10: ARGB0, CN13: LVDS) */
  614. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  615. "du_rgb666", "du"),
  616. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  617. "du_sync_1", "du"),
  618. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  619. "du_clk_out_0", "du"),
  620. /* I2C2 */
  621. PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
  622. "i2c2", "i2c2"),
  623. /* QSPI */
  624. PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
  625. "qspi_ctrl", "qspi"),
  626. PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
  627. "qspi_data4", "qspi"),
  628. /* SCIF0 (CN19: DEBUG SERIAL0) */
  629. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
  630. "scif0_data", "scif0"),
  631. /* SCIF1 (CN20: DEBUG SERIAL1) */
  632. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
  633. "scif1_data", "scif1"),
  634. /* SDHI0 */
  635. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  636. "sdhi0_data4", "sdhi0"),
  637. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  638. "sdhi0_ctrl", "sdhi0"),
  639. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  640. "sdhi0_cd", "sdhi0"),
  641. /* SDHI2 */
  642. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  643. "sdhi2_data4", "sdhi2"),
  644. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  645. "sdhi2_ctrl", "sdhi2"),
  646. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  647. "sdhi2_cd", "sdhi2"),
  648. /* SSI (CN17: sound) */
  649. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  650. "ssi0129_ctrl", "ssi"),
  651. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  652. "ssi0_data", "ssi"),
  653. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  654. "ssi1_data", "ssi"),
  655. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  656. "audio_clk_a", "audio_clk"),
  657. /* MMCIF1 */
  658. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
  659. "mmc1_data8", "mmc1"),
  660. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
  661. "mmc1_ctrl", "mmc1"),
  662. /* Ether */
  663. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  664. "eth_link", "eth"),
  665. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  666. "eth_mdio", "eth"),
  667. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  668. "eth_rmii", "eth"),
  669. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  670. "intc_irq0", "intc"),
  671. /* VIN0 */
  672. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  673. "vin0_data24", "vin0"),
  674. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  675. "vin0_sync", "vin0"),
  676. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  677. "vin0_field", "vin0"),
  678. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  679. "vin0_clkenb", "vin0"),
  680. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  681. "vin0_clk", "vin0"),
  682. /* VIN1 */
  683. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
  684. "vin1_data8", "vin1"),
  685. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
  686. "vin1_clk", "vin1"),
  687. /* USB0 */
  688. PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
  689. "usb0_ovc_vbus", "usb0"),
  690. /* USB1 */
  691. PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
  692. "usb1", "usb1"),
  693. /* USB2 */
  694. PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
  695. "usb2", "usb2"),
  696. };
  697. static void __init lager_add_standard_devices(void)
  698. {
  699. int fixed_regulator_idx = 0;
  700. int gpio_regulator_idx = 0;
  701. r8a7790_clock_init();
  702. pinctrl_register_mappings(lager_pinctrl_map,
  703. ARRAY_SIZE(lager_pinctrl_map));
  704. r8a7790_pinmux_init();
  705. r8a7790_add_standard_devices();
  706. platform_device_register_data(NULL, "leds-gpio", -1,
  707. &lager_leds_pdata,
  708. sizeof(lager_leds_pdata));
  709. platform_device_register_data(NULL, "gpio-keys", -1,
  710. &lager_keys_pdata,
  711. sizeof(lager_keys_pdata));
  712. regulator_register_always_on(fixed_regulator_idx++,
  713. "fixed-3.3V", fixed3v3_power_consumers,
  714. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  715. platform_device_register_resndata(NULL, "sh_mmcif", 1,
  716. mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
  717. &mmcif1_pdata, sizeof(mmcif1_pdata));
  718. platform_device_register_full(&ether_info);
  719. lager_add_du_device();
  720. platform_device_register_resndata(NULL, "qspi", 0,
  721. qspi_resources,
  722. ARRAY_SIZE(qspi_resources),
  723. &qspi_pdata, sizeof(qspi_pdata));
  724. spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
  725. platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
  726. &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
  727. platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
  728. &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
  729. platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
  730. &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
  731. platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
  732. &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
  733. lager_add_camera1_device();
  734. platform_device_register_full(&sata1_info);
  735. platform_device_register_resndata(NULL, "usb_phy_rcar_gen2",
  736. -1, usbhs_phy_resources,
  737. ARRAY_SIZE(usbhs_phy_resources),
  738. &usbhs_phy_pdata,
  739. sizeof(usbhs_phy_pdata));
  740. lager_register_usbhs();
  741. lager_add_usb1_device();
  742. lager_add_usb2_device();
  743. lager_add_rsnd_device();
  744. platform_device_register_resndata(NULL, "sh_mobile_sdhi", 0,
  745. sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
  746. &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
  747. platform_device_register_resndata(NULL, "sh_mobile_sdhi", 2,
  748. sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
  749. &sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
  750. }
  751. /*
  752. * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
  753. * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
  754. * 14-15. We have to set them back to 01 from the default 00 value each time
  755. * the PHY is reset. It's also important because the PHY's LED0 signal is
  756. * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
  757. * bounce on and off after each packet, which we apparently want to avoid.
  758. */
  759. static int lager_ksz8041_fixup(struct phy_device *phydev)
  760. {
  761. u16 phyctrl1 = phy_read(phydev, 0x1e);
  762. phyctrl1 &= ~0xc000;
  763. phyctrl1 |= 0x4000;
  764. return phy_write(phydev, 0x1e, phyctrl1);
  765. }
  766. static void __init lager_init(void)
  767. {
  768. lager_add_standard_devices();
  769. irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
  770. if (IS_ENABLED(CONFIG_PHYLIB))
  771. phy_register_fixup_for_id("r8a7790-ether-ff:01",
  772. lager_ksz8041_fixup);
  773. }
  774. static const char * const lager_boards_compat_dt[] __initconst = {
  775. "renesas,lager",
  776. NULL,
  777. };
  778. DT_MACHINE_START(LAGER_DT, "lager")
  779. .smp = smp_ops(r8a7790_smp_ops),
  780. .init_early = shmobile_init_delay,
  781. .init_time = rcar_gen2_timer_init,
  782. .init_machine = lager_init,
  783. .init_late = shmobile_init_late,
  784. .reserve = rcar_gen2_reserve,
  785. .dt_compat = lager_boards_compat_dt,
  786. MACHINE_END