board-qsd8x50.c 5.9 KB

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  1. /* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  15. * 02110-1301, USA.
  16. */
  17. #include <linux/gpio.h>
  18. #include <linux/kernel.h>
  19. #include <linux/irq.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/delay.h>
  22. #include <linux/usb/msm_hsusb.h>
  23. #include <linux/err.h>
  24. #include <linux/clkdev.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/io.h>
  28. #include <asm/setup.h>
  29. #include <mach/irqs.h>
  30. #include <mach/sirc.h>
  31. #include <mach/vreg.h>
  32. #include <mach/clk.h>
  33. #include <linux/platform_data/mmc-msm_sdcc.h>
  34. #include "devices.h"
  35. #include "common.h"
  36. static const resource_size_t qsd8x50_surf_smc91x_base __initconst = 0x70000300;
  37. static const unsigned qsd8x50_surf_smc91x_gpio __initconst = 156;
  38. /* Leave smc91x resources empty here, as we'll fill them in
  39. * at run-time: they vary from board to board, and the true
  40. * configuration won't be known until boot.
  41. */
  42. static struct resource smc91x_resources[] = {
  43. [0] = {
  44. .flags = IORESOURCE_MEM,
  45. },
  46. [1] = {
  47. .flags = IORESOURCE_IRQ,
  48. },
  49. };
  50. static struct platform_device smc91x_device = {
  51. .name = "smc91x",
  52. .id = 0,
  53. .num_resources = ARRAY_SIZE(smc91x_resources),
  54. .resource = smc91x_resources,
  55. };
  56. static int __init msm_init_smc91x(void)
  57. {
  58. if (machine_is_qsd8x50_surf()) {
  59. smc91x_resources[0].start = qsd8x50_surf_smc91x_base;
  60. smc91x_resources[0].end = qsd8x50_surf_smc91x_base + 0xff;
  61. smc91x_resources[1].start =
  62. gpio_to_irq(qsd8x50_surf_smc91x_gpio);
  63. smc91x_resources[1].end =
  64. gpio_to_irq(qsd8x50_surf_smc91x_gpio);
  65. platform_device_register(&smc91x_device);
  66. }
  67. return 0;
  68. }
  69. module_init(msm_init_smc91x);
  70. static int hsusb_phy_init_seq[] = {
  71. 0x08, 0x31, /* Increase HS Driver Amplitude */
  72. 0x20, 0x32, /* Enable and set Pre-Emphasis Depth to 10% */
  73. -1
  74. };
  75. static int hsusb_link_clk_reset(struct clk *link_clk, bool assert)
  76. {
  77. int ret;
  78. if (assert) {
  79. ret = clk_reset(link_clk, CLK_RESET_ASSERT);
  80. if (ret)
  81. pr_err("usb hs_clk assert failed\n");
  82. } else {
  83. ret = clk_reset(link_clk, CLK_RESET_DEASSERT);
  84. if (ret)
  85. pr_err("usb hs_clk deassert failed\n");
  86. }
  87. return ret;
  88. }
  89. static int hsusb_phy_clk_reset(struct clk *phy_clk)
  90. {
  91. int ret;
  92. ret = clk_reset(phy_clk, CLK_RESET_ASSERT);
  93. if (ret) {
  94. pr_err("usb phy clk assert failed\n");
  95. return ret;
  96. }
  97. usleep_range(10000, 12000);
  98. ret = clk_reset(phy_clk, CLK_RESET_DEASSERT);
  99. if (ret)
  100. pr_err("usb phy clk deassert failed\n");
  101. return ret;
  102. }
  103. static struct msm_otg_platform_data msm_otg_pdata = {
  104. .phy_init_seq = hsusb_phy_init_seq,
  105. .mode = USB_DR_MODE_PERIPHERAL,
  106. .otg_control = OTG_PHY_CONTROL,
  107. .link_clk_reset = hsusb_link_clk_reset,
  108. .phy_clk_reset = hsusb_phy_clk_reset,
  109. };
  110. static struct platform_device *devices[] __initdata = {
  111. &msm_clock_8x50,
  112. &msm_device_gpio_8x50,
  113. &msm_device_uart3,
  114. &msm_device_smd,
  115. &msm_device_otg,
  116. &msm_device_hsusb,
  117. &msm_device_hsusb_host,
  118. };
  119. static struct msm_mmc_gpio sdc1_gpio_cfg[] = {
  120. {51, "sdc1_dat_3"},
  121. {52, "sdc1_dat_2"},
  122. {53, "sdc1_dat_1"},
  123. {54, "sdc1_dat_0"},
  124. {55, "sdc1_cmd"},
  125. {56, "sdc1_clk"}
  126. };
  127. static struct vreg *vreg_mmc;
  128. static unsigned long vreg_sts;
  129. static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
  130. {
  131. int rc = 0;
  132. struct platform_device *pdev;
  133. pdev = container_of(dv, struct platform_device, dev);
  134. if (vdd == 0) {
  135. if (!vreg_sts)
  136. return 0;
  137. clear_bit(pdev->id, &vreg_sts);
  138. if (!vreg_sts) {
  139. rc = vreg_disable(vreg_mmc);
  140. if (rc)
  141. pr_err("vreg_mmc disable failed for slot "
  142. "%d: %d\n", pdev->id, rc);
  143. }
  144. return 0;
  145. }
  146. if (!vreg_sts) {
  147. rc = vreg_set_level(vreg_mmc, 2900);
  148. if (rc)
  149. pr_err("vreg_mmc set level failed for slot %d: %d\n",
  150. pdev->id, rc);
  151. rc = vreg_enable(vreg_mmc);
  152. if (rc)
  153. pr_err("vreg_mmc enable failed for slot %d: %d\n",
  154. pdev->id, rc);
  155. }
  156. set_bit(pdev->id, &vreg_sts);
  157. return 0;
  158. }
  159. static struct msm_mmc_gpio_data sdc1_gpio = {
  160. .gpio = sdc1_gpio_cfg,
  161. .size = ARRAY_SIZE(sdc1_gpio_cfg),
  162. };
  163. static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
  164. .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
  165. .translate_vdd = msm_sdcc_setup_power,
  166. .gpio_data = &sdc1_gpio,
  167. };
  168. static void __init qsd8x50_init_mmc(void)
  169. {
  170. vreg_mmc = vreg_get(NULL, "gp5");
  171. if (IS_ERR(vreg_mmc)) {
  172. pr_err("vreg get for vreg_mmc failed (%ld)\n",
  173. PTR_ERR(vreg_mmc));
  174. return;
  175. }
  176. msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0);
  177. }
  178. static void __init qsd8x50_map_io(void)
  179. {
  180. msm_map_qsd8x50_io();
  181. }
  182. static void __init qsd8x50_init_irq(void)
  183. {
  184. msm_init_irq();
  185. msm_init_sirc();
  186. }
  187. static void __init qsd8x50_init(void)
  188. {
  189. msm_device_otg.dev.platform_data = &msm_otg_pdata;
  190. msm_device_hsusb.dev.parent = &msm_device_otg.dev;
  191. msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
  192. platform_add_devices(devices, ARRAY_SIZE(devices));
  193. qsd8x50_init_mmc();
  194. }
  195. static void __init qsd8x50_init_late(void)
  196. {
  197. smd_debugfs_init();
  198. }
  199. MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
  200. .atag_offset = 0x100,
  201. .map_io = qsd8x50_map_io,
  202. .init_irq = qsd8x50_init_irq,
  203. .init_machine = qsd8x50_init,
  204. .init_late = qsd8x50_init_late,
  205. .init_time = qsd8x50_timer_init,
  206. MACHINE_END
  207. MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
  208. .atag_offset = 0x100,
  209. .map_io = qsd8x50_map_io,
  210. .init_irq = qsd8x50_init_irq,
  211. .init_machine = qsd8x50_init,
  212. .init_late = qsd8x50_init_late,
  213. .init_time = qsd8x50_timer_init,
  214. MACHINE_END