platsmp.c 2.3 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/init.h>
  13. #include <linux/smp.h>
  14. #include <asm/cacheflush.h>
  15. #include <asm/page.h>
  16. #include <asm/smp_scu.h>
  17. #include <asm/mach/map.h>
  18. #include "common.h"
  19. #include "hardware.h"
  20. u32 g_diag_reg;
  21. static void __iomem *scu_base;
  22. static struct map_desc scu_io_desc __initdata = {
  23. /* .virtual and .pfn are run-time assigned */
  24. .length = SZ_4K,
  25. .type = MT_DEVICE,
  26. };
  27. void __init imx_scu_map_io(void)
  28. {
  29. unsigned long base;
  30. /* Get SCU base */
  31. asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  32. scu_io_desc.virtual = IMX_IO_P2V(base);
  33. scu_io_desc.pfn = __phys_to_pfn(base);
  34. iotable_init(&scu_io_desc, 1);
  35. scu_base = IMX_IO_ADDRESS(base);
  36. }
  37. static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
  38. {
  39. imx_set_cpu_jump(cpu, v7_secondary_startup);
  40. imx_enable_cpu(cpu, true);
  41. return 0;
  42. }
  43. /*
  44. * Initialise the CPU possible map early - this describes the CPUs
  45. * which may be present or become present in the system.
  46. */
  47. static void __init imx_smp_init_cpus(void)
  48. {
  49. int i, ncores;
  50. ncores = scu_get_core_count(scu_base);
  51. for (i = ncores; i < NR_CPUS; i++)
  52. set_cpu_possible(i, false);
  53. }
  54. void imx_smp_prepare(void)
  55. {
  56. scu_enable(scu_base);
  57. }
  58. static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
  59. {
  60. imx_smp_prepare();
  61. /*
  62. * The diagnostic register holds the errata bits. Mostly bootloader
  63. * does not bring up secondary cores, so that when errata bits are set
  64. * in bootloader, they are set only for boot cpu. But on a SMP
  65. * configuration, it should be equally done on every single core.
  66. * Read the register from boot cpu here, and will replicate it into
  67. * secondary cores when booting them.
  68. */
  69. asm("mrc p15, 0, %0, c15, c0, 1" : "=r" (g_diag_reg) : : "cc");
  70. sync_cache_w(&g_diag_reg);
  71. }
  72. struct smp_operations imx_smp_ops __initdata = {
  73. .smp_init_cpus = imx_smp_init_cpus,
  74. .smp_prepare_cpus = imx_smp_prepare_cpus,
  75. .smp_boot_secondary = imx_boot_secondary,
  76. #ifdef CONFIG_HOTPLUG_CPU
  77. .cpu_die = imx_cpu_die,
  78. .cpu_kill = imx_cpu_kill,
  79. #endif
  80. };