hardware.h 4.1 KB

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  1. /*
  2. * arch/arm/mach-at91/include/mach/hardware.h
  3. *
  4. * Copyright (C) 2003 SAN People
  5. * Copyright (C) 2003 ATMEL
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. */
  13. #ifndef __ASM_ARCH_HARDWARE_H
  14. #define __ASM_ARCH_HARDWARE_H
  15. #include <asm/sizes.h>
  16. /* DBGU base */
  17. /* rm9200, 9260/9g20, 9261/9g10, 9rl */
  18. #define AT91_BASE_DBGU0 0xfffff200
  19. /* 9263, 9g45, sama5d3 */
  20. #define AT91_BASE_DBGU1 0xffffee00
  21. /* sama5d4 */
  22. #define AT91_BASE_DBGU2 0xfc069000
  23. #if defined(CONFIG_ARCH_AT91X40)
  24. #include <mach/at91x40.h>
  25. #else
  26. #include <mach/at91rm9200.h>
  27. #include <mach/at91sam9260.h>
  28. #include <mach/at91sam9261.h>
  29. #include <mach/at91sam9263.h>
  30. #include <mach/at91sam9rl.h>
  31. #include <mach/at91sam9g45.h>
  32. #include <mach/at91sam9x5.h>
  33. #include <mach/at91sam9n12.h>
  34. #include <mach/sama5d3.h>
  35. #include <mach/sama5d4.h>
  36. /*
  37. * On all at91 except rm9200 and x40 have the System Controller starts
  38. * at address 0xffffc000 and has a size of 16KiB.
  39. *
  40. * On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
  41. * at 0xfffff000
  42. *
  43. * Removes the individual definitions of AT91_BASE_SYS and
  44. * replaces them with a common version at base 0xfffffc000 and size 16KiB
  45. * and map the same memory space
  46. */
  47. #define AT91_BASE_SYS 0xffffc000
  48. #endif
  49. /*
  50. * On sama5d4 there is no system controller, we map some needed peripherals
  51. */
  52. #define AT91_ALT_BASE_SYS 0xfc069000
  53. /*
  54. * On all at91 have the Advanced Interrupt Controller starts at address
  55. * 0xfffff000 and the Power Management Controller starts at 0xfffffc00
  56. */
  57. #define AT91_AIC 0xfffff000
  58. #define AT91_PMC 0xfffffc00
  59. /*
  60. * Peripheral identifiers/interrupts.
  61. */
  62. #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
  63. #define AT91_ID_SYS 1 /* System Peripherals */
  64. #ifdef CONFIG_MMU
  65. /*
  66. * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF
  67. * to 0xFEF78000 .. 0xFF000000. (544Kb)
  68. */
  69. #define AT91_IO_PHYS_BASE 0xFFF78000
  70. #define AT91_IO_VIRT_BASE IOMEM(0xFF000000 - AT91_IO_SIZE)
  71. /*
  72. * On sama5d4, remap the peripherals from address 0xFC069000 .. 0xFC06F000
  73. * to 0xFB069000 .. 0xFB06F000. (24Kb)
  74. */
  75. #define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS
  76. #define AT91_ALT_IO_VIRT_BASE IOMEM(0xFB069000)
  77. #else
  78. /*
  79. * Identity mapping for the non MMU case.
  80. */
  81. #define AT91_IO_PHYS_BASE AT91_BASE_SYS
  82. #define AT91_IO_VIRT_BASE IOMEM(AT91_IO_PHYS_BASE)
  83. #define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS
  84. #define AT91_ALT_IO_VIRT_BASE IOMEM(AT91_ALT_BASE_SYS)
  85. #endif
  86. #define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
  87. /* Convert a physical IO address to virtual IO address */
  88. #define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
  89. #define AT91_ALT_IO_P2V(x) ((x) - AT91_ALT_IO_PHYS_BASE + AT91_ALT_IO_VIRT_BASE)
  90. /*
  91. * Virtual to Physical Address mapping for IO devices.
  92. */
  93. #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
  94. #define AT91_ALT_VA_BASE_SYS AT91_ALT_IO_P2V(AT91_ALT_BASE_SYS)
  95. /* Internal SRAM is mapped below the IO devices */
  96. #define AT91_SRAM_MAX SZ_1M
  97. #define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
  98. /* External Memory Map */
  99. #define AT91_CHIPSELECT_0 0x10000000
  100. #define AT91_CHIPSELECT_1 0x20000000
  101. #define AT91_CHIPSELECT_2 0x30000000
  102. #define AT91_CHIPSELECT_3 0x40000000
  103. #define AT91_CHIPSELECT_4 0x50000000
  104. #define AT91_CHIPSELECT_5 0x60000000
  105. #define AT91_CHIPSELECT_6 0x70000000
  106. #define AT91_CHIPSELECT_7 0x80000000
  107. /* Clocks */
  108. #define AT91_SLOW_CLOCK 32768 /* slow clock */
  109. /*
  110. * FIXME: this is needed to communicate between the pinctrl driver and
  111. * the PM implementation in the machine. Possibly part of the PM
  112. * implementation should be moved down into the pinctrl driver and get
  113. * called as part of the generic suspend/resume path.
  114. */
  115. #ifndef __ASSEMBLY__
  116. #ifdef CONFIG_PINCTRL_AT91
  117. extern void at91_pinctrl_gpio_suspend(void);
  118. extern void at91_pinctrl_gpio_resume(void);
  119. #else
  120. static inline void at91_pinctrl_gpio_suspend(void) {}
  121. static inline void at91_pinctrl_gpio_resume(void) {}
  122. #endif
  123. #endif
  124. #endif