smp.c 7.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340
  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * RajeshwarR: Dec 11, 2007
  9. * -- Added support for Inter Processor Interrupts
  10. *
  11. * Vineetg: Nov 1st, 2007
  12. * -- Initial Write (Borrowed heavily from ARM)
  13. */
  14. #include <linux/spinlock.h>
  15. #include <linux/sched.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/profile.h>
  18. #include <linux/mm.h>
  19. #include <linux/cpu.h>
  20. #include <linux/irq.h>
  21. #include <linux/atomic.h>
  22. #include <linux/cpumask.h>
  23. #include <linux/reboot.h>
  24. #include <asm/processor.h>
  25. #include <asm/setup.h>
  26. #include <asm/mach_desc.h>
  27. arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
  28. arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
  29. struct plat_smp_ops plat_smp_ops;
  30. /* XXX: per cpu ? Only needed once in early seconday boot */
  31. struct task_struct *secondary_idle_tsk;
  32. /* Called from start_kernel */
  33. void __init smp_prepare_boot_cpu(void)
  34. {
  35. }
  36. /*
  37. * Initialise the CPU possible map early - this describes the CPUs
  38. * which may be present or become present in the system.
  39. */
  40. void __init smp_init_cpus(void)
  41. {
  42. unsigned int i;
  43. for (i = 0; i < NR_CPUS; i++)
  44. set_cpu_possible(i, true);
  45. }
  46. /* called from init ( ) => process 1 */
  47. void __init smp_prepare_cpus(unsigned int max_cpus)
  48. {
  49. int i;
  50. /*
  51. * Initialise the present map, which describes the set of CPUs
  52. * actually populated at the present time.
  53. */
  54. for (i = 0; i < max_cpus; i++)
  55. set_cpu_present(i, true);
  56. }
  57. void __init smp_cpus_done(unsigned int max_cpus)
  58. {
  59. }
  60. /*
  61. * After power-up, a non Master CPU needs to wait for Master to kick start it
  62. *
  63. * The default implementation halts
  64. *
  65. * This relies on platform specific support allowing Master to directly set
  66. * this CPU's PC (to be @first_lines_of_secondary() and kick start it.
  67. *
  68. * In lack of such h/w assist, platforms can override this function
  69. * - make this function busy-spin on a token, eventually set by Master
  70. * (from arc_platform_smp_wakeup_cpu())
  71. * - Once token is available, jump to @first_lines_of_secondary
  72. * (using inline asm).
  73. *
  74. * Alert: can NOT use stack here as it has not been determined/setup for CPU.
  75. * If it turns out to be elaborate, it's better to code it in assembly
  76. *
  77. */
  78. void __weak arc_platform_smp_wait_to_boot(int cpu)
  79. {
  80. /*
  81. * As a hack for debugging - since debugger will single-step over the
  82. * FLAG insn - wrap the halt itself it in a self loop
  83. */
  84. __asm__ __volatile__(
  85. "1: \n"
  86. " flag 1 \n"
  87. " b 1b \n");
  88. }
  89. const char *arc_platform_smp_cpuinfo(void)
  90. {
  91. return plat_smp_ops.info;
  92. }
  93. /*
  94. * The very first "C" code executed by secondary
  95. * Called from asm stub in head.S
  96. * "current"/R25 already setup by low level boot code
  97. */
  98. void start_kernel_secondary(void)
  99. {
  100. struct mm_struct *mm = &init_mm;
  101. unsigned int cpu = smp_processor_id();
  102. /* MMU, Caches, Vector Table, Interrupts etc */
  103. setup_processor();
  104. atomic_inc(&mm->mm_users);
  105. atomic_inc(&mm->mm_count);
  106. current->active_mm = mm;
  107. cpumask_set_cpu(cpu, mm_cpumask(mm));
  108. notify_cpu_starting(cpu);
  109. set_cpu_online(cpu, true);
  110. pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu);
  111. if (machine_desc->init_smp)
  112. machine_desc->init_smp(cpu);
  113. arc_local_timer_setup();
  114. local_irq_enable();
  115. preempt_disable();
  116. cpu_startup_entry(CPUHP_ONLINE);
  117. }
  118. /*
  119. * Called from kernel_init( ) -> smp_init( ) - for each CPU
  120. *
  121. * At this point, Secondary Processor is "HALT"ed:
  122. * -It booted, but was halted in head.S
  123. * -It was configured to halt-on-reset
  124. * So need to wake it up.
  125. *
  126. * Essential requirements being where to run from (PC) and stack (SP)
  127. */
  128. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  129. {
  130. unsigned long wait_till;
  131. secondary_idle_tsk = idle;
  132. pr_info("Idle Task [%d] %p", cpu, idle);
  133. pr_info("Trying to bring up CPU%u ...\n", cpu);
  134. if (plat_smp_ops.cpu_kick)
  135. plat_smp_ops.cpu_kick(cpu,
  136. (unsigned long)first_lines_of_secondary);
  137. /* wait for 1 sec after kicking the secondary */
  138. wait_till = jiffies + HZ;
  139. while (time_before(jiffies, wait_till)) {
  140. if (cpu_online(cpu))
  141. break;
  142. }
  143. if (!cpu_online(cpu)) {
  144. pr_info("Timeout: CPU%u FAILED to comeup !!!\n", cpu);
  145. return -1;
  146. }
  147. secondary_idle_tsk = NULL;
  148. return 0;
  149. }
  150. /*
  151. * not supported here
  152. */
  153. int __init setup_profiling_timer(unsigned int multiplier)
  154. {
  155. return -EINVAL;
  156. }
  157. /*****************************************************************************/
  158. /* Inter Processor Interrupt Handling */
  159. /*****************************************************************************/
  160. enum ipi_msg_type {
  161. IPI_EMPTY = 0,
  162. IPI_RESCHEDULE = 1,
  163. IPI_CALL_FUNC,
  164. IPI_CPU_STOP,
  165. };
  166. /*
  167. * In arches with IRQ for each msg type (above), receiver can use IRQ-id to
  168. * figure out what msg was sent. For those which don't (ARC has dedicated IPI
  169. * IRQ), the msg-type needs to be conveyed via per-cpu data
  170. */
  171. static DEFINE_PER_CPU(unsigned long, ipi_data);
  172. static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg)
  173. {
  174. unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu);
  175. unsigned long old, new;
  176. unsigned long flags;
  177. pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu);
  178. local_irq_save(flags);
  179. /*
  180. * Atomically write new msg bit (in case others are writing too),
  181. * and read back old value
  182. */
  183. do {
  184. new = old = *ipi_data_ptr;
  185. new |= 1U << msg;
  186. } while (cmpxchg(ipi_data_ptr, old, new) != old);
  187. /*
  188. * Call the platform specific IPI kick function, but avoid if possible:
  189. * Only do so if there's no pending msg from other concurrent sender(s).
  190. * Otherwise, recevier will see this msg as well when it takes the
  191. * IPI corresponding to that msg. This is true, even if it is already in
  192. * IPI handler, because !@old means it has not yet dequeued the msg(s)
  193. * so @new msg can be a free-loader
  194. */
  195. if (plat_smp_ops.ipi_send && !old)
  196. plat_smp_ops.ipi_send(cpu);
  197. local_irq_restore(flags);
  198. }
  199. static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg)
  200. {
  201. unsigned int cpu;
  202. for_each_cpu(cpu, callmap)
  203. ipi_send_msg_one(cpu, msg);
  204. }
  205. void smp_send_reschedule(int cpu)
  206. {
  207. ipi_send_msg_one(cpu, IPI_RESCHEDULE);
  208. }
  209. void smp_send_stop(void)
  210. {
  211. struct cpumask targets;
  212. cpumask_copy(&targets, cpu_online_mask);
  213. cpumask_clear_cpu(smp_processor_id(), &targets);
  214. ipi_send_msg(&targets, IPI_CPU_STOP);
  215. }
  216. void arch_send_call_function_single_ipi(int cpu)
  217. {
  218. ipi_send_msg_one(cpu, IPI_CALL_FUNC);
  219. }
  220. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  221. {
  222. ipi_send_msg(mask, IPI_CALL_FUNC);
  223. }
  224. /*
  225. * ipi_cpu_stop - handle IPI from smp_send_stop()
  226. */
  227. static void ipi_cpu_stop(void)
  228. {
  229. machine_halt();
  230. }
  231. static inline void __do_IPI(unsigned long msg)
  232. {
  233. switch (msg) {
  234. case IPI_RESCHEDULE:
  235. scheduler_ipi();
  236. break;
  237. case IPI_CALL_FUNC:
  238. generic_smp_call_function_interrupt();
  239. break;
  240. case IPI_CPU_STOP:
  241. ipi_cpu_stop();
  242. break;
  243. default:
  244. pr_warn("IPI with unexpected msg %ld\n", msg);
  245. }
  246. }
  247. /*
  248. * arch-common ISR to handle for inter-processor interrupts
  249. * Has hooks for platform specific IPI
  250. */
  251. irqreturn_t do_IPI(int irq, void *dev_id)
  252. {
  253. unsigned long pending;
  254. pr_debug("IPI [%ld] received on cpu %d\n",
  255. *this_cpu_ptr(&ipi_data), smp_processor_id());
  256. if (plat_smp_ops.ipi_clear)
  257. plat_smp_ops.ipi_clear(irq);
  258. /*
  259. * "dequeue" the msg corresponding to this IPI (and possibly other
  260. * piggybacked msg from elided IPIs: see ipi_send_msg_one() above)
  261. */
  262. pending = xchg(this_cpu_ptr(&ipi_data), 0);
  263. do {
  264. unsigned long msg = __ffs(pending);
  265. __do_IPI(msg);
  266. pending &= ~(1U << msg);
  267. } while (pending);
  268. return IRQ_HANDLED;
  269. }
  270. /*
  271. * API called by platform code to hookup arch-common ISR to their IPI IRQ
  272. */
  273. static DEFINE_PER_CPU(int, ipi_dev);
  274. int smp_ipi_irq_setup(int cpu, int irq)
  275. {
  276. int *dev = per_cpu_ptr(&ipi_dev, cpu);
  277. arc_request_percpu_irq(irq, cpu, do_IPI, "IPI Interrupt", dev);
  278. return 0;
  279. }