xen-pvh.S 4.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright C 2016, Oracle and/or its affiliates. All rights reserved.
  4. */
  5. .code32
  6. .text
  7. #define _pa(x) ((x) - __START_KERNEL_map)
  8. #include <linux/elfnote.h>
  9. #include <linux/init.h>
  10. #include <linux/linkage.h>
  11. #include <asm/segment.h>
  12. #include <asm/asm.h>
  13. #include <asm/boot.h>
  14. #include <asm/processor-flags.h>
  15. #include <asm/msr.h>
  16. #include <xen/interface/elfnote.h>
  17. __HEAD
  18. /*
  19. * Entry point for PVH guests.
  20. *
  21. * Xen ABI specifies the following register state when we come here:
  22. *
  23. * - `ebx`: contains the physical memory address where the loader has placed
  24. * the boot start info structure.
  25. * - `cr0`: bit 0 (PE) must be set. All the other writeable bits are cleared.
  26. * - `cr4`: all bits are cleared.
  27. * - `cs `: must be a 32-bit read/execute code segment with a base of ‘0’
  28. * and a limit of ‘0xFFFFFFFF’. The selector value is unspecified.
  29. * - `ds`, `es`: must be a 32-bit read/write data segment with a base of
  30. * ‘0’ and a limit of ‘0xFFFFFFFF’. The selector values are all
  31. * unspecified.
  32. * - `tr`: must be a 32-bit TSS (active) with a base of '0' and a limit
  33. * of '0x67'.
  34. * - `eflags`: bit 17 (VM) must be cleared. Bit 9 (IF) must be cleared.
  35. * Bit 8 (TF) must be cleared. Other bits are all unspecified.
  36. *
  37. * All other processor registers and flag bits are unspecified. The OS is in
  38. * charge of setting up it's own stack, GDT and IDT.
  39. */
  40. #define PVH_GDT_ENTRY_CS 1
  41. #define PVH_GDT_ENTRY_DS 2
  42. #define PVH_GDT_ENTRY_CANARY 3
  43. #define PVH_CS_SEL (PVH_GDT_ENTRY_CS * 8)
  44. #define PVH_DS_SEL (PVH_GDT_ENTRY_DS * 8)
  45. #define PVH_CANARY_SEL (PVH_GDT_ENTRY_CANARY * 8)
  46. ENTRY(pvh_start_xen)
  47. cld
  48. lgdt (_pa(gdt))
  49. mov $PVH_DS_SEL,%eax
  50. mov %eax,%ds
  51. mov %eax,%es
  52. mov %eax,%ss
  53. /* Stash hvm_start_info. */
  54. mov $_pa(pvh_start_info), %edi
  55. mov %ebx, %esi
  56. mov _pa(pvh_start_info_sz), %ecx
  57. shr $2,%ecx
  58. rep
  59. movsl
  60. mov $_pa(early_stack_end), %esp
  61. /* Enable PAE mode. */
  62. mov %cr4, %eax
  63. orl $X86_CR4_PAE, %eax
  64. mov %eax, %cr4
  65. #ifdef CONFIG_X86_64
  66. /* Enable Long mode. */
  67. mov $MSR_EFER, %ecx
  68. rdmsr
  69. btsl $_EFER_LME, %eax
  70. wrmsr
  71. /* Enable pre-constructed page tables. */
  72. mov $_pa(init_top_pgt), %eax
  73. mov %eax, %cr3
  74. mov $(X86_CR0_PG | X86_CR0_PE), %eax
  75. mov %eax, %cr0
  76. /* Jump to 64-bit mode. */
  77. ljmp $PVH_CS_SEL, $_pa(1f)
  78. /* 64-bit entry point. */
  79. .code64
  80. 1:
  81. /* Set base address in stack canary descriptor. */
  82. mov $MSR_GS_BASE,%ecx
  83. mov $_pa(canary), %eax
  84. xor %edx, %edx
  85. wrmsr
  86. call xen_prepare_pvh
  87. /* startup_64 expects boot_params in %rsi. */
  88. mov $_pa(pvh_bootparams), %rsi
  89. mov $_pa(startup_64), %rax
  90. jmp *%rax
  91. #else /* CONFIG_X86_64 */
  92. /* Set base address in stack canary descriptor. */
  93. movl $_pa(gdt_start),%eax
  94. movl $_pa(canary),%ecx
  95. movw %cx, (PVH_GDT_ENTRY_CANARY * 8) + 2(%eax)
  96. shrl $16, %ecx
  97. movb %cl, (PVH_GDT_ENTRY_CANARY * 8) + 4(%eax)
  98. movb %ch, (PVH_GDT_ENTRY_CANARY * 8) + 7(%eax)
  99. mov $PVH_CANARY_SEL,%eax
  100. mov %eax,%gs
  101. call mk_early_pgtbl_32
  102. mov $_pa(initial_page_table), %eax
  103. mov %eax, %cr3
  104. mov %cr0, %eax
  105. or $(X86_CR0_PG | X86_CR0_PE), %eax
  106. mov %eax, %cr0
  107. ljmp $PVH_CS_SEL, $1f
  108. 1:
  109. call xen_prepare_pvh
  110. mov $_pa(pvh_bootparams), %esi
  111. /* startup_32 doesn't expect paging and PAE to be on. */
  112. ljmp $PVH_CS_SEL, $_pa(2f)
  113. 2:
  114. mov %cr0, %eax
  115. and $~X86_CR0_PG, %eax
  116. mov %eax, %cr0
  117. mov %cr4, %eax
  118. and $~X86_CR4_PAE, %eax
  119. mov %eax, %cr4
  120. ljmp $PVH_CS_SEL, $_pa(startup_32)
  121. #endif
  122. END(pvh_start_xen)
  123. .section ".init.data","aw"
  124. .balign 8
  125. gdt:
  126. .word gdt_end - gdt_start
  127. .long _pa(gdt_start)
  128. .word 0
  129. gdt_start:
  130. .quad 0x0000000000000000 /* NULL descriptor */
  131. #ifdef CONFIG_X86_64
  132. .quad GDT_ENTRY(0xa09a, 0, 0xfffff) /* PVH_CS_SEL */
  133. #else
  134. .quad GDT_ENTRY(0xc09a, 0, 0xfffff) /* PVH_CS_SEL */
  135. #endif
  136. .quad GDT_ENTRY(0xc092, 0, 0xfffff) /* PVH_DS_SEL */
  137. .quad GDT_ENTRY(0x4090, 0, 0x18) /* PVH_CANARY_SEL */
  138. gdt_end:
  139. .balign 16
  140. canary:
  141. .fill 48, 1, 0
  142. early_stack:
  143. .fill BOOT_STACK_SIZE, 1, 0
  144. early_stack_end:
  145. ELFNOTE(Xen, XEN_ELFNOTE_PHYS32_ENTRY,
  146. _ASM_PTR (pvh_start_xen - __START_KERNEL_map))