chip.c 30 KB

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  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include <linux/irqdomain.h>
  18. #include <trace/events/irq.h>
  19. #include "internals.h"
  20. static irqreturn_t bad_chained_irq(int irq, void *dev_id)
  21. {
  22. WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
  23. return IRQ_NONE;
  24. }
  25. /*
  26. * Chained handlers should never call action on their IRQ. This default
  27. * action will emit warning if such thing happens.
  28. */
  29. struct irqaction chained_action = {
  30. .handler = bad_chained_irq,
  31. };
  32. /**
  33. * irq_set_chip - set the irq chip for an irq
  34. * @irq: irq number
  35. * @chip: pointer to irq chip description structure
  36. */
  37. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  38. {
  39. unsigned long flags;
  40. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  41. if (!desc)
  42. return -EINVAL;
  43. if (!chip)
  44. chip = &no_irq_chip;
  45. desc->irq_data.chip = chip;
  46. irq_put_desc_unlock(desc, flags);
  47. /*
  48. * For !CONFIG_SPARSE_IRQ make the irq show up in
  49. * allocated_irqs.
  50. */
  51. irq_mark_irq(irq);
  52. return 0;
  53. }
  54. EXPORT_SYMBOL(irq_set_chip);
  55. /**
  56. * irq_set_type - set the irq trigger type for an irq
  57. * @irq: irq number
  58. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  59. */
  60. int irq_set_irq_type(unsigned int irq, unsigned int type)
  61. {
  62. unsigned long flags;
  63. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  64. int ret = 0;
  65. if (!desc)
  66. return -EINVAL;
  67. ret = __irq_set_trigger(desc, type);
  68. irq_put_desc_busunlock(desc, flags);
  69. return ret;
  70. }
  71. EXPORT_SYMBOL(irq_set_irq_type);
  72. /**
  73. * irq_set_handler_data - set irq handler data for an irq
  74. * @irq: Interrupt number
  75. * @data: Pointer to interrupt specific data
  76. *
  77. * Set the hardware irq controller data for an irq
  78. */
  79. int irq_set_handler_data(unsigned int irq, void *data)
  80. {
  81. unsigned long flags;
  82. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  83. if (!desc)
  84. return -EINVAL;
  85. desc->irq_common_data.handler_data = data;
  86. irq_put_desc_unlock(desc, flags);
  87. return 0;
  88. }
  89. EXPORT_SYMBOL(irq_set_handler_data);
  90. /**
  91. * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
  92. * @irq_base: Interrupt number base
  93. * @irq_offset: Interrupt number offset
  94. * @entry: Pointer to MSI descriptor data
  95. *
  96. * Set the MSI descriptor entry for an irq at offset
  97. */
  98. int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
  99. struct msi_desc *entry)
  100. {
  101. unsigned long flags;
  102. struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  103. if (!desc)
  104. return -EINVAL;
  105. desc->irq_common_data.msi_desc = entry;
  106. if (entry && !irq_offset)
  107. entry->irq = irq_base;
  108. irq_put_desc_unlock(desc, flags);
  109. return 0;
  110. }
  111. /**
  112. * irq_set_msi_desc - set MSI descriptor data for an irq
  113. * @irq: Interrupt number
  114. * @entry: Pointer to MSI descriptor data
  115. *
  116. * Set the MSI descriptor entry for an irq
  117. */
  118. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  119. {
  120. return irq_set_msi_desc_off(irq, 0, entry);
  121. }
  122. /**
  123. * irq_set_chip_data - set irq chip data for an irq
  124. * @irq: Interrupt number
  125. * @data: Pointer to chip specific data
  126. *
  127. * Set the hardware irq chip data for an irq
  128. */
  129. int irq_set_chip_data(unsigned int irq, void *data)
  130. {
  131. unsigned long flags;
  132. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  133. if (!desc)
  134. return -EINVAL;
  135. desc->irq_data.chip_data = data;
  136. irq_put_desc_unlock(desc, flags);
  137. return 0;
  138. }
  139. EXPORT_SYMBOL(irq_set_chip_data);
  140. struct irq_data *irq_get_irq_data(unsigned int irq)
  141. {
  142. struct irq_desc *desc = irq_to_desc(irq);
  143. return desc ? &desc->irq_data : NULL;
  144. }
  145. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  146. static void irq_state_clr_disabled(struct irq_desc *desc)
  147. {
  148. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  149. }
  150. static void irq_state_set_disabled(struct irq_desc *desc)
  151. {
  152. irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
  153. }
  154. static void irq_state_clr_masked(struct irq_desc *desc)
  155. {
  156. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  157. }
  158. static void irq_state_set_masked(struct irq_desc *desc)
  159. {
  160. irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
  161. }
  162. int irq_startup(struct irq_desc *desc, bool resend)
  163. {
  164. int ret = 0;
  165. irq_state_clr_disabled(desc);
  166. desc->depth = 0;
  167. irq_domain_activate_irq(&desc->irq_data);
  168. if (desc->irq_data.chip->irq_startup) {
  169. ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  170. irq_state_clr_masked(desc);
  171. } else {
  172. irq_enable(desc);
  173. }
  174. if (resend)
  175. check_irq_resend(desc);
  176. return ret;
  177. }
  178. void irq_shutdown(struct irq_desc *desc)
  179. {
  180. irq_state_set_disabled(desc);
  181. desc->depth = 1;
  182. if (desc->irq_data.chip->irq_shutdown)
  183. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  184. else if (desc->irq_data.chip->irq_disable)
  185. desc->irq_data.chip->irq_disable(&desc->irq_data);
  186. else
  187. desc->irq_data.chip->irq_mask(&desc->irq_data);
  188. irq_domain_deactivate_irq(&desc->irq_data);
  189. irq_state_set_masked(desc);
  190. }
  191. void irq_enable(struct irq_desc *desc)
  192. {
  193. irq_state_clr_disabled(desc);
  194. if (desc->irq_data.chip->irq_enable)
  195. desc->irq_data.chip->irq_enable(&desc->irq_data);
  196. else
  197. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  198. irq_state_clr_masked(desc);
  199. }
  200. /**
  201. * irq_disable - Mark interrupt disabled
  202. * @desc: irq descriptor which should be disabled
  203. *
  204. * If the chip does not implement the irq_disable callback, we
  205. * use a lazy disable approach. That means we mark the interrupt
  206. * disabled, but leave the hardware unmasked. That's an
  207. * optimization because we avoid the hardware access for the
  208. * common case where no interrupt happens after we marked it
  209. * disabled. If an interrupt happens, then the interrupt flow
  210. * handler masks the line at the hardware level and marks it
  211. * pending.
  212. *
  213. * If the interrupt chip does not implement the irq_disable callback,
  214. * a driver can disable the lazy approach for a particular irq line by
  215. * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
  216. * be used for devices which cannot disable the interrupt at the
  217. * device level under certain circumstances and have to use
  218. * disable_irq[_nosync] instead.
  219. */
  220. void irq_disable(struct irq_desc *desc)
  221. {
  222. irq_state_set_disabled(desc);
  223. if (desc->irq_data.chip->irq_disable) {
  224. desc->irq_data.chip->irq_disable(&desc->irq_data);
  225. irq_state_set_masked(desc);
  226. } else if (irq_settings_disable_unlazy(desc)) {
  227. mask_irq(desc);
  228. }
  229. }
  230. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  231. {
  232. if (desc->irq_data.chip->irq_enable)
  233. desc->irq_data.chip->irq_enable(&desc->irq_data);
  234. else
  235. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  236. cpumask_set_cpu(cpu, desc->percpu_enabled);
  237. }
  238. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  239. {
  240. if (desc->irq_data.chip->irq_disable)
  241. desc->irq_data.chip->irq_disable(&desc->irq_data);
  242. else
  243. desc->irq_data.chip->irq_mask(&desc->irq_data);
  244. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  245. }
  246. static inline void mask_ack_irq(struct irq_desc *desc)
  247. {
  248. if (desc->irq_data.chip->irq_mask_ack)
  249. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  250. else {
  251. desc->irq_data.chip->irq_mask(&desc->irq_data);
  252. if (desc->irq_data.chip->irq_ack)
  253. desc->irq_data.chip->irq_ack(&desc->irq_data);
  254. }
  255. irq_state_set_masked(desc);
  256. }
  257. void mask_irq(struct irq_desc *desc)
  258. {
  259. if (desc->irq_data.chip->irq_mask) {
  260. desc->irq_data.chip->irq_mask(&desc->irq_data);
  261. irq_state_set_masked(desc);
  262. }
  263. }
  264. void unmask_irq(struct irq_desc *desc)
  265. {
  266. if (desc->irq_data.chip->irq_unmask) {
  267. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  268. irq_state_clr_masked(desc);
  269. }
  270. }
  271. void unmask_threaded_irq(struct irq_desc *desc)
  272. {
  273. struct irq_chip *chip = desc->irq_data.chip;
  274. if (chip->flags & IRQCHIP_EOI_THREADED)
  275. chip->irq_eoi(&desc->irq_data);
  276. if (chip->irq_unmask) {
  277. chip->irq_unmask(&desc->irq_data);
  278. irq_state_clr_masked(desc);
  279. }
  280. }
  281. /*
  282. * handle_nested_irq - Handle a nested irq from a irq thread
  283. * @irq: the interrupt number
  284. *
  285. * Handle interrupts which are nested into a threaded interrupt
  286. * handler. The handler function is called inside the calling
  287. * threads context.
  288. */
  289. void handle_nested_irq(unsigned int irq)
  290. {
  291. struct irq_desc *desc = irq_to_desc(irq);
  292. struct irqaction *action;
  293. irqreturn_t action_ret;
  294. might_sleep();
  295. raw_spin_lock_irq(&desc->lock);
  296. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  297. action = desc->action;
  298. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
  299. desc->istate |= IRQS_PENDING;
  300. goto out_unlock;
  301. }
  302. kstat_incr_irqs_this_cpu(desc);
  303. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  304. raw_spin_unlock_irq(&desc->lock);
  305. action_ret = IRQ_NONE;
  306. for_each_action_of_desc(desc, action)
  307. action_ret |= action->thread_fn(action->irq, action->dev_id);
  308. if (!noirqdebug)
  309. note_interrupt(desc, action_ret);
  310. raw_spin_lock_irq(&desc->lock);
  311. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  312. out_unlock:
  313. raw_spin_unlock_irq(&desc->lock);
  314. }
  315. EXPORT_SYMBOL_GPL(handle_nested_irq);
  316. static bool irq_check_poll(struct irq_desc *desc)
  317. {
  318. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  319. return false;
  320. return irq_wait_for_poll(desc);
  321. }
  322. static bool irq_may_run(struct irq_desc *desc)
  323. {
  324. unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
  325. /*
  326. * If the interrupt is not in progress and is not an armed
  327. * wakeup interrupt, proceed.
  328. */
  329. if (!irqd_has_set(&desc->irq_data, mask))
  330. return true;
  331. /*
  332. * If the interrupt is an armed wakeup source, mark it pending
  333. * and suspended, disable it and notify the pm core about the
  334. * event.
  335. */
  336. if (irq_pm_check_wakeup(desc))
  337. return false;
  338. /*
  339. * Handle a potential concurrent poll on a different core.
  340. */
  341. return irq_check_poll(desc);
  342. }
  343. /**
  344. * handle_simple_irq - Simple and software-decoded IRQs.
  345. * @desc: the interrupt description structure for this irq
  346. *
  347. * Simple interrupts are either sent from a demultiplexing interrupt
  348. * handler or come from hardware, where no interrupt hardware control
  349. * is necessary.
  350. *
  351. * Note: The caller is expected to handle the ack, clear, mask and
  352. * unmask issues if necessary.
  353. */
  354. void handle_simple_irq(struct irq_desc *desc)
  355. {
  356. raw_spin_lock(&desc->lock);
  357. if (!irq_may_run(desc))
  358. goto out_unlock;
  359. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  360. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  361. desc->istate |= IRQS_PENDING;
  362. goto out_unlock;
  363. }
  364. kstat_incr_irqs_this_cpu(desc);
  365. handle_irq_event(desc);
  366. out_unlock:
  367. raw_spin_unlock(&desc->lock);
  368. }
  369. EXPORT_SYMBOL_GPL(handle_simple_irq);
  370. /**
  371. * handle_untracked_irq - Simple and software-decoded IRQs.
  372. * @desc: the interrupt description structure for this irq
  373. *
  374. * Untracked interrupts are sent from a demultiplexing interrupt
  375. * handler when the demultiplexer does not know which device it its
  376. * multiplexed irq domain generated the interrupt. IRQ's handled
  377. * through here are not subjected to stats tracking, randomness, or
  378. * spurious interrupt detection.
  379. *
  380. * Note: Like handle_simple_irq, the caller is expected to handle
  381. * the ack, clear, mask and unmask issues if necessary.
  382. */
  383. void handle_untracked_irq(struct irq_desc *desc)
  384. {
  385. unsigned int flags = 0;
  386. raw_spin_lock(&desc->lock);
  387. if (!irq_may_run(desc))
  388. goto out_unlock;
  389. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  390. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  391. desc->istate |= IRQS_PENDING;
  392. goto out_unlock;
  393. }
  394. desc->istate &= ~IRQS_PENDING;
  395. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  396. raw_spin_unlock(&desc->lock);
  397. __handle_irq_event_percpu(desc, &flags);
  398. raw_spin_lock(&desc->lock);
  399. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  400. out_unlock:
  401. raw_spin_unlock(&desc->lock);
  402. }
  403. EXPORT_SYMBOL_GPL(handle_untracked_irq);
  404. /*
  405. * Called unconditionally from handle_level_irq() and only for oneshot
  406. * interrupts from handle_fasteoi_irq()
  407. */
  408. static void cond_unmask_irq(struct irq_desc *desc)
  409. {
  410. /*
  411. * We need to unmask in the following cases:
  412. * - Standard level irq (IRQF_ONESHOT is not set)
  413. * - Oneshot irq which did not wake the thread (caused by a
  414. * spurious interrupt or a primary handler handling it
  415. * completely).
  416. */
  417. if (!irqd_irq_disabled(&desc->irq_data) &&
  418. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
  419. unmask_irq(desc);
  420. }
  421. /**
  422. * handle_level_irq - Level type irq handler
  423. * @desc: the interrupt description structure for this irq
  424. *
  425. * Level type interrupts are active as long as the hardware line has
  426. * the active level. This may require to mask the interrupt and unmask
  427. * it after the associated handler has acknowledged the device, so the
  428. * interrupt line is back to inactive.
  429. */
  430. void handle_level_irq(struct irq_desc *desc)
  431. {
  432. raw_spin_lock(&desc->lock);
  433. mask_ack_irq(desc);
  434. if (!irq_may_run(desc))
  435. goto out_unlock;
  436. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  437. /*
  438. * If its disabled or no action available
  439. * keep it masked and get out of here
  440. */
  441. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  442. desc->istate |= IRQS_PENDING;
  443. goto out_unlock;
  444. }
  445. kstat_incr_irqs_this_cpu(desc);
  446. handle_irq_event(desc);
  447. cond_unmask_irq(desc);
  448. out_unlock:
  449. raw_spin_unlock(&desc->lock);
  450. }
  451. EXPORT_SYMBOL_GPL(handle_level_irq);
  452. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  453. static inline void preflow_handler(struct irq_desc *desc)
  454. {
  455. if (desc->preflow_handler)
  456. desc->preflow_handler(&desc->irq_data);
  457. }
  458. #else
  459. static inline void preflow_handler(struct irq_desc *desc) { }
  460. #endif
  461. static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
  462. {
  463. if (!(desc->istate & IRQS_ONESHOT)) {
  464. chip->irq_eoi(&desc->irq_data);
  465. return;
  466. }
  467. /*
  468. * We need to unmask in the following cases:
  469. * - Oneshot irq which did not wake the thread (caused by a
  470. * spurious interrupt or a primary handler handling it
  471. * completely).
  472. */
  473. if (!irqd_irq_disabled(&desc->irq_data) &&
  474. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
  475. chip->irq_eoi(&desc->irq_data);
  476. unmask_irq(desc);
  477. } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
  478. chip->irq_eoi(&desc->irq_data);
  479. }
  480. }
  481. /**
  482. * handle_fasteoi_irq - irq handler for transparent controllers
  483. * @desc: the interrupt description structure for this irq
  484. *
  485. * Only a single callback will be issued to the chip: an ->eoi()
  486. * call when the interrupt has been serviced. This enables support
  487. * for modern forms of interrupt handlers, which handle the flow
  488. * details in hardware, transparently.
  489. */
  490. void handle_fasteoi_irq(struct irq_desc *desc)
  491. {
  492. struct irq_chip *chip = desc->irq_data.chip;
  493. raw_spin_lock(&desc->lock);
  494. if (!irq_may_run(desc))
  495. goto out;
  496. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  497. /*
  498. * If its disabled or no action available
  499. * then mask it and get out of here:
  500. */
  501. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  502. desc->istate |= IRQS_PENDING;
  503. mask_irq(desc);
  504. goto out;
  505. }
  506. kstat_incr_irqs_this_cpu(desc);
  507. if (desc->istate & IRQS_ONESHOT)
  508. mask_irq(desc);
  509. preflow_handler(desc);
  510. handle_irq_event(desc);
  511. cond_unmask_eoi_irq(desc, chip);
  512. raw_spin_unlock(&desc->lock);
  513. return;
  514. out:
  515. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  516. chip->irq_eoi(&desc->irq_data);
  517. raw_spin_unlock(&desc->lock);
  518. }
  519. EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
  520. /**
  521. * handle_edge_irq - edge type IRQ handler
  522. * @desc: the interrupt description structure for this irq
  523. *
  524. * Interrupt occures on the falling and/or rising edge of a hardware
  525. * signal. The occurrence is latched into the irq controller hardware
  526. * and must be acked in order to be reenabled. After the ack another
  527. * interrupt can happen on the same source even before the first one
  528. * is handled by the associated event handler. If this happens it
  529. * might be necessary to disable (mask) the interrupt depending on the
  530. * controller hardware. This requires to reenable the interrupt inside
  531. * of the loop which handles the interrupts which have arrived while
  532. * the handler was running. If all pending interrupts are handled, the
  533. * loop is left.
  534. */
  535. void handle_edge_irq(struct irq_desc *desc)
  536. {
  537. raw_spin_lock(&desc->lock);
  538. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  539. if (!irq_may_run(desc)) {
  540. desc->istate |= IRQS_PENDING;
  541. mask_ack_irq(desc);
  542. goto out_unlock;
  543. }
  544. /*
  545. * If its disabled or no action available then mask it and get
  546. * out of here.
  547. */
  548. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  549. desc->istate |= IRQS_PENDING;
  550. mask_ack_irq(desc);
  551. goto out_unlock;
  552. }
  553. kstat_incr_irqs_this_cpu(desc);
  554. /* Start handling the irq */
  555. desc->irq_data.chip->irq_ack(&desc->irq_data);
  556. do {
  557. if (unlikely(!desc->action)) {
  558. mask_irq(desc);
  559. goto out_unlock;
  560. }
  561. /*
  562. * When another irq arrived while we were handling
  563. * one, we could have masked the irq.
  564. * Renable it, if it was not disabled in meantime.
  565. */
  566. if (unlikely(desc->istate & IRQS_PENDING)) {
  567. if (!irqd_irq_disabled(&desc->irq_data) &&
  568. irqd_irq_masked(&desc->irq_data))
  569. unmask_irq(desc);
  570. }
  571. handle_irq_event(desc);
  572. } while ((desc->istate & IRQS_PENDING) &&
  573. !irqd_irq_disabled(&desc->irq_data));
  574. out_unlock:
  575. raw_spin_unlock(&desc->lock);
  576. }
  577. EXPORT_SYMBOL(handle_edge_irq);
  578. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  579. /**
  580. * handle_edge_eoi_irq - edge eoi type IRQ handler
  581. * @desc: the interrupt description structure for this irq
  582. *
  583. * Similar as the above handle_edge_irq, but using eoi and w/o the
  584. * mask/unmask logic.
  585. */
  586. void handle_edge_eoi_irq(struct irq_desc *desc)
  587. {
  588. struct irq_chip *chip = irq_desc_get_chip(desc);
  589. raw_spin_lock(&desc->lock);
  590. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  591. if (!irq_may_run(desc)) {
  592. desc->istate |= IRQS_PENDING;
  593. goto out_eoi;
  594. }
  595. /*
  596. * If its disabled or no action available then mask it and get
  597. * out of here.
  598. */
  599. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  600. desc->istate |= IRQS_PENDING;
  601. goto out_eoi;
  602. }
  603. kstat_incr_irqs_this_cpu(desc);
  604. do {
  605. if (unlikely(!desc->action))
  606. goto out_eoi;
  607. handle_irq_event(desc);
  608. } while ((desc->istate & IRQS_PENDING) &&
  609. !irqd_irq_disabled(&desc->irq_data));
  610. out_eoi:
  611. chip->irq_eoi(&desc->irq_data);
  612. raw_spin_unlock(&desc->lock);
  613. }
  614. #endif
  615. /**
  616. * handle_percpu_irq - Per CPU local irq handler
  617. * @desc: the interrupt description structure for this irq
  618. *
  619. * Per CPU interrupts on SMP machines without locking requirements
  620. */
  621. void handle_percpu_irq(struct irq_desc *desc)
  622. {
  623. struct irq_chip *chip = irq_desc_get_chip(desc);
  624. kstat_incr_irqs_this_cpu(desc);
  625. if (chip->irq_ack)
  626. chip->irq_ack(&desc->irq_data);
  627. handle_irq_event_percpu(desc);
  628. if (chip->irq_eoi)
  629. chip->irq_eoi(&desc->irq_data);
  630. }
  631. /**
  632. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  633. * @desc: the interrupt description structure for this irq
  634. *
  635. * Per CPU interrupts on SMP machines without locking requirements. Same as
  636. * handle_percpu_irq() above but with the following extras:
  637. *
  638. * action->percpu_dev_id is a pointer to percpu variables which
  639. * contain the real device id for the cpu on which this handler is
  640. * called
  641. */
  642. void handle_percpu_devid_irq(struct irq_desc *desc)
  643. {
  644. struct irq_chip *chip = irq_desc_get_chip(desc);
  645. struct irqaction *action = desc->action;
  646. unsigned int irq = irq_desc_get_irq(desc);
  647. irqreturn_t res;
  648. kstat_incr_irqs_this_cpu(desc);
  649. if (chip->irq_ack)
  650. chip->irq_ack(&desc->irq_data);
  651. if (likely(action)) {
  652. trace_irq_handler_entry(irq, action);
  653. res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
  654. trace_irq_handler_exit(irq, action, res);
  655. } else {
  656. unsigned int cpu = smp_processor_id();
  657. bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
  658. if (enabled)
  659. irq_percpu_disable(desc, cpu);
  660. pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
  661. enabled ? " and unmasked" : "", irq, cpu);
  662. }
  663. if (chip->irq_eoi)
  664. chip->irq_eoi(&desc->irq_data);
  665. }
  666. static void
  667. __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
  668. int is_chained, const char *name)
  669. {
  670. if (!handle) {
  671. handle = handle_bad_irq;
  672. } else {
  673. struct irq_data *irq_data = &desc->irq_data;
  674. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  675. /*
  676. * With hierarchical domains we might run into a
  677. * situation where the outermost chip is not yet set
  678. * up, but the inner chips are there. Instead of
  679. * bailing we install the handler, but obviously we
  680. * cannot enable/startup the interrupt at this point.
  681. */
  682. while (irq_data) {
  683. if (irq_data->chip != &no_irq_chip)
  684. break;
  685. /*
  686. * Bail out if the outer chip is not set up
  687. * and the interrrupt supposed to be started
  688. * right away.
  689. */
  690. if (WARN_ON(is_chained))
  691. return;
  692. /* Try the parent */
  693. irq_data = irq_data->parent_data;
  694. }
  695. #endif
  696. if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
  697. return;
  698. }
  699. /* Uninstall? */
  700. if (handle == handle_bad_irq) {
  701. if (desc->irq_data.chip != &no_irq_chip)
  702. mask_ack_irq(desc);
  703. irq_state_set_disabled(desc);
  704. if (is_chained)
  705. desc->action = NULL;
  706. desc->depth = 1;
  707. }
  708. desc->handle_irq = handle;
  709. desc->name = name;
  710. if (handle != handle_bad_irq && is_chained) {
  711. unsigned int type = irqd_get_trigger_type(&desc->irq_data);
  712. /*
  713. * We're about to start this interrupt immediately,
  714. * hence the need to set the trigger configuration.
  715. * But the .set_type callback may have overridden the
  716. * flow handler, ignoring that we're dealing with a
  717. * chained interrupt. Reset it immediately because we
  718. * do know better.
  719. */
  720. if (type != IRQ_TYPE_NONE) {
  721. __irq_set_trigger(desc, type);
  722. desc->handle_irq = handle;
  723. }
  724. irq_settings_set_noprobe(desc);
  725. irq_settings_set_norequest(desc);
  726. irq_settings_set_nothread(desc);
  727. desc->action = &chained_action;
  728. irq_startup(desc, true);
  729. }
  730. }
  731. void
  732. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  733. const char *name)
  734. {
  735. unsigned long flags;
  736. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  737. if (!desc)
  738. return;
  739. __irq_do_set_handler(desc, handle, is_chained, name);
  740. irq_put_desc_busunlock(desc, flags);
  741. }
  742. EXPORT_SYMBOL_GPL(__irq_set_handler);
  743. void
  744. irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
  745. void *data)
  746. {
  747. unsigned long flags;
  748. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  749. if (!desc)
  750. return;
  751. __irq_do_set_handler(desc, handle, 1, NULL);
  752. desc->irq_common_data.handler_data = data;
  753. irq_put_desc_busunlock(desc, flags);
  754. }
  755. EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
  756. void
  757. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  758. irq_flow_handler_t handle, const char *name)
  759. {
  760. irq_set_chip(irq, chip);
  761. __irq_set_handler(irq, handle, 0, name);
  762. }
  763. EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
  764. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  765. {
  766. unsigned long flags;
  767. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  768. if (!desc)
  769. return;
  770. irq_settings_clr_and_set(desc, clr, set);
  771. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  772. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  773. if (irq_settings_has_no_balance_set(desc))
  774. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  775. if (irq_settings_is_per_cpu(desc))
  776. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  777. if (irq_settings_can_move_pcntxt(desc))
  778. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  779. if (irq_settings_is_level(desc))
  780. irqd_set(&desc->irq_data, IRQD_LEVEL);
  781. irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
  782. irq_put_desc_unlock(desc, flags);
  783. }
  784. EXPORT_SYMBOL_GPL(irq_modify_status);
  785. /**
  786. * irq_cpu_online - Invoke all irq_cpu_online functions.
  787. *
  788. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  789. * for each.
  790. */
  791. void irq_cpu_online(void)
  792. {
  793. struct irq_desc *desc;
  794. struct irq_chip *chip;
  795. unsigned long flags;
  796. unsigned int irq;
  797. for_each_active_irq(irq) {
  798. desc = irq_to_desc(irq);
  799. if (!desc)
  800. continue;
  801. raw_spin_lock_irqsave(&desc->lock, flags);
  802. chip = irq_data_get_irq_chip(&desc->irq_data);
  803. if (chip && chip->irq_cpu_online &&
  804. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  805. !irqd_irq_disabled(&desc->irq_data)))
  806. chip->irq_cpu_online(&desc->irq_data);
  807. raw_spin_unlock_irqrestore(&desc->lock, flags);
  808. }
  809. }
  810. /**
  811. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  812. *
  813. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  814. * for each.
  815. */
  816. void irq_cpu_offline(void)
  817. {
  818. struct irq_desc *desc;
  819. struct irq_chip *chip;
  820. unsigned long flags;
  821. unsigned int irq;
  822. for_each_active_irq(irq) {
  823. desc = irq_to_desc(irq);
  824. if (!desc)
  825. continue;
  826. raw_spin_lock_irqsave(&desc->lock, flags);
  827. chip = irq_data_get_irq_chip(&desc->irq_data);
  828. if (chip && chip->irq_cpu_offline &&
  829. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  830. !irqd_irq_disabled(&desc->irq_data)))
  831. chip->irq_cpu_offline(&desc->irq_data);
  832. raw_spin_unlock_irqrestore(&desc->lock, flags);
  833. }
  834. }
  835. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  836. /**
  837. * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
  838. * NULL)
  839. * @data: Pointer to interrupt specific data
  840. */
  841. void irq_chip_enable_parent(struct irq_data *data)
  842. {
  843. data = data->parent_data;
  844. if (data->chip->irq_enable)
  845. data->chip->irq_enable(data);
  846. else
  847. data->chip->irq_unmask(data);
  848. }
  849. /**
  850. * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
  851. * NULL)
  852. * @data: Pointer to interrupt specific data
  853. */
  854. void irq_chip_disable_parent(struct irq_data *data)
  855. {
  856. data = data->parent_data;
  857. if (data->chip->irq_disable)
  858. data->chip->irq_disable(data);
  859. else
  860. data->chip->irq_mask(data);
  861. }
  862. /**
  863. * irq_chip_ack_parent - Acknowledge the parent interrupt
  864. * @data: Pointer to interrupt specific data
  865. */
  866. void irq_chip_ack_parent(struct irq_data *data)
  867. {
  868. data = data->parent_data;
  869. data->chip->irq_ack(data);
  870. }
  871. EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
  872. /**
  873. * irq_chip_mask_parent - Mask the parent interrupt
  874. * @data: Pointer to interrupt specific data
  875. */
  876. void irq_chip_mask_parent(struct irq_data *data)
  877. {
  878. data = data->parent_data;
  879. data->chip->irq_mask(data);
  880. }
  881. EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
  882. /**
  883. * irq_chip_unmask_parent - Unmask the parent interrupt
  884. * @data: Pointer to interrupt specific data
  885. */
  886. void irq_chip_unmask_parent(struct irq_data *data)
  887. {
  888. data = data->parent_data;
  889. data->chip->irq_unmask(data);
  890. }
  891. EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
  892. /**
  893. * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
  894. * @data: Pointer to interrupt specific data
  895. */
  896. void irq_chip_eoi_parent(struct irq_data *data)
  897. {
  898. data = data->parent_data;
  899. data->chip->irq_eoi(data);
  900. }
  901. EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
  902. /**
  903. * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
  904. * @data: Pointer to interrupt specific data
  905. * @dest: The affinity mask to set
  906. * @force: Flag to enforce setting (disable online checks)
  907. *
  908. * Conditinal, as the underlying parent chip might not implement it.
  909. */
  910. int irq_chip_set_affinity_parent(struct irq_data *data,
  911. const struct cpumask *dest, bool force)
  912. {
  913. data = data->parent_data;
  914. if (data->chip->irq_set_affinity)
  915. return data->chip->irq_set_affinity(data, dest, force);
  916. return -ENOSYS;
  917. }
  918. /**
  919. * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
  920. * @data: Pointer to interrupt specific data
  921. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  922. *
  923. * Conditional, as the underlying parent chip might not implement it.
  924. */
  925. int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
  926. {
  927. data = data->parent_data;
  928. if (data->chip->irq_set_type)
  929. return data->chip->irq_set_type(data, type);
  930. return -ENOSYS;
  931. }
  932. EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
  933. /**
  934. * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
  935. * @data: Pointer to interrupt specific data
  936. *
  937. * Iterate through the domain hierarchy of the interrupt and check
  938. * whether a hw retrigger function exists. If yes, invoke it.
  939. */
  940. int irq_chip_retrigger_hierarchy(struct irq_data *data)
  941. {
  942. for (data = data->parent_data; data; data = data->parent_data)
  943. if (data->chip && data->chip->irq_retrigger)
  944. return data->chip->irq_retrigger(data);
  945. return 0;
  946. }
  947. /**
  948. * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
  949. * @data: Pointer to interrupt specific data
  950. * @vcpu_info: The vcpu affinity information
  951. */
  952. int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
  953. {
  954. data = data->parent_data;
  955. if (data->chip->irq_set_vcpu_affinity)
  956. return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
  957. return -ENOSYS;
  958. }
  959. /**
  960. * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
  961. * @data: Pointer to interrupt specific data
  962. * @on: Whether to set or reset the wake-up capability of this irq
  963. *
  964. * Conditional, as the underlying parent chip might not implement it.
  965. */
  966. int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
  967. {
  968. data = data->parent_data;
  969. if (data->chip->irq_set_wake)
  970. return data->chip->irq_set_wake(data, on);
  971. return -ENOSYS;
  972. }
  973. #endif
  974. /**
  975. * irq_chip_compose_msi_msg - Componse msi message for a irq chip
  976. * @data: Pointer to interrupt specific data
  977. * @msg: Pointer to the MSI message
  978. *
  979. * For hierarchical domains we find the first chip in the hierarchy
  980. * which implements the irq_compose_msi_msg callback. For non
  981. * hierarchical we use the top level chip.
  982. */
  983. int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
  984. {
  985. struct irq_data *pos = NULL;
  986. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  987. for (; data; data = data->parent_data)
  988. #endif
  989. if (data->chip && data->chip->irq_compose_msi_msg)
  990. pos = data;
  991. if (!pos)
  992. return -ENOSYS;
  993. pos->chip->irq_compose_msi_msg(pos, msg);
  994. return 0;
  995. }
  996. /**
  997. * irq_chip_pm_get - Enable power for an IRQ chip
  998. * @data: Pointer to interrupt specific data
  999. *
  1000. * Enable the power to the IRQ chip referenced by the interrupt data
  1001. * structure.
  1002. */
  1003. int irq_chip_pm_get(struct irq_data *data)
  1004. {
  1005. int retval;
  1006. if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
  1007. retval = pm_runtime_get_sync(data->chip->parent_device);
  1008. if (retval < 0) {
  1009. pm_runtime_put_noidle(data->chip->parent_device);
  1010. return retval;
  1011. }
  1012. }
  1013. return 0;
  1014. }
  1015. /**
  1016. * irq_chip_pm_put - Disable power for an IRQ chip
  1017. * @data: Pointer to interrupt specific data
  1018. *
  1019. * Disable the power to the IRQ chip referenced by the interrupt data
  1020. * structure, belongs. Note that power will only be disabled, once this
  1021. * function has been called for all IRQs that have called irq_chip_pm_get().
  1022. */
  1023. int irq_chip_pm_put(struct irq_data *data)
  1024. {
  1025. int retval = 0;
  1026. if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
  1027. retval = pm_runtime_put(data->chip->parent_device);
  1028. return (retval < 0) ? retval : 0;
  1029. }