goldfish_pipe.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2012 Intel, Inc.
  4. * Copyright (C) 2013 Intel, Inc.
  5. * Copyright (C) 2014 Linaro Limited
  6. * Copyright (C) 2011-2016 Google, Inc.
  7. *
  8. * This software is licensed under the terms of the GNU General Public
  9. * License version 2, as published by the Free Software Foundation, and
  10. * may be copied, distributed, and modified under those terms.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. /* This source file contains the implementation of a special device driver
  19. * that intends to provide a *very* fast communication channel between the
  20. * guest system and the QEMU emulator.
  21. *
  22. * Usage from the guest is simply the following (error handling simplified):
  23. *
  24. * int fd = open("/dev/qemu_pipe",O_RDWR);
  25. * .... write() or read() through the pipe.
  26. *
  27. * This driver doesn't deal with the exact protocol used during the session.
  28. * It is intended to be as simple as something like:
  29. *
  30. * // do this _just_ after opening the fd to connect to a specific
  31. * // emulator service.
  32. * const char* msg = "<pipename>";
  33. * if (write(fd, msg, strlen(msg)+1) < 0) {
  34. * ... could not connect to <pipename> service
  35. * close(fd);
  36. * }
  37. *
  38. * // after this, simply read() and write() to communicate with the
  39. * // service. Exact protocol details left as an exercise to the reader.
  40. *
  41. * This driver is very fast because it doesn't copy any data through
  42. * intermediate buffers, since the emulator is capable of translating
  43. * guest user addresses into host ones.
  44. *
  45. * Note that we must however ensure that each user page involved in the
  46. * exchange is properly mapped during a transfer.
  47. */
  48. #include <linux/module.h>
  49. #include <linux/mod_devicetable.h>
  50. #include <linux/interrupt.h>
  51. #include <linux/kernel.h>
  52. #include <linux/spinlock.h>
  53. #include <linux/miscdevice.h>
  54. #include <linux/platform_device.h>
  55. #include <linux/poll.h>
  56. #include <linux/sched.h>
  57. #include <linux/bitops.h>
  58. #include <linux/slab.h>
  59. #include <linux/io.h>
  60. #include <linux/goldfish.h>
  61. #include <linux/dma-mapping.h>
  62. #include <linux/mm.h>
  63. #include <linux/acpi.h>
  64. #include <linux/bug.h>
  65. #include "goldfish_pipe_qemu.h"
  66. /*
  67. * Update this when something changes in the driver's behavior so the host
  68. * can benefit from knowing it
  69. */
  70. enum {
  71. PIPE_DRIVER_VERSION = 2,
  72. PIPE_CURRENT_DEVICE_VERSION = 2
  73. };
  74. enum {
  75. MAX_BUFFERS_PER_COMMAND = 336,
  76. MAX_SIGNALLED_PIPES = 64,
  77. INITIAL_PIPES_CAPACITY = 64
  78. };
  79. struct goldfish_pipe_dev;
  80. struct goldfish_pipe;
  81. struct goldfish_pipe_command;
  82. /* A per-pipe command structure, shared with the host */
  83. struct goldfish_pipe_command {
  84. s32 cmd; /* PipeCmdCode, guest -> host */
  85. s32 id; /* pipe id, guest -> host */
  86. s32 status; /* command execution status, host -> guest */
  87. s32 reserved; /* to pad to 64-bit boundary */
  88. union {
  89. /* Parameters for PIPE_CMD_{READ,WRITE} */
  90. struct {
  91. /* number of buffers, guest -> host */
  92. u32 buffers_count;
  93. /* number of consumed bytes, host -> guest */
  94. s32 consumed_size;
  95. /* buffer pointers, guest -> host */
  96. u64 ptrs[MAX_BUFFERS_PER_COMMAND];
  97. /* buffer sizes, guest -> host */
  98. u32 sizes[MAX_BUFFERS_PER_COMMAND];
  99. } rw_params;
  100. };
  101. };
  102. /* A single signalled pipe information */
  103. struct signalled_pipe_buffer {
  104. u32 id;
  105. u32 flags;
  106. };
  107. /* Parameters for the PIPE_CMD_OPEN command */
  108. struct open_command_param {
  109. u64 command_buffer_ptr;
  110. u32 rw_params_max_count;
  111. };
  112. /* Device-level set of buffers shared with the host */
  113. struct goldfish_pipe_dev_buffers {
  114. struct open_command_param open_command_params;
  115. struct signalled_pipe_buffer signalled_pipe_buffers[
  116. MAX_SIGNALLED_PIPES];
  117. };
  118. /* This data type models a given pipe instance */
  119. struct goldfish_pipe {
  120. /* pipe ID - index into goldfish_pipe_dev::pipes array */
  121. u32 id;
  122. /* The wake flags pipe is waiting for
  123. * Note: not protected with any lock, uses atomic operations
  124. * and barriers to make it thread-safe.
  125. */
  126. unsigned long flags;
  127. /* wake flags host have signalled,
  128. * - protected by goldfish_pipe_dev::lock
  129. */
  130. unsigned long signalled_flags;
  131. /* A pointer to command buffer */
  132. struct goldfish_pipe_command *command_buffer;
  133. /* doubly linked list of signalled pipes, protected by
  134. * goldfish_pipe_dev::lock
  135. */
  136. struct goldfish_pipe *prev_signalled;
  137. struct goldfish_pipe *next_signalled;
  138. /*
  139. * A pipe's own lock. Protects the following:
  140. * - *command_buffer - makes sure a command can safely write its
  141. * parameters to the host and read the results back.
  142. */
  143. struct mutex lock;
  144. /* A wake queue for sleeping until host signals an event */
  145. wait_queue_head_t wake_queue;
  146. /* Pointer to the parent goldfish_pipe_dev instance */
  147. struct goldfish_pipe_dev *dev;
  148. };
  149. /* The global driver data. Holds a reference to the i/o page used to
  150. * communicate with the emulator, and a wake queue for blocked tasks
  151. * waiting to be awoken.
  152. */
  153. struct goldfish_pipe_dev {
  154. /*
  155. * Global device spinlock. Protects the following members:
  156. * - pipes, pipes_capacity
  157. * - [*pipes, *pipes + pipes_capacity) - array data
  158. * - first_signalled_pipe,
  159. * goldfish_pipe::prev_signalled,
  160. * goldfish_pipe::next_signalled,
  161. * goldfish_pipe::signalled_flags - all singnalled-related fields,
  162. * in all allocated pipes
  163. * - open_command_params - PIPE_CMD_OPEN-related buffers
  164. *
  165. * It looks like a lot of different fields, but the trick is that
  166. * the only operation that happens often is the signalled pipes array
  167. * manipulation. That's why it's OK for now to keep the rest of the
  168. * fields under the same lock. If we notice too much contention because
  169. * of PIPE_CMD_OPEN, then we should add a separate lock there.
  170. */
  171. spinlock_t lock;
  172. /*
  173. * Array of the pipes of |pipes_capacity| elements,
  174. * indexed by goldfish_pipe::id
  175. */
  176. struct goldfish_pipe **pipes;
  177. u32 pipes_capacity;
  178. /* Pointers to the buffers host uses for interaction with this driver */
  179. struct goldfish_pipe_dev_buffers *buffers;
  180. /* Head of a doubly linked list of signalled pipes */
  181. struct goldfish_pipe *first_signalled_pipe;
  182. /* ptr to platform device's device struct */
  183. struct device *pdev_dev;
  184. /* Some device-specific data */
  185. int irq;
  186. int version;
  187. unsigned char __iomem *base;
  188. };
  189. struct goldfish_pipe_dev goldfish_pipe_dev;
  190. static int goldfish_cmd_locked(struct goldfish_pipe *pipe, enum PipeCmdCode cmd)
  191. {
  192. pipe->command_buffer->cmd = cmd;
  193. /* failure by default */
  194. pipe->command_buffer->status = PIPE_ERROR_INVAL;
  195. writel(pipe->id, pipe->dev->base + PIPE_REG_CMD);
  196. return pipe->command_buffer->status;
  197. }
  198. static int goldfish_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd)
  199. {
  200. int status;
  201. if (mutex_lock_interruptible(&pipe->lock))
  202. return PIPE_ERROR_IO;
  203. status = goldfish_cmd_locked(pipe, cmd);
  204. mutex_unlock(&pipe->lock);
  205. return status;
  206. }
  207. /*
  208. * This function converts an error code returned by the emulator through
  209. * the PIPE_REG_STATUS i/o register into a valid negative errno value.
  210. */
  211. static int goldfish_pipe_error_convert(int status)
  212. {
  213. switch (status) {
  214. case PIPE_ERROR_AGAIN:
  215. return -EAGAIN;
  216. case PIPE_ERROR_NOMEM:
  217. return -ENOMEM;
  218. case PIPE_ERROR_IO:
  219. return -EIO;
  220. default:
  221. return -EINVAL;
  222. }
  223. }
  224. static int pin_user_pages(unsigned long first_page, unsigned long last_page,
  225. unsigned int last_page_size, int is_write,
  226. struct page *pages[MAX_BUFFERS_PER_COMMAND],
  227. unsigned int *iter_last_page_size)
  228. {
  229. int ret;
  230. int requested_pages = ((last_page - first_page) >> PAGE_SHIFT) + 1;
  231. if (requested_pages > MAX_BUFFERS_PER_COMMAND) {
  232. requested_pages = MAX_BUFFERS_PER_COMMAND;
  233. *iter_last_page_size = PAGE_SIZE;
  234. } else {
  235. *iter_last_page_size = last_page_size;
  236. }
  237. ret = get_user_pages_fast(
  238. first_page, requested_pages, !is_write, pages);
  239. if (ret <= 0)
  240. return -EFAULT;
  241. if (ret < requested_pages)
  242. *iter_last_page_size = PAGE_SIZE;
  243. return ret;
  244. }
  245. static void release_user_pages(struct page **pages, int pages_count,
  246. int is_write, s32 consumed_size)
  247. {
  248. int i;
  249. for (i = 0; i < pages_count; i++) {
  250. if (!is_write && consumed_size > 0)
  251. set_page_dirty(pages[i]);
  252. put_page(pages[i]);
  253. }
  254. }
  255. /* Populate the call parameters, merging adjacent pages together */
  256. static void populate_rw_params(
  257. struct page **pages, int pages_count,
  258. unsigned long address, unsigned long address_end,
  259. unsigned long first_page, unsigned long last_page,
  260. unsigned int iter_last_page_size, int is_write,
  261. struct goldfish_pipe_command *command)
  262. {
  263. /*
  264. * Process the first page separately - it's the only page that
  265. * needs special handling for its start address.
  266. */
  267. unsigned long xaddr = page_to_phys(pages[0]);
  268. unsigned long xaddr_prev = xaddr;
  269. int buffer_idx = 0;
  270. int i = 1;
  271. int size_on_page = first_page == last_page
  272. ? (int)(address_end - address)
  273. : (PAGE_SIZE - (address & ~PAGE_MASK));
  274. command->rw_params.ptrs[0] = (u64)(xaddr | (address & ~PAGE_MASK));
  275. command->rw_params.sizes[0] = size_on_page;
  276. for (; i < pages_count; ++i) {
  277. xaddr = page_to_phys(pages[i]);
  278. size_on_page = (i == pages_count - 1) ?
  279. iter_last_page_size : PAGE_SIZE;
  280. if (xaddr == xaddr_prev + PAGE_SIZE) {
  281. command->rw_params.sizes[buffer_idx] += size_on_page;
  282. } else {
  283. ++buffer_idx;
  284. command->rw_params.ptrs[buffer_idx] = (u64)xaddr;
  285. command->rw_params.sizes[buffer_idx] = size_on_page;
  286. }
  287. xaddr_prev = xaddr;
  288. }
  289. command->rw_params.buffers_count = buffer_idx + 1;
  290. }
  291. static int transfer_max_buffers(struct goldfish_pipe *pipe,
  292. unsigned long address, unsigned long address_end, int is_write,
  293. unsigned long last_page, unsigned int last_page_size,
  294. s32 *consumed_size, int *status)
  295. {
  296. static struct page *pages[MAX_BUFFERS_PER_COMMAND];
  297. unsigned long first_page = address & PAGE_MASK;
  298. unsigned int iter_last_page_size;
  299. int pages_count = pin_user_pages(first_page, last_page,
  300. last_page_size, is_write,
  301. pages, &iter_last_page_size);
  302. if (pages_count < 0)
  303. return pages_count;
  304. /* Serialize access to the pipe command buffers */
  305. if (mutex_lock_interruptible(&pipe->lock))
  306. return -ERESTARTSYS;
  307. populate_rw_params(pages, pages_count, address, address_end,
  308. first_page, last_page, iter_last_page_size, is_write,
  309. pipe->command_buffer);
  310. /* Transfer the data */
  311. *status = goldfish_cmd_locked(pipe,
  312. is_write ? PIPE_CMD_WRITE : PIPE_CMD_READ);
  313. *consumed_size = pipe->command_buffer->rw_params.consumed_size;
  314. release_user_pages(pages, pages_count, is_write, *consumed_size);
  315. mutex_unlock(&pipe->lock);
  316. return 0;
  317. }
  318. static int wait_for_host_signal(struct goldfish_pipe *pipe, int is_write)
  319. {
  320. u32 wakeBit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ;
  321. set_bit(wakeBit, &pipe->flags);
  322. /* Tell the emulator we're going to wait for a wake event */
  323. (void)goldfish_cmd(pipe,
  324. is_write ? PIPE_CMD_WAKE_ON_WRITE : PIPE_CMD_WAKE_ON_READ);
  325. while (test_bit(wakeBit, &pipe->flags)) {
  326. if (wait_event_interruptible(
  327. pipe->wake_queue,
  328. !test_bit(wakeBit, &pipe->flags)))
  329. return -ERESTARTSYS;
  330. if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
  331. return -EIO;
  332. }
  333. return 0;
  334. }
  335. static ssize_t goldfish_pipe_read_write(struct file *filp,
  336. char __user *buffer, size_t bufflen, int is_write)
  337. {
  338. struct goldfish_pipe *pipe = filp->private_data;
  339. int count = 0, ret = -EINVAL;
  340. unsigned long address, address_end, last_page;
  341. unsigned int last_page_size;
  342. /* If the emulator already closed the pipe, no need to go further */
  343. if (unlikely(test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)))
  344. return -EIO;
  345. /* Null reads or writes succeeds */
  346. if (unlikely(bufflen == 0))
  347. return 0;
  348. /* Check the buffer range for access */
  349. if (unlikely(!access_ok(is_write ? VERIFY_WRITE : VERIFY_READ,
  350. buffer, bufflen)))
  351. return -EFAULT;
  352. address = (unsigned long)buffer;
  353. address_end = address + bufflen;
  354. last_page = (address_end - 1) & PAGE_MASK;
  355. last_page_size = ((address_end - 1) & ~PAGE_MASK) + 1;
  356. while (address < address_end) {
  357. s32 consumed_size;
  358. int status;
  359. ret = transfer_max_buffers(pipe, address, address_end, is_write,
  360. last_page, last_page_size, &consumed_size,
  361. &status);
  362. if (ret < 0)
  363. break;
  364. if (consumed_size > 0) {
  365. /* No matter what's the status, we've transferred
  366. * something.
  367. */
  368. count += consumed_size;
  369. address += consumed_size;
  370. }
  371. if (status > 0)
  372. continue;
  373. if (status == 0) {
  374. /* EOF */
  375. ret = 0;
  376. break;
  377. }
  378. if (count > 0) {
  379. /*
  380. * An error occurred, but we already transferred
  381. * something on one of the previous iterations.
  382. * Just return what we already copied and log this
  383. * err.
  384. */
  385. if (status != PIPE_ERROR_AGAIN)
  386. dev_err_ratelimited(pipe->dev->pdev_dev,
  387. "backend error %d on %s\n",
  388. status, is_write ? "write" : "read");
  389. break;
  390. }
  391. /*
  392. * If the error is not PIPE_ERROR_AGAIN, or if we are in
  393. * non-blocking mode, just return the error code.
  394. */
  395. if (status != PIPE_ERROR_AGAIN ||
  396. (filp->f_flags & O_NONBLOCK) != 0) {
  397. ret = goldfish_pipe_error_convert(status);
  398. break;
  399. }
  400. status = wait_for_host_signal(pipe, is_write);
  401. if (status < 0)
  402. return status;
  403. }
  404. if (count > 0)
  405. return count;
  406. return ret;
  407. }
  408. static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer,
  409. size_t bufflen, loff_t *ppos)
  410. {
  411. return goldfish_pipe_read_write(filp, buffer, bufflen,
  412. /* is_write */ 0);
  413. }
  414. static ssize_t goldfish_pipe_write(struct file *filp,
  415. const char __user *buffer, size_t bufflen,
  416. loff_t *ppos)
  417. {
  418. return goldfish_pipe_read_write(filp,
  419. /* cast away the const */(char __user *)buffer, bufflen,
  420. /* is_write */ 1);
  421. }
  422. static __poll_t goldfish_pipe_poll(struct file *filp, poll_table *wait)
  423. {
  424. struct goldfish_pipe *pipe = filp->private_data;
  425. __poll_t mask = 0;
  426. int status;
  427. poll_wait(filp, &pipe->wake_queue, wait);
  428. status = goldfish_cmd(pipe, PIPE_CMD_POLL);
  429. if (status < 0)
  430. return -ERESTARTSYS;
  431. if (status & PIPE_POLL_IN)
  432. mask |= EPOLLIN | EPOLLRDNORM;
  433. if (status & PIPE_POLL_OUT)
  434. mask |= EPOLLOUT | EPOLLWRNORM;
  435. if (status & PIPE_POLL_HUP)
  436. mask |= EPOLLHUP;
  437. if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
  438. mask |= EPOLLERR;
  439. return mask;
  440. }
  441. static void signalled_pipes_add_locked(struct goldfish_pipe_dev *dev,
  442. u32 id, u32 flags)
  443. {
  444. struct goldfish_pipe *pipe;
  445. if (WARN_ON(id >= dev->pipes_capacity))
  446. return;
  447. pipe = dev->pipes[id];
  448. if (!pipe)
  449. return;
  450. pipe->signalled_flags |= flags;
  451. if (pipe->prev_signalled || pipe->next_signalled
  452. || dev->first_signalled_pipe == pipe)
  453. return; /* already in the list */
  454. pipe->next_signalled = dev->first_signalled_pipe;
  455. if (dev->first_signalled_pipe)
  456. dev->first_signalled_pipe->prev_signalled = pipe;
  457. dev->first_signalled_pipe = pipe;
  458. }
  459. static void signalled_pipes_remove_locked(struct goldfish_pipe_dev *dev,
  460. struct goldfish_pipe *pipe)
  461. {
  462. if (pipe->prev_signalled)
  463. pipe->prev_signalled->next_signalled = pipe->next_signalled;
  464. if (pipe->next_signalled)
  465. pipe->next_signalled->prev_signalled = pipe->prev_signalled;
  466. if (pipe == dev->first_signalled_pipe)
  467. dev->first_signalled_pipe = pipe->next_signalled;
  468. pipe->prev_signalled = NULL;
  469. pipe->next_signalled = NULL;
  470. }
  471. static struct goldfish_pipe *signalled_pipes_pop_front(
  472. struct goldfish_pipe_dev *dev, int *wakes)
  473. {
  474. struct goldfish_pipe *pipe;
  475. unsigned long flags;
  476. spin_lock_irqsave(&dev->lock, flags);
  477. pipe = dev->first_signalled_pipe;
  478. if (pipe) {
  479. *wakes = pipe->signalled_flags;
  480. pipe->signalled_flags = 0;
  481. /*
  482. * This is an optimized version of
  483. * signalled_pipes_remove_locked()
  484. * - We want to make it as fast as possible to
  485. * wake the sleeping pipe operations faster.
  486. */
  487. dev->first_signalled_pipe = pipe->next_signalled;
  488. if (dev->first_signalled_pipe)
  489. dev->first_signalled_pipe->prev_signalled = NULL;
  490. pipe->next_signalled = NULL;
  491. }
  492. spin_unlock_irqrestore(&dev->lock, flags);
  493. return pipe;
  494. }
  495. static void goldfish_interrupt_task(unsigned long unused)
  496. {
  497. /* Iterate over the signalled pipes and wake them one by one */
  498. struct goldfish_pipe *pipe;
  499. int wakes;
  500. while ((pipe = signalled_pipes_pop_front(&goldfish_pipe_dev, &wakes)) !=
  501. NULL) {
  502. if (wakes & PIPE_WAKE_CLOSED) {
  503. pipe->flags = 1 << BIT_CLOSED_ON_HOST;
  504. } else {
  505. if (wakes & PIPE_WAKE_READ)
  506. clear_bit(BIT_WAKE_ON_READ, &pipe->flags);
  507. if (wakes & PIPE_WAKE_WRITE)
  508. clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags);
  509. }
  510. /*
  511. * wake_up_interruptible() implies a write barrier, so don't
  512. * explicitly add another one here.
  513. */
  514. wake_up_interruptible(&pipe->wake_queue);
  515. }
  516. }
  517. static DECLARE_TASKLET(goldfish_interrupt_tasklet, goldfish_interrupt_task, 0);
  518. /*
  519. * The general idea of the interrupt handling:
  520. *
  521. * 1. device raises an interrupt if there's at least one signalled pipe
  522. * 2. IRQ handler reads the signalled pipes and their count from the device
  523. * 3. device writes them into a shared buffer and returns the count
  524. * it only resets the IRQ if it has returned all signalled pipes,
  525. * otherwise it leaves it raised, so IRQ handler will be called
  526. * again for the next chunk
  527. * 4. IRQ handler adds all returned pipes to the device's signalled pipes list
  528. * 5. IRQ handler launches a tasklet to process the signalled pipes from the
  529. * list in a separate context
  530. */
  531. static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id)
  532. {
  533. u32 count;
  534. u32 i;
  535. unsigned long flags;
  536. struct goldfish_pipe_dev *dev = dev_id;
  537. if (dev != &goldfish_pipe_dev)
  538. return IRQ_NONE;
  539. /* Request the signalled pipes from the device */
  540. spin_lock_irqsave(&dev->lock, flags);
  541. count = readl(dev->base + PIPE_REG_GET_SIGNALLED);
  542. if (count == 0) {
  543. spin_unlock_irqrestore(&dev->lock, flags);
  544. return IRQ_NONE;
  545. }
  546. if (count > MAX_SIGNALLED_PIPES)
  547. count = MAX_SIGNALLED_PIPES;
  548. for (i = 0; i < count; ++i)
  549. signalled_pipes_add_locked(dev,
  550. dev->buffers->signalled_pipe_buffers[i].id,
  551. dev->buffers->signalled_pipe_buffers[i].flags);
  552. spin_unlock_irqrestore(&dev->lock, flags);
  553. tasklet_schedule(&goldfish_interrupt_tasklet);
  554. return IRQ_HANDLED;
  555. }
  556. static int get_free_pipe_id_locked(struct goldfish_pipe_dev *dev)
  557. {
  558. int id;
  559. for (id = 0; id < dev->pipes_capacity; ++id)
  560. if (!dev->pipes[id])
  561. return id;
  562. {
  563. /* Reallocate the array.
  564. * Since get_free_pipe_id_locked runs with interrupts disabled,
  565. * we don't want to make calls that could lead to sleep.
  566. */
  567. u32 new_capacity = 2 * dev->pipes_capacity;
  568. struct goldfish_pipe **pipes =
  569. kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC);
  570. if (!pipes)
  571. return -ENOMEM;
  572. memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity);
  573. kfree(dev->pipes);
  574. dev->pipes = pipes;
  575. id = dev->pipes_capacity;
  576. dev->pipes_capacity = new_capacity;
  577. }
  578. return id;
  579. }
  580. /**
  581. * goldfish_pipe_open - open a channel to the AVD
  582. * @inode: inode of device
  583. * @file: file struct of opener
  584. *
  585. * Create a new pipe link between the emulator and the use application.
  586. * Each new request produces a new pipe.
  587. *
  588. * Note: we use the pipe ID as a mux. All goldfish emulations are 32bit
  589. * right now so this is fine. A move to 64bit will need this addressing
  590. */
  591. static int goldfish_pipe_open(struct inode *inode, struct file *file)
  592. {
  593. struct goldfish_pipe_dev *dev = &goldfish_pipe_dev;
  594. unsigned long flags;
  595. int id;
  596. int status;
  597. /* Allocate new pipe kernel object */
  598. struct goldfish_pipe *pipe = kzalloc(sizeof(*pipe), GFP_KERNEL);
  599. if (pipe == NULL)
  600. return -ENOMEM;
  601. pipe->dev = dev;
  602. mutex_init(&pipe->lock);
  603. init_waitqueue_head(&pipe->wake_queue);
  604. /*
  605. * Command buffer needs to be allocated on its own page to make sure
  606. * it is physically contiguous in host's address space.
  607. */
  608. BUILD_BUG_ON(sizeof(struct goldfish_pipe_command) > PAGE_SIZE);
  609. pipe->command_buffer =
  610. (struct goldfish_pipe_command *)__get_free_page(GFP_KERNEL);
  611. if (!pipe->command_buffer) {
  612. status = -ENOMEM;
  613. goto err_pipe;
  614. }
  615. spin_lock_irqsave(&dev->lock, flags);
  616. id = get_free_pipe_id_locked(dev);
  617. if (id < 0) {
  618. status = id;
  619. goto err_id_locked;
  620. }
  621. dev->pipes[id] = pipe;
  622. pipe->id = id;
  623. pipe->command_buffer->id = id;
  624. /* Now tell the emulator we're opening a new pipe. */
  625. dev->buffers->open_command_params.rw_params_max_count =
  626. MAX_BUFFERS_PER_COMMAND;
  627. dev->buffers->open_command_params.command_buffer_ptr =
  628. (u64)(unsigned long)__pa(pipe->command_buffer);
  629. status = goldfish_cmd_locked(pipe, PIPE_CMD_OPEN);
  630. spin_unlock_irqrestore(&dev->lock, flags);
  631. if (status < 0)
  632. goto err_cmd;
  633. /* All is done, save the pipe into the file's private data field */
  634. file->private_data = pipe;
  635. return 0;
  636. err_cmd:
  637. spin_lock_irqsave(&dev->lock, flags);
  638. dev->pipes[id] = NULL;
  639. err_id_locked:
  640. spin_unlock_irqrestore(&dev->lock, flags);
  641. free_page((unsigned long)pipe->command_buffer);
  642. err_pipe:
  643. kfree(pipe);
  644. return status;
  645. }
  646. static int goldfish_pipe_release(struct inode *inode, struct file *filp)
  647. {
  648. unsigned long flags;
  649. struct goldfish_pipe *pipe = filp->private_data;
  650. struct goldfish_pipe_dev *dev = pipe->dev;
  651. /* The guest is closing the channel, so tell the emulator right now */
  652. (void)goldfish_cmd(pipe, PIPE_CMD_CLOSE);
  653. spin_lock_irqsave(&dev->lock, flags);
  654. dev->pipes[pipe->id] = NULL;
  655. signalled_pipes_remove_locked(dev, pipe);
  656. spin_unlock_irqrestore(&dev->lock, flags);
  657. filp->private_data = NULL;
  658. free_page((unsigned long)pipe->command_buffer);
  659. kfree(pipe);
  660. return 0;
  661. }
  662. static const struct file_operations goldfish_pipe_fops = {
  663. .owner = THIS_MODULE,
  664. .read = goldfish_pipe_read,
  665. .write = goldfish_pipe_write,
  666. .poll = goldfish_pipe_poll,
  667. .open = goldfish_pipe_open,
  668. .release = goldfish_pipe_release,
  669. };
  670. static struct miscdevice goldfish_pipe_miscdev = {
  671. .minor = MISC_DYNAMIC_MINOR,
  672. .name = "goldfish_pipe",
  673. .fops = &goldfish_pipe_fops,
  674. };
  675. static int goldfish_pipe_device_init(struct platform_device *pdev)
  676. {
  677. struct goldfish_pipe_dev *dev = &goldfish_pipe_dev;
  678. char *page;
  679. int err = devm_request_irq(&pdev->dev, dev->irq,
  680. goldfish_pipe_interrupt,
  681. IRQF_SHARED, "goldfish_pipe", dev);
  682. if (err) {
  683. dev_err(&pdev->dev, "unable to allocate IRQ for v2\n");
  684. return err;
  685. }
  686. err = misc_register(&goldfish_pipe_miscdev);
  687. if (err) {
  688. dev_err(&pdev->dev, "unable to register v2 device\n");
  689. return err;
  690. }
  691. dev->pdev_dev = &pdev->dev;
  692. dev->first_signalled_pipe = NULL;
  693. dev->pipes_capacity = INITIAL_PIPES_CAPACITY;
  694. dev->pipes = kcalloc(dev->pipes_capacity, sizeof(*dev->pipes),
  695. GFP_KERNEL);
  696. if (!dev->pipes)
  697. return -ENOMEM;
  698. /*
  699. * We're going to pass two buffers, open_command_params and
  700. * signalled_pipe_buffers, to the host. This means each of those buffers
  701. * needs to be contained in a single physical page. The easiest choice
  702. * is to just allocate a page and place the buffers in it.
  703. */
  704. BUILD_BUG_ON(sizeof(struct goldfish_pipe_dev_buffers) > PAGE_SIZE);
  705. page = (char *)__get_free_page(GFP_KERNEL);
  706. if (!page) {
  707. kfree(dev->pipes);
  708. return -ENOMEM;
  709. }
  710. dev->buffers = (struct goldfish_pipe_dev_buffers *)page;
  711. /* Send the buffer addresses to the host */
  712. {
  713. u64 paddr = __pa(&dev->buffers->signalled_pipe_buffers);
  714. writel((u32)(unsigned long)(paddr >> 32),
  715. dev->base + PIPE_REG_SIGNAL_BUFFER_HIGH);
  716. writel((u32)(unsigned long)paddr,
  717. dev->base + PIPE_REG_SIGNAL_BUFFER);
  718. writel((u32)MAX_SIGNALLED_PIPES,
  719. dev->base + PIPE_REG_SIGNAL_BUFFER_COUNT);
  720. paddr = __pa(&dev->buffers->open_command_params);
  721. writel((u32)(unsigned long)(paddr >> 32),
  722. dev->base + PIPE_REG_OPEN_BUFFER_HIGH);
  723. writel((u32)(unsigned long)paddr,
  724. dev->base + PIPE_REG_OPEN_BUFFER);
  725. }
  726. return 0;
  727. }
  728. static void goldfish_pipe_device_deinit(struct platform_device *pdev)
  729. {
  730. misc_deregister(&goldfish_pipe_miscdev);
  731. kfree(goldfish_pipe_dev.pipes);
  732. free_page((unsigned long)goldfish_pipe_dev.buffers);
  733. }
  734. static int goldfish_pipe_probe(struct platform_device *pdev)
  735. {
  736. int err;
  737. struct resource *r;
  738. struct goldfish_pipe_dev *dev = &goldfish_pipe_dev;
  739. /* not thread safe, but this should not happen */
  740. WARN_ON(dev->base != NULL);
  741. spin_lock_init(&dev->lock);
  742. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  743. if (r == NULL || resource_size(r) < PAGE_SIZE) {
  744. dev_err(&pdev->dev, "can't allocate i/o page\n");
  745. return -EINVAL;
  746. }
  747. dev->base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
  748. if (dev->base == NULL) {
  749. dev_err(&pdev->dev, "ioremap failed\n");
  750. return -EINVAL;
  751. }
  752. r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  753. if (r == NULL) {
  754. err = -EINVAL;
  755. goto error;
  756. }
  757. dev->irq = r->start;
  758. /*
  759. * Exchange the versions with the host device
  760. *
  761. * Note: v1 driver used to not report its version, so we write it before
  762. * reading device version back: this allows the host implementation to
  763. * detect the old driver (if there was no version write before read).
  764. */
  765. writel((u32)PIPE_DRIVER_VERSION, dev->base + PIPE_REG_VERSION);
  766. dev->version = readl(dev->base + PIPE_REG_VERSION);
  767. if (WARN_ON(dev->version < PIPE_CURRENT_DEVICE_VERSION))
  768. return -EINVAL;
  769. err = goldfish_pipe_device_init(pdev);
  770. if (!err)
  771. return 0;
  772. error:
  773. dev->base = NULL;
  774. return err;
  775. }
  776. static int goldfish_pipe_remove(struct platform_device *pdev)
  777. {
  778. struct goldfish_pipe_dev *dev = &goldfish_pipe_dev;
  779. goldfish_pipe_device_deinit(pdev);
  780. dev->base = NULL;
  781. return 0;
  782. }
  783. static const struct acpi_device_id goldfish_pipe_acpi_match[] = {
  784. { "GFSH0003", 0 },
  785. { },
  786. };
  787. MODULE_DEVICE_TABLE(acpi, goldfish_pipe_acpi_match);
  788. static const struct of_device_id goldfish_pipe_of_match[] = {
  789. { .compatible = "google,android-pipe", },
  790. {},
  791. };
  792. MODULE_DEVICE_TABLE(of, goldfish_pipe_of_match);
  793. static struct platform_driver goldfish_pipe_driver = {
  794. .probe = goldfish_pipe_probe,
  795. .remove = goldfish_pipe_remove,
  796. .driver = {
  797. .name = "goldfish_pipe",
  798. .of_match_table = goldfish_pipe_of_match,
  799. .acpi_match_table = ACPI_PTR(goldfish_pipe_acpi_match),
  800. }
  801. };
  802. module_platform_driver(goldfish_pipe_driver);
  803. MODULE_AUTHOR("David Turner <digit@google.com>");
  804. MODULE_LICENSE("GPL v2");