fpga-mgr.c 10 KB

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  1. /*
  2. * FPGA Manager Core
  3. *
  4. * Copyright (C) 2013-2015 Altera Corporation
  5. *
  6. * With code from the mailing list:
  7. * Copyright (C) 2013 Xilinx, Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms and conditions of the GNU General Public License,
  11. * version 2, as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  16. * more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along with
  19. * this program. If not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include <linux/firmware.h>
  22. #include <linux/fpga/fpga-mgr.h>
  23. #include <linux/idr.h>
  24. #include <linux/module.h>
  25. #include <linux/of.h>
  26. #include <linux/mutex.h>
  27. #include <linux/slab.h>
  28. static DEFINE_IDA(fpga_mgr_ida);
  29. static struct class *fpga_mgr_class;
  30. /**
  31. * fpga_mgr_buf_load - load fpga from image in buffer
  32. * @mgr: fpga manager
  33. * @info: fpga image specific information
  34. * @buf: buffer contain fpga image
  35. * @count: byte count of buf
  36. *
  37. * Step the low level fpga manager through the device-specific steps of getting
  38. * an FPGA ready to be configured, writing the image to it, then doing whatever
  39. * post-configuration steps necessary. This code assumes the caller got the
  40. * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
  41. * not an error code.
  42. *
  43. * Return: 0 on success, negative error code otherwise.
  44. */
  45. int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
  46. const char *buf, size_t count)
  47. {
  48. struct device *dev = &mgr->dev;
  49. int ret;
  50. /*
  51. * Call the low level driver's write_init function. This will do the
  52. * device-specific things to get the FPGA into the state where it is
  53. * ready to receive an FPGA image.
  54. */
  55. mgr->state = FPGA_MGR_STATE_WRITE_INIT;
  56. ret = mgr->mops->write_init(mgr, info, buf, count);
  57. if (ret) {
  58. dev_err(dev, "Error preparing FPGA for writing\n");
  59. mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
  60. return ret;
  61. }
  62. /*
  63. * Write the FPGA image to the FPGA.
  64. */
  65. mgr->state = FPGA_MGR_STATE_WRITE;
  66. ret = mgr->mops->write(mgr, buf, count);
  67. if (ret) {
  68. dev_err(dev, "Error while writing image data to FPGA\n");
  69. mgr->state = FPGA_MGR_STATE_WRITE_ERR;
  70. return ret;
  71. }
  72. /*
  73. * After all the FPGA image has been written, do the device specific
  74. * steps to finish and set the FPGA into operating mode.
  75. */
  76. mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
  77. ret = mgr->mops->write_complete(mgr, info);
  78. if (ret) {
  79. dev_err(dev, "Error after writing image data to FPGA\n");
  80. mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
  81. return ret;
  82. }
  83. mgr->state = FPGA_MGR_STATE_OPERATING;
  84. return 0;
  85. }
  86. EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
  87. /**
  88. * fpga_mgr_firmware_load - request firmware and load to fpga
  89. * @mgr: fpga manager
  90. * @info: fpga image specific information
  91. * @image_name: name of image file on the firmware search path
  92. *
  93. * Request an FPGA image using the firmware class, then write out to the FPGA.
  94. * Update the state before each step to provide info on what step failed if
  95. * there is a failure. This code assumes the caller got the mgr pointer
  96. * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
  97. * code.
  98. *
  99. * Return: 0 on success, negative error code otherwise.
  100. */
  101. int fpga_mgr_firmware_load(struct fpga_manager *mgr,
  102. struct fpga_image_info *info,
  103. const char *image_name)
  104. {
  105. struct device *dev = &mgr->dev;
  106. const struct firmware *fw;
  107. int ret;
  108. dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
  109. mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
  110. ret = request_firmware(&fw, image_name, dev);
  111. if (ret) {
  112. mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
  113. dev_err(dev, "Error requesting firmware %s\n", image_name);
  114. return ret;
  115. }
  116. ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
  117. release_firmware(fw);
  118. return ret;
  119. }
  120. EXPORT_SYMBOL_GPL(fpga_mgr_firmware_load);
  121. static const char * const state_str[] = {
  122. [FPGA_MGR_STATE_UNKNOWN] = "unknown",
  123. [FPGA_MGR_STATE_POWER_OFF] = "power off",
  124. [FPGA_MGR_STATE_POWER_UP] = "power up",
  125. [FPGA_MGR_STATE_RESET] = "reset",
  126. /* requesting FPGA image from firmware */
  127. [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
  128. [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
  129. /* Preparing FPGA to receive image */
  130. [FPGA_MGR_STATE_WRITE_INIT] = "write init",
  131. [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
  132. /* Writing image to FPGA */
  133. [FPGA_MGR_STATE_WRITE] = "write",
  134. [FPGA_MGR_STATE_WRITE_ERR] = "write error",
  135. /* Finishing configuration after image has been written */
  136. [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
  137. [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
  138. /* FPGA reports to be in normal operating mode */
  139. [FPGA_MGR_STATE_OPERATING] = "operating",
  140. };
  141. static ssize_t name_show(struct device *dev,
  142. struct device_attribute *attr, char *buf)
  143. {
  144. struct fpga_manager *mgr = to_fpga_manager(dev);
  145. return sprintf(buf, "%s\n", mgr->name);
  146. }
  147. static ssize_t state_show(struct device *dev,
  148. struct device_attribute *attr, char *buf)
  149. {
  150. struct fpga_manager *mgr = to_fpga_manager(dev);
  151. return sprintf(buf, "%s\n", state_str[mgr->state]);
  152. }
  153. static DEVICE_ATTR_RO(name);
  154. static DEVICE_ATTR_RO(state);
  155. static struct attribute *fpga_mgr_attrs[] = {
  156. &dev_attr_name.attr,
  157. &dev_attr_state.attr,
  158. NULL,
  159. };
  160. ATTRIBUTE_GROUPS(fpga_mgr);
  161. struct fpga_manager *__fpga_mgr_get(struct device *dev)
  162. {
  163. struct fpga_manager *mgr;
  164. int ret = -ENODEV;
  165. mgr = to_fpga_manager(dev);
  166. if (!mgr)
  167. goto err_dev;
  168. /* Get exclusive use of fpga manager */
  169. if (!mutex_trylock(&mgr->ref_mutex)) {
  170. ret = -EBUSY;
  171. goto err_dev;
  172. }
  173. if (!try_module_get(dev->parent->driver->owner))
  174. goto err_ll_mod;
  175. return mgr;
  176. err_ll_mod:
  177. mutex_unlock(&mgr->ref_mutex);
  178. err_dev:
  179. put_device(dev);
  180. return ERR_PTR(ret);
  181. }
  182. static int fpga_mgr_dev_match(struct device *dev, const void *data)
  183. {
  184. return dev->parent == data;
  185. }
  186. /**
  187. * fpga_mgr_get - get an exclusive reference to a fpga mgr
  188. * @dev: parent device that fpga mgr was registered with
  189. *
  190. * Given a device, get an exclusive reference to a fpga mgr.
  191. *
  192. * Return: fpga manager struct or IS_ERR() condition containing error code.
  193. */
  194. struct fpga_manager *fpga_mgr_get(struct device *dev)
  195. {
  196. struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
  197. fpga_mgr_dev_match);
  198. if (!mgr_dev)
  199. return ERR_PTR(-ENODEV);
  200. return __fpga_mgr_get(mgr_dev);
  201. }
  202. EXPORT_SYMBOL_GPL(fpga_mgr_get);
  203. static int fpga_mgr_of_node_match(struct device *dev, const void *data)
  204. {
  205. return dev->of_node == data;
  206. }
  207. /**
  208. * of_fpga_mgr_get - get an exclusive reference to a fpga mgr
  209. * @node: device node
  210. *
  211. * Given a device node, get an exclusive reference to a fpga mgr.
  212. *
  213. * Return: fpga manager struct or IS_ERR() condition containing error code.
  214. */
  215. struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
  216. {
  217. struct device *dev;
  218. dev = class_find_device(fpga_mgr_class, NULL, node,
  219. fpga_mgr_of_node_match);
  220. if (!dev)
  221. return ERR_PTR(-ENODEV);
  222. return __fpga_mgr_get(dev);
  223. }
  224. EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
  225. /**
  226. * fpga_mgr_put - release a reference to a fpga manager
  227. * @mgr: fpga manager structure
  228. */
  229. void fpga_mgr_put(struct fpga_manager *mgr)
  230. {
  231. module_put(mgr->dev.parent->driver->owner);
  232. mutex_unlock(&mgr->ref_mutex);
  233. put_device(&mgr->dev);
  234. }
  235. EXPORT_SYMBOL_GPL(fpga_mgr_put);
  236. /**
  237. * fpga_mgr_register - register a low level fpga manager driver
  238. * @dev: fpga manager device from pdev
  239. * @name: fpga manager name
  240. * @mops: pointer to structure of fpga manager ops
  241. * @priv: fpga manager private data
  242. *
  243. * Return: 0 on success, negative error code otherwise.
  244. */
  245. int fpga_mgr_register(struct device *dev, const char *name,
  246. const struct fpga_manager_ops *mops,
  247. void *priv)
  248. {
  249. struct fpga_manager *mgr;
  250. int id, ret;
  251. if (!mops || !mops->write_init || !mops->write ||
  252. !mops->write_complete || !mops->state) {
  253. dev_err(dev, "Attempt to register without fpga_manager_ops\n");
  254. return -EINVAL;
  255. }
  256. if (!name || !strlen(name)) {
  257. dev_err(dev, "Attempt to register with no name!\n");
  258. return -EINVAL;
  259. }
  260. mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
  261. if (!mgr)
  262. return -ENOMEM;
  263. id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
  264. if (id < 0) {
  265. ret = id;
  266. goto error_kfree;
  267. }
  268. mutex_init(&mgr->ref_mutex);
  269. mgr->name = name;
  270. mgr->mops = mops;
  271. mgr->priv = priv;
  272. /*
  273. * Initialize framework state by requesting low level driver read state
  274. * from device. FPGA may be in reset mode or may have been programmed
  275. * by bootloader or EEPROM.
  276. */
  277. mgr->state = mgr->mops->state(mgr);
  278. device_initialize(&mgr->dev);
  279. mgr->dev.class = fpga_mgr_class;
  280. mgr->dev.parent = dev;
  281. mgr->dev.of_node = dev->of_node;
  282. mgr->dev.id = id;
  283. dev_set_drvdata(dev, mgr);
  284. ret = dev_set_name(&mgr->dev, "fpga%d", id);
  285. if (ret)
  286. goto error_device;
  287. ret = device_add(&mgr->dev);
  288. if (ret)
  289. goto error_device;
  290. dev_info(&mgr->dev, "%s registered\n", mgr->name);
  291. return 0;
  292. error_device:
  293. ida_simple_remove(&fpga_mgr_ida, id);
  294. error_kfree:
  295. kfree(mgr);
  296. return ret;
  297. }
  298. EXPORT_SYMBOL_GPL(fpga_mgr_register);
  299. /**
  300. * fpga_mgr_unregister - unregister a low level fpga manager driver
  301. * @dev: fpga manager device from pdev
  302. */
  303. void fpga_mgr_unregister(struct device *dev)
  304. {
  305. struct fpga_manager *mgr = dev_get_drvdata(dev);
  306. dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
  307. /*
  308. * If the low level driver provides a method for putting fpga into
  309. * a desired state upon unregister, do it.
  310. */
  311. if (mgr->mops->fpga_remove)
  312. mgr->mops->fpga_remove(mgr);
  313. device_unregister(&mgr->dev);
  314. }
  315. EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
  316. static void fpga_mgr_dev_release(struct device *dev)
  317. {
  318. struct fpga_manager *mgr = to_fpga_manager(dev);
  319. ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
  320. kfree(mgr);
  321. }
  322. static int __init fpga_mgr_class_init(void)
  323. {
  324. pr_info("FPGA manager framework\n");
  325. fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
  326. if (IS_ERR(fpga_mgr_class))
  327. return PTR_ERR(fpga_mgr_class);
  328. fpga_mgr_class->dev_groups = fpga_mgr_groups;
  329. fpga_mgr_class->dev_release = fpga_mgr_dev_release;
  330. return 0;
  331. }
  332. static void __exit fpga_mgr_class_exit(void)
  333. {
  334. class_destroy(fpga_mgr_class);
  335. ida_destroy(&fpga_mgr_ida);
  336. }
  337. MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
  338. MODULE_DESCRIPTION("FPGA manager framework");
  339. MODULE_LICENSE("GPL v2");
  340. subsys_initcall(fpga_mgr_class_init);
  341. module_exit(fpga_mgr_class_exit);