pci.h 4.4 KB

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  1. #ifndef __ASM_POWERPC_PCI_H
  2. #define __ASM_POWERPC_PCI_H
  3. #ifdef __KERNEL__
  4. /*
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version
  8. * 2 of the License, or (at your option) any later version.
  9. */
  10. #include <linux/types.h>
  11. #include <linux/slab.h>
  12. #include <linux/string.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/scatterlist.h>
  15. #include <asm/machdep.h>
  16. #include <asm/io.h>
  17. #include <asm/prom.h>
  18. #include <asm/pci-bridge.h>
  19. /* Return values for pci_controller_ops.probe_mode function */
  20. #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
  21. #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
  22. #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
  23. #define PCIBIOS_MIN_IO 0x1000
  24. #define PCIBIOS_MIN_MEM 0x10000000
  25. /* Values for the `which' argument to sys_pciconfig_iobase syscall. */
  26. #define IOBASE_BRIDGE_NUMBER 0
  27. #define IOBASE_MEMORY 1
  28. #define IOBASE_IO 2
  29. #define IOBASE_ISA_IO 3
  30. #define IOBASE_ISA_MEM 4
  31. /*
  32. * Set this to 1 if you want the kernel to re-assign all PCI
  33. * bus numbers (don't do that on ppc64 yet !)
  34. */
  35. #define pcibios_assign_all_busses() \
  36. (pci_has_flag(PCI_REASSIGN_ALL_BUS))
  37. #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
  38. static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
  39. {
  40. if (ppc_md.pci_get_legacy_ide_irq)
  41. return ppc_md.pci_get_legacy_ide_irq(dev, channel);
  42. return channel ? 15 : 14;
  43. }
  44. #ifdef CONFIG_PCI
  45. extern void set_pci_dma_ops(const struct dma_map_ops *dma_ops);
  46. extern const struct dma_map_ops *get_pci_dma_ops(void);
  47. #else /* CONFIG_PCI */
  48. #define set_pci_dma_ops(d)
  49. #define get_pci_dma_ops() NULL
  50. #endif
  51. #ifdef CONFIG_PPC64
  52. /*
  53. * We want to avoid touching the cacheline size or MWI bit.
  54. * pSeries firmware sets the cacheline size (which is not the cpu cacheline
  55. * size in all cases) and hardware treats MWI the same as memory write.
  56. */
  57. #define PCI_DISABLE_MWI
  58. #endif /* CONFIG_PPC64 */
  59. extern int pci_domain_nr(struct pci_bus *bus);
  60. /* Decide whether to display the domain number in /proc */
  61. extern int pci_proc_domain(struct pci_bus *bus);
  62. struct vm_area_struct;
  63. /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() and it does WC */
  64. #define HAVE_PCI_MMAP 1
  65. #define arch_can_pci_mmap_io() 1
  66. #define arch_can_pci_mmap_wc() 1
  67. extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
  68. size_t count);
  69. extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
  70. size_t count);
  71. extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
  72. struct vm_area_struct *vma,
  73. enum pci_mmap_state mmap_state);
  74. #define HAVE_PCI_LEGACY 1
  75. #ifdef CONFIG_PPC64
  76. /* The PCI address space does not equal the physical memory address
  77. * space (we have an IOMMU). The IDE and SCSI device layers use
  78. * this boolean for bounce buffer decisions.
  79. */
  80. #define PCI_DMA_BUS_IS_PHYS (0)
  81. #else /* 32-bit */
  82. /* The PCI address space does equal the physical memory
  83. * address space (no IOMMU). The IDE and SCSI device layers use
  84. * this boolean for bounce buffer decisions.
  85. */
  86. #define PCI_DMA_BUS_IS_PHYS (1)
  87. #endif /* CONFIG_PPC64 */
  88. extern void pcibios_claim_one_bus(struct pci_bus *b);
  89. extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
  90. extern void pcibios_resource_survey(void);
  91. extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
  92. extern int remove_phb_dynamic(struct pci_controller *phb);
  93. extern struct pci_dev *of_create_pci_dev(struct device_node *node,
  94. struct pci_bus *bus, int devfn);
  95. extern void of_scan_pci_bridge(struct pci_dev *dev);
  96. extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
  97. extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
  98. struct file;
  99. extern pgprot_t pci_phys_mem_access_prot(struct file *file,
  100. unsigned long pfn,
  101. unsigned long size,
  102. pgprot_t prot);
  103. #define HAVE_ARCH_PCI_RESOURCE_TO_USER
  104. extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
  105. extern void pcibios_setup_bus_devices(struct pci_bus *bus);
  106. extern void pcibios_setup_bus_self(struct pci_bus *bus);
  107. extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
  108. extern void pcibios_scan_phb(struct pci_controller *hose);
  109. #endif /* __KERNEL__ */
  110. extern struct pci_dev *pnv_pci_get_gpu_dev(struct pci_dev *npdev);
  111. extern struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index);
  112. #endif /* __ASM_POWERPC_PCI_H */