qeth_core_main.c 180 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright IBM Corp. 2007, 2009
  4. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  5. * Frank Pavlic <fpavlic@de.ibm.com>,
  6. * Thomas Spatzier <tspat@de.ibm.com>,
  7. * Frank Blaschka <frank.blaschka@de.ibm.com>
  8. */
  9. #define KMSG_COMPONENT "qeth"
  10. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  11. #include <linux/module.h>
  12. #include <linux/moduleparam.h>
  13. #include <linux/string.h>
  14. #include <linux/errno.h>
  15. #include <linux/kernel.h>
  16. #include <linux/ip.h>
  17. #include <linux/tcp.h>
  18. #include <linux/mii.h>
  19. #include <linux/kthread.h>
  20. #include <linux/slab.h>
  21. #include <linux/if_vlan.h>
  22. #include <linux/netdevice.h>
  23. #include <linux/netdev_features.h>
  24. #include <linux/skbuff.h>
  25. #include <net/iucv/af_iucv.h>
  26. #include <net/dsfield.h>
  27. #include <asm/ebcdic.h>
  28. #include <asm/chpid.h>
  29. #include <asm/io.h>
  30. #include <asm/sysinfo.h>
  31. #include <asm/compat.h>
  32. #include <asm/diag.h>
  33. #include <asm/cio.h>
  34. #include <asm/ccwdev.h>
  35. #include <asm/cpcmd.h>
  36. #include "qeth_core.h"
  37. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  38. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  39. /* N P A M L V H */
  40. [QETH_DBF_SETUP] = {"qeth_setup",
  41. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  42. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  43. &debug_sprintf_view, NULL},
  44. [QETH_DBF_CTRL] = {"qeth_control",
  45. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  46. };
  47. EXPORT_SYMBOL_GPL(qeth_dbf);
  48. struct qeth_card_list_struct qeth_core_card_list;
  49. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  50. struct kmem_cache *qeth_core_header_cache;
  51. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  52. static struct kmem_cache *qeth_qdio_outbuf_cache;
  53. static struct device *qeth_core_root_dev;
  54. static struct lock_class_key qdio_out_skb_queue_key;
  55. static struct mutex qeth_mod_mutex;
  56. static void qeth_send_control_data_cb(struct qeth_channel *,
  57. struct qeth_cmd_buffer *);
  58. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  59. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  60. static void qeth_free_buffer_pool(struct qeth_card *);
  61. static int qeth_qdio_establish(struct qeth_card *);
  62. static void qeth_free_qdio_buffers(struct qeth_card *);
  63. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  64. struct qeth_qdio_out_buffer *buf,
  65. enum iucv_tx_notify notification);
  66. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  67. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  68. struct qeth_qdio_out_buffer *buf,
  69. enum qeth_qdio_buffer_states newbufstate);
  70. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  71. struct workqueue_struct *qeth_wq;
  72. EXPORT_SYMBOL_GPL(qeth_wq);
  73. int qeth_card_hw_is_reachable(struct qeth_card *card)
  74. {
  75. return (card->state == CARD_STATE_SOFTSETUP) ||
  76. (card->state == CARD_STATE_UP);
  77. }
  78. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  79. static void qeth_close_dev_handler(struct work_struct *work)
  80. {
  81. struct qeth_card *card;
  82. card = container_of(work, struct qeth_card, close_dev_work);
  83. QETH_CARD_TEXT(card, 2, "cldevhdl");
  84. rtnl_lock();
  85. dev_close(card->dev);
  86. rtnl_unlock();
  87. ccwgroup_set_offline(card->gdev);
  88. }
  89. void qeth_close_dev(struct qeth_card *card)
  90. {
  91. QETH_CARD_TEXT(card, 2, "cldevsubm");
  92. queue_work(qeth_wq, &card->close_dev_work);
  93. }
  94. EXPORT_SYMBOL_GPL(qeth_close_dev);
  95. static const char *qeth_get_cardname(struct qeth_card *card)
  96. {
  97. if (card->info.guestlan) {
  98. switch (card->info.type) {
  99. case QETH_CARD_TYPE_OSD:
  100. return " Virtual NIC QDIO";
  101. case QETH_CARD_TYPE_IQD:
  102. return " Virtual NIC Hiper";
  103. case QETH_CARD_TYPE_OSM:
  104. return " Virtual NIC QDIO - OSM";
  105. case QETH_CARD_TYPE_OSX:
  106. return " Virtual NIC QDIO - OSX";
  107. default:
  108. return " unknown";
  109. }
  110. } else {
  111. switch (card->info.type) {
  112. case QETH_CARD_TYPE_OSD:
  113. return " OSD Express";
  114. case QETH_CARD_TYPE_IQD:
  115. return " HiperSockets";
  116. case QETH_CARD_TYPE_OSN:
  117. return " OSN QDIO";
  118. case QETH_CARD_TYPE_OSM:
  119. return " OSM QDIO";
  120. case QETH_CARD_TYPE_OSX:
  121. return " OSX QDIO";
  122. default:
  123. return " unknown";
  124. }
  125. }
  126. return " n/a";
  127. }
  128. /* max length to be returned: 14 */
  129. const char *qeth_get_cardname_short(struct qeth_card *card)
  130. {
  131. if (card->info.guestlan) {
  132. switch (card->info.type) {
  133. case QETH_CARD_TYPE_OSD:
  134. return "Virt.NIC QDIO";
  135. case QETH_CARD_TYPE_IQD:
  136. return "Virt.NIC Hiper";
  137. case QETH_CARD_TYPE_OSM:
  138. return "Virt.NIC OSM";
  139. case QETH_CARD_TYPE_OSX:
  140. return "Virt.NIC OSX";
  141. default:
  142. return "unknown";
  143. }
  144. } else {
  145. switch (card->info.type) {
  146. case QETH_CARD_TYPE_OSD:
  147. switch (card->info.link_type) {
  148. case QETH_LINK_TYPE_FAST_ETH:
  149. return "OSD_100";
  150. case QETH_LINK_TYPE_HSTR:
  151. return "HSTR";
  152. case QETH_LINK_TYPE_GBIT_ETH:
  153. return "OSD_1000";
  154. case QETH_LINK_TYPE_10GBIT_ETH:
  155. return "OSD_10GIG";
  156. case QETH_LINK_TYPE_LANE_ETH100:
  157. return "OSD_FE_LANE";
  158. case QETH_LINK_TYPE_LANE_TR:
  159. return "OSD_TR_LANE";
  160. case QETH_LINK_TYPE_LANE_ETH1000:
  161. return "OSD_GbE_LANE";
  162. case QETH_LINK_TYPE_LANE:
  163. return "OSD_ATM_LANE";
  164. default:
  165. return "OSD_Express";
  166. }
  167. case QETH_CARD_TYPE_IQD:
  168. return "HiperSockets";
  169. case QETH_CARD_TYPE_OSN:
  170. return "OSN";
  171. case QETH_CARD_TYPE_OSM:
  172. return "OSM_1000";
  173. case QETH_CARD_TYPE_OSX:
  174. return "OSX_10GIG";
  175. default:
  176. return "unknown";
  177. }
  178. }
  179. return "n/a";
  180. }
  181. void qeth_set_recovery_task(struct qeth_card *card)
  182. {
  183. card->recovery_task = current;
  184. }
  185. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  186. void qeth_clear_recovery_task(struct qeth_card *card)
  187. {
  188. card->recovery_task = NULL;
  189. }
  190. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  191. static bool qeth_is_recovery_task(const struct qeth_card *card)
  192. {
  193. return card->recovery_task == current;
  194. }
  195. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  196. int clear_start_mask)
  197. {
  198. unsigned long flags;
  199. spin_lock_irqsave(&card->thread_mask_lock, flags);
  200. card->thread_allowed_mask = threads;
  201. if (clear_start_mask)
  202. card->thread_start_mask &= threads;
  203. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  204. wake_up(&card->wait_q);
  205. }
  206. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  207. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  208. {
  209. unsigned long flags;
  210. int rc = 0;
  211. spin_lock_irqsave(&card->thread_mask_lock, flags);
  212. rc = (card->thread_running_mask & threads);
  213. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  214. return rc;
  215. }
  216. EXPORT_SYMBOL_GPL(qeth_threads_running);
  217. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  218. {
  219. if (qeth_is_recovery_task(card))
  220. return 0;
  221. return wait_event_interruptible(card->wait_q,
  222. qeth_threads_running(card, threads) == 0);
  223. }
  224. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  225. void qeth_clear_working_pool_list(struct qeth_card *card)
  226. {
  227. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  228. QETH_CARD_TEXT(card, 5, "clwrklst");
  229. list_for_each_entry_safe(pool_entry, tmp,
  230. &card->qdio.in_buf_pool.entry_list, list){
  231. list_del(&pool_entry->list);
  232. }
  233. }
  234. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  235. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  236. {
  237. struct qeth_buffer_pool_entry *pool_entry;
  238. void *ptr;
  239. int i, j;
  240. QETH_CARD_TEXT(card, 5, "alocpool");
  241. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  242. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  243. if (!pool_entry) {
  244. qeth_free_buffer_pool(card);
  245. return -ENOMEM;
  246. }
  247. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  248. ptr = (void *) __get_free_page(GFP_KERNEL);
  249. if (!ptr) {
  250. while (j > 0)
  251. free_page((unsigned long)
  252. pool_entry->elements[--j]);
  253. kfree(pool_entry);
  254. qeth_free_buffer_pool(card);
  255. return -ENOMEM;
  256. }
  257. pool_entry->elements[j] = ptr;
  258. }
  259. list_add(&pool_entry->init_list,
  260. &card->qdio.init_pool.entry_list);
  261. }
  262. return 0;
  263. }
  264. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  265. {
  266. QETH_CARD_TEXT(card, 2, "realcbp");
  267. if ((card->state != CARD_STATE_DOWN) &&
  268. (card->state != CARD_STATE_RECOVER))
  269. return -EPERM;
  270. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  271. qeth_clear_working_pool_list(card);
  272. qeth_free_buffer_pool(card);
  273. card->qdio.in_buf_pool.buf_count = bufcnt;
  274. card->qdio.init_pool.buf_count = bufcnt;
  275. return qeth_alloc_buffer_pool(card);
  276. }
  277. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  278. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  279. {
  280. if (!q)
  281. return;
  282. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  283. kfree(q);
  284. }
  285. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  286. {
  287. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  288. int i;
  289. if (!q)
  290. return NULL;
  291. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  292. kfree(q);
  293. return NULL;
  294. }
  295. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  296. q->bufs[i].buffer = q->qdio_bufs[i];
  297. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  298. return q;
  299. }
  300. static int qeth_cq_init(struct qeth_card *card)
  301. {
  302. int rc;
  303. if (card->options.cq == QETH_CQ_ENABLED) {
  304. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  305. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  306. QDIO_MAX_BUFFERS_PER_Q);
  307. card->qdio.c_q->next_buf_to_init = 127;
  308. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  309. card->qdio.no_in_queues - 1, 0,
  310. 127);
  311. if (rc) {
  312. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  313. goto out;
  314. }
  315. }
  316. rc = 0;
  317. out:
  318. return rc;
  319. }
  320. static int qeth_alloc_cq(struct qeth_card *card)
  321. {
  322. int rc;
  323. if (card->options.cq == QETH_CQ_ENABLED) {
  324. int i;
  325. struct qdio_outbuf_state *outbuf_states;
  326. QETH_DBF_TEXT(SETUP, 2, "cqon");
  327. card->qdio.c_q = qeth_alloc_qdio_queue();
  328. if (!card->qdio.c_q) {
  329. rc = -1;
  330. goto kmsg_out;
  331. }
  332. card->qdio.no_in_queues = 2;
  333. card->qdio.out_bufstates =
  334. kzalloc(card->qdio.no_out_queues *
  335. QDIO_MAX_BUFFERS_PER_Q *
  336. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  337. outbuf_states = card->qdio.out_bufstates;
  338. if (outbuf_states == NULL) {
  339. rc = -1;
  340. goto free_cq_out;
  341. }
  342. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  343. card->qdio.out_qs[i]->bufstates = outbuf_states;
  344. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  345. }
  346. } else {
  347. QETH_DBF_TEXT(SETUP, 2, "nocq");
  348. card->qdio.c_q = NULL;
  349. card->qdio.no_in_queues = 1;
  350. }
  351. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  352. rc = 0;
  353. out:
  354. return rc;
  355. free_cq_out:
  356. qeth_free_qdio_queue(card->qdio.c_q);
  357. card->qdio.c_q = NULL;
  358. kmsg_out:
  359. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  360. goto out;
  361. }
  362. static void qeth_free_cq(struct qeth_card *card)
  363. {
  364. if (card->qdio.c_q) {
  365. --card->qdio.no_in_queues;
  366. qeth_free_qdio_queue(card->qdio.c_q);
  367. card->qdio.c_q = NULL;
  368. }
  369. kfree(card->qdio.out_bufstates);
  370. card->qdio.out_bufstates = NULL;
  371. }
  372. static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  373. int delayed)
  374. {
  375. enum iucv_tx_notify n;
  376. switch (sbalf15) {
  377. case 0:
  378. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  379. break;
  380. case 4:
  381. case 16:
  382. case 17:
  383. case 18:
  384. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  385. TX_NOTIFY_UNREACHABLE;
  386. break;
  387. default:
  388. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  389. TX_NOTIFY_GENERALERROR;
  390. break;
  391. }
  392. return n;
  393. }
  394. static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
  395. int forced_cleanup)
  396. {
  397. if (q->card->options.cq != QETH_CQ_ENABLED)
  398. return;
  399. if (q->bufs[bidx]->next_pending != NULL) {
  400. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  401. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  402. while (c) {
  403. if (forced_cleanup ||
  404. atomic_read(&c->state) ==
  405. QETH_QDIO_BUF_HANDLED_DELAYED) {
  406. struct qeth_qdio_out_buffer *f = c;
  407. QETH_CARD_TEXT(f->q->card, 5, "fp");
  408. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  409. /* release here to avoid interleaving between
  410. outbound tasklet and inbound tasklet
  411. regarding notifications and lifecycle */
  412. qeth_release_skbs(c);
  413. c = f->next_pending;
  414. WARN_ON_ONCE(head->next_pending != f);
  415. head->next_pending = c;
  416. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  417. } else {
  418. head = c;
  419. c = c->next_pending;
  420. }
  421. }
  422. }
  423. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  424. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  425. /* for recovery situations */
  426. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  427. qeth_init_qdio_out_buf(q, bidx);
  428. QETH_CARD_TEXT(q->card, 2, "clprecov");
  429. }
  430. }
  431. static void qeth_qdio_handle_aob(struct qeth_card *card,
  432. unsigned long phys_aob_addr)
  433. {
  434. struct qaob *aob;
  435. struct qeth_qdio_out_buffer *buffer;
  436. enum iucv_tx_notify notification;
  437. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  438. QETH_CARD_TEXT(card, 5, "haob");
  439. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  440. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  441. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  442. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  443. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  444. notification = TX_NOTIFY_OK;
  445. } else {
  446. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  447. QETH_QDIO_BUF_PENDING);
  448. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  449. notification = TX_NOTIFY_DELAYED_OK;
  450. }
  451. if (aob->aorc != 0) {
  452. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  453. notification = qeth_compute_cq_notification(aob->aorc, 1);
  454. }
  455. qeth_notify_skbs(buffer->q, buffer, notification);
  456. buffer->aob = NULL;
  457. qeth_clear_output_buffer(buffer->q, buffer,
  458. QETH_QDIO_BUF_HANDLED_DELAYED);
  459. /* from here on: do not touch buffer anymore */
  460. qdio_release_aob(aob);
  461. }
  462. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  463. {
  464. return card->options.cq == QETH_CQ_ENABLED &&
  465. card->qdio.c_q != NULL &&
  466. queue != 0 &&
  467. queue == card->qdio.no_in_queues - 1;
  468. }
  469. static int qeth_issue_next_read(struct qeth_card *card)
  470. {
  471. int rc;
  472. struct qeth_cmd_buffer *iob;
  473. QETH_CARD_TEXT(card, 5, "issnxrd");
  474. if (card->read.state != CH_STATE_UP)
  475. return -EIO;
  476. iob = qeth_get_buffer(&card->read);
  477. if (!iob) {
  478. dev_warn(&card->gdev->dev, "The qeth device driver "
  479. "failed to recover an error on the device\n");
  480. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  481. "available\n", dev_name(&card->gdev->dev));
  482. return -ENOMEM;
  483. }
  484. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  485. QETH_CARD_TEXT(card, 6, "noirqpnd");
  486. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  487. (addr_t) iob, 0, 0);
  488. if (rc) {
  489. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  490. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  491. atomic_set(&card->read.irq_pending, 0);
  492. card->read_or_write_problem = 1;
  493. qeth_schedule_recovery(card);
  494. wake_up(&card->wait_q);
  495. }
  496. return rc;
  497. }
  498. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  499. {
  500. struct qeth_reply *reply;
  501. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  502. if (reply) {
  503. refcount_set(&reply->refcnt, 1);
  504. atomic_set(&reply->received, 0);
  505. reply->card = card;
  506. }
  507. return reply;
  508. }
  509. static void qeth_get_reply(struct qeth_reply *reply)
  510. {
  511. refcount_inc(&reply->refcnt);
  512. }
  513. static void qeth_put_reply(struct qeth_reply *reply)
  514. {
  515. if (refcount_dec_and_test(&reply->refcnt))
  516. kfree(reply);
  517. }
  518. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  519. struct qeth_card *card)
  520. {
  521. char *ipa_name;
  522. int com = cmd->hdr.command;
  523. ipa_name = qeth_get_ipa_cmd_name(com);
  524. if (rc)
  525. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  526. "x%X \"%s\"\n",
  527. ipa_name, com, dev_name(&card->gdev->dev),
  528. QETH_CARD_IFNAME(card), rc,
  529. qeth_get_ipa_msg(rc));
  530. else
  531. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  532. ipa_name, com, dev_name(&card->gdev->dev),
  533. QETH_CARD_IFNAME(card));
  534. }
  535. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  536. struct qeth_cmd_buffer *iob)
  537. {
  538. struct qeth_ipa_cmd *cmd = NULL;
  539. QETH_CARD_TEXT(card, 5, "chkipad");
  540. if (IS_IPA(iob->data)) {
  541. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  542. if (IS_IPA_REPLY(cmd)) {
  543. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  544. cmd->hdr.command != IPA_CMD_DELCCID &&
  545. cmd->hdr.command != IPA_CMD_MODCCID &&
  546. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  547. qeth_issue_ipa_msg(cmd,
  548. cmd->hdr.return_code, card);
  549. return cmd;
  550. } else {
  551. switch (cmd->hdr.command) {
  552. case IPA_CMD_STOPLAN:
  553. if (cmd->hdr.return_code ==
  554. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  555. dev_err(&card->gdev->dev,
  556. "Interface %s is down because the "
  557. "adjacent port is no longer in "
  558. "reflective relay mode\n",
  559. QETH_CARD_IFNAME(card));
  560. qeth_close_dev(card);
  561. } else {
  562. dev_warn(&card->gdev->dev,
  563. "The link for interface %s on CHPID"
  564. " 0x%X failed\n",
  565. QETH_CARD_IFNAME(card),
  566. card->info.chpid);
  567. qeth_issue_ipa_msg(cmd,
  568. cmd->hdr.return_code, card);
  569. }
  570. card->lan_online = 0;
  571. if (card->dev && netif_carrier_ok(card->dev))
  572. netif_carrier_off(card->dev);
  573. return NULL;
  574. case IPA_CMD_STARTLAN:
  575. dev_info(&card->gdev->dev,
  576. "The link for %s on CHPID 0x%X has"
  577. " been restored\n",
  578. QETH_CARD_IFNAME(card),
  579. card->info.chpid);
  580. netif_carrier_on(card->dev);
  581. card->lan_online = 1;
  582. if (card->info.hwtrap)
  583. card->info.hwtrap = 2;
  584. qeth_schedule_recovery(card);
  585. return NULL;
  586. case IPA_CMD_SETBRIDGEPORT_IQD:
  587. case IPA_CMD_SETBRIDGEPORT_OSA:
  588. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  589. if (card->discipline->control_event_handler
  590. (card, cmd))
  591. return cmd;
  592. else
  593. return NULL;
  594. case IPA_CMD_MODCCID:
  595. return cmd;
  596. case IPA_CMD_REGISTER_LOCAL_ADDR:
  597. QETH_CARD_TEXT(card, 3, "irla");
  598. break;
  599. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  600. QETH_CARD_TEXT(card, 3, "urla");
  601. break;
  602. default:
  603. QETH_DBF_MESSAGE(2, "Received data is IPA "
  604. "but not a reply!\n");
  605. break;
  606. }
  607. }
  608. }
  609. return cmd;
  610. }
  611. void qeth_clear_ipacmd_list(struct qeth_card *card)
  612. {
  613. struct qeth_reply *reply, *r;
  614. unsigned long flags;
  615. QETH_CARD_TEXT(card, 4, "clipalst");
  616. spin_lock_irqsave(&card->lock, flags);
  617. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  618. qeth_get_reply(reply);
  619. reply->rc = -EIO;
  620. atomic_inc(&reply->received);
  621. list_del_init(&reply->list);
  622. wake_up(&reply->wait_q);
  623. qeth_put_reply(reply);
  624. }
  625. spin_unlock_irqrestore(&card->lock, flags);
  626. atomic_set(&card->write.irq_pending, 0);
  627. }
  628. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  629. static int qeth_check_idx_response(struct qeth_card *card,
  630. unsigned char *buffer)
  631. {
  632. if (!buffer)
  633. return 0;
  634. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  635. if ((buffer[2] & 0xc0) == 0xc0) {
  636. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#02x\n",
  637. buffer[4]);
  638. QETH_CARD_TEXT(card, 2, "ckidxres");
  639. QETH_CARD_TEXT(card, 2, " idxterm");
  640. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  641. if (buffer[4] == 0xf6) {
  642. dev_err(&card->gdev->dev,
  643. "The qeth device is not configured "
  644. "for the OSI layer required by z/VM\n");
  645. return -EPERM;
  646. }
  647. return -EIO;
  648. }
  649. return 0;
  650. }
  651. static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
  652. {
  653. struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
  654. dev_get_drvdata(&cdev->dev))->dev);
  655. return card;
  656. }
  657. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  658. __u32 len)
  659. {
  660. struct qeth_card *card;
  661. card = CARD_FROM_CDEV(channel->ccwdev);
  662. QETH_CARD_TEXT(card, 4, "setupccw");
  663. if (channel == &card->read)
  664. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  665. else
  666. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  667. channel->ccw.count = len;
  668. channel->ccw.cda = (__u32) __pa(iob);
  669. }
  670. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  671. {
  672. __u8 index;
  673. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  674. index = channel->io_buf_no;
  675. do {
  676. if (channel->iob[index].state == BUF_STATE_FREE) {
  677. channel->iob[index].state = BUF_STATE_LOCKED;
  678. channel->io_buf_no = (channel->io_buf_no + 1) %
  679. QETH_CMD_BUFFER_NO;
  680. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  681. return channel->iob + index;
  682. }
  683. index = (index + 1) % QETH_CMD_BUFFER_NO;
  684. } while (index != channel->io_buf_no);
  685. return NULL;
  686. }
  687. void qeth_release_buffer(struct qeth_channel *channel,
  688. struct qeth_cmd_buffer *iob)
  689. {
  690. unsigned long flags;
  691. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  692. spin_lock_irqsave(&channel->iob_lock, flags);
  693. memset(iob->data, 0, QETH_BUFSIZE);
  694. iob->state = BUF_STATE_FREE;
  695. iob->callback = qeth_send_control_data_cb;
  696. iob->rc = 0;
  697. spin_unlock_irqrestore(&channel->iob_lock, flags);
  698. wake_up(&channel->wait_q);
  699. }
  700. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  701. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  702. {
  703. struct qeth_cmd_buffer *buffer = NULL;
  704. unsigned long flags;
  705. spin_lock_irqsave(&channel->iob_lock, flags);
  706. buffer = __qeth_get_buffer(channel);
  707. spin_unlock_irqrestore(&channel->iob_lock, flags);
  708. return buffer;
  709. }
  710. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  711. {
  712. struct qeth_cmd_buffer *buffer;
  713. wait_event(channel->wait_q,
  714. ((buffer = qeth_get_buffer(channel)) != NULL));
  715. return buffer;
  716. }
  717. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  718. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  719. {
  720. int cnt;
  721. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  722. qeth_release_buffer(channel, &channel->iob[cnt]);
  723. channel->buf_no = 0;
  724. channel->io_buf_no = 0;
  725. }
  726. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  727. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  728. struct qeth_cmd_buffer *iob)
  729. {
  730. struct qeth_card *card;
  731. struct qeth_reply *reply, *r;
  732. struct qeth_ipa_cmd *cmd;
  733. unsigned long flags;
  734. int keep_reply;
  735. int rc = 0;
  736. card = CARD_FROM_CDEV(channel->ccwdev);
  737. QETH_CARD_TEXT(card, 4, "sndctlcb");
  738. rc = qeth_check_idx_response(card, iob->data);
  739. switch (rc) {
  740. case 0:
  741. break;
  742. case -EIO:
  743. qeth_clear_ipacmd_list(card);
  744. qeth_schedule_recovery(card);
  745. /* fall through */
  746. default:
  747. goto out;
  748. }
  749. cmd = qeth_check_ipa_data(card, iob);
  750. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  751. goto out;
  752. /*in case of OSN : check if cmd is set */
  753. if (card->info.type == QETH_CARD_TYPE_OSN &&
  754. cmd &&
  755. cmd->hdr.command != IPA_CMD_STARTLAN &&
  756. card->osn_info.assist_cb != NULL) {
  757. card->osn_info.assist_cb(card->dev, cmd);
  758. goto out;
  759. }
  760. spin_lock_irqsave(&card->lock, flags);
  761. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  762. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  763. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  764. qeth_get_reply(reply);
  765. list_del_init(&reply->list);
  766. spin_unlock_irqrestore(&card->lock, flags);
  767. keep_reply = 0;
  768. if (reply->callback != NULL) {
  769. if (cmd) {
  770. reply->offset = (__u16)((char *)cmd -
  771. (char *)iob->data);
  772. keep_reply = reply->callback(card,
  773. reply,
  774. (unsigned long)cmd);
  775. } else
  776. keep_reply = reply->callback(card,
  777. reply,
  778. (unsigned long)iob);
  779. }
  780. if (cmd)
  781. reply->rc = (u16) cmd->hdr.return_code;
  782. else if (iob->rc)
  783. reply->rc = iob->rc;
  784. if (keep_reply) {
  785. spin_lock_irqsave(&card->lock, flags);
  786. list_add_tail(&reply->list,
  787. &card->cmd_waiter_list);
  788. spin_unlock_irqrestore(&card->lock, flags);
  789. } else {
  790. atomic_inc(&reply->received);
  791. wake_up(&reply->wait_q);
  792. }
  793. qeth_put_reply(reply);
  794. goto out;
  795. }
  796. }
  797. spin_unlock_irqrestore(&card->lock, flags);
  798. out:
  799. memcpy(&card->seqno.pdu_hdr_ack,
  800. QETH_PDU_HEADER_SEQ_NO(iob->data),
  801. QETH_SEQ_NO_LENGTH);
  802. qeth_release_buffer(channel, iob);
  803. }
  804. static int qeth_setup_channel(struct qeth_channel *channel)
  805. {
  806. int cnt;
  807. QETH_DBF_TEXT(SETUP, 2, "setupch");
  808. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  809. channel->iob[cnt].data =
  810. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  811. if (channel->iob[cnt].data == NULL)
  812. break;
  813. channel->iob[cnt].state = BUF_STATE_FREE;
  814. channel->iob[cnt].channel = channel;
  815. channel->iob[cnt].callback = qeth_send_control_data_cb;
  816. channel->iob[cnt].rc = 0;
  817. }
  818. if (cnt < QETH_CMD_BUFFER_NO) {
  819. while (cnt-- > 0)
  820. kfree(channel->iob[cnt].data);
  821. return -ENOMEM;
  822. }
  823. channel->buf_no = 0;
  824. channel->io_buf_no = 0;
  825. atomic_set(&channel->irq_pending, 0);
  826. spin_lock_init(&channel->iob_lock);
  827. init_waitqueue_head(&channel->wait_q);
  828. return 0;
  829. }
  830. static int qeth_set_thread_start_bit(struct qeth_card *card,
  831. unsigned long thread)
  832. {
  833. unsigned long flags;
  834. spin_lock_irqsave(&card->thread_mask_lock, flags);
  835. if (!(card->thread_allowed_mask & thread) ||
  836. (card->thread_start_mask & thread)) {
  837. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  838. return -EPERM;
  839. }
  840. card->thread_start_mask |= thread;
  841. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  842. return 0;
  843. }
  844. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  845. {
  846. unsigned long flags;
  847. spin_lock_irqsave(&card->thread_mask_lock, flags);
  848. card->thread_start_mask &= ~thread;
  849. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  850. wake_up(&card->wait_q);
  851. }
  852. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  853. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  854. {
  855. unsigned long flags;
  856. spin_lock_irqsave(&card->thread_mask_lock, flags);
  857. card->thread_running_mask &= ~thread;
  858. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  859. wake_up(&card->wait_q);
  860. }
  861. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  862. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  863. {
  864. unsigned long flags;
  865. int rc = 0;
  866. spin_lock_irqsave(&card->thread_mask_lock, flags);
  867. if (card->thread_start_mask & thread) {
  868. if ((card->thread_allowed_mask & thread) &&
  869. !(card->thread_running_mask & thread)) {
  870. rc = 1;
  871. card->thread_start_mask &= ~thread;
  872. card->thread_running_mask |= thread;
  873. } else
  874. rc = -EPERM;
  875. }
  876. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  877. return rc;
  878. }
  879. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  880. {
  881. int rc = 0;
  882. wait_event(card->wait_q,
  883. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  884. return rc;
  885. }
  886. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  887. void qeth_schedule_recovery(struct qeth_card *card)
  888. {
  889. QETH_CARD_TEXT(card, 2, "startrec");
  890. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  891. schedule_work(&card->kernel_thread_starter);
  892. }
  893. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  894. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  895. {
  896. int dstat, cstat;
  897. char *sense;
  898. struct qeth_card *card;
  899. sense = (char *) irb->ecw;
  900. cstat = irb->scsw.cmd.cstat;
  901. dstat = irb->scsw.cmd.dstat;
  902. card = CARD_FROM_CDEV(cdev);
  903. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  904. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  905. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  906. QETH_CARD_TEXT(card, 2, "CGENCHK");
  907. dev_warn(&cdev->dev, "The qeth device driver "
  908. "failed to recover an error on the device\n");
  909. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  910. dev_name(&cdev->dev), dstat, cstat);
  911. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  912. 16, 1, irb, 64, 1);
  913. return 1;
  914. }
  915. if (dstat & DEV_STAT_UNIT_CHECK) {
  916. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  917. SENSE_RESETTING_EVENT_FLAG) {
  918. QETH_CARD_TEXT(card, 2, "REVIND");
  919. return 1;
  920. }
  921. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  922. SENSE_COMMAND_REJECT_FLAG) {
  923. QETH_CARD_TEXT(card, 2, "CMDREJi");
  924. return 1;
  925. }
  926. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  927. QETH_CARD_TEXT(card, 2, "AFFE");
  928. return 1;
  929. }
  930. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  931. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  932. return 0;
  933. }
  934. QETH_CARD_TEXT(card, 2, "DGENCHK");
  935. return 1;
  936. }
  937. return 0;
  938. }
  939. static long __qeth_check_irb_error(struct ccw_device *cdev,
  940. unsigned long intparm, struct irb *irb)
  941. {
  942. struct qeth_card *card;
  943. card = CARD_FROM_CDEV(cdev);
  944. if (!card || !IS_ERR(irb))
  945. return 0;
  946. switch (PTR_ERR(irb)) {
  947. case -EIO:
  948. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  949. dev_name(&cdev->dev));
  950. QETH_CARD_TEXT(card, 2, "ckirberr");
  951. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  952. break;
  953. case -ETIMEDOUT:
  954. dev_warn(&cdev->dev, "A hardware operation timed out"
  955. " on the device\n");
  956. QETH_CARD_TEXT(card, 2, "ckirberr");
  957. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  958. if (intparm == QETH_RCD_PARM) {
  959. if (card->data.ccwdev == cdev) {
  960. card->data.state = CH_STATE_DOWN;
  961. wake_up(&card->wait_q);
  962. }
  963. }
  964. break;
  965. default:
  966. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  967. dev_name(&cdev->dev), PTR_ERR(irb));
  968. QETH_CARD_TEXT(card, 2, "ckirberr");
  969. QETH_CARD_TEXT(card, 2, " rc???");
  970. }
  971. return PTR_ERR(irb);
  972. }
  973. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  974. struct irb *irb)
  975. {
  976. int rc;
  977. int cstat, dstat;
  978. struct qeth_cmd_buffer *buffer;
  979. struct qeth_channel *channel;
  980. struct qeth_card *card;
  981. struct qeth_cmd_buffer *iob;
  982. __u8 index;
  983. if (__qeth_check_irb_error(cdev, intparm, irb))
  984. return;
  985. cstat = irb->scsw.cmd.cstat;
  986. dstat = irb->scsw.cmd.dstat;
  987. card = CARD_FROM_CDEV(cdev);
  988. if (!card)
  989. return;
  990. QETH_CARD_TEXT(card, 5, "irq");
  991. if (card->read.ccwdev == cdev) {
  992. channel = &card->read;
  993. QETH_CARD_TEXT(card, 5, "read");
  994. } else if (card->write.ccwdev == cdev) {
  995. channel = &card->write;
  996. QETH_CARD_TEXT(card, 5, "write");
  997. } else {
  998. channel = &card->data;
  999. QETH_CARD_TEXT(card, 5, "data");
  1000. }
  1001. atomic_set(&channel->irq_pending, 0);
  1002. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  1003. channel->state = CH_STATE_STOPPED;
  1004. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  1005. channel->state = CH_STATE_HALTED;
  1006. /*let's wake up immediately on data channel*/
  1007. if ((channel == &card->data) && (intparm != 0) &&
  1008. (intparm != QETH_RCD_PARM))
  1009. goto out;
  1010. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  1011. QETH_CARD_TEXT(card, 6, "clrchpar");
  1012. /* we don't have to handle this further */
  1013. intparm = 0;
  1014. }
  1015. if (intparm == QETH_HALT_CHANNEL_PARM) {
  1016. QETH_CARD_TEXT(card, 6, "hltchpar");
  1017. /* we don't have to handle this further */
  1018. intparm = 0;
  1019. }
  1020. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1021. (dstat & DEV_STAT_UNIT_CHECK) ||
  1022. (cstat)) {
  1023. if (irb->esw.esw0.erw.cons) {
  1024. dev_warn(&channel->ccwdev->dev,
  1025. "The qeth device driver failed to recover "
  1026. "an error on the device\n");
  1027. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1028. "0x%X dstat 0x%X\n",
  1029. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1030. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1031. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1032. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1033. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1034. }
  1035. if (intparm == QETH_RCD_PARM) {
  1036. channel->state = CH_STATE_DOWN;
  1037. goto out;
  1038. }
  1039. rc = qeth_get_problem(cdev, irb);
  1040. if (rc) {
  1041. qeth_clear_ipacmd_list(card);
  1042. qeth_schedule_recovery(card);
  1043. goto out;
  1044. }
  1045. }
  1046. if (intparm == QETH_RCD_PARM) {
  1047. channel->state = CH_STATE_RCD_DONE;
  1048. goto out;
  1049. }
  1050. if (intparm) {
  1051. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1052. buffer->state = BUF_STATE_PROCESSED;
  1053. }
  1054. if (channel == &card->data)
  1055. return;
  1056. if (channel == &card->read &&
  1057. channel->state == CH_STATE_UP)
  1058. qeth_issue_next_read(card);
  1059. iob = channel->iob;
  1060. index = channel->buf_no;
  1061. while (iob[index].state == BUF_STATE_PROCESSED) {
  1062. if (iob[index].callback != NULL)
  1063. iob[index].callback(channel, iob + index);
  1064. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1065. }
  1066. channel->buf_no = index;
  1067. out:
  1068. wake_up(&card->wait_q);
  1069. return;
  1070. }
  1071. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1072. struct qeth_qdio_out_buffer *buf,
  1073. enum iucv_tx_notify notification)
  1074. {
  1075. struct sk_buff *skb;
  1076. if (skb_queue_empty(&buf->skb_list))
  1077. goto out;
  1078. skb = skb_peek(&buf->skb_list);
  1079. while (skb) {
  1080. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1081. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1082. if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1083. if (skb->sk) {
  1084. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1085. iucv->sk_txnotify(skb, notification);
  1086. }
  1087. }
  1088. if (skb_queue_is_last(&buf->skb_list, skb))
  1089. skb = NULL;
  1090. else
  1091. skb = skb_queue_next(&buf->skb_list, skb);
  1092. }
  1093. out:
  1094. return;
  1095. }
  1096. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1097. {
  1098. struct sk_buff *skb;
  1099. struct iucv_sock *iucv;
  1100. int notify_general_error = 0;
  1101. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1102. notify_general_error = 1;
  1103. /* release may never happen from within CQ tasklet scope */
  1104. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1105. skb = skb_dequeue(&buf->skb_list);
  1106. while (skb) {
  1107. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1108. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1109. if (notify_general_error &&
  1110. be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1111. if (skb->sk) {
  1112. iucv = iucv_sk(skb->sk);
  1113. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1114. }
  1115. }
  1116. refcount_dec(&skb->users);
  1117. dev_kfree_skb_any(skb);
  1118. skb = skb_dequeue(&buf->skb_list);
  1119. }
  1120. }
  1121. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1122. struct qeth_qdio_out_buffer *buf,
  1123. enum qeth_qdio_buffer_states newbufstate)
  1124. {
  1125. int i;
  1126. /* is PCI flag set on buffer? */
  1127. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1128. atomic_dec(&queue->set_pci_flags_count);
  1129. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1130. qeth_release_skbs(buf);
  1131. }
  1132. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1133. if (buf->buffer->element[i].addr && buf->is_header[i])
  1134. kmem_cache_free(qeth_core_header_cache,
  1135. buf->buffer->element[i].addr);
  1136. buf->is_header[i] = 0;
  1137. buf->buffer->element[i].length = 0;
  1138. buf->buffer->element[i].addr = NULL;
  1139. buf->buffer->element[i].eflags = 0;
  1140. buf->buffer->element[i].sflags = 0;
  1141. }
  1142. buf->buffer->element[15].eflags = 0;
  1143. buf->buffer->element[15].sflags = 0;
  1144. buf->next_element_to_fill = 0;
  1145. atomic_set(&buf->state, newbufstate);
  1146. }
  1147. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1148. {
  1149. int j;
  1150. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1151. if (!q->bufs[j])
  1152. continue;
  1153. qeth_cleanup_handled_pending(q, j, 1);
  1154. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1155. if (free) {
  1156. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1157. q->bufs[j] = NULL;
  1158. }
  1159. }
  1160. }
  1161. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1162. {
  1163. int i;
  1164. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1165. /* clear outbound buffers to free skbs */
  1166. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1167. if (card->qdio.out_qs[i]) {
  1168. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1169. }
  1170. }
  1171. }
  1172. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1173. static void qeth_free_buffer_pool(struct qeth_card *card)
  1174. {
  1175. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1176. int i = 0;
  1177. list_for_each_entry_safe(pool_entry, tmp,
  1178. &card->qdio.init_pool.entry_list, init_list){
  1179. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1180. free_page((unsigned long)pool_entry->elements[i]);
  1181. list_del(&pool_entry->init_list);
  1182. kfree(pool_entry);
  1183. }
  1184. }
  1185. static void qeth_clean_channel(struct qeth_channel *channel)
  1186. {
  1187. int cnt;
  1188. QETH_DBF_TEXT(SETUP, 2, "freech");
  1189. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1190. kfree(channel->iob[cnt].data);
  1191. }
  1192. static void qeth_set_single_write_queues(struct qeth_card *card)
  1193. {
  1194. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1195. (card->qdio.no_out_queues == 4))
  1196. qeth_free_qdio_buffers(card);
  1197. card->qdio.no_out_queues = 1;
  1198. if (card->qdio.default_out_queue != 0)
  1199. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1200. card->qdio.default_out_queue = 0;
  1201. }
  1202. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1203. {
  1204. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1205. (card->qdio.no_out_queues == 1)) {
  1206. qeth_free_qdio_buffers(card);
  1207. card->qdio.default_out_queue = 2;
  1208. }
  1209. card->qdio.no_out_queues = 4;
  1210. }
  1211. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1212. {
  1213. struct ccw_device *ccwdev;
  1214. struct channel_path_desc *chp_dsc;
  1215. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1216. ccwdev = card->data.ccwdev;
  1217. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1218. if (!chp_dsc)
  1219. goto out;
  1220. card->info.func_level = 0x4100 + chp_dsc->desc;
  1221. if (card->info.type == QETH_CARD_TYPE_IQD)
  1222. goto out;
  1223. /* CHPP field bit 6 == 1 -> single queue */
  1224. if ((chp_dsc->chpp & 0x02) == 0x02)
  1225. qeth_set_single_write_queues(card);
  1226. else
  1227. qeth_set_multiple_write_queues(card);
  1228. out:
  1229. kfree(chp_dsc);
  1230. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1231. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1232. }
  1233. static void qeth_init_qdio_info(struct qeth_card *card)
  1234. {
  1235. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1236. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1237. /* inbound */
  1238. card->qdio.no_in_queues = 1;
  1239. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1240. if (card->info.type == QETH_CARD_TYPE_IQD)
  1241. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1242. else
  1243. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1244. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1245. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1246. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1247. }
  1248. static void qeth_set_intial_options(struct qeth_card *card)
  1249. {
  1250. card->options.route4.type = NO_ROUTER;
  1251. card->options.route6.type = NO_ROUTER;
  1252. card->options.fake_broadcast = 0;
  1253. card->options.performance_stats = 0;
  1254. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1255. card->options.isolation = ISOLATION_MODE_NONE;
  1256. card->options.cq = QETH_CQ_DISABLED;
  1257. }
  1258. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1259. {
  1260. unsigned long flags;
  1261. int rc = 0;
  1262. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1263. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1264. (u8) card->thread_start_mask,
  1265. (u8) card->thread_allowed_mask,
  1266. (u8) card->thread_running_mask);
  1267. rc = (card->thread_start_mask & thread);
  1268. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1269. return rc;
  1270. }
  1271. static void qeth_start_kernel_thread(struct work_struct *work)
  1272. {
  1273. struct task_struct *ts;
  1274. struct qeth_card *card = container_of(work, struct qeth_card,
  1275. kernel_thread_starter);
  1276. QETH_CARD_TEXT(card , 2, "strthrd");
  1277. if (card->read.state != CH_STATE_UP &&
  1278. card->write.state != CH_STATE_UP)
  1279. return;
  1280. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1281. ts = kthread_run(card->discipline->recover, (void *)card,
  1282. "qeth_recover");
  1283. if (IS_ERR(ts)) {
  1284. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1285. qeth_clear_thread_running_bit(card,
  1286. QETH_RECOVER_THREAD);
  1287. }
  1288. }
  1289. }
  1290. static void qeth_buffer_reclaim_work(struct work_struct *);
  1291. static int qeth_setup_card(struct qeth_card *card)
  1292. {
  1293. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1294. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1295. card->read.state = CH_STATE_DOWN;
  1296. card->write.state = CH_STATE_DOWN;
  1297. card->data.state = CH_STATE_DOWN;
  1298. card->state = CARD_STATE_DOWN;
  1299. card->lan_online = 0;
  1300. card->read_or_write_problem = 0;
  1301. card->dev = NULL;
  1302. spin_lock_init(&card->vlanlock);
  1303. spin_lock_init(&card->mclock);
  1304. spin_lock_init(&card->lock);
  1305. spin_lock_init(&card->ip_lock);
  1306. spin_lock_init(&card->thread_mask_lock);
  1307. mutex_init(&card->conf_mutex);
  1308. mutex_init(&card->discipline_mutex);
  1309. card->thread_start_mask = 0;
  1310. card->thread_allowed_mask = 0;
  1311. card->thread_running_mask = 0;
  1312. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1313. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1314. init_waitqueue_head(&card->wait_q);
  1315. /* initial options */
  1316. qeth_set_intial_options(card);
  1317. /* IP address takeover */
  1318. INIT_LIST_HEAD(&card->ipato.entries);
  1319. card->ipato.enabled = false;
  1320. card->ipato.invert4 = false;
  1321. card->ipato.invert6 = false;
  1322. /* init QDIO stuff */
  1323. qeth_init_qdio_info(card);
  1324. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1325. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1326. return 0;
  1327. }
  1328. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1329. {
  1330. struct qeth_card *card = container_of(slr, struct qeth_card,
  1331. qeth_service_level);
  1332. if (card->info.mcl_level[0])
  1333. seq_printf(m, "qeth: %s firmware level %s\n",
  1334. CARD_BUS_ID(card), card->info.mcl_level);
  1335. }
  1336. static struct qeth_card *qeth_alloc_card(void)
  1337. {
  1338. struct qeth_card *card;
  1339. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1340. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1341. if (!card)
  1342. goto out;
  1343. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1344. if (qeth_setup_channel(&card->read))
  1345. goto out_ip;
  1346. if (qeth_setup_channel(&card->write))
  1347. goto out_channel;
  1348. card->options.layer2 = -1;
  1349. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1350. register_service_level(&card->qeth_service_level);
  1351. return card;
  1352. out_channel:
  1353. qeth_clean_channel(&card->read);
  1354. out_ip:
  1355. kfree(card);
  1356. out:
  1357. return NULL;
  1358. }
  1359. static void qeth_determine_card_type(struct qeth_card *card)
  1360. {
  1361. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1362. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1363. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1364. card->info.type = CARD_RDEV(card)->id.driver_info;
  1365. card->qdio.no_out_queues = QETH_MAX_QUEUES;
  1366. if (card->info.type == QETH_CARD_TYPE_IQD)
  1367. card->info.is_multicast_different = 0x0103;
  1368. qeth_update_from_chp_desc(card);
  1369. }
  1370. static int qeth_clear_channel(struct qeth_channel *channel)
  1371. {
  1372. unsigned long flags;
  1373. struct qeth_card *card;
  1374. int rc;
  1375. card = CARD_FROM_CDEV(channel->ccwdev);
  1376. QETH_CARD_TEXT(card, 3, "clearch");
  1377. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1378. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1379. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1380. if (rc)
  1381. return rc;
  1382. rc = wait_event_interruptible_timeout(card->wait_q,
  1383. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1384. if (rc == -ERESTARTSYS)
  1385. return rc;
  1386. if (channel->state != CH_STATE_STOPPED)
  1387. return -ETIME;
  1388. channel->state = CH_STATE_DOWN;
  1389. return 0;
  1390. }
  1391. static int qeth_halt_channel(struct qeth_channel *channel)
  1392. {
  1393. unsigned long flags;
  1394. struct qeth_card *card;
  1395. int rc;
  1396. card = CARD_FROM_CDEV(channel->ccwdev);
  1397. QETH_CARD_TEXT(card, 3, "haltch");
  1398. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1399. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1400. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1401. if (rc)
  1402. return rc;
  1403. rc = wait_event_interruptible_timeout(card->wait_q,
  1404. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1405. if (rc == -ERESTARTSYS)
  1406. return rc;
  1407. if (channel->state != CH_STATE_HALTED)
  1408. return -ETIME;
  1409. return 0;
  1410. }
  1411. static int qeth_halt_channels(struct qeth_card *card)
  1412. {
  1413. int rc1 = 0, rc2 = 0, rc3 = 0;
  1414. QETH_CARD_TEXT(card, 3, "haltchs");
  1415. rc1 = qeth_halt_channel(&card->read);
  1416. rc2 = qeth_halt_channel(&card->write);
  1417. rc3 = qeth_halt_channel(&card->data);
  1418. if (rc1)
  1419. return rc1;
  1420. if (rc2)
  1421. return rc2;
  1422. return rc3;
  1423. }
  1424. static int qeth_clear_channels(struct qeth_card *card)
  1425. {
  1426. int rc1 = 0, rc2 = 0, rc3 = 0;
  1427. QETH_CARD_TEXT(card, 3, "clearchs");
  1428. rc1 = qeth_clear_channel(&card->read);
  1429. rc2 = qeth_clear_channel(&card->write);
  1430. rc3 = qeth_clear_channel(&card->data);
  1431. if (rc1)
  1432. return rc1;
  1433. if (rc2)
  1434. return rc2;
  1435. return rc3;
  1436. }
  1437. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1438. {
  1439. int rc = 0;
  1440. QETH_CARD_TEXT(card, 3, "clhacrd");
  1441. if (halt)
  1442. rc = qeth_halt_channels(card);
  1443. if (rc)
  1444. return rc;
  1445. return qeth_clear_channels(card);
  1446. }
  1447. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1448. {
  1449. int rc = 0;
  1450. QETH_CARD_TEXT(card, 3, "qdioclr");
  1451. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1452. QETH_QDIO_CLEANING)) {
  1453. case QETH_QDIO_ESTABLISHED:
  1454. if (card->info.type == QETH_CARD_TYPE_IQD)
  1455. rc = qdio_shutdown(CARD_DDEV(card),
  1456. QDIO_FLAG_CLEANUP_USING_HALT);
  1457. else
  1458. rc = qdio_shutdown(CARD_DDEV(card),
  1459. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1460. if (rc)
  1461. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1462. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1463. break;
  1464. case QETH_QDIO_CLEANING:
  1465. return rc;
  1466. default:
  1467. break;
  1468. }
  1469. rc = qeth_clear_halt_card(card, use_halt);
  1470. if (rc)
  1471. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1472. card->state = CARD_STATE_DOWN;
  1473. return rc;
  1474. }
  1475. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1476. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1477. int *length)
  1478. {
  1479. struct ciw *ciw;
  1480. char *rcd_buf;
  1481. int ret;
  1482. struct qeth_channel *channel = &card->data;
  1483. unsigned long flags;
  1484. /*
  1485. * scan for RCD command in extended SenseID data
  1486. */
  1487. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1488. if (!ciw || ciw->cmd == 0)
  1489. return -EOPNOTSUPP;
  1490. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1491. if (!rcd_buf)
  1492. return -ENOMEM;
  1493. channel->ccw.cmd_code = ciw->cmd;
  1494. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1495. channel->ccw.count = ciw->count;
  1496. channel->ccw.flags = CCW_FLAG_SLI;
  1497. channel->state = CH_STATE_RCD;
  1498. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1499. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1500. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1501. QETH_RCD_TIMEOUT);
  1502. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1503. if (!ret)
  1504. wait_event(card->wait_q,
  1505. (channel->state == CH_STATE_RCD_DONE ||
  1506. channel->state == CH_STATE_DOWN));
  1507. if (channel->state == CH_STATE_DOWN)
  1508. ret = -EIO;
  1509. else
  1510. channel->state = CH_STATE_DOWN;
  1511. if (ret) {
  1512. kfree(rcd_buf);
  1513. *buffer = NULL;
  1514. *length = 0;
  1515. } else {
  1516. *length = ciw->count;
  1517. *buffer = rcd_buf;
  1518. }
  1519. return ret;
  1520. }
  1521. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1522. {
  1523. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1524. card->info.chpid = prcd[30];
  1525. card->info.unit_addr2 = prcd[31];
  1526. card->info.cula = prcd[63];
  1527. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1528. (prcd[0x11] == _ascebc['M']));
  1529. }
  1530. static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
  1531. {
  1532. enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
  1533. struct diag26c_vnic_resp *response = NULL;
  1534. struct diag26c_vnic_req *request = NULL;
  1535. struct ccw_dev_id id;
  1536. char userid[80];
  1537. int rc = 0;
  1538. QETH_DBF_TEXT(SETUP, 2, "vmlayer");
  1539. cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
  1540. if (rc)
  1541. goto out;
  1542. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  1543. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  1544. if (!request || !response) {
  1545. rc = -ENOMEM;
  1546. goto out;
  1547. }
  1548. ccw_device_get_id(CARD_RDEV(card), &id);
  1549. request->resp_buf_len = sizeof(*response);
  1550. request->resp_version = DIAG26C_VERSION6_VM65918;
  1551. request->req_format = DIAG26C_VNIC_INFO;
  1552. ASCEBC(userid, 8);
  1553. memcpy(&request->sys_name, userid, 8);
  1554. request->devno = id.devno;
  1555. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  1556. rc = diag26c(request, response, DIAG26C_PORT_VNIC);
  1557. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  1558. if (rc)
  1559. goto out;
  1560. QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
  1561. if (request->resp_buf_len < sizeof(*response) ||
  1562. response->version != request->resp_version) {
  1563. rc = -EIO;
  1564. goto out;
  1565. }
  1566. if (response->protocol == VNIC_INFO_PROT_L2)
  1567. disc = QETH_DISCIPLINE_LAYER2;
  1568. else if (response->protocol == VNIC_INFO_PROT_L3)
  1569. disc = QETH_DISCIPLINE_LAYER3;
  1570. out:
  1571. kfree(response);
  1572. kfree(request);
  1573. if (rc)
  1574. QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
  1575. return disc;
  1576. }
  1577. /* Determine whether the device requires a specific layer discipline */
  1578. static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
  1579. {
  1580. enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
  1581. if (card->info.type == QETH_CARD_TYPE_OSM ||
  1582. card->info.type == QETH_CARD_TYPE_OSN)
  1583. disc = QETH_DISCIPLINE_LAYER2;
  1584. else if (card->info.guestlan)
  1585. disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
  1586. QETH_DISCIPLINE_LAYER3 :
  1587. qeth_vm_detect_layer(card);
  1588. switch (disc) {
  1589. case QETH_DISCIPLINE_LAYER2:
  1590. QETH_DBF_TEXT(SETUP, 3, "force l2");
  1591. break;
  1592. case QETH_DISCIPLINE_LAYER3:
  1593. QETH_DBF_TEXT(SETUP, 3, "force l3");
  1594. break;
  1595. default:
  1596. QETH_DBF_TEXT(SETUP, 3, "force no");
  1597. }
  1598. return disc;
  1599. }
  1600. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1601. {
  1602. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1603. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1604. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1605. card->info.blkt.time_total = 0;
  1606. card->info.blkt.inter_packet = 0;
  1607. card->info.blkt.inter_packet_jumbo = 0;
  1608. } else {
  1609. card->info.blkt.time_total = 250;
  1610. card->info.blkt.inter_packet = 5;
  1611. card->info.blkt.inter_packet_jumbo = 15;
  1612. }
  1613. }
  1614. static void qeth_init_tokens(struct qeth_card *card)
  1615. {
  1616. card->token.issuer_rm_w = 0x00010103UL;
  1617. card->token.cm_filter_w = 0x00010108UL;
  1618. card->token.cm_connection_w = 0x0001010aUL;
  1619. card->token.ulp_filter_w = 0x0001010bUL;
  1620. card->token.ulp_connection_w = 0x0001010dUL;
  1621. }
  1622. static void qeth_init_func_level(struct qeth_card *card)
  1623. {
  1624. switch (card->info.type) {
  1625. case QETH_CARD_TYPE_IQD:
  1626. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1627. break;
  1628. case QETH_CARD_TYPE_OSD:
  1629. case QETH_CARD_TYPE_OSN:
  1630. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1631. break;
  1632. default:
  1633. break;
  1634. }
  1635. }
  1636. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1637. void (*idx_reply_cb)(struct qeth_channel *,
  1638. struct qeth_cmd_buffer *))
  1639. {
  1640. struct qeth_cmd_buffer *iob;
  1641. unsigned long flags;
  1642. int rc;
  1643. struct qeth_card *card;
  1644. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1645. card = CARD_FROM_CDEV(channel->ccwdev);
  1646. iob = qeth_get_buffer(channel);
  1647. if (!iob)
  1648. return -ENOMEM;
  1649. iob->callback = idx_reply_cb;
  1650. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1651. channel->ccw.count = QETH_BUFSIZE;
  1652. channel->ccw.cda = (__u32) __pa(iob->data);
  1653. wait_event(card->wait_q,
  1654. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1655. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1656. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1657. rc = ccw_device_start(channel->ccwdev,
  1658. &channel->ccw, (addr_t) iob, 0, 0);
  1659. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1660. if (rc) {
  1661. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1662. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1663. atomic_set(&channel->irq_pending, 0);
  1664. wake_up(&card->wait_q);
  1665. return rc;
  1666. }
  1667. rc = wait_event_interruptible_timeout(card->wait_q,
  1668. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1669. if (rc == -ERESTARTSYS)
  1670. return rc;
  1671. if (channel->state != CH_STATE_UP) {
  1672. rc = -ETIME;
  1673. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1674. qeth_clear_cmd_buffers(channel);
  1675. } else
  1676. rc = 0;
  1677. return rc;
  1678. }
  1679. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1680. void (*idx_reply_cb)(struct qeth_channel *,
  1681. struct qeth_cmd_buffer *))
  1682. {
  1683. struct qeth_card *card;
  1684. struct qeth_cmd_buffer *iob;
  1685. unsigned long flags;
  1686. __u16 temp;
  1687. __u8 tmp;
  1688. int rc;
  1689. struct ccw_dev_id temp_devid;
  1690. card = CARD_FROM_CDEV(channel->ccwdev);
  1691. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1692. iob = qeth_get_buffer(channel);
  1693. if (!iob)
  1694. return -ENOMEM;
  1695. iob->callback = idx_reply_cb;
  1696. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1697. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1698. channel->ccw.cda = (__u32) __pa(iob->data);
  1699. if (channel == &card->write) {
  1700. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1701. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1702. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1703. card->seqno.trans_hdr++;
  1704. } else {
  1705. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1706. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1707. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1708. }
  1709. tmp = ((__u8)card->info.portno) | 0x80;
  1710. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1711. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1712. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1713. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1714. &card->info.func_level, sizeof(__u16));
  1715. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1716. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1717. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1718. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1719. wait_event(card->wait_q,
  1720. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1721. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1722. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1723. rc = ccw_device_start(channel->ccwdev,
  1724. &channel->ccw, (addr_t) iob, 0, 0);
  1725. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1726. if (rc) {
  1727. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1728. rc);
  1729. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1730. atomic_set(&channel->irq_pending, 0);
  1731. wake_up(&card->wait_q);
  1732. return rc;
  1733. }
  1734. rc = wait_event_interruptible_timeout(card->wait_q,
  1735. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1736. if (rc == -ERESTARTSYS)
  1737. return rc;
  1738. if (channel->state != CH_STATE_ACTIVATING) {
  1739. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1740. " failed to recover an error on the device\n");
  1741. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1742. dev_name(&channel->ccwdev->dev));
  1743. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1744. qeth_clear_cmd_buffers(channel);
  1745. return -ETIME;
  1746. }
  1747. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1748. }
  1749. static int qeth_peer_func_level(int level)
  1750. {
  1751. if ((level & 0xff) == 8)
  1752. return (level & 0xff) + 0x400;
  1753. if (((level >> 8) & 3) == 1)
  1754. return (level & 0xff) + 0x200;
  1755. return level;
  1756. }
  1757. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1758. struct qeth_cmd_buffer *iob)
  1759. {
  1760. struct qeth_card *card;
  1761. __u16 temp;
  1762. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1763. if (channel->state == CH_STATE_DOWN) {
  1764. channel->state = CH_STATE_ACTIVATING;
  1765. goto out;
  1766. }
  1767. card = CARD_FROM_CDEV(channel->ccwdev);
  1768. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1769. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1770. dev_err(&card->write.ccwdev->dev,
  1771. "The adapter is used exclusively by another "
  1772. "host\n");
  1773. else
  1774. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1775. " negative reply\n",
  1776. dev_name(&card->write.ccwdev->dev));
  1777. goto out;
  1778. }
  1779. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1780. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1781. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1782. "function level mismatch (sent: 0x%x, received: "
  1783. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1784. card->info.func_level, temp);
  1785. goto out;
  1786. }
  1787. channel->state = CH_STATE_UP;
  1788. out:
  1789. qeth_release_buffer(channel, iob);
  1790. }
  1791. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1792. struct qeth_cmd_buffer *iob)
  1793. {
  1794. struct qeth_card *card;
  1795. __u16 temp;
  1796. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1797. if (channel->state == CH_STATE_DOWN) {
  1798. channel->state = CH_STATE_ACTIVATING;
  1799. goto out;
  1800. }
  1801. card = CARD_FROM_CDEV(channel->ccwdev);
  1802. if (qeth_check_idx_response(card, iob->data))
  1803. goto out;
  1804. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1805. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1806. case QETH_IDX_ACT_ERR_EXCL:
  1807. dev_err(&card->write.ccwdev->dev,
  1808. "The adapter is used exclusively by another "
  1809. "host\n");
  1810. break;
  1811. case QETH_IDX_ACT_ERR_AUTH:
  1812. case QETH_IDX_ACT_ERR_AUTH_USER:
  1813. dev_err(&card->read.ccwdev->dev,
  1814. "Setting the device online failed because of "
  1815. "insufficient authorization\n");
  1816. break;
  1817. default:
  1818. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1819. " negative reply\n",
  1820. dev_name(&card->read.ccwdev->dev));
  1821. }
  1822. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1823. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1824. goto out;
  1825. }
  1826. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1827. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1828. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1829. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1830. dev_name(&card->read.ccwdev->dev),
  1831. card->info.func_level, temp);
  1832. goto out;
  1833. }
  1834. memcpy(&card->token.issuer_rm_r,
  1835. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1836. QETH_MPC_TOKEN_LENGTH);
  1837. memcpy(&card->info.mcl_level[0],
  1838. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1839. channel->state = CH_STATE_UP;
  1840. out:
  1841. qeth_release_buffer(channel, iob);
  1842. }
  1843. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1844. struct qeth_cmd_buffer *iob)
  1845. {
  1846. qeth_setup_ccw(&card->write, iob->data, len);
  1847. iob->callback = qeth_release_buffer;
  1848. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1849. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1850. card->seqno.trans_hdr++;
  1851. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1852. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1853. card->seqno.pdu_hdr++;
  1854. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1855. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1856. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1857. }
  1858. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1859. /**
  1860. * qeth_send_control_data() - send control command to the card
  1861. * @card: qeth_card structure pointer
  1862. * @len: size of the command buffer
  1863. * @iob: qeth_cmd_buffer pointer
  1864. * @reply_cb: callback function pointer
  1865. * @cb_card: pointer to the qeth_card structure
  1866. * @cb_reply: pointer to the qeth_reply structure
  1867. * @cb_cmd: pointer to the original iob for non-IPA
  1868. * commands, or to the qeth_ipa_cmd structure
  1869. * for the IPA commands.
  1870. * @reply_param: private pointer passed to the callback
  1871. *
  1872. * Returns the value of the `return_code' field of the response
  1873. * block returned from the hardware, or other error indication.
  1874. * Value of zero indicates successful execution of the command.
  1875. *
  1876. * Callback function gets called one or more times, with cb_cmd
  1877. * pointing to the response returned by the hardware. Callback
  1878. * function must return non-zero if more reply blocks are expected,
  1879. * and zero if the last or only reply block is received. Callback
  1880. * function can get the value of the reply_param pointer from the
  1881. * field 'param' of the structure qeth_reply.
  1882. */
  1883. int qeth_send_control_data(struct qeth_card *card, int len,
  1884. struct qeth_cmd_buffer *iob,
  1885. int (*reply_cb)(struct qeth_card *cb_card,
  1886. struct qeth_reply *cb_reply,
  1887. unsigned long cb_cmd),
  1888. void *reply_param)
  1889. {
  1890. int rc;
  1891. unsigned long flags;
  1892. struct qeth_reply *reply = NULL;
  1893. unsigned long timeout, event_timeout;
  1894. struct qeth_ipa_cmd *cmd = NULL;
  1895. QETH_CARD_TEXT(card, 2, "sendctl");
  1896. if (card->read_or_write_problem) {
  1897. qeth_release_buffer(iob->channel, iob);
  1898. return -EIO;
  1899. }
  1900. reply = qeth_alloc_reply(card);
  1901. if (!reply) {
  1902. return -ENOMEM;
  1903. }
  1904. reply->callback = reply_cb;
  1905. reply->param = reply_param;
  1906. init_waitqueue_head(&reply->wait_q);
  1907. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1908. if (IS_IPA(iob->data)) {
  1909. cmd = __ipa_cmd(iob);
  1910. cmd->hdr.seqno = card->seqno.ipa++;
  1911. reply->seqno = cmd->hdr.seqno;
  1912. event_timeout = QETH_IPA_TIMEOUT;
  1913. } else {
  1914. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1915. event_timeout = QETH_TIMEOUT;
  1916. }
  1917. qeth_prepare_control_data(card, len, iob);
  1918. spin_lock_irqsave(&card->lock, flags);
  1919. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1920. spin_unlock_irqrestore(&card->lock, flags);
  1921. timeout = jiffies + event_timeout;
  1922. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1923. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1924. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1925. (addr_t) iob, 0, 0);
  1926. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1927. if (rc) {
  1928. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1929. "ccw_device_start rc = %i\n",
  1930. dev_name(&card->write.ccwdev->dev), rc);
  1931. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1932. spin_lock_irqsave(&card->lock, flags);
  1933. list_del_init(&reply->list);
  1934. qeth_put_reply(reply);
  1935. spin_unlock_irqrestore(&card->lock, flags);
  1936. qeth_release_buffer(iob->channel, iob);
  1937. atomic_set(&card->write.irq_pending, 0);
  1938. wake_up(&card->wait_q);
  1939. return rc;
  1940. }
  1941. /* we have only one long running ipassist, since we can ensure
  1942. process context of this command we can sleep */
  1943. if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
  1944. cmd->hdr.prot_version == QETH_PROT_IPV4) {
  1945. if (!wait_event_timeout(reply->wait_q,
  1946. atomic_read(&reply->received), event_timeout))
  1947. goto time_err;
  1948. } else {
  1949. while (!atomic_read(&reply->received)) {
  1950. if (time_after(jiffies, timeout))
  1951. goto time_err;
  1952. cpu_relax();
  1953. }
  1954. }
  1955. if (reply->rc == -EIO)
  1956. goto error;
  1957. rc = reply->rc;
  1958. qeth_put_reply(reply);
  1959. return rc;
  1960. time_err:
  1961. reply->rc = -ETIME;
  1962. spin_lock_irqsave(&reply->card->lock, flags);
  1963. list_del_init(&reply->list);
  1964. spin_unlock_irqrestore(&reply->card->lock, flags);
  1965. atomic_inc(&reply->received);
  1966. error:
  1967. atomic_set(&card->write.irq_pending, 0);
  1968. qeth_release_buffer(iob->channel, iob);
  1969. card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
  1970. rc = reply->rc;
  1971. qeth_put_reply(reply);
  1972. return rc;
  1973. }
  1974. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1975. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1976. unsigned long data)
  1977. {
  1978. struct qeth_cmd_buffer *iob;
  1979. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1980. iob = (struct qeth_cmd_buffer *) data;
  1981. memcpy(&card->token.cm_filter_r,
  1982. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1983. QETH_MPC_TOKEN_LENGTH);
  1984. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1985. return 0;
  1986. }
  1987. static int qeth_cm_enable(struct qeth_card *card)
  1988. {
  1989. int rc;
  1990. struct qeth_cmd_buffer *iob;
  1991. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1992. iob = qeth_wait_for_buffer(&card->write);
  1993. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1994. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1995. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1996. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1997. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1998. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1999. qeth_cm_enable_cb, NULL);
  2000. return rc;
  2001. }
  2002. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2003. unsigned long data)
  2004. {
  2005. struct qeth_cmd_buffer *iob;
  2006. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  2007. iob = (struct qeth_cmd_buffer *) data;
  2008. memcpy(&card->token.cm_connection_r,
  2009. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  2010. QETH_MPC_TOKEN_LENGTH);
  2011. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2012. return 0;
  2013. }
  2014. static int qeth_cm_setup(struct qeth_card *card)
  2015. {
  2016. int rc;
  2017. struct qeth_cmd_buffer *iob;
  2018. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  2019. iob = qeth_wait_for_buffer(&card->write);
  2020. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  2021. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  2022. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  2023. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  2024. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  2025. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  2026. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  2027. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  2028. qeth_cm_setup_cb, NULL);
  2029. return rc;
  2030. }
  2031. static int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  2032. {
  2033. switch (card->info.type) {
  2034. case QETH_CARD_TYPE_IQD:
  2035. return card->info.max_mtu;
  2036. case QETH_CARD_TYPE_OSD:
  2037. case QETH_CARD_TYPE_OSX:
  2038. if (!card->options.layer2)
  2039. return ETH_DATA_LEN - 8; /* L3: allow for LLC + SNAP */
  2040. /* fall through */
  2041. default:
  2042. return ETH_DATA_LEN;
  2043. }
  2044. }
  2045. static int qeth_get_mtu_outof_framesize(int framesize)
  2046. {
  2047. switch (framesize) {
  2048. case 0x4000:
  2049. return 8192;
  2050. case 0x6000:
  2051. return 16384;
  2052. case 0xa000:
  2053. return 32768;
  2054. case 0xffff:
  2055. return 57344;
  2056. default:
  2057. return 0;
  2058. }
  2059. }
  2060. static int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  2061. {
  2062. switch (card->info.type) {
  2063. case QETH_CARD_TYPE_OSD:
  2064. case QETH_CARD_TYPE_OSM:
  2065. case QETH_CARD_TYPE_OSX:
  2066. case QETH_CARD_TYPE_IQD:
  2067. return ((mtu >= 576) &&
  2068. (mtu <= card->info.max_mtu));
  2069. case QETH_CARD_TYPE_OSN:
  2070. default:
  2071. return 1;
  2072. }
  2073. }
  2074. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2075. unsigned long data)
  2076. {
  2077. __u16 mtu, framesize;
  2078. __u16 len;
  2079. __u8 link_type;
  2080. struct qeth_cmd_buffer *iob;
  2081. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2082. iob = (struct qeth_cmd_buffer *) data;
  2083. memcpy(&card->token.ulp_filter_r,
  2084. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2085. QETH_MPC_TOKEN_LENGTH);
  2086. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2087. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2088. mtu = qeth_get_mtu_outof_framesize(framesize);
  2089. if (!mtu) {
  2090. iob->rc = -EINVAL;
  2091. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2092. return 0;
  2093. }
  2094. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2095. /* frame size has changed */
  2096. if (card->dev &&
  2097. ((card->dev->mtu == card->info.initial_mtu) ||
  2098. (card->dev->mtu > mtu)))
  2099. card->dev->mtu = mtu;
  2100. qeth_free_qdio_buffers(card);
  2101. }
  2102. card->info.initial_mtu = mtu;
  2103. card->info.max_mtu = mtu;
  2104. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2105. } else {
  2106. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2107. iob->data);
  2108. card->info.initial_mtu = min(card->info.max_mtu,
  2109. qeth_get_initial_mtu_for_card(card));
  2110. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2111. }
  2112. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2113. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2114. memcpy(&link_type,
  2115. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2116. card->info.link_type = link_type;
  2117. } else
  2118. card->info.link_type = 0;
  2119. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2120. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2121. return 0;
  2122. }
  2123. static int qeth_ulp_enable(struct qeth_card *card)
  2124. {
  2125. int rc;
  2126. char prot_type;
  2127. struct qeth_cmd_buffer *iob;
  2128. /*FIXME: trace view callbacks*/
  2129. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2130. iob = qeth_wait_for_buffer(&card->write);
  2131. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2132. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2133. (__u8) card->info.portno;
  2134. if (card->options.layer2)
  2135. if (card->info.type == QETH_CARD_TYPE_OSN)
  2136. prot_type = QETH_PROT_OSN2;
  2137. else
  2138. prot_type = QETH_PROT_LAYER2;
  2139. else
  2140. prot_type = QETH_PROT_TCPIP;
  2141. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2142. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2143. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2144. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2145. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2146. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2147. qeth_ulp_enable_cb, NULL);
  2148. return rc;
  2149. }
  2150. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2151. unsigned long data)
  2152. {
  2153. struct qeth_cmd_buffer *iob;
  2154. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2155. iob = (struct qeth_cmd_buffer *) data;
  2156. memcpy(&card->token.ulp_connection_r,
  2157. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2158. QETH_MPC_TOKEN_LENGTH);
  2159. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2160. 3)) {
  2161. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2162. dev_err(&card->gdev->dev, "A connection could not be "
  2163. "established because of an OLM limit\n");
  2164. iob->rc = -EMLINK;
  2165. }
  2166. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2167. return 0;
  2168. }
  2169. static int qeth_ulp_setup(struct qeth_card *card)
  2170. {
  2171. int rc;
  2172. __u16 temp;
  2173. struct qeth_cmd_buffer *iob;
  2174. struct ccw_dev_id dev_id;
  2175. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2176. iob = qeth_wait_for_buffer(&card->write);
  2177. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2178. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2179. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2180. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2181. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2182. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2183. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2184. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2185. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2186. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2187. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2188. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2189. qeth_ulp_setup_cb, NULL);
  2190. return rc;
  2191. }
  2192. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2193. {
  2194. int rc;
  2195. struct qeth_qdio_out_buffer *newbuf;
  2196. rc = 0;
  2197. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2198. if (!newbuf) {
  2199. rc = -ENOMEM;
  2200. goto out;
  2201. }
  2202. newbuf->buffer = q->qdio_bufs[bidx];
  2203. skb_queue_head_init(&newbuf->skb_list);
  2204. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2205. newbuf->q = q;
  2206. newbuf->aob = NULL;
  2207. newbuf->next_pending = q->bufs[bidx];
  2208. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2209. q->bufs[bidx] = newbuf;
  2210. if (q->bufstates) {
  2211. q->bufstates[bidx].user = newbuf;
  2212. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2213. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2214. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2215. (long) newbuf->next_pending);
  2216. }
  2217. out:
  2218. return rc;
  2219. }
  2220. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2221. {
  2222. if (!q)
  2223. return;
  2224. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2225. kfree(q);
  2226. }
  2227. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2228. {
  2229. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2230. if (!q)
  2231. return NULL;
  2232. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2233. kfree(q);
  2234. return NULL;
  2235. }
  2236. return q;
  2237. }
  2238. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2239. {
  2240. int i, j;
  2241. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2242. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2243. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2244. return 0;
  2245. QETH_DBF_TEXT(SETUP, 2, "inq");
  2246. card->qdio.in_q = qeth_alloc_qdio_queue();
  2247. if (!card->qdio.in_q)
  2248. goto out_nomem;
  2249. /* inbound buffer pool */
  2250. if (qeth_alloc_buffer_pool(card))
  2251. goto out_freeinq;
  2252. /* outbound */
  2253. card->qdio.out_qs =
  2254. kzalloc(card->qdio.no_out_queues *
  2255. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2256. if (!card->qdio.out_qs)
  2257. goto out_freepool;
  2258. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2259. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2260. if (!card->qdio.out_qs[i])
  2261. goto out_freeoutq;
  2262. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2263. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2264. card->qdio.out_qs[i]->queue_no = i;
  2265. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2266. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2267. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2268. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2269. goto out_freeoutqbufs;
  2270. }
  2271. }
  2272. /* completion */
  2273. if (qeth_alloc_cq(card))
  2274. goto out_freeoutq;
  2275. return 0;
  2276. out_freeoutqbufs:
  2277. while (j > 0) {
  2278. --j;
  2279. kmem_cache_free(qeth_qdio_outbuf_cache,
  2280. card->qdio.out_qs[i]->bufs[j]);
  2281. card->qdio.out_qs[i]->bufs[j] = NULL;
  2282. }
  2283. out_freeoutq:
  2284. while (i > 0) {
  2285. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2286. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2287. }
  2288. kfree(card->qdio.out_qs);
  2289. card->qdio.out_qs = NULL;
  2290. out_freepool:
  2291. qeth_free_buffer_pool(card);
  2292. out_freeinq:
  2293. qeth_free_qdio_queue(card->qdio.in_q);
  2294. card->qdio.in_q = NULL;
  2295. out_nomem:
  2296. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2297. return -ENOMEM;
  2298. }
  2299. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2300. {
  2301. int i, j;
  2302. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2303. QETH_QDIO_UNINITIALIZED)
  2304. return;
  2305. qeth_free_cq(card);
  2306. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2307. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2308. if (card->qdio.in_q->bufs[j].rx_skb)
  2309. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2310. }
  2311. qeth_free_qdio_queue(card->qdio.in_q);
  2312. card->qdio.in_q = NULL;
  2313. /* inbound buffer pool */
  2314. qeth_free_buffer_pool(card);
  2315. /* free outbound qdio_qs */
  2316. if (card->qdio.out_qs) {
  2317. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2318. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2319. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2320. }
  2321. kfree(card->qdio.out_qs);
  2322. card->qdio.out_qs = NULL;
  2323. }
  2324. }
  2325. static void qeth_create_qib_param_field(struct qeth_card *card,
  2326. char *param_field)
  2327. {
  2328. param_field[0] = _ascebc['P'];
  2329. param_field[1] = _ascebc['C'];
  2330. param_field[2] = _ascebc['I'];
  2331. param_field[3] = _ascebc['T'];
  2332. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2333. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2334. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2335. }
  2336. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2337. char *param_field)
  2338. {
  2339. param_field[16] = _ascebc['B'];
  2340. param_field[17] = _ascebc['L'];
  2341. param_field[18] = _ascebc['K'];
  2342. param_field[19] = _ascebc['T'];
  2343. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2344. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2345. *((unsigned int *) (&param_field[28])) =
  2346. card->info.blkt.inter_packet_jumbo;
  2347. }
  2348. static int qeth_qdio_activate(struct qeth_card *card)
  2349. {
  2350. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2351. return qdio_activate(CARD_DDEV(card));
  2352. }
  2353. static int qeth_dm_act(struct qeth_card *card)
  2354. {
  2355. int rc;
  2356. struct qeth_cmd_buffer *iob;
  2357. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2358. iob = qeth_wait_for_buffer(&card->write);
  2359. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2360. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2361. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2362. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2363. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2364. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2365. return rc;
  2366. }
  2367. static int qeth_mpc_initialize(struct qeth_card *card)
  2368. {
  2369. int rc;
  2370. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2371. rc = qeth_issue_next_read(card);
  2372. if (rc) {
  2373. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2374. return rc;
  2375. }
  2376. rc = qeth_cm_enable(card);
  2377. if (rc) {
  2378. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2379. goto out_qdio;
  2380. }
  2381. rc = qeth_cm_setup(card);
  2382. if (rc) {
  2383. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2384. goto out_qdio;
  2385. }
  2386. rc = qeth_ulp_enable(card);
  2387. if (rc) {
  2388. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2389. goto out_qdio;
  2390. }
  2391. rc = qeth_ulp_setup(card);
  2392. if (rc) {
  2393. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2394. goto out_qdio;
  2395. }
  2396. rc = qeth_alloc_qdio_buffers(card);
  2397. if (rc) {
  2398. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2399. goto out_qdio;
  2400. }
  2401. rc = qeth_qdio_establish(card);
  2402. if (rc) {
  2403. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2404. qeth_free_qdio_buffers(card);
  2405. goto out_qdio;
  2406. }
  2407. rc = qeth_qdio_activate(card);
  2408. if (rc) {
  2409. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2410. goto out_qdio;
  2411. }
  2412. rc = qeth_dm_act(card);
  2413. if (rc) {
  2414. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2415. goto out_qdio;
  2416. }
  2417. return 0;
  2418. out_qdio:
  2419. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2420. qdio_free(CARD_DDEV(card));
  2421. return rc;
  2422. }
  2423. void qeth_print_status_message(struct qeth_card *card)
  2424. {
  2425. switch (card->info.type) {
  2426. case QETH_CARD_TYPE_OSD:
  2427. case QETH_CARD_TYPE_OSM:
  2428. case QETH_CARD_TYPE_OSX:
  2429. /* VM will use a non-zero first character
  2430. * to indicate a HiperSockets like reporting
  2431. * of the level OSA sets the first character to zero
  2432. * */
  2433. if (!card->info.mcl_level[0]) {
  2434. sprintf(card->info.mcl_level, "%02x%02x",
  2435. card->info.mcl_level[2],
  2436. card->info.mcl_level[3]);
  2437. break;
  2438. }
  2439. /* fallthrough */
  2440. case QETH_CARD_TYPE_IQD:
  2441. if ((card->info.guestlan) ||
  2442. (card->info.mcl_level[0] & 0x80)) {
  2443. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2444. card->info.mcl_level[0]];
  2445. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2446. card->info.mcl_level[1]];
  2447. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2448. card->info.mcl_level[2]];
  2449. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2450. card->info.mcl_level[3]];
  2451. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2452. }
  2453. break;
  2454. default:
  2455. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2456. }
  2457. dev_info(&card->gdev->dev,
  2458. "Device is a%s card%s%s%s\nwith link type %s.\n",
  2459. qeth_get_cardname(card),
  2460. (card->info.mcl_level[0]) ? " (level: " : "",
  2461. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2462. (card->info.mcl_level[0]) ? ")" : "",
  2463. qeth_get_cardname_short(card));
  2464. }
  2465. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2466. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2467. {
  2468. struct qeth_buffer_pool_entry *entry;
  2469. QETH_CARD_TEXT(card, 5, "inwrklst");
  2470. list_for_each_entry(entry,
  2471. &card->qdio.init_pool.entry_list, init_list) {
  2472. qeth_put_buffer_pool_entry(card, entry);
  2473. }
  2474. }
  2475. static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2476. struct qeth_card *card)
  2477. {
  2478. struct list_head *plh;
  2479. struct qeth_buffer_pool_entry *entry;
  2480. int i, free;
  2481. struct page *page;
  2482. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2483. return NULL;
  2484. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2485. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2486. free = 1;
  2487. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2488. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2489. free = 0;
  2490. break;
  2491. }
  2492. }
  2493. if (free) {
  2494. list_del_init(&entry->list);
  2495. return entry;
  2496. }
  2497. }
  2498. /* no free buffer in pool so take first one and swap pages */
  2499. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2500. struct qeth_buffer_pool_entry, list);
  2501. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2502. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2503. page = alloc_page(GFP_ATOMIC);
  2504. if (!page) {
  2505. return NULL;
  2506. } else {
  2507. free_page((unsigned long)entry->elements[i]);
  2508. entry->elements[i] = page_address(page);
  2509. if (card->options.performance_stats)
  2510. card->perf_stats.sg_alloc_page_rx++;
  2511. }
  2512. }
  2513. }
  2514. list_del_init(&entry->list);
  2515. return entry;
  2516. }
  2517. static int qeth_init_input_buffer(struct qeth_card *card,
  2518. struct qeth_qdio_buffer *buf)
  2519. {
  2520. struct qeth_buffer_pool_entry *pool_entry;
  2521. int i;
  2522. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2523. buf->rx_skb = netdev_alloc_skb(card->dev,
  2524. QETH_RX_PULL_LEN + ETH_HLEN);
  2525. if (!buf->rx_skb)
  2526. return 1;
  2527. }
  2528. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2529. if (!pool_entry)
  2530. return 1;
  2531. /*
  2532. * since the buffer is accessed only from the input_tasklet
  2533. * there shouldn't be a need to synchronize; also, since we use
  2534. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2535. * buffers
  2536. */
  2537. buf->pool_entry = pool_entry;
  2538. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2539. buf->buffer->element[i].length = PAGE_SIZE;
  2540. buf->buffer->element[i].addr = pool_entry->elements[i];
  2541. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2542. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2543. else
  2544. buf->buffer->element[i].eflags = 0;
  2545. buf->buffer->element[i].sflags = 0;
  2546. }
  2547. return 0;
  2548. }
  2549. int qeth_init_qdio_queues(struct qeth_card *card)
  2550. {
  2551. int i, j;
  2552. int rc;
  2553. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2554. /* inbound queue */
  2555. qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2556. memset(&card->rx, 0, sizeof(struct qeth_rx));
  2557. qeth_initialize_working_pool_list(card);
  2558. /*give only as many buffers to hardware as we have buffer pool entries*/
  2559. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2560. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2561. card->qdio.in_q->next_buf_to_init =
  2562. card->qdio.in_buf_pool.buf_count - 1;
  2563. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2564. card->qdio.in_buf_pool.buf_count - 1);
  2565. if (rc) {
  2566. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2567. return rc;
  2568. }
  2569. /* completion */
  2570. rc = qeth_cq_init(card);
  2571. if (rc) {
  2572. return rc;
  2573. }
  2574. /* outbound queue */
  2575. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2576. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2577. QDIO_MAX_BUFFERS_PER_Q);
  2578. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2579. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2580. card->qdio.out_qs[i]->bufs[j],
  2581. QETH_QDIO_BUF_EMPTY);
  2582. }
  2583. card->qdio.out_qs[i]->card = card;
  2584. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2585. card->qdio.out_qs[i]->do_pack = 0;
  2586. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2587. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2588. atomic_set(&card->qdio.out_qs[i]->state,
  2589. QETH_OUT_Q_UNLOCKED);
  2590. }
  2591. return 0;
  2592. }
  2593. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2594. static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2595. {
  2596. switch (link_type) {
  2597. case QETH_LINK_TYPE_HSTR:
  2598. return 2;
  2599. default:
  2600. return 1;
  2601. }
  2602. }
  2603. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2604. struct qeth_ipa_cmd *cmd, __u8 command,
  2605. enum qeth_prot_versions prot)
  2606. {
  2607. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2608. cmd->hdr.command = command;
  2609. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2610. /* cmd->hdr.seqno is set by qeth_send_control_data() */
  2611. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2612. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2613. if (card->options.layer2)
  2614. cmd->hdr.prim_version_no = 2;
  2615. else
  2616. cmd->hdr.prim_version_no = 1;
  2617. cmd->hdr.param_count = 1;
  2618. cmd->hdr.prot_version = prot;
  2619. cmd->hdr.ipa_supported = 0;
  2620. cmd->hdr.ipa_enabled = 0;
  2621. }
  2622. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2623. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2624. {
  2625. struct qeth_cmd_buffer *iob;
  2626. iob = qeth_get_buffer(&card->write);
  2627. if (iob) {
  2628. qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
  2629. } else {
  2630. dev_warn(&card->gdev->dev,
  2631. "The qeth driver ran out of channel command buffers\n");
  2632. QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
  2633. dev_name(&card->gdev->dev));
  2634. }
  2635. return iob;
  2636. }
  2637. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2638. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2639. char prot_type)
  2640. {
  2641. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2642. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2643. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2644. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2645. }
  2646. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2647. /**
  2648. * qeth_send_ipa_cmd() - send an IPA command
  2649. *
  2650. * See qeth_send_control_data() for explanation of the arguments.
  2651. */
  2652. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2653. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2654. unsigned long),
  2655. void *reply_param)
  2656. {
  2657. int rc;
  2658. char prot_type;
  2659. QETH_CARD_TEXT(card, 4, "sendipa");
  2660. if (card->options.layer2)
  2661. if (card->info.type == QETH_CARD_TYPE_OSN)
  2662. prot_type = QETH_PROT_OSN2;
  2663. else
  2664. prot_type = QETH_PROT_LAYER2;
  2665. else
  2666. prot_type = QETH_PROT_TCPIP;
  2667. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2668. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2669. iob, reply_cb, reply_param);
  2670. if (rc == -ETIME) {
  2671. qeth_clear_ipacmd_list(card);
  2672. qeth_schedule_recovery(card);
  2673. }
  2674. return rc;
  2675. }
  2676. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2677. static int qeth_send_startlan(struct qeth_card *card)
  2678. {
  2679. int rc;
  2680. struct qeth_cmd_buffer *iob;
  2681. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2682. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2683. if (!iob)
  2684. return -ENOMEM;
  2685. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2686. return rc;
  2687. }
  2688. static int qeth_default_setadapterparms_cb(struct qeth_card *card,
  2689. struct qeth_reply *reply, unsigned long data)
  2690. {
  2691. struct qeth_ipa_cmd *cmd;
  2692. QETH_CARD_TEXT(card, 4, "defadpcb");
  2693. cmd = (struct qeth_ipa_cmd *) data;
  2694. if (cmd->hdr.return_code == 0)
  2695. cmd->hdr.return_code =
  2696. cmd->data.setadapterparms.hdr.return_code;
  2697. return 0;
  2698. }
  2699. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2700. struct qeth_reply *reply, unsigned long data)
  2701. {
  2702. struct qeth_ipa_cmd *cmd;
  2703. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2704. cmd = (struct qeth_ipa_cmd *) data;
  2705. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2706. card->info.link_type =
  2707. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2708. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2709. }
  2710. card->options.adp.supported_funcs =
  2711. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2712. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  2713. }
  2714. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2715. __u32 command, __u32 cmdlen)
  2716. {
  2717. struct qeth_cmd_buffer *iob;
  2718. struct qeth_ipa_cmd *cmd;
  2719. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2720. QETH_PROT_IPV4);
  2721. if (iob) {
  2722. cmd = __ipa_cmd(iob);
  2723. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2724. cmd->data.setadapterparms.hdr.command_code = command;
  2725. cmd->data.setadapterparms.hdr.used_total = 1;
  2726. cmd->data.setadapterparms.hdr.seq_no = 1;
  2727. }
  2728. return iob;
  2729. }
  2730. int qeth_query_setadapterparms(struct qeth_card *card)
  2731. {
  2732. int rc;
  2733. struct qeth_cmd_buffer *iob;
  2734. QETH_CARD_TEXT(card, 3, "queryadp");
  2735. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2736. sizeof(struct qeth_ipacmd_setadpparms));
  2737. if (!iob)
  2738. return -ENOMEM;
  2739. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2740. return rc;
  2741. }
  2742. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2743. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2744. struct qeth_reply *reply, unsigned long data)
  2745. {
  2746. struct qeth_ipa_cmd *cmd;
  2747. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2748. cmd = (struct qeth_ipa_cmd *) data;
  2749. switch (cmd->hdr.return_code) {
  2750. case IPA_RC_NOTSUPP:
  2751. case IPA_RC_L2_UNSUPPORTED_CMD:
  2752. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2753. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2754. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2755. return -0;
  2756. default:
  2757. if (cmd->hdr.return_code) {
  2758. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2759. "rc=%d\n",
  2760. dev_name(&card->gdev->dev),
  2761. cmd->hdr.return_code);
  2762. return 0;
  2763. }
  2764. }
  2765. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2766. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2767. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2768. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2769. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2770. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2771. } else
  2772. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2773. "\n", dev_name(&card->gdev->dev));
  2774. return 0;
  2775. }
  2776. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2777. {
  2778. int rc;
  2779. struct qeth_cmd_buffer *iob;
  2780. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2781. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2782. if (!iob)
  2783. return -ENOMEM;
  2784. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2785. return rc;
  2786. }
  2787. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2788. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2789. struct qeth_reply *reply, unsigned long data)
  2790. {
  2791. struct qeth_ipa_cmd *cmd;
  2792. struct qeth_switch_info *sw_info;
  2793. struct qeth_query_switch_attributes *attrs;
  2794. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2795. cmd = (struct qeth_ipa_cmd *) data;
  2796. sw_info = (struct qeth_switch_info *)reply->param;
  2797. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  2798. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2799. sw_info->capabilities = attrs->capabilities;
  2800. sw_info->settings = attrs->settings;
  2801. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2802. sw_info->settings);
  2803. }
  2804. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  2805. return 0;
  2806. }
  2807. int qeth_query_switch_attributes(struct qeth_card *card,
  2808. struct qeth_switch_info *sw_info)
  2809. {
  2810. struct qeth_cmd_buffer *iob;
  2811. QETH_CARD_TEXT(card, 2, "qswiattr");
  2812. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2813. return -EOPNOTSUPP;
  2814. if (!netif_carrier_ok(card->dev))
  2815. return -ENOMEDIUM;
  2816. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2817. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2818. if (!iob)
  2819. return -ENOMEM;
  2820. return qeth_send_ipa_cmd(card, iob,
  2821. qeth_query_switch_attributes_cb, sw_info);
  2822. }
  2823. EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
  2824. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2825. struct qeth_reply *reply, unsigned long data)
  2826. {
  2827. struct qeth_ipa_cmd *cmd;
  2828. __u16 rc;
  2829. cmd = (struct qeth_ipa_cmd *)data;
  2830. rc = cmd->hdr.return_code;
  2831. if (rc)
  2832. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2833. else
  2834. card->info.diagass_support = cmd->data.diagass.ext;
  2835. return 0;
  2836. }
  2837. static int qeth_query_setdiagass(struct qeth_card *card)
  2838. {
  2839. struct qeth_cmd_buffer *iob;
  2840. struct qeth_ipa_cmd *cmd;
  2841. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2842. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2843. if (!iob)
  2844. return -ENOMEM;
  2845. cmd = __ipa_cmd(iob);
  2846. cmd->data.diagass.subcmd_len = 16;
  2847. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2848. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2849. }
  2850. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2851. {
  2852. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2853. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2854. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2855. struct ccw_dev_id ccwid;
  2856. int level;
  2857. tid->chpid = card->info.chpid;
  2858. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2859. tid->ssid = ccwid.ssid;
  2860. tid->devno = ccwid.devno;
  2861. if (!info)
  2862. return;
  2863. level = stsi(NULL, 0, 0, 0);
  2864. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2865. tid->lparnr = info222->lpar_number;
  2866. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2867. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2868. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2869. }
  2870. free_page(info);
  2871. return;
  2872. }
  2873. static int qeth_hw_trap_cb(struct qeth_card *card,
  2874. struct qeth_reply *reply, unsigned long data)
  2875. {
  2876. struct qeth_ipa_cmd *cmd;
  2877. __u16 rc;
  2878. cmd = (struct qeth_ipa_cmd *)data;
  2879. rc = cmd->hdr.return_code;
  2880. if (rc)
  2881. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2882. return 0;
  2883. }
  2884. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2885. {
  2886. struct qeth_cmd_buffer *iob;
  2887. struct qeth_ipa_cmd *cmd;
  2888. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2889. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2890. if (!iob)
  2891. return -ENOMEM;
  2892. cmd = __ipa_cmd(iob);
  2893. cmd->data.diagass.subcmd_len = 80;
  2894. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2895. cmd->data.diagass.type = 1;
  2896. cmd->data.diagass.action = action;
  2897. switch (action) {
  2898. case QETH_DIAGS_TRAP_ARM:
  2899. cmd->data.diagass.options = 0x0003;
  2900. cmd->data.diagass.ext = 0x00010000 +
  2901. sizeof(struct qeth_trap_id);
  2902. qeth_get_trap_id(card,
  2903. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2904. break;
  2905. case QETH_DIAGS_TRAP_DISARM:
  2906. cmd->data.diagass.options = 0x0001;
  2907. break;
  2908. case QETH_DIAGS_TRAP_CAPTURE:
  2909. break;
  2910. }
  2911. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2912. }
  2913. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2914. static int qeth_check_qdio_errors(struct qeth_card *card,
  2915. struct qdio_buffer *buf,
  2916. unsigned int qdio_error,
  2917. const char *dbftext)
  2918. {
  2919. if (qdio_error) {
  2920. QETH_CARD_TEXT(card, 2, dbftext);
  2921. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2922. buf->element[15].sflags);
  2923. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2924. buf->element[14].sflags);
  2925. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2926. if ((buf->element[15].sflags) == 0x12) {
  2927. card->stats.rx_dropped++;
  2928. return 0;
  2929. } else
  2930. return 1;
  2931. }
  2932. return 0;
  2933. }
  2934. static void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2935. {
  2936. struct qeth_qdio_q *queue = card->qdio.in_q;
  2937. struct list_head *lh;
  2938. int count;
  2939. int i;
  2940. int rc;
  2941. int newcount = 0;
  2942. count = (index < queue->next_buf_to_init)?
  2943. card->qdio.in_buf_pool.buf_count -
  2944. (queue->next_buf_to_init - index) :
  2945. card->qdio.in_buf_pool.buf_count -
  2946. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2947. /* only requeue at a certain threshold to avoid SIGAs */
  2948. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2949. for (i = queue->next_buf_to_init;
  2950. i < queue->next_buf_to_init + count; ++i) {
  2951. if (qeth_init_input_buffer(card,
  2952. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2953. break;
  2954. } else {
  2955. newcount++;
  2956. }
  2957. }
  2958. if (newcount < count) {
  2959. /* we are in memory shortage so we switch back to
  2960. traditional skb allocation and drop packages */
  2961. atomic_set(&card->force_alloc_skb, 3);
  2962. count = newcount;
  2963. } else {
  2964. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2965. }
  2966. if (!count) {
  2967. i = 0;
  2968. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2969. i++;
  2970. if (i == card->qdio.in_buf_pool.buf_count) {
  2971. QETH_CARD_TEXT(card, 2, "qsarbw");
  2972. card->reclaim_index = index;
  2973. schedule_delayed_work(
  2974. &card->buffer_reclaim_work,
  2975. QETH_RECLAIM_WORK_TIME);
  2976. }
  2977. return;
  2978. }
  2979. /*
  2980. * according to old code it should be avoided to requeue all
  2981. * 128 buffers in order to benefit from PCI avoidance.
  2982. * this function keeps at least one buffer (the buffer at
  2983. * 'index') un-requeued -> this buffer is the first buffer that
  2984. * will be requeued the next time
  2985. */
  2986. if (card->options.performance_stats) {
  2987. card->perf_stats.inbound_do_qdio_cnt++;
  2988. card->perf_stats.inbound_do_qdio_start_time =
  2989. qeth_get_micros();
  2990. }
  2991. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2992. queue->next_buf_to_init, count);
  2993. if (card->options.performance_stats)
  2994. card->perf_stats.inbound_do_qdio_time +=
  2995. qeth_get_micros() -
  2996. card->perf_stats.inbound_do_qdio_start_time;
  2997. if (rc) {
  2998. QETH_CARD_TEXT(card, 2, "qinberr");
  2999. }
  3000. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  3001. QDIO_MAX_BUFFERS_PER_Q;
  3002. }
  3003. }
  3004. static void qeth_buffer_reclaim_work(struct work_struct *work)
  3005. {
  3006. struct qeth_card *card = container_of(work, struct qeth_card,
  3007. buffer_reclaim_work.work);
  3008. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  3009. qeth_queue_input_buffer(card, card->reclaim_index);
  3010. }
  3011. static void qeth_handle_send_error(struct qeth_card *card,
  3012. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  3013. {
  3014. int sbalf15 = buffer->buffer->element[15].sflags;
  3015. QETH_CARD_TEXT(card, 6, "hdsnderr");
  3016. if (card->info.type == QETH_CARD_TYPE_IQD) {
  3017. if (sbalf15 == 0) {
  3018. qdio_err = 0;
  3019. } else {
  3020. qdio_err = 1;
  3021. }
  3022. }
  3023. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  3024. if (!qdio_err)
  3025. return;
  3026. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  3027. return;
  3028. QETH_CARD_TEXT(card, 1, "lnkfail");
  3029. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  3030. (u16)qdio_err, (u8)sbalf15);
  3031. }
  3032. /**
  3033. * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
  3034. * @queue: queue to check for packing buffer
  3035. *
  3036. * Returns number of buffers that were prepared for flush.
  3037. */
  3038. static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
  3039. {
  3040. struct qeth_qdio_out_buffer *buffer;
  3041. buffer = queue->bufs[queue->next_buf_to_fill];
  3042. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  3043. (buffer->next_element_to_fill > 0)) {
  3044. /* it's a packing buffer */
  3045. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3046. queue->next_buf_to_fill =
  3047. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3048. return 1;
  3049. }
  3050. return 0;
  3051. }
  3052. /*
  3053. * Switched to packing state if the number of used buffers on a queue
  3054. * reaches a certain limit.
  3055. */
  3056. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  3057. {
  3058. if (!queue->do_pack) {
  3059. if (atomic_read(&queue->used_buffers)
  3060. >= QETH_HIGH_WATERMARK_PACK){
  3061. /* switch non-PACKING -> PACKING */
  3062. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  3063. if (queue->card->options.performance_stats)
  3064. queue->card->perf_stats.sc_dp_p++;
  3065. queue->do_pack = 1;
  3066. }
  3067. }
  3068. }
  3069. /*
  3070. * Switches from packing to non-packing mode. If there is a packing
  3071. * buffer on the queue this buffer will be prepared to be flushed.
  3072. * In that case 1 is returned to inform the caller. If no buffer
  3073. * has to be flushed, zero is returned.
  3074. */
  3075. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3076. {
  3077. if (queue->do_pack) {
  3078. if (atomic_read(&queue->used_buffers)
  3079. <= QETH_LOW_WATERMARK_PACK) {
  3080. /* switch PACKING -> non-PACKING */
  3081. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3082. if (queue->card->options.performance_stats)
  3083. queue->card->perf_stats.sc_p_dp++;
  3084. queue->do_pack = 0;
  3085. return qeth_prep_flush_pack_buffer(queue);
  3086. }
  3087. }
  3088. return 0;
  3089. }
  3090. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3091. int count)
  3092. {
  3093. struct qeth_qdio_out_buffer *buf;
  3094. int rc;
  3095. int i;
  3096. unsigned int qdio_flags;
  3097. for (i = index; i < index + count; ++i) {
  3098. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3099. buf = queue->bufs[bidx];
  3100. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3101. SBAL_EFLAGS_LAST_ENTRY;
  3102. if (queue->bufstates)
  3103. queue->bufstates[bidx].user = buf;
  3104. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3105. continue;
  3106. if (!queue->do_pack) {
  3107. if ((atomic_read(&queue->used_buffers) >=
  3108. (QETH_HIGH_WATERMARK_PACK -
  3109. QETH_WATERMARK_PACK_FUZZ)) &&
  3110. !atomic_read(&queue->set_pci_flags_count)) {
  3111. /* it's likely that we'll go to packing
  3112. * mode soon */
  3113. atomic_inc(&queue->set_pci_flags_count);
  3114. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3115. }
  3116. } else {
  3117. if (!atomic_read(&queue->set_pci_flags_count)) {
  3118. /*
  3119. * there's no outstanding PCI any more, so we
  3120. * have to request a PCI to be sure the the PCI
  3121. * will wake at some time in the future then we
  3122. * can flush packed buffers that might still be
  3123. * hanging around, which can happen if no
  3124. * further send was requested by the stack
  3125. */
  3126. atomic_inc(&queue->set_pci_flags_count);
  3127. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3128. }
  3129. }
  3130. }
  3131. netif_trans_update(queue->card->dev);
  3132. if (queue->card->options.performance_stats) {
  3133. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3134. queue->card->perf_stats.outbound_do_qdio_start_time =
  3135. qeth_get_micros();
  3136. }
  3137. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3138. if (atomic_read(&queue->set_pci_flags_count))
  3139. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3140. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3141. queue->queue_no, index, count);
  3142. if (queue->card->options.performance_stats)
  3143. queue->card->perf_stats.outbound_do_qdio_time +=
  3144. qeth_get_micros() -
  3145. queue->card->perf_stats.outbound_do_qdio_start_time;
  3146. atomic_add(count, &queue->used_buffers);
  3147. if (rc) {
  3148. queue->card->stats.tx_errors += count;
  3149. /* ignore temporary SIGA errors without busy condition */
  3150. if (rc == -ENOBUFS)
  3151. return;
  3152. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3153. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3154. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3155. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3156. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3157. /* this must not happen under normal circumstances. if it
  3158. * happens something is really wrong -> recover */
  3159. qeth_schedule_recovery(queue->card);
  3160. return;
  3161. }
  3162. if (queue->card->options.performance_stats)
  3163. queue->card->perf_stats.bufs_sent += count;
  3164. }
  3165. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3166. {
  3167. int index;
  3168. int flush_cnt = 0;
  3169. int q_was_packing = 0;
  3170. /*
  3171. * check if weed have to switch to non-packing mode or if
  3172. * we have to get a pci flag out on the queue
  3173. */
  3174. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3175. !atomic_read(&queue->set_pci_flags_count)) {
  3176. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3177. QETH_OUT_Q_UNLOCKED) {
  3178. /*
  3179. * If we get in here, there was no action in
  3180. * do_send_packet. So, we check if there is a
  3181. * packing buffer to be flushed here.
  3182. */
  3183. netif_stop_queue(queue->card->dev);
  3184. index = queue->next_buf_to_fill;
  3185. q_was_packing = queue->do_pack;
  3186. /* queue->do_pack may change */
  3187. barrier();
  3188. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3189. if (!flush_cnt &&
  3190. !atomic_read(&queue->set_pci_flags_count))
  3191. flush_cnt += qeth_prep_flush_pack_buffer(queue);
  3192. if (queue->card->options.performance_stats &&
  3193. q_was_packing)
  3194. queue->card->perf_stats.bufs_sent_pack +=
  3195. flush_cnt;
  3196. if (flush_cnt)
  3197. qeth_flush_buffers(queue, index, flush_cnt);
  3198. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3199. }
  3200. }
  3201. }
  3202. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3203. unsigned long card_ptr)
  3204. {
  3205. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3206. if (card->dev && (card->dev->flags & IFF_UP))
  3207. napi_schedule(&card->napi);
  3208. }
  3209. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3210. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3211. {
  3212. int rc;
  3213. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3214. rc = -1;
  3215. goto out;
  3216. } else {
  3217. if (card->options.cq == cq) {
  3218. rc = 0;
  3219. goto out;
  3220. }
  3221. if (card->state != CARD_STATE_DOWN &&
  3222. card->state != CARD_STATE_RECOVER) {
  3223. rc = -1;
  3224. goto out;
  3225. }
  3226. qeth_free_qdio_buffers(card);
  3227. card->options.cq = cq;
  3228. rc = 0;
  3229. }
  3230. out:
  3231. return rc;
  3232. }
  3233. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3234. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3235. unsigned int qdio_err,
  3236. unsigned int queue, int first_element, int count) {
  3237. struct qeth_qdio_q *cq = card->qdio.c_q;
  3238. int i;
  3239. int rc;
  3240. if (!qeth_is_cq(card, queue))
  3241. goto out;
  3242. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3243. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3244. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3245. if (qdio_err) {
  3246. netif_stop_queue(card->dev);
  3247. qeth_schedule_recovery(card);
  3248. goto out;
  3249. }
  3250. if (card->options.performance_stats) {
  3251. card->perf_stats.cq_cnt++;
  3252. card->perf_stats.cq_start_time = qeth_get_micros();
  3253. }
  3254. for (i = first_element; i < first_element + count; ++i) {
  3255. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3256. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3257. int e;
  3258. e = 0;
  3259. while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
  3260. buffer->element[e].addr) {
  3261. unsigned long phys_aob_addr;
  3262. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3263. qeth_qdio_handle_aob(card, phys_aob_addr);
  3264. buffer->element[e].addr = NULL;
  3265. buffer->element[e].eflags = 0;
  3266. buffer->element[e].sflags = 0;
  3267. buffer->element[e].length = 0;
  3268. ++e;
  3269. }
  3270. buffer->element[15].eflags = 0;
  3271. buffer->element[15].sflags = 0;
  3272. }
  3273. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3274. card->qdio.c_q->next_buf_to_init,
  3275. count);
  3276. if (rc) {
  3277. dev_warn(&card->gdev->dev,
  3278. "QDIO reported an error, rc=%i\n", rc);
  3279. QETH_CARD_TEXT(card, 2, "qcqherr");
  3280. }
  3281. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3282. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3283. netif_wake_queue(card->dev);
  3284. if (card->options.performance_stats) {
  3285. int delta_t = qeth_get_micros();
  3286. delta_t -= card->perf_stats.cq_start_time;
  3287. card->perf_stats.cq_time += delta_t;
  3288. }
  3289. out:
  3290. return;
  3291. }
  3292. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3293. unsigned int queue, int first_elem, int count,
  3294. unsigned long card_ptr)
  3295. {
  3296. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3297. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3298. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3299. if (qeth_is_cq(card, queue))
  3300. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3301. else if (qdio_err)
  3302. qeth_schedule_recovery(card);
  3303. }
  3304. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3305. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3306. unsigned int qdio_error, int __queue, int first_element,
  3307. int count, unsigned long card_ptr)
  3308. {
  3309. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3310. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3311. struct qeth_qdio_out_buffer *buffer;
  3312. int i;
  3313. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3314. if (qdio_error & QDIO_ERROR_FATAL) {
  3315. QETH_CARD_TEXT(card, 2, "achkcond");
  3316. netif_stop_queue(card->dev);
  3317. qeth_schedule_recovery(card);
  3318. return;
  3319. }
  3320. if (card->options.performance_stats) {
  3321. card->perf_stats.outbound_handler_cnt++;
  3322. card->perf_stats.outbound_handler_start_time =
  3323. qeth_get_micros();
  3324. }
  3325. for (i = first_element; i < (first_element + count); ++i) {
  3326. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3327. buffer = queue->bufs[bidx];
  3328. qeth_handle_send_error(card, buffer, qdio_error);
  3329. if (queue->bufstates &&
  3330. (queue->bufstates[bidx].flags &
  3331. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3332. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3333. if (atomic_cmpxchg(&buffer->state,
  3334. QETH_QDIO_BUF_PRIMED,
  3335. QETH_QDIO_BUF_PENDING) ==
  3336. QETH_QDIO_BUF_PRIMED) {
  3337. qeth_notify_skbs(queue, buffer,
  3338. TX_NOTIFY_PENDING);
  3339. }
  3340. buffer->aob = queue->bufstates[bidx].aob;
  3341. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3342. QETH_CARD_TEXT(queue->card, 5, "aob");
  3343. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3344. virt_to_phys(buffer->aob));
  3345. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3346. QETH_CARD_TEXT(card, 2, "outofbuf");
  3347. qeth_schedule_recovery(card);
  3348. }
  3349. } else {
  3350. if (card->options.cq == QETH_CQ_ENABLED) {
  3351. enum iucv_tx_notify n;
  3352. n = qeth_compute_cq_notification(
  3353. buffer->buffer->element[15].sflags, 0);
  3354. qeth_notify_skbs(queue, buffer, n);
  3355. }
  3356. qeth_clear_output_buffer(queue, buffer,
  3357. QETH_QDIO_BUF_EMPTY);
  3358. }
  3359. qeth_cleanup_handled_pending(queue, bidx, 0);
  3360. }
  3361. atomic_sub(count, &queue->used_buffers);
  3362. /* check if we need to do something on this outbound queue */
  3363. if (card->info.type != QETH_CARD_TYPE_IQD)
  3364. qeth_check_outbound_queue(queue);
  3365. netif_wake_queue(queue->card->dev);
  3366. if (card->options.performance_stats)
  3367. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3368. card->perf_stats.outbound_handler_start_time;
  3369. }
  3370. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3371. /* We cannot use outbound queue 3 for unicast packets on HiperSockets */
  3372. static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
  3373. {
  3374. if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
  3375. return 2;
  3376. return queue_num;
  3377. }
  3378. /**
  3379. * Note: Function assumes that we have 4 outbound queues.
  3380. */
  3381. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3382. int ipv, int cast_type)
  3383. {
  3384. __be16 *tci;
  3385. u8 tos;
  3386. if (cast_type && card->info.is_multicast_different)
  3387. return card->info.is_multicast_different &
  3388. (card->qdio.no_out_queues - 1);
  3389. switch (card->qdio.do_prio_queueing) {
  3390. case QETH_PRIO_Q_ING_TOS:
  3391. case QETH_PRIO_Q_ING_PREC:
  3392. switch (ipv) {
  3393. case 4:
  3394. tos = ipv4_get_dsfield(ip_hdr(skb));
  3395. break;
  3396. case 6:
  3397. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3398. break;
  3399. default:
  3400. return card->qdio.default_out_queue;
  3401. }
  3402. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3403. return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
  3404. if (tos & IPTOS_MINCOST)
  3405. return qeth_cut_iqd_prio(card, 3);
  3406. if (tos & IPTOS_RELIABILITY)
  3407. return 2;
  3408. if (tos & IPTOS_THROUGHPUT)
  3409. return 1;
  3410. if (tos & IPTOS_LOWDELAY)
  3411. return 0;
  3412. break;
  3413. case QETH_PRIO_Q_ING_SKB:
  3414. if (skb->priority > 5)
  3415. return 0;
  3416. return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
  3417. case QETH_PRIO_Q_ING_VLAN:
  3418. tci = &((struct ethhdr *)skb->data)->h_proto;
  3419. if (be16_to_cpu(*tci) == ETH_P_8021Q)
  3420. return qeth_cut_iqd_prio(card,
  3421. ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
  3422. break;
  3423. default:
  3424. break;
  3425. }
  3426. return card->qdio.default_out_queue;
  3427. }
  3428. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3429. /**
  3430. * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
  3431. * @skb: SKB address
  3432. *
  3433. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3434. * fragmented part of the SKB. Returns zero for linear SKB.
  3435. */
  3436. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3437. {
  3438. int cnt, elements = 0;
  3439. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3440. struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
  3441. elements += qeth_get_elements_for_range(
  3442. (addr_t)skb_frag_address(frag),
  3443. (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
  3444. }
  3445. return elements;
  3446. }
  3447. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3448. /**
  3449. * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
  3450. * @card: qeth card structure, to check max. elems.
  3451. * @skb: SKB address
  3452. * @extra_elems: extra elems needed, to check against max.
  3453. * @data_offset: range starts at skb->data + data_offset
  3454. *
  3455. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3456. * skb data, including linear part and fragments. Checks if the result plus
  3457. * extra_elems fits under the limit for the card. Returns 0 if it does not.
  3458. * Note: extra_elems is not included in the returned result.
  3459. */
  3460. int qeth_get_elements_no(struct qeth_card *card,
  3461. struct sk_buff *skb, int extra_elems, int data_offset)
  3462. {
  3463. addr_t end = (addr_t)skb->data + skb_headlen(skb);
  3464. int elements = qeth_get_elements_for_frags(skb);
  3465. addr_t start = (addr_t)skb->data + data_offset;
  3466. if (start != end)
  3467. elements += qeth_get_elements_for_range(start, end);
  3468. if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3469. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3470. "(Number=%d / Length=%d). Discarded.\n",
  3471. elements + extra_elems, skb->len);
  3472. return 0;
  3473. }
  3474. return elements;
  3475. }
  3476. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3477. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3478. {
  3479. int hroom, inpage, rest;
  3480. if (((unsigned long)skb->data & PAGE_MASK) !=
  3481. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3482. hroom = skb_headroom(skb);
  3483. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3484. rest = len - inpage;
  3485. if (rest > hroom)
  3486. return 1;
  3487. memmove(skb->data - rest, skb->data, skb_headlen(skb));
  3488. skb->data -= rest;
  3489. skb->tail -= rest;
  3490. *hdr = (struct qeth_hdr *)skb->data;
  3491. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3492. }
  3493. return 0;
  3494. }
  3495. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3496. /**
  3497. * qeth_push_hdr() - push a qeth_hdr onto an skb.
  3498. * @skb: skb that the qeth_hdr should be pushed onto.
  3499. * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
  3500. * it contains a valid pointer to a qeth_hdr.
  3501. * @len: length of the hdr that needs to be pushed on.
  3502. *
  3503. * Returns the pushed length. If the header can't be pushed on
  3504. * (eg. because it would cross a page boundary), it is allocated from
  3505. * the cache instead and 0 is returned.
  3506. * Error to create the hdr is indicated by returning with < 0.
  3507. */
  3508. int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len)
  3509. {
  3510. if (skb_headroom(skb) >= len &&
  3511. qeth_get_elements_for_range((addr_t)skb->data - len,
  3512. (addr_t)skb->data) == 1) {
  3513. *hdr = skb_push(skb, len);
  3514. return len;
  3515. }
  3516. /* fall back */
  3517. *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
  3518. if (!*hdr)
  3519. return -ENOMEM;
  3520. return 0;
  3521. }
  3522. EXPORT_SYMBOL_GPL(qeth_push_hdr);
  3523. static void __qeth_fill_buffer(struct sk_buff *skb,
  3524. struct qeth_qdio_out_buffer *buf,
  3525. bool is_first_elem, unsigned int offset)
  3526. {
  3527. struct qdio_buffer *buffer = buf->buffer;
  3528. int element = buf->next_element_to_fill;
  3529. int length = skb_headlen(skb) - offset;
  3530. char *data = skb->data + offset;
  3531. int length_here, cnt;
  3532. /* map linear part into buffer element(s) */
  3533. while (length > 0) {
  3534. /* length_here is the remaining amount of data in this page */
  3535. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3536. if (length < length_here)
  3537. length_here = length;
  3538. buffer->element[element].addr = data;
  3539. buffer->element[element].length = length_here;
  3540. length -= length_here;
  3541. if (is_first_elem) {
  3542. is_first_elem = false;
  3543. if (length || skb_is_nonlinear(skb))
  3544. /* skb needs additional elements */
  3545. buffer->element[element].eflags =
  3546. SBAL_EFLAGS_FIRST_FRAG;
  3547. else
  3548. buffer->element[element].eflags = 0;
  3549. } else {
  3550. buffer->element[element].eflags =
  3551. SBAL_EFLAGS_MIDDLE_FRAG;
  3552. }
  3553. data += length_here;
  3554. element++;
  3555. }
  3556. /* map page frags into buffer element(s) */
  3557. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3558. skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
  3559. data = skb_frag_address(frag);
  3560. length = skb_frag_size(frag);
  3561. while (length > 0) {
  3562. length_here = PAGE_SIZE -
  3563. ((unsigned long) data % PAGE_SIZE);
  3564. if (length < length_here)
  3565. length_here = length;
  3566. buffer->element[element].addr = data;
  3567. buffer->element[element].length = length_here;
  3568. buffer->element[element].eflags =
  3569. SBAL_EFLAGS_MIDDLE_FRAG;
  3570. length -= length_here;
  3571. data += length_here;
  3572. element++;
  3573. }
  3574. }
  3575. if (buffer->element[element - 1].eflags)
  3576. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3577. buf->next_element_to_fill = element;
  3578. }
  3579. /**
  3580. * qeth_fill_buffer() - map skb into an output buffer
  3581. * @queue: QDIO queue to submit the buffer on
  3582. * @buf: buffer to transport the skb
  3583. * @skb: skb to map into the buffer
  3584. * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
  3585. * from qeth_core_header_cache.
  3586. * @offset: when mapping the skb, start at skb->data + offset
  3587. * @hd_len: if > 0, build a dedicated header element of this size
  3588. */
  3589. static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3590. struct qeth_qdio_out_buffer *buf,
  3591. struct sk_buff *skb, struct qeth_hdr *hdr,
  3592. unsigned int offset, unsigned int hd_len)
  3593. {
  3594. struct qdio_buffer *buffer = buf->buffer;
  3595. bool is_first_elem = true;
  3596. int flush_cnt = 0;
  3597. refcount_inc(&skb->users);
  3598. skb_queue_tail(&buf->skb_list, skb);
  3599. /* build dedicated header element */
  3600. if (hd_len) {
  3601. int element = buf->next_element_to_fill;
  3602. is_first_elem = false;
  3603. buffer->element[element].addr = hdr;
  3604. buffer->element[element].length = hd_len;
  3605. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3606. /* remember to free cache-allocated qeth_hdr: */
  3607. buf->is_header[element] = ((void *)hdr != skb->data);
  3608. buf->next_element_to_fill++;
  3609. }
  3610. __qeth_fill_buffer(skb, buf, is_first_elem, offset);
  3611. if (!queue->do_pack) {
  3612. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3613. /* set state to PRIMED -> will be flushed */
  3614. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3615. flush_cnt = 1;
  3616. } else {
  3617. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3618. if (queue->card->options.performance_stats)
  3619. queue->card->perf_stats.skbs_sent_pack++;
  3620. if (buf->next_element_to_fill >=
  3621. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3622. /*
  3623. * packed buffer if full -> set state PRIMED
  3624. * -> will be flushed
  3625. */
  3626. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3627. flush_cnt = 1;
  3628. }
  3629. }
  3630. return flush_cnt;
  3631. }
  3632. int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3633. struct qeth_hdr *hdr, unsigned int offset,
  3634. unsigned int hd_len)
  3635. {
  3636. int index = queue->next_buf_to_fill;
  3637. struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
  3638. /*
  3639. * check if buffer is empty to make sure that we do not 'overtake'
  3640. * ourselves and try to fill a buffer that is already primed
  3641. */
  3642. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3643. return -EBUSY;
  3644. queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3645. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3646. qeth_flush_buffers(queue, index, 1);
  3647. return 0;
  3648. }
  3649. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3650. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3651. struct sk_buff *skb, struct qeth_hdr *hdr,
  3652. unsigned int offset, unsigned int hd_len,
  3653. int elements_needed)
  3654. {
  3655. struct qeth_qdio_out_buffer *buffer;
  3656. int start_index;
  3657. int flush_count = 0;
  3658. int do_pack = 0;
  3659. int tmp;
  3660. int rc = 0;
  3661. /* spin until we get the queue ... */
  3662. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3663. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3664. start_index = queue->next_buf_to_fill;
  3665. buffer = queue->bufs[queue->next_buf_to_fill];
  3666. /*
  3667. * check if buffer is empty to make sure that we do not 'overtake'
  3668. * ourselves and try to fill a buffer that is already primed
  3669. */
  3670. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3671. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3672. return -EBUSY;
  3673. }
  3674. /* check if we need to switch packing state of this queue */
  3675. qeth_switch_to_packing_if_needed(queue);
  3676. if (queue->do_pack) {
  3677. do_pack = 1;
  3678. /* does packet fit in current buffer? */
  3679. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3680. buffer->next_element_to_fill) < elements_needed) {
  3681. /* ... no -> set state PRIMED */
  3682. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3683. flush_count++;
  3684. queue->next_buf_to_fill =
  3685. (queue->next_buf_to_fill + 1) %
  3686. QDIO_MAX_BUFFERS_PER_Q;
  3687. buffer = queue->bufs[queue->next_buf_to_fill];
  3688. /* we did a step forward, so check buffer state
  3689. * again */
  3690. if (atomic_read(&buffer->state) !=
  3691. QETH_QDIO_BUF_EMPTY) {
  3692. qeth_flush_buffers(queue, start_index,
  3693. flush_count);
  3694. atomic_set(&queue->state,
  3695. QETH_OUT_Q_UNLOCKED);
  3696. rc = -EBUSY;
  3697. goto out;
  3698. }
  3699. }
  3700. }
  3701. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3702. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3703. QDIO_MAX_BUFFERS_PER_Q;
  3704. flush_count += tmp;
  3705. if (flush_count)
  3706. qeth_flush_buffers(queue, start_index, flush_count);
  3707. else if (!atomic_read(&queue->set_pci_flags_count))
  3708. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3709. /*
  3710. * queue->state will go from LOCKED -> UNLOCKED or from
  3711. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3712. * (switch packing state or flush buffer to get another pci flag out).
  3713. * In that case we will enter this loop
  3714. */
  3715. while (atomic_dec_return(&queue->state)) {
  3716. start_index = queue->next_buf_to_fill;
  3717. /* check if we can go back to non-packing state */
  3718. tmp = qeth_switch_to_nonpacking_if_needed(queue);
  3719. /*
  3720. * check if we need to flush a packing buffer to get a pci
  3721. * flag out on the queue
  3722. */
  3723. if (!tmp && !atomic_read(&queue->set_pci_flags_count))
  3724. tmp = qeth_prep_flush_pack_buffer(queue);
  3725. if (tmp) {
  3726. qeth_flush_buffers(queue, start_index, tmp);
  3727. flush_count += tmp;
  3728. }
  3729. }
  3730. out:
  3731. /* at this point the queue is UNLOCKED again */
  3732. if (queue->card->options.performance_stats && do_pack)
  3733. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3734. return rc;
  3735. }
  3736. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3737. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3738. struct qeth_reply *reply, unsigned long data)
  3739. {
  3740. struct qeth_ipa_cmd *cmd;
  3741. struct qeth_ipacmd_setadpparms *setparms;
  3742. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3743. cmd = (struct qeth_ipa_cmd *) data;
  3744. setparms = &(cmd->data.setadapterparms);
  3745. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  3746. if (cmd->hdr.return_code) {
  3747. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3748. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3749. }
  3750. card->info.promisc_mode = setparms->data.mode;
  3751. return 0;
  3752. }
  3753. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3754. {
  3755. enum qeth_ipa_promisc_modes mode;
  3756. struct net_device *dev = card->dev;
  3757. struct qeth_cmd_buffer *iob;
  3758. struct qeth_ipa_cmd *cmd;
  3759. QETH_CARD_TEXT(card, 4, "setprom");
  3760. if (((dev->flags & IFF_PROMISC) &&
  3761. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3762. (!(dev->flags & IFF_PROMISC) &&
  3763. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3764. return;
  3765. mode = SET_PROMISC_MODE_OFF;
  3766. if (dev->flags & IFF_PROMISC)
  3767. mode = SET_PROMISC_MODE_ON;
  3768. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3769. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3770. sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
  3771. if (!iob)
  3772. return;
  3773. cmd = __ipa_cmd(iob);
  3774. cmd->data.setadapterparms.data.mode = mode;
  3775. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3776. }
  3777. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3778. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3779. {
  3780. struct qeth_card *card;
  3781. char dbf_text[15];
  3782. card = dev->ml_priv;
  3783. QETH_CARD_TEXT(card, 4, "chgmtu");
  3784. sprintf(dbf_text, "%8x", new_mtu);
  3785. QETH_CARD_TEXT(card, 4, dbf_text);
  3786. if (!qeth_mtu_is_valid(card, new_mtu))
  3787. return -EINVAL;
  3788. dev->mtu = new_mtu;
  3789. return 0;
  3790. }
  3791. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3792. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3793. {
  3794. struct qeth_card *card;
  3795. card = dev->ml_priv;
  3796. QETH_CARD_TEXT(card, 5, "getstat");
  3797. return &card->stats;
  3798. }
  3799. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3800. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3801. struct qeth_reply *reply, unsigned long data)
  3802. {
  3803. struct qeth_ipa_cmd *cmd;
  3804. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3805. cmd = (struct qeth_ipa_cmd *) data;
  3806. if (!card->options.layer2 ||
  3807. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3808. ether_addr_copy(card->dev->dev_addr,
  3809. cmd->data.setadapterparms.data.change_addr.addr);
  3810. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3811. }
  3812. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3813. return 0;
  3814. }
  3815. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3816. {
  3817. int rc;
  3818. struct qeth_cmd_buffer *iob;
  3819. struct qeth_ipa_cmd *cmd;
  3820. QETH_CARD_TEXT(card, 4, "chgmac");
  3821. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3822. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3823. sizeof(struct qeth_change_addr));
  3824. if (!iob)
  3825. return -ENOMEM;
  3826. cmd = __ipa_cmd(iob);
  3827. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3828. cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
  3829. ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
  3830. card->dev->dev_addr);
  3831. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3832. NULL);
  3833. return rc;
  3834. }
  3835. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3836. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3837. struct qeth_reply *reply, unsigned long data)
  3838. {
  3839. struct qeth_ipa_cmd *cmd;
  3840. struct qeth_set_access_ctrl *access_ctrl_req;
  3841. int fallback = *(int *)reply->param;
  3842. QETH_CARD_TEXT(card, 4, "setaccb");
  3843. cmd = (struct qeth_ipa_cmd *) data;
  3844. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3845. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3846. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3847. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3848. cmd->data.setadapterparms.hdr.return_code);
  3849. if (cmd->data.setadapterparms.hdr.return_code !=
  3850. SET_ACCESS_CTRL_RC_SUCCESS)
  3851. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3852. card->gdev->dev.kobj.name,
  3853. access_ctrl_req->subcmd_code,
  3854. cmd->data.setadapterparms.hdr.return_code);
  3855. switch (cmd->data.setadapterparms.hdr.return_code) {
  3856. case SET_ACCESS_CTRL_RC_SUCCESS:
  3857. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3858. dev_info(&card->gdev->dev,
  3859. "QDIO data connection isolation is deactivated\n");
  3860. } else {
  3861. dev_info(&card->gdev->dev,
  3862. "QDIO data connection isolation is activated\n");
  3863. }
  3864. break;
  3865. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3866. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3867. "deactivated\n", dev_name(&card->gdev->dev));
  3868. if (fallback)
  3869. card->options.isolation = card->options.prev_isolation;
  3870. break;
  3871. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3872. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3873. " activated\n", dev_name(&card->gdev->dev));
  3874. if (fallback)
  3875. card->options.isolation = card->options.prev_isolation;
  3876. break;
  3877. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3878. dev_err(&card->gdev->dev, "Adapter does not "
  3879. "support QDIO data connection isolation\n");
  3880. break;
  3881. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3882. dev_err(&card->gdev->dev,
  3883. "Adapter is dedicated. "
  3884. "QDIO data connection isolation not supported\n");
  3885. if (fallback)
  3886. card->options.isolation = card->options.prev_isolation;
  3887. break;
  3888. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3889. dev_err(&card->gdev->dev,
  3890. "TSO does not permit QDIO data connection isolation\n");
  3891. if (fallback)
  3892. card->options.isolation = card->options.prev_isolation;
  3893. break;
  3894. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3895. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3896. "support reflective relay mode\n");
  3897. if (fallback)
  3898. card->options.isolation = card->options.prev_isolation;
  3899. break;
  3900. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3901. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3902. "enabled at the adjacent switch port");
  3903. if (fallback)
  3904. card->options.isolation = card->options.prev_isolation;
  3905. break;
  3906. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3907. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3908. "at the adjacent switch failed\n");
  3909. break;
  3910. default:
  3911. /* this should never happen */
  3912. if (fallback)
  3913. card->options.isolation = card->options.prev_isolation;
  3914. break;
  3915. }
  3916. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3917. return 0;
  3918. }
  3919. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3920. enum qeth_ipa_isolation_modes isolation, int fallback)
  3921. {
  3922. int rc;
  3923. struct qeth_cmd_buffer *iob;
  3924. struct qeth_ipa_cmd *cmd;
  3925. struct qeth_set_access_ctrl *access_ctrl_req;
  3926. QETH_CARD_TEXT(card, 4, "setacctl");
  3927. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3928. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3929. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3930. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3931. sizeof(struct qeth_set_access_ctrl));
  3932. if (!iob)
  3933. return -ENOMEM;
  3934. cmd = __ipa_cmd(iob);
  3935. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3936. access_ctrl_req->subcmd_code = isolation;
  3937. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3938. &fallback);
  3939. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3940. return rc;
  3941. }
  3942. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3943. {
  3944. int rc = 0;
  3945. QETH_CARD_TEXT(card, 4, "setactlo");
  3946. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3947. card->info.type == QETH_CARD_TYPE_OSX) &&
  3948. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3949. rc = qeth_setadpparms_set_access_ctrl(card,
  3950. card->options.isolation, fallback);
  3951. if (rc) {
  3952. QETH_DBF_MESSAGE(3,
  3953. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3954. card->gdev->dev.kobj.name,
  3955. rc);
  3956. rc = -EOPNOTSUPP;
  3957. }
  3958. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3959. card->options.isolation = ISOLATION_MODE_NONE;
  3960. dev_err(&card->gdev->dev, "Adapter does not "
  3961. "support QDIO data connection isolation\n");
  3962. rc = -EOPNOTSUPP;
  3963. }
  3964. return rc;
  3965. }
  3966. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3967. void qeth_tx_timeout(struct net_device *dev)
  3968. {
  3969. struct qeth_card *card;
  3970. card = dev->ml_priv;
  3971. QETH_CARD_TEXT(card, 4, "txtimeo");
  3972. card->stats.tx_errors++;
  3973. qeth_schedule_recovery(card);
  3974. }
  3975. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3976. static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3977. {
  3978. struct qeth_card *card = dev->ml_priv;
  3979. int rc = 0;
  3980. switch (regnum) {
  3981. case MII_BMCR: /* Basic mode control register */
  3982. rc = BMCR_FULLDPLX;
  3983. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3984. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3985. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3986. rc |= BMCR_SPEED100;
  3987. break;
  3988. case MII_BMSR: /* Basic mode status register */
  3989. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3990. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3991. BMSR_100BASE4;
  3992. break;
  3993. case MII_PHYSID1: /* PHYS ID 1 */
  3994. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3995. dev->dev_addr[2];
  3996. rc = (rc >> 5) & 0xFFFF;
  3997. break;
  3998. case MII_PHYSID2: /* PHYS ID 2 */
  3999. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  4000. break;
  4001. case MII_ADVERTISE: /* Advertisement control reg */
  4002. rc = ADVERTISE_ALL;
  4003. break;
  4004. case MII_LPA: /* Link partner ability reg */
  4005. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  4006. LPA_100BASE4 | LPA_LPACK;
  4007. break;
  4008. case MII_EXPANSION: /* Expansion register */
  4009. break;
  4010. case MII_DCOUNTER: /* disconnect counter */
  4011. break;
  4012. case MII_FCSCOUNTER: /* false carrier counter */
  4013. break;
  4014. case MII_NWAYTEST: /* N-way auto-neg test register */
  4015. break;
  4016. case MII_RERRCOUNTER: /* rx error counter */
  4017. rc = card->stats.rx_errors;
  4018. break;
  4019. case MII_SREVISION: /* silicon revision */
  4020. break;
  4021. case MII_RESV1: /* reserved 1 */
  4022. break;
  4023. case MII_LBRERROR: /* loopback, rx, bypass error */
  4024. break;
  4025. case MII_PHYADDR: /* physical address */
  4026. break;
  4027. case MII_RESV2: /* reserved 2 */
  4028. break;
  4029. case MII_TPISTATUS: /* TPI status for 10mbps */
  4030. break;
  4031. case MII_NCONFIG: /* network interface config */
  4032. break;
  4033. default:
  4034. break;
  4035. }
  4036. return rc;
  4037. }
  4038. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  4039. struct qeth_cmd_buffer *iob, int len,
  4040. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  4041. unsigned long),
  4042. void *reply_param)
  4043. {
  4044. u16 s1, s2;
  4045. QETH_CARD_TEXT(card, 4, "sendsnmp");
  4046. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4047. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4048. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4049. /* adjust PDU length fields in IPA_PDU_HEADER */
  4050. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  4051. s2 = (u32) len;
  4052. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  4053. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4054. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4055. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4056. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4057. reply_cb, reply_param);
  4058. }
  4059. static int qeth_snmp_command_cb(struct qeth_card *card,
  4060. struct qeth_reply *reply, unsigned long sdata)
  4061. {
  4062. struct qeth_ipa_cmd *cmd;
  4063. struct qeth_arp_query_info *qinfo;
  4064. struct qeth_snmp_cmd *snmp;
  4065. unsigned char *data;
  4066. __u16 data_len;
  4067. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4068. cmd = (struct qeth_ipa_cmd *) sdata;
  4069. data = (unsigned char *)((char *)cmd - reply->offset);
  4070. qinfo = (struct qeth_arp_query_info *) reply->param;
  4071. snmp = &cmd->data.setadapterparms.data.snmp;
  4072. if (cmd->hdr.return_code) {
  4073. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4074. return 0;
  4075. }
  4076. if (cmd->data.setadapterparms.hdr.return_code) {
  4077. cmd->hdr.return_code =
  4078. cmd->data.setadapterparms.hdr.return_code;
  4079. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4080. return 0;
  4081. }
  4082. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4083. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4084. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4085. else
  4086. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  4087. /* check if there is enough room in userspace */
  4088. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4089. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4090. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4091. return 0;
  4092. }
  4093. QETH_CARD_TEXT_(card, 4, "snore%i",
  4094. cmd->data.setadapterparms.hdr.used_total);
  4095. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4096. cmd->data.setadapterparms.hdr.seq_no);
  4097. /*copy entries to user buffer*/
  4098. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4099. memcpy(qinfo->udata + qinfo->udata_offset,
  4100. (char *)snmp,
  4101. data_len + offsetof(struct qeth_snmp_cmd, data));
  4102. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4103. } else {
  4104. memcpy(qinfo->udata + qinfo->udata_offset,
  4105. (char *)&snmp->request, data_len);
  4106. }
  4107. qinfo->udata_offset += data_len;
  4108. /* check if all replies received ... */
  4109. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4110. cmd->data.setadapterparms.hdr.used_total);
  4111. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4112. cmd->data.setadapterparms.hdr.seq_no);
  4113. if (cmd->data.setadapterparms.hdr.seq_no <
  4114. cmd->data.setadapterparms.hdr.used_total)
  4115. return 1;
  4116. return 0;
  4117. }
  4118. static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4119. {
  4120. struct qeth_cmd_buffer *iob;
  4121. struct qeth_ipa_cmd *cmd;
  4122. struct qeth_snmp_ureq *ureq;
  4123. unsigned int req_len;
  4124. struct qeth_arp_query_info qinfo = {0, };
  4125. int rc = 0;
  4126. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4127. if (card->info.guestlan)
  4128. return -EOPNOTSUPP;
  4129. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4130. (!card->options.layer2)) {
  4131. return -EOPNOTSUPP;
  4132. }
  4133. /* skip 4 bytes (data_len struct member) to get req_len */
  4134. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4135. return -EFAULT;
  4136. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4137. sizeof(struct qeth_ipacmd_hdr) -
  4138. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4139. return -EINVAL;
  4140. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4141. if (IS_ERR(ureq)) {
  4142. QETH_CARD_TEXT(card, 2, "snmpnome");
  4143. return PTR_ERR(ureq);
  4144. }
  4145. qinfo.udata_len = ureq->hdr.data_len;
  4146. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4147. if (!qinfo.udata) {
  4148. kfree(ureq);
  4149. return -ENOMEM;
  4150. }
  4151. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4152. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4153. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4154. if (!iob) {
  4155. rc = -ENOMEM;
  4156. goto out;
  4157. }
  4158. cmd = __ipa_cmd(iob);
  4159. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4160. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4161. qeth_snmp_command_cb, (void *)&qinfo);
  4162. if (rc)
  4163. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4164. QETH_CARD_IFNAME(card), rc);
  4165. else {
  4166. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4167. rc = -EFAULT;
  4168. }
  4169. out:
  4170. kfree(ureq);
  4171. kfree(qinfo.udata);
  4172. return rc;
  4173. }
  4174. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4175. struct qeth_reply *reply, unsigned long data)
  4176. {
  4177. struct qeth_ipa_cmd *cmd;
  4178. struct qeth_qoat_priv *priv;
  4179. char *resdata;
  4180. int resdatalen;
  4181. QETH_CARD_TEXT(card, 3, "qoatcb");
  4182. cmd = (struct qeth_ipa_cmd *)data;
  4183. priv = (struct qeth_qoat_priv *)reply->param;
  4184. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4185. resdata = (char *)data + 28;
  4186. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4187. cmd->hdr.return_code = IPA_RC_FFFF;
  4188. return 0;
  4189. }
  4190. memcpy((priv->buffer + priv->response_len), resdata,
  4191. resdatalen);
  4192. priv->response_len += resdatalen;
  4193. if (cmd->data.setadapterparms.hdr.seq_no <
  4194. cmd->data.setadapterparms.hdr.used_total)
  4195. return 1;
  4196. return 0;
  4197. }
  4198. static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4199. {
  4200. int rc = 0;
  4201. struct qeth_cmd_buffer *iob;
  4202. struct qeth_ipa_cmd *cmd;
  4203. struct qeth_query_oat *oat_req;
  4204. struct qeth_query_oat_data oat_data;
  4205. struct qeth_qoat_priv priv;
  4206. void __user *tmp;
  4207. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4208. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4209. rc = -EOPNOTSUPP;
  4210. goto out;
  4211. }
  4212. if (copy_from_user(&oat_data, udata,
  4213. sizeof(struct qeth_query_oat_data))) {
  4214. rc = -EFAULT;
  4215. goto out;
  4216. }
  4217. priv.buffer_len = oat_data.buffer_len;
  4218. priv.response_len = 0;
  4219. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4220. if (!priv.buffer) {
  4221. rc = -ENOMEM;
  4222. goto out;
  4223. }
  4224. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4225. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4226. sizeof(struct qeth_query_oat));
  4227. if (!iob) {
  4228. rc = -ENOMEM;
  4229. goto out_free;
  4230. }
  4231. cmd = __ipa_cmd(iob);
  4232. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4233. oat_req->subcmd_code = oat_data.command;
  4234. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4235. &priv);
  4236. if (!rc) {
  4237. if (is_compat_task())
  4238. tmp = compat_ptr(oat_data.ptr);
  4239. else
  4240. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4241. if (copy_to_user(tmp, priv.buffer,
  4242. priv.response_len)) {
  4243. rc = -EFAULT;
  4244. goto out_free;
  4245. }
  4246. oat_data.response_len = priv.response_len;
  4247. if (copy_to_user(udata, &oat_data,
  4248. sizeof(struct qeth_query_oat_data)))
  4249. rc = -EFAULT;
  4250. } else
  4251. if (rc == IPA_RC_FFFF)
  4252. rc = -EFAULT;
  4253. out_free:
  4254. kfree(priv.buffer);
  4255. out:
  4256. return rc;
  4257. }
  4258. static int qeth_query_card_info_cb(struct qeth_card *card,
  4259. struct qeth_reply *reply, unsigned long data)
  4260. {
  4261. struct qeth_ipa_cmd *cmd;
  4262. struct qeth_query_card_info *card_info;
  4263. struct carrier_info *carrier_info;
  4264. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4265. carrier_info = (struct carrier_info *)reply->param;
  4266. cmd = (struct qeth_ipa_cmd *)data;
  4267. card_info = &cmd->data.setadapterparms.data.card_info;
  4268. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  4269. carrier_info->card_type = card_info->card_type;
  4270. carrier_info->port_mode = card_info->port_mode;
  4271. carrier_info->port_speed = card_info->port_speed;
  4272. }
  4273. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  4274. return 0;
  4275. }
  4276. static int qeth_query_card_info(struct qeth_card *card,
  4277. struct carrier_info *carrier_info)
  4278. {
  4279. struct qeth_cmd_buffer *iob;
  4280. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4281. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4282. return -EOPNOTSUPP;
  4283. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4284. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4285. if (!iob)
  4286. return -ENOMEM;
  4287. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4288. (void *)carrier_info);
  4289. }
  4290. /**
  4291. * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
  4292. * @card: pointer to a qeth_card
  4293. *
  4294. * Returns
  4295. * 0, if a MAC address has been set for the card's netdevice
  4296. * a return code, for various error conditions
  4297. */
  4298. int qeth_vm_request_mac(struct qeth_card *card)
  4299. {
  4300. struct diag26c_mac_resp *response;
  4301. struct diag26c_mac_req *request;
  4302. struct ccw_dev_id id;
  4303. int rc;
  4304. QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
  4305. if (!card->dev)
  4306. return -ENODEV;
  4307. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  4308. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  4309. if (!request || !response) {
  4310. rc = -ENOMEM;
  4311. goto out;
  4312. }
  4313. ccw_device_get_id(CARD_DDEV(card), &id);
  4314. request->resp_buf_len = sizeof(*response);
  4315. request->resp_version = DIAG26C_VERSION2;
  4316. request->op_code = DIAG26C_GET_MAC;
  4317. request->devno = id.devno;
  4318. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  4319. rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
  4320. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  4321. if (rc)
  4322. goto out;
  4323. QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
  4324. if (request->resp_buf_len < sizeof(*response) ||
  4325. response->version != request->resp_version) {
  4326. rc = -EIO;
  4327. QETH_DBF_TEXT(SETUP, 2, "badresp");
  4328. QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
  4329. sizeof(request->resp_buf_len));
  4330. } else if (!is_valid_ether_addr(response->mac)) {
  4331. rc = -EINVAL;
  4332. QETH_DBF_TEXT(SETUP, 2, "badmac");
  4333. QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
  4334. } else {
  4335. ether_addr_copy(card->dev->dev_addr, response->mac);
  4336. }
  4337. out:
  4338. kfree(response);
  4339. kfree(request);
  4340. return rc;
  4341. }
  4342. EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
  4343. static int qeth_get_qdio_q_format(struct qeth_card *card)
  4344. {
  4345. if (card->info.type == QETH_CARD_TYPE_IQD)
  4346. return QDIO_IQDIO_QFMT;
  4347. else
  4348. return QDIO_QETH_QFMT;
  4349. }
  4350. static void qeth_determine_capabilities(struct qeth_card *card)
  4351. {
  4352. int rc;
  4353. int length;
  4354. char *prcd;
  4355. struct ccw_device *ddev;
  4356. int ddev_offline = 0;
  4357. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4358. ddev = CARD_DDEV(card);
  4359. if (!ddev->online) {
  4360. ddev_offline = 1;
  4361. rc = ccw_device_set_online(ddev);
  4362. if (rc) {
  4363. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4364. goto out;
  4365. }
  4366. }
  4367. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4368. if (rc) {
  4369. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4370. dev_name(&card->gdev->dev), rc);
  4371. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4372. goto out_offline;
  4373. }
  4374. qeth_configure_unitaddr(card, prcd);
  4375. if (ddev_offline)
  4376. qeth_configure_blkt_default(card, prcd);
  4377. kfree(prcd);
  4378. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4379. if (rc)
  4380. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4381. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4382. QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
  4383. QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
  4384. QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
  4385. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4386. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4387. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4388. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4389. dev_info(&card->gdev->dev,
  4390. "Completion Queueing supported\n");
  4391. } else {
  4392. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4393. }
  4394. out_offline:
  4395. if (ddev_offline == 1)
  4396. ccw_device_set_offline(ddev);
  4397. out:
  4398. return;
  4399. }
  4400. static void qeth_qdio_establish_cq(struct qeth_card *card,
  4401. struct qdio_buffer **in_sbal_ptrs,
  4402. void (**queue_start_poll)
  4403. (struct ccw_device *, int,
  4404. unsigned long))
  4405. {
  4406. int i;
  4407. if (card->options.cq == QETH_CQ_ENABLED) {
  4408. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4409. (card->qdio.no_in_queues - 1);
  4410. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4411. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4412. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4413. }
  4414. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4415. }
  4416. }
  4417. static int qeth_qdio_establish(struct qeth_card *card)
  4418. {
  4419. struct qdio_initialize init_data;
  4420. char *qib_param_field;
  4421. struct qdio_buffer **in_sbal_ptrs;
  4422. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4423. struct qdio_buffer **out_sbal_ptrs;
  4424. int i, j, k;
  4425. int rc = 0;
  4426. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4427. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4428. GFP_KERNEL);
  4429. if (!qib_param_field) {
  4430. rc = -ENOMEM;
  4431. goto out_free_nothing;
  4432. }
  4433. qeth_create_qib_param_field(card, qib_param_field);
  4434. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4435. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4436. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4437. GFP_KERNEL);
  4438. if (!in_sbal_ptrs) {
  4439. rc = -ENOMEM;
  4440. goto out_free_qib_param;
  4441. }
  4442. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4443. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4444. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4445. }
  4446. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4447. GFP_KERNEL);
  4448. if (!queue_start_poll) {
  4449. rc = -ENOMEM;
  4450. goto out_free_in_sbals;
  4451. }
  4452. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4453. queue_start_poll[i] = card->discipline->start_poll;
  4454. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4455. out_sbal_ptrs =
  4456. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4457. sizeof(void *), GFP_KERNEL);
  4458. if (!out_sbal_ptrs) {
  4459. rc = -ENOMEM;
  4460. goto out_free_queue_start_poll;
  4461. }
  4462. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4463. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4464. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4465. card->qdio.out_qs[i]->bufs[j]->buffer);
  4466. }
  4467. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4468. init_data.cdev = CARD_DDEV(card);
  4469. init_data.q_format = qeth_get_qdio_q_format(card);
  4470. init_data.qib_param_field_format = 0;
  4471. init_data.qib_param_field = qib_param_field;
  4472. init_data.no_input_qs = card->qdio.no_in_queues;
  4473. init_data.no_output_qs = card->qdio.no_out_queues;
  4474. init_data.input_handler = card->discipline->input_handler;
  4475. init_data.output_handler = card->discipline->output_handler;
  4476. init_data.queue_start_poll_array = queue_start_poll;
  4477. init_data.int_parm = (unsigned long) card;
  4478. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4479. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4480. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4481. init_data.scan_threshold =
  4482. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4483. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4484. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4485. rc = qdio_allocate(&init_data);
  4486. if (rc) {
  4487. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4488. goto out;
  4489. }
  4490. rc = qdio_establish(&init_data);
  4491. if (rc) {
  4492. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4493. qdio_free(CARD_DDEV(card));
  4494. }
  4495. }
  4496. switch (card->options.cq) {
  4497. case QETH_CQ_ENABLED:
  4498. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4499. break;
  4500. case QETH_CQ_DISABLED:
  4501. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4502. break;
  4503. default:
  4504. break;
  4505. }
  4506. out:
  4507. kfree(out_sbal_ptrs);
  4508. out_free_queue_start_poll:
  4509. kfree(queue_start_poll);
  4510. out_free_in_sbals:
  4511. kfree(in_sbal_ptrs);
  4512. out_free_qib_param:
  4513. kfree(qib_param_field);
  4514. out_free_nothing:
  4515. return rc;
  4516. }
  4517. static void qeth_core_free_card(struct qeth_card *card)
  4518. {
  4519. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4520. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4521. qeth_clean_channel(&card->read);
  4522. qeth_clean_channel(&card->write);
  4523. if (card->dev)
  4524. free_netdev(card->dev);
  4525. qeth_free_qdio_buffers(card);
  4526. unregister_service_level(&card->qeth_service_level);
  4527. kfree(card);
  4528. }
  4529. void qeth_trace_features(struct qeth_card *card)
  4530. {
  4531. QETH_CARD_TEXT(card, 2, "features");
  4532. QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
  4533. QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
  4534. QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
  4535. QETH_CARD_HEX(card, 2, &card->info.diagass_support,
  4536. sizeof(card->info.diagass_support));
  4537. }
  4538. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4539. static struct ccw_device_id qeth_ids[] = {
  4540. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4541. .driver_info = QETH_CARD_TYPE_OSD},
  4542. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4543. .driver_info = QETH_CARD_TYPE_IQD},
  4544. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4545. .driver_info = QETH_CARD_TYPE_OSN},
  4546. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4547. .driver_info = QETH_CARD_TYPE_OSM},
  4548. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4549. .driver_info = QETH_CARD_TYPE_OSX},
  4550. {},
  4551. };
  4552. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4553. static struct ccw_driver qeth_ccw_driver = {
  4554. .driver = {
  4555. .owner = THIS_MODULE,
  4556. .name = "qeth",
  4557. },
  4558. .ids = qeth_ids,
  4559. .probe = ccwgroup_probe_ccwdev,
  4560. .remove = ccwgroup_remove_ccwdev,
  4561. };
  4562. int qeth_core_hardsetup_card(struct qeth_card *card)
  4563. {
  4564. int retries = 3;
  4565. int rc;
  4566. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4567. atomic_set(&card->force_alloc_skb, 0);
  4568. qeth_update_from_chp_desc(card);
  4569. retry:
  4570. if (retries < 3)
  4571. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4572. dev_name(&card->gdev->dev));
  4573. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4574. ccw_device_set_offline(CARD_DDEV(card));
  4575. ccw_device_set_offline(CARD_WDEV(card));
  4576. ccw_device_set_offline(CARD_RDEV(card));
  4577. qdio_free(CARD_DDEV(card));
  4578. rc = ccw_device_set_online(CARD_RDEV(card));
  4579. if (rc)
  4580. goto retriable;
  4581. rc = ccw_device_set_online(CARD_WDEV(card));
  4582. if (rc)
  4583. goto retriable;
  4584. rc = ccw_device_set_online(CARD_DDEV(card));
  4585. if (rc)
  4586. goto retriable;
  4587. retriable:
  4588. if (rc == -ERESTARTSYS) {
  4589. QETH_DBF_TEXT(SETUP, 2, "break1");
  4590. return rc;
  4591. } else if (rc) {
  4592. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4593. if (--retries < 0)
  4594. goto out;
  4595. else
  4596. goto retry;
  4597. }
  4598. qeth_determine_capabilities(card);
  4599. qeth_init_tokens(card);
  4600. qeth_init_func_level(card);
  4601. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4602. if (rc == -ERESTARTSYS) {
  4603. QETH_DBF_TEXT(SETUP, 2, "break2");
  4604. return rc;
  4605. } else if (rc) {
  4606. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4607. if (--retries < 0)
  4608. goto out;
  4609. else
  4610. goto retry;
  4611. }
  4612. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4613. if (rc == -ERESTARTSYS) {
  4614. QETH_DBF_TEXT(SETUP, 2, "break3");
  4615. return rc;
  4616. } else if (rc) {
  4617. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4618. if (--retries < 0)
  4619. goto out;
  4620. else
  4621. goto retry;
  4622. }
  4623. card->read_or_write_problem = 0;
  4624. rc = qeth_mpc_initialize(card);
  4625. if (rc) {
  4626. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4627. goto out;
  4628. }
  4629. rc = qeth_send_startlan(card);
  4630. if (rc) {
  4631. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4632. if (rc == IPA_RC_LAN_OFFLINE) {
  4633. dev_warn(&card->gdev->dev,
  4634. "The LAN is offline\n");
  4635. card->lan_online = 0;
  4636. } else {
  4637. rc = -ENODEV;
  4638. goto out;
  4639. }
  4640. } else
  4641. card->lan_online = 1;
  4642. card->options.ipa4.supported_funcs = 0;
  4643. card->options.ipa6.supported_funcs = 0;
  4644. card->options.adp.supported_funcs = 0;
  4645. card->options.sbp.supported_funcs = 0;
  4646. card->info.diagass_support = 0;
  4647. rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
  4648. if (rc == -ENOMEM)
  4649. goto out;
  4650. if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
  4651. rc = qeth_query_setadapterparms(card);
  4652. if (rc < 0) {
  4653. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  4654. goto out;
  4655. }
  4656. }
  4657. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
  4658. rc = qeth_query_setdiagass(card);
  4659. if (rc < 0) {
  4660. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  4661. goto out;
  4662. }
  4663. }
  4664. return 0;
  4665. out:
  4666. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4667. "an error on the device\n");
  4668. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4669. dev_name(&card->gdev->dev), rc);
  4670. return rc;
  4671. }
  4672. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4673. static void qeth_create_skb_frag(struct qdio_buffer_element *element,
  4674. struct sk_buff *skb, int offset, int data_len)
  4675. {
  4676. struct page *page = virt_to_page(element->addr);
  4677. unsigned int next_frag;
  4678. /* first fill the linear space */
  4679. if (!skb->len) {
  4680. unsigned int linear = min(data_len, skb_tailroom(skb));
  4681. skb_put_data(skb, element->addr + offset, linear);
  4682. data_len -= linear;
  4683. if (!data_len)
  4684. return;
  4685. offset += linear;
  4686. /* fall through to add page frag for remaining data */
  4687. }
  4688. next_frag = skb_shinfo(skb)->nr_frags;
  4689. get_page(page);
  4690. skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
  4691. }
  4692. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4693. {
  4694. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4695. }
  4696. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4697. struct qeth_qdio_buffer *qethbuffer,
  4698. struct qdio_buffer_element **__element, int *__offset,
  4699. struct qeth_hdr **hdr)
  4700. {
  4701. struct qdio_buffer_element *element = *__element;
  4702. struct qdio_buffer *buffer = qethbuffer->buffer;
  4703. int offset = *__offset;
  4704. struct sk_buff *skb;
  4705. int skb_len = 0;
  4706. void *data_ptr;
  4707. int data_len;
  4708. int headroom = 0;
  4709. int use_rx_sg = 0;
  4710. /* qeth_hdr must not cross element boundaries */
  4711. while (element->length < offset + sizeof(struct qeth_hdr)) {
  4712. if (qeth_is_last_sbale(element))
  4713. return NULL;
  4714. element++;
  4715. offset = 0;
  4716. }
  4717. *hdr = element->addr + offset;
  4718. offset += sizeof(struct qeth_hdr);
  4719. switch ((*hdr)->hdr.l2.id) {
  4720. case QETH_HEADER_TYPE_LAYER2:
  4721. skb_len = (*hdr)->hdr.l2.pkt_length;
  4722. break;
  4723. case QETH_HEADER_TYPE_LAYER3:
  4724. skb_len = (*hdr)->hdr.l3.length;
  4725. headroom = ETH_HLEN;
  4726. break;
  4727. case QETH_HEADER_TYPE_OSN:
  4728. skb_len = (*hdr)->hdr.osn.pdu_length;
  4729. headroom = sizeof(struct qeth_hdr);
  4730. break;
  4731. default:
  4732. break;
  4733. }
  4734. if (!skb_len)
  4735. return NULL;
  4736. if (((skb_len >= card->options.rx_sg_cb) &&
  4737. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4738. (!atomic_read(&card->force_alloc_skb))) ||
  4739. (card->options.cq == QETH_CQ_ENABLED))
  4740. use_rx_sg = 1;
  4741. if (use_rx_sg && qethbuffer->rx_skb) {
  4742. /* QETH_CQ_ENABLED only: */
  4743. skb = qethbuffer->rx_skb;
  4744. qethbuffer->rx_skb = NULL;
  4745. } else {
  4746. unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
  4747. skb = napi_alloc_skb(&card->napi, linear + headroom);
  4748. }
  4749. if (!skb)
  4750. goto no_mem;
  4751. if (headroom)
  4752. skb_reserve(skb, headroom);
  4753. data_ptr = element->addr + offset;
  4754. while (skb_len) {
  4755. data_len = min(skb_len, (int)(element->length - offset));
  4756. if (data_len) {
  4757. if (use_rx_sg)
  4758. qeth_create_skb_frag(element, skb, offset,
  4759. data_len);
  4760. else
  4761. skb_put_data(skb, data_ptr, data_len);
  4762. }
  4763. skb_len -= data_len;
  4764. if (skb_len) {
  4765. if (qeth_is_last_sbale(element)) {
  4766. QETH_CARD_TEXT(card, 4, "unexeob");
  4767. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4768. dev_kfree_skb_any(skb);
  4769. card->stats.rx_errors++;
  4770. return NULL;
  4771. }
  4772. element++;
  4773. offset = 0;
  4774. data_ptr = element->addr;
  4775. } else {
  4776. offset += data_len;
  4777. }
  4778. }
  4779. *__element = element;
  4780. *__offset = offset;
  4781. if (use_rx_sg && card->options.performance_stats) {
  4782. card->perf_stats.sg_skbs_rx++;
  4783. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4784. }
  4785. return skb;
  4786. no_mem:
  4787. if (net_ratelimit()) {
  4788. QETH_CARD_TEXT(card, 2, "noskbmem");
  4789. }
  4790. card->stats.rx_dropped++;
  4791. return NULL;
  4792. }
  4793. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4794. int qeth_poll(struct napi_struct *napi, int budget)
  4795. {
  4796. struct qeth_card *card = container_of(napi, struct qeth_card, napi);
  4797. int work_done = 0;
  4798. struct qeth_qdio_buffer *buffer;
  4799. int done;
  4800. int new_budget = budget;
  4801. if (card->options.performance_stats) {
  4802. card->perf_stats.inbound_cnt++;
  4803. card->perf_stats.inbound_start_time = qeth_get_micros();
  4804. }
  4805. while (1) {
  4806. if (!card->rx.b_count) {
  4807. card->rx.qdio_err = 0;
  4808. card->rx.b_count = qdio_get_next_buffers(
  4809. card->data.ccwdev, 0, &card->rx.b_index,
  4810. &card->rx.qdio_err);
  4811. if (card->rx.b_count <= 0) {
  4812. card->rx.b_count = 0;
  4813. break;
  4814. }
  4815. card->rx.b_element =
  4816. &card->qdio.in_q->bufs[card->rx.b_index]
  4817. .buffer->element[0];
  4818. card->rx.e_offset = 0;
  4819. }
  4820. while (card->rx.b_count) {
  4821. buffer = &card->qdio.in_q->bufs[card->rx.b_index];
  4822. if (!(card->rx.qdio_err &&
  4823. qeth_check_qdio_errors(card, buffer->buffer,
  4824. card->rx.qdio_err, "qinerr")))
  4825. work_done +=
  4826. card->discipline->process_rx_buffer(
  4827. card, new_budget, &done);
  4828. else
  4829. done = 1;
  4830. if (done) {
  4831. if (card->options.performance_stats)
  4832. card->perf_stats.bufs_rec++;
  4833. qeth_put_buffer_pool_entry(card,
  4834. buffer->pool_entry);
  4835. qeth_queue_input_buffer(card, card->rx.b_index);
  4836. card->rx.b_count--;
  4837. if (card->rx.b_count) {
  4838. card->rx.b_index =
  4839. (card->rx.b_index + 1) %
  4840. QDIO_MAX_BUFFERS_PER_Q;
  4841. card->rx.b_element =
  4842. &card->qdio.in_q
  4843. ->bufs[card->rx.b_index]
  4844. .buffer->element[0];
  4845. card->rx.e_offset = 0;
  4846. }
  4847. }
  4848. if (work_done >= budget)
  4849. goto out;
  4850. else
  4851. new_budget = budget - work_done;
  4852. }
  4853. }
  4854. napi_complete_done(napi, work_done);
  4855. if (qdio_start_irq(card->data.ccwdev, 0))
  4856. napi_schedule(&card->napi);
  4857. out:
  4858. if (card->options.performance_stats)
  4859. card->perf_stats.inbound_time += qeth_get_micros() -
  4860. card->perf_stats.inbound_start_time;
  4861. return work_done;
  4862. }
  4863. EXPORT_SYMBOL_GPL(qeth_poll);
  4864. static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
  4865. {
  4866. if (!cmd->hdr.return_code)
  4867. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4868. return cmd->hdr.return_code;
  4869. }
  4870. int qeth_setassparms_cb(struct qeth_card *card,
  4871. struct qeth_reply *reply, unsigned long data)
  4872. {
  4873. struct qeth_ipa_cmd *cmd;
  4874. QETH_CARD_TEXT(card, 4, "defadpcb");
  4875. cmd = (struct qeth_ipa_cmd *) data;
  4876. if (cmd->hdr.return_code == 0) {
  4877. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4878. if (cmd->hdr.prot_version == QETH_PROT_IPV4)
  4879. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  4880. if (cmd->hdr.prot_version == QETH_PROT_IPV6)
  4881. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  4882. }
  4883. return 0;
  4884. }
  4885. EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
  4886. struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
  4887. enum qeth_ipa_funcs ipa_func,
  4888. __u16 cmd_code, __u16 len,
  4889. enum qeth_prot_versions prot)
  4890. {
  4891. struct qeth_cmd_buffer *iob;
  4892. struct qeth_ipa_cmd *cmd;
  4893. QETH_CARD_TEXT(card, 4, "getasscm");
  4894. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
  4895. if (iob) {
  4896. cmd = __ipa_cmd(iob);
  4897. cmd->data.setassparms.hdr.assist_no = ipa_func;
  4898. cmd->data.setassparms.hdr.length = 8 + len;
  4899. cmd->data.setassparms.hdr.command_code = cmd_code;
  4900. cmd->data.setassparms.hdr.return_code = 0;
  4901. cmd->data.setassparms.hdr.seq_no = 0;
  4902. }
  4903. return iob;
  4904. }
  4905. EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
  4906. int qeth_send_setassparms(struct qeth_card *card,
  4907. struct qeth_cmd_buffer *iob, __u16 len, long data,
  4908. int (*reply_cb)(struct qeth_card *,
  4909. struct qeth_reply *, unsigned long),
  4910. void *reply_param)
  4911. {
  4912. int rc;
  4913. struct qeth_ipa_cmd *cmd;
  4914. QETH_CARD_TEXT(card, 4, "sendassp");
  4915. cmd = __ipa_cmd(iob);
  4916. if (len <= sizeof(__u32))
  4917. cmd->data.setassparms.data.flags_32bit = (__u32) data;
  4918. else /* (len > sizeof(__u32)) */
  4919. memcpy(&cmd->data.setassparms.data, (void *) data, len);
  4920. rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
  4921. return rc;
  4922. }
  4923. EXPORT_SYMBOL_GPL(qeth_send_setassparms);
  4924. int qeth_send_simple_setassparms(struct qeth_card *card,
  4925. enum qeth_ipa_funcs ipa_func,
  4926. __u16 cmd_code, long data)
  4927. {
  4928. int rc;
  4929. int length = 0;
  4930. struct qeth_cmd_buffer *iob;
  4931. QETH_CARD_TEXT(card, 4, "simassp4");
  4932. if (data)
  4933. length = sizeof(__u32);
  4934. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  4935. length, QETH_PROT_IPV4);
  4936. if (!iob)
  4937. return -ENOMEM;
  4938. rc = qeth_send_setassparms(card, iob, length, data,
  4939. qeth_setassparms_cb, NULL);
  4940. return rc;
  4941. }
  4942. EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
  4943. static void qeth_unregister_dbf_views(void)
  4944. {
  4945. int x;
  4946. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4947. debug_unregister(qeth_dbf[x].id);
  4948. qeth_dbf[x].id = NULL;
  4949. }
  4950. }
  4951. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4952. {
  4953. char dbf_txt_buf[32];
  4954. va_list args;
  4955. if (!debug_level_enabled(id, level))
  4956. return;
  4957. va_start(args, fmt);
  4958. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4959. va_end(args);
  4960. debug_text_event(id, level, dbf_txt_buf);
  4961. }
  4962. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4963. static int qeth_register_dbf_views(void)
  4964. {
  4965. int ret;
  4966. int x;
  4967. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4968. /* register the areas */
  4969. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4970. qeth_dbf[x].pages,
  4971. qeth_dbf[x].areas,
  4972. qeth_dbf[x].len);
  4973. if (qeth_dbf[x].id == NULL) {
  4974. qeth_unregister_dbf_views();
  4975. return -ENOMEM;
  4976. }
  4977. /* register a view */
  4978. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4979. if (ret) {
  4980. qeth_unregister_dbf_views();
  4981. return ret;
  4982. }
  4983. /* set a passing level */
  4984. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4985. }
  4986. return 0;
  4987. }
  4988. int qeth_core_load_discipline(struct qeth_card *card,
  4989. enum qeth_discipline_id discipline)
  4990. {
  4991. int rc = 0;
  4992. mutex_lock(&qeth_mod_mutex);
  4993. switch (discipline) {
  4994. case QETH_DISCIPLINE_LAYER3:
  4995. card->discipline = try_then_request_module(
  4996. symbol_get(qeth_l3_discipline), "qeth_l3");
  4997. break;
  4998. case QETH_DISCIPLINE_LAYER2:
  4999. card->discipline = try_then_request_module(
  5000. symbol_get(qeth_l2_discipline), "qeth_l2");
  5001. break;
  5002. default:
  5003. break;
  5004. }
  5005. if (!card->discipline) {
  5006. dev_err(&card->gdev->dev, "There is no kernel module to "
  5007. "support discipline %d\n", discipline);
  5008. rc = -EINVAL;
  5009. }
  5010. mutex_unlock(&qeth_mod_mutex);
  5011. return rc;
  5012. }
  5013. void qeth_core_free_discipline(struct qeth_card *card)
  5014. {
  5015. if (card->options.layer2)
  5016. symbol_put(qeth_l2_discipline);
  5017. else
  5018. symbol_put(qeth_l3_discipline);
  5019. card->discipline = NULL;
  5020. }
  5021. const struct device_type qeth_generic_devtype = {
  5022. .name = "qeth_generic",
  5023. .groups = qeth_generic_attr_groups,
  5024. };
  5025. EXPORT_SYMBOL_GPL(qeth_generic_devtype);
  5026. static const struct device_type qeth_osn_devtype = {
  5027. .name = "qeth_osn",
  5028. .groups = qeth_osn_attr_groups,
  5029. };
  5030. #define DBF_NAME_LEN 20
  5031. struct qeth_dbf_entry {
  5032. char dbf_name[DBF_NAME_LEN];
  5033. debug_info_t *dbf_info;
  5034. struct list_head dbf_list;
  5035. };
  5036. static LIST_HEAD(qeth_dbf_list);
  5037. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  5038. static debug_info_t *qeth_get_dbf_entry(char *name)
  5039. {
  5040. struct qeth_dbf_entry *entry;
  5041. debug_info_t *rc = NULL;
  5042. mutex_lock(&qeth_dbf_list_mutex);
  5043. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  5044. if (strcmp(entry->dbf_name, name) == 0) {
  5045. rc = entry->dbf_info;
  5046. break;
  5047. }
  5048. }
  5049. mutex_unlock(&qeth_dbf_list_mutex);
  5050. return rc;
  5051. }
  5052. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  5053. {
  5054. struct qeth_dbf_entry *new_entry;
  5055. card->debug = debug_register(name, 2, 1, 8);
  5056. if (!card->debug) {
  5057. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  5058. goto err;
  5059. }
  5060. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  5061. goto err_dbg;
  5062. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  5063. if (!new_entry)
  5064. goto err_dbg;
  5065. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  5066. new_entry->dbf_info = card->debug;
  5067. mutex_lock(&qeth_dbf_list_mutex);
  5068. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  5069. mutex_unlock(&qeth_dbf_list_mutex);
  5070. return 0;
  5071. err_dbg:
  5072. debug_unregister(card->debug);
  5073. err:
  5074. return -ENOMEM;
  5075. }
  5076. static void qeth_clear_dbf_list(void)
  5077. {
  5078. struct qeth_dbf_entry *entry, *tmp;
  5079. mutex_lock(&qeth_dbf_list_mutex);
  5080. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  5081. list_del(&entry->dbf_list);
  5082. debug_unregister(entry->dbf_info);
  5083. kfree(entry);
  5084. }
  5085. mutex_unlock(&qeth_dbf_list_mutex);
  5086. }
  5087. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  5088. {
  5089. struct qeth_card *card;
  5090. struct device *dev;
  5091. int rc;
  5092. enum qeth_discipline_id enforced_disc;
  5093. unsigned long flags;
  5094. char dbf_name[DBF_NAME_LEN];
  5095. QETH_DBF_TEXT(SETUP, 2, "probedev");
  5096. dev = &gdev->dev;
  5097. if (!get_device(dev))
  5098. return -ENODEV;
  5099. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  5100. card = qeth_alloc_card();
  5101. if (!card) {
  5102. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  5103. rc = -ENOMEM;
  5104. goto err_dev;
  5105. }
  5106. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  5107. dev_name(&gdev->dev));
  5108. card->debug = qeth_get_dbf_entry(dbf_name);
  5109. if (!card->debug) {
  5110. rc = qeth_add_dbf_entry(card, dbf_name);
  5111. if (rc)
  5112. goto err_card;
  5113. }
  5114. card->read.ccwdev = gdev->cdev[0];
  5115. card->write.ccwdev = gdev->cdev[1];
  5116. card->data.ccwdev = gdev->cdev[2];
  5117. dev_set_drvdata(&gdev->dev, card);
  5118. card->gdev = gdev;
  5119. gdev->cdev[0]->handler = qeth_irq;
  5120. gdev->cdev[1]->handler = qeth_irq;
  5121. gdev->cdev[2]->handler = qeth_irq;
  5122. qeth_determine_card_type(card);
  5123. rc = qeth_setup_card(card);
  5124. if (rc) {
  5125. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  5126. goto err_card;
  5127. }
  5128. qeth_determine_capabilities(card);
  5129. enforced_disc = qeth_enforce_discipline(card);
  5130. switch (enforced_disc) {
  5131. case QETH_DISCIPLINE_UNDETERMINED:
  5132. gdev->dev.type = &qeth_generic_devtype;
  5133. break;
  5134. default:
  5135. card->info.layer_enforced = true;
  5136. rc = qeth_core_load_discipline(card, enforced_disc);
  5137. if (rc)
  5138. goto err_card;
  5139. gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
  5140. ? card->discipline->devtype
  5141. : &qeth_osn_devtype;
  5142. rc = card->discipline->setup(card->gdev);
  5143. if (rc)
  5144. goto err_disc;
  5145. break;
  5146. }
  5147. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5148. list_add_tail(&card->list, &qeth_core_card_list.list);
  5149. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5150. return 0;
  5151. err_disc:
  5152. qeth_core_free_discipline(card);
  5153. err_card:
  5154. qeth_core_free_card(card);
  5155. err_dev:
  5156. put_device(dev);
  5157. return rc;
  5158. }
  5159. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  5160. {
  5161. unsigned long flags;
  5162. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5163. QETH_DBF_TEXT(SETUP, 2, "removedv");
  5164. if (card->discipline) {
  5165. card->discipline->remove(gdev);
  5166. qeth_core_free_discipline(card);
  5167. }
  5168. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5169. list_del(&card->list);
  5170. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5171. qeth_core_free_card(card);
  5172. dev_set_drvdata(&gdev->dev, NULL);
  5173. put_device(&gdev->dev);
  5174. return;
  5175. }
  5176. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  5177. {
  5178. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5179. int rc = 0;
  5180. enum qeth_discipline_id def_discipline;
  5181. if (!card->discipline) {
  5182. if (card->info.type == QETH_CARD_TYPE_IQD)
  5183. def_discipline = QETH_DISCIPLINE_LAYER3;
  5184. else
  5185. def_discipline = QETH_DISCIPLINE_LAYER2;
  5186. rc = qeth_core_load_discipline(card, def_discipline);
  5187. if (rc)
  5188. goto err;
  5189. rc = card->discipline->setup(card->gdev);
  5190. if (rc) {
  5191. qeth_core_free_discipline(card);
  5192. goto err;
  5193. }
  5194. }
  5195. rc = card->discipline->set_online(gdev);
  5196. err:
  5197. return rc;
  5198. }
  5199. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  5200. {
  5201. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5202. return card->discipline->set_offline(gdev);
  5203. }
  5204. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  5205. {
  5206. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5207. qeth_set_allowed_threads(card, 0, 1);
  5208. if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
  5209. qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
  5210. qeth_qdio_clear_card(card, 0);
  5211. qeth_clear_qdio_buffers(card);
  5212. qdio_free(CARD_DDEV(card));
  5213. }
  5214. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  5215. {
  5216. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5217. if (card->discipline && card->discipline->freeze)
  5218. return card->discipline->freeze(gdev);
  5219. return 0;
  5220. }
  5221. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  5222. {
  5223. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5224. if (card->discipline && card->discipline->thaw)
  5225. return card->discipline->thaw(gdev);
  5226. return 0;
  5227. }
  5228. static int qeth_core_restore(struct ccwgroup_device *gdev)
  5229. {
  5230. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5231. if (card->discipline && card->discipline->restore)
  5232. return card->discipline->restore(gdev);
  5233. return 0;
  5234. }
  5235. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  5236. .driver = {
  5237. .owner = THIS_MODULE,
  5238. .name = "qeth",
  5239. },
  5240. .ccw_driver = &qeth_ccw_driver,
  5241. .setup = qeth_core_probe_device,
  5242. .remove = qeth_core_remove_device,
  5243. .set_online = qeth_core_set_online,
  5244. .set_offline = qeth_core_set_offline,
  5245. .shutdown = qeth_core_shutdown,
  5246. .prepare = NULL,
  5247. .complete = NULL,
  5248. .freeze = qeth_core_freeze,
  5249. .thaw = qeth_core_thaw,
  5250. .restore = qeth_core_restore,
  5251. };
  5252. static ssize_t group_store(struct device_driver *ddrv, const char *buf,
  5253. size_t count)
  5254. {
  5255. int err;
  5256. err = ccwgroup_create_dev(qeth_core_root_dev,
  5257. &qeth_core_ccwgroup_driver, 3, buf);
  5258. return err ? err : count;
  5259. }
  5260. static DRIVER_ATTR_WO(group);
  5261. static struct attribute *qeth_drv_attrs[] = {
  5262. &driver_attr_group.attr,
  5263. NULL,
  5264. };
  5265. static struct attribute_group qeth_drv_attr_group = {
  5266. .attrs = qeth_drv_attrs,
  5267. };
  5268. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5269. &qeth_drv_attr_group,
  5270. NULL,
  5271. };
  5272. int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  5273. {
  5274. struct qeth_card *card = dev->ml_priv;
  5275. struct mii_ioctl_data *mii_data;
  5276. int rc = 0;
  5277. if (!card)
  5278. return -ENODEV;
  5279. if (!qeth_card_hw_is_reachable(card))
  5280. return -ENODEV;
  5281. if (card->info.type == QETH_CARD_TYPE_OSN)
  5282. return -EPERM;
  5283. switch (cmd) {
  5284. case SIOC_QETH_ADP_SET_SNMP_CONTROL:
  5285. rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
  5286. break;
  5287. case SIOC_QETH_GET_CARD_TYPE:
  5288. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  5289. card->info.type == QETH_CARD_TYPE_OSM ||
  5290. card->info.type == QETH_CARD_TYPE_OSX) &&
  5291. !card->info.guestlan)
  5292. return 1;
  5293. else
  5294. return 0;
  5295. case SIOCGMIIPHY:
  5296. mii_data = if_mii(rq);
  5297. mii_data->phy_id = 0;
  5298. break;
  5299. case SIOCGMIIREG:
  5300. mii_data = if_mii(rq);
  5301. if (mii_data->phy_id != 0)
  5302. rc = -EINVAL;
  5303. else
  5304. mii_data->val_out = qeth_mdio_read(dev,
  5305. mii_data->phy_id, mii_data->reg_num);
  5306. break;
  5307. case SIOC_QETH_QUERY_OAT:
  5308. rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
  5309. break;
  5310. default:
  5311. if (card->discipline->do_ioctl)
  5312. rc = card->discipline->do_ioctl(dev, rq, cmd);
  5313. else
  5314. rc = -EOPNOTSUPP;
  5315. }
  5316. if (rc)
  5317. QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
  5318. return rc;
  5319. }
  5320. EXPORT_SYMBOL_GPL(qeth_do_ioctl);
  5321. static struct {
  5322. const char str[ETH_GSTRING_LEN];
  5323. } qeth_ethtool_stats_keys[] = {
  5324. /* 0 */{"rx skbs"},
  5325. {"rx buffers"},
  5326. {"tx skbs"},
  5327. {"tx buffers"},
  5328. {"tx skbs no packing"},
  5329. {"tx buffers no packing"},
  5330. {"tx skbs packing"},
  5331. {"tx buffers packing"},
  5332. {"tx sg skbs"},
  5333. {"tx sg frags"},
  5334. /* 10 */{"rx sg skbs"},
  5335. {"rx sg frags"},
  5336. {"rx sg page allocs"},
  5337. {"tx large kbytes"},
  5338. {"tx large count"},
  5339. {"tx pk state ch n->p"},
  5340. {"tx pk state ch p->n"},
  5341. {"tx pk watermark low"},
  5342. {"tx pk watermark high"},
  5343. {"queue 0 buffer usage"},
  5344. /* 20 */{"queue 1 buffer usage"},
  5345. {"queue 2 buffer usage"},
  5346. {"queue 3 buffer usage"},
  5347. {"rx poll time"},
  5348. {"rx poll count"},
  5349. {"rx do_QDIO time"},
  5350. {"rx do_QDIO count"},
  5351. {"tx handler time"},
  5352. {"tx handler count"},
  5353. {"tx time"},
  5354. /* 30 */{"tx count"},
  5355. {"tx do_QDIO time"},
  5356. {"tx do_QDIO count"},
  5357. {"tx csum"},
  5358. {"tx lin"},
  5359. {"tx linfail"},
  5360. {"cq handler count"},
  5361. {"cq handler time"}
  5362. };
  5363. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5364. {
  5365. switch (stringset) {
  5366. case ETH_SS_STATS:
  5367. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5368. default:
  5369. return -EINVAL;
  5370. }
  5371. }
  5372. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5373. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5374. struct ethtool_stats *stats, u64 *data)
  5375. {
  5376. struct qeth_card *card = dev->ml_priv;
  5377. data[0] = card->stats.rx_packets -
  5378. card->perf_stats.initial_rx_packets;
  5379. data[1] = card->perf_stats.bufs_rec;
  5380. data[2] = card->stats.tx_packets -
  5381. card->perf_stats.initial_tx_packets;
  5382. data[3] = card->perf_stats.bufs_sent;
  5383. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5384. - card->perf_stats.skbs_sent_pack;
  5385. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5386. data[6] = card->perf_stats.skbs_sent_pack;
  5387. data[7] = card->perf_stats.bufs_sent_pack;
  5388. data[8] = card->perf_stats.sg_skbs_sent;
  5389. data[9] = card->perf_stats.sg_frags_sent;
  5390. data[10] = card->perf_stats.sg_skbs_rx;
  5391. data[11] = card->perf_stats.sg_frags_rx;
  5392. data[12] = card->perf_stats.sg_alloc_page_rx;
  5393. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5394. data[14] = card->perf_stats.large_send_cnt;
  5395. data[15] = card->perf_stats.sc_dp_p;
  5396. data[16] = card->perf_stats.sc_p_dp;
  5397. data[17] = QETH_LOW_WATERMARK_PACK;
  5398. data[18] = QETH_HIGH_WATERMARK_PACK;
  5399. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5400. data[20] = (card->qdio.no_out_queues > 1) ?
  5401. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5402. data[21] = (card->qdio.no_out_queues > 2) ?
  5403. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5404. data[22] = (card->qdio.no_out_queues > 3) ?
  5405. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5406. data[23] = card->perf_stats.inbound_time;
  5407. data[24] = card->perf_stats.inbound_cnt;
  5408. data[25] = card->perf_stats.inbound_do_qdio_time;
  5409. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5410. data[27] = card->perf_stats.outbound_handler_time;
  5411. data[28] = card->perf_stats.outbound_handler_cnt;
  5412. data[29] = card->perf_stats.outbound_time;
  5413. data[30] = card->perf_stats.outbound_cnt;
  5414. data[31] = card->perf_stats.outbound_do_qdio_time;
  5415. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5416. data[33] = card->perf_stats.tx_csum;
  5417. data[34] = card->perf_stats.tx_lin;
  5418. data[35] = card->perf_stats.tx_linfail;
  5419. data[36] = card->perf_stats.cq_cnt;
  5420. data[37] = card->perf_stats.cq_time;
  5421. }
  5422. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5423. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5424. {
  5425. switch (stringset) {
  5426. case ETH_SS_STATS:
  5427. memcpy(data, &qeth_ethtool_stats_keys,
  5428. sizeof(qeth_ethtool_stats_keys));
  5429. break;
  5430. default:
  5431. WARN_ON(1);
  5432. break;
  5433. }
  5434. }
  5435. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5436. void qeth_core_get_drvinfo(struct net_device *dev,
  5437. struct ethtool_drvinfo *info)
  5438. {
  5439. struct qeth_card *card = dev->ml_priv;
  5440. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5441. sizeof(info->driver));
  5442. strlcpy(info->version, "1.0", sizeof(info->version));
  5443. strlcpy(info->fw_version, card->info.mcl_level,
  5444. sizeof(info->fw_version));
  5445. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5446. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5447. }
  5448. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5449. /* Helper function to fill 'advertising' and 'supported' which are the same. */
  5450. /* Autoneg and full-duplex are supported and advertised unconditionally. */
  5451. /* Always advertise and support all speeds up to specified, and only one */
  5452. /* specified port type. */
  5453. static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
  5454. int maxspeed, int porttype)
  5455. {
  5456. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  5457. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  5458. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  5459. ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
  5460. ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
  5461. switch (porttype) {
  5462. case PORT_TP:
  5463. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5464. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5465. break;
  5466. case PORT_FIBRE:
  5467. ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
  5468. ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
  5469. break;
  5470. default:
  5471. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5472. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5473. WARN_ON_ONCE(1);
  5474. }
  5475. /* fallthrough from high to low, to select all legal speeds: */
  5476. switch (maxspeed) {
  5477. case SPEED_10000:
  5478. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5479. 10000baseT_Full);
  5480. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5481. 10000baseT_Full);
  5482. case SPEED_1000:
  5483. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5484. 1000baseT_Full);
  5485. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5486. 1000baseT_Full);
  5487. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5488. 1000baseT_Half);
  5489. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5490. 1000baseT_Half);
  5491. case SPEED_100:
  5492. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5493. 100baseT_Full);
  5494. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5495. 100baseT_Full);
  5496. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5497. 100baseT_Half);
  5498. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5499. 100baseT_Half);
  5500. case SPEED_10:
  5501. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5502. 10baseT_Full);
  5503. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5504. 10baseT_Full);
  5505. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5506. 10baseT_Half);
  5507. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5508. 10baseT_Half);
  5509. /* end fallthrough */
  5510. break;
  5511. default:
  5512. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5513. 10baseT_Full);
  5514. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5515. 10baseT_Full);
  5516. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5517. 10baseT_Half);
  5518. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5519. 10baseT_Half);
  5520. WARN_ON_ONCE(1);
  5521. }
  5522. }
  5523. int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
  5524. struct ethtool_link_ksettings *cmd)
  5525. {
  5526. struct qeth_card *card = netdev->ml_priv;
  5527. enum qeth_link_types link_type;
  5528. struct carrier_info carrier_info;
  5529. int rc;
  5530. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5531. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5532. else
  5533. link_type = card->info.link_type;
  5534. cmd->base.duplex = DUPLEX_FULL;
  5535. cmd->base.autoneg = AUTONEG_ENABLE;
  5536. cmd->base.phy_address = 0;
  5537. cmd->base.mdio_support = 0;
  5538. cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
  5539. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
  5540. switch (link_type) {
  5541. case QETH_LINK_TYPE_FAST_ETH:
  5542. case QETH_LINK_TYPE_LANE_ETH100:
  5543. cmd->base.speed = SPEED_100;
  5544. cmd->base.port = PORT_TP;
  5545. break;
  5546. case QETH_LINK_TYPE_GBIT_ETH:
  5547. case QETH_LINK_TYPE_LANE_ETH1000:
  5548. cmd->base.speed = SPEED_1000;
  5549. cmd->base.port = PORT_FIBRE;
  5550. break;
  5551. case QETH_LINK_TYPE_10GBIT_ETH:
  5552. cmd->base.speed = SPEED_10000;
  5553. cmd->base.port = PORT_FIBRE;
  5554. break;
  5555. default:
  5556. cmd->base.speed = SPEED_10;
  5557. cmd->base.port = PORT_TP;
  5558. }
  5559. qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
  5560. /* Check if we can obtain more accurate information. */
  5561. /* If QUERY_CARD_INFO command is not supported or fails, */
  5562. /* just return the heuristics that was filled above. */
  5563. if (!qeth_card_hw_is_reachable(card))
  5564. return -ENODEV;
  5565. rc = qeth_query_card_info(card, &carrier_info);
  5566. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5567. return 0;
  5568. if (rc) /* report error from the hardware operation */
  5569. return rc;
  5570. /* on success, fill in the information got from the hardware */
  5571. netdev_dbg(netdev,
  5572. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5573. carrier_info.card_type,
  5574. carrier_info.port_mode,
  5575. carrier_info.port_speed);
  5576. /* Update attributes for which we've obtained more authoritative */
  5577. /* information, leave the rest the way they where filled above. */
  5578. switch (carrier_info.card_type) {
  5579. case CARD_INFO_TYPE_1G_COPPER_A:
  5580. case CARD_INFO_TYPE_1G_COPPER_B:
  5581. cmd->base.port = PORT_TP;
  5582. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5583. break;
  5584. case CARD_INFO_TYPE_1G_FIBRE_A:
  5585. case CARD_INFO_TYPE_1G_FIBRE_B:
  5586. cmd->base.port = PORT_FIBRE;
  5587. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5588. break;
  5589. case CARD_INFO_TYPE_10G_FIBRE_A:
  5590. case CARD_INFO_TYPE_10G_FIBRE_B:
  5591. cmd->base.port = PORT_FIBRE;
  5592. qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
  5593. break;
  5594. }
  5595. switch (carrier_info.port_mode) {
  5596. case CARD_INFO_PORTM_FULLDUPLEX:
  5597. cmd->base.duplex = DUPLEX_FULL;
  5598. break;
  5599. case CARD_INFO_PORTM_HALFDUPLEX:
  5600. cmd->base.duplex = DUPLEX_HALF;
  5601. break;
  5602. }
  5603. switch (carrier_info.port_speed) {
  5604. case CARD_INFO_PORTS_10M:
  5605. cmd->base.speed = SPEED_10;
  5606. break;
  5607. case CARD_INFO_PORTS_100M:
  5608. cmd->base.speed = SPEED_100;
  5609. break;
  5610. case CARD_INFO_PORTS_1G:
  5611. cmd->base.speed = SPEED_1000;
  5612. break;
  5613. case CARD_INFO_PORTS_10G:
  5614. cmd->base.speed = SPEED_10000;
  5615. break;
  5616. }
  5617. return 0;
  5618. }
  5619. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
  5620. /* Callback to handle checksum offload command reply from OSA card.
  5621. * Verify that required features have been enabled on the card.
  5622. * Return error in hdr->return_code as this value is checked by caller.
  5623. *
  5624. * Always returns zero to indicate no further messages from the OSA card.
  5625. */
  5626. static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
  5627. struct qeth_reply *reply,
  5628. unsigned long data)
  5629. {
  5630. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  5631. struct qeth_checksum_cmd *chksum_cb =
  5632. (struct qeth_checksum_cmd *)reply->param;
  5633. QETH_CARD_TEXT(card, 4, "chkdoccb");
  5634. if (qeth_setassparms_inspect_rc(cmd))
  5635. return 0;
  5636. memset(chksum_cb, 0, sizeof(*chksum_cb));
  5637. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
  5638. chksum_cb->supported =
  5639. cmd->data.setassparms.data.chksum.supported;
  5640. QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
  5641. }
  5642. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
  5643. chksum_cb->supported =
  5644. cmd->data.setassparms.data.chksum.supported;
  5645. chksum_cb->enabled =
  5646. cmd->data.setassparms.data.chksum.enabled;
  5647. QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
  5648. QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
  5649. }
  5650. return 0;
  5651. }
  5652. /* Send command to OSA card and check results. */
  5653. static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
  5654. enum qeth_ipa_funcs ipa_func,
  5655. __u16 cmd_code, long data,
  5656. struct qeth_checksum_cmd *chksum_cb)
  5657. {
  5658. struct qeth_cmd_buffer *iob;
  5659. int rc = -ENOMEM;
  5660. QETH_CARD_TEXT(card, 4, "chkdocmd");
  5661. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  5662. sizeof(__u32), QETH_PROT_IPV4);
  5663. if (iob)
  5664. rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
  5665. qeth_ipa_checksum_run_cmd_cb,
  5666. chksum_cb);
  5667. return rc;
  5668. }
  5669. static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
  5670. {
  5671. const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
  5672. QETH_IPA_CHECKSUM_UDP |
  5673. QETH_IPA_CHECKSUM_TCP;
  5674. struct qeth_checksum_cmd chksum_cb;
  5675. int rc;
  5676. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
  5677. &chksum_cb);
  5678. if (!rc) {
  5679. if ((required_features & chksum_cb.supported) !=
  5680. required_features)
  5681. rc = -EIO;
  5682. else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
  5683. cstype == IPA_INBOUND_CHECKSUM)
  5684. dev_warn(&card->gdev->dev,
  5685. "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
  5686. QETH_CARD_IFNAME(card));
  5687. }
  5688. if (rc) {
  5689. qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
  5690. dev_warn(&card->gdev->dev,
  5691. "Starting HW checksumming for %s failed, using SW checksumming\n",
  5692. QETH_CARD_IFNAME(card));
  5693. return rc;
  5694. }
  5695. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
  5696. chksum_cb.supported, &chksum_cb);
  5697. if (!rc) {
  5698. if ((required_features & chksum_cb.enabled) !=
  5699. required_features)
  5700. rc = -EIO;
  5701. }
  5702. if (rc) {
  5703. qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
  5704. dev_warn(&card->gdev->dev,
  5705. "Enabling HW checksumming for %s failed, using SW checksumming\n",
  5706. QETH_CARD_IFNAME(card));
  5707. return rc;
  5708. }
  5709. dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
  5710. cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
  5711. return 0;
  5712. }
  5713. static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
  5714. {
  5715. int rc = (on) ? qeth_send_checksum_on(card, cstype)
  5716. : qeth_send_simple_setassparms(card, cstype,
  5717. IPA_CMD_ASS_STOP, 0);
  5718. return rc ? -EIO : 0;
  5719. }
  5720. static int qeth_set_ipa_tso(struct qeth_card *card, int on)
  5721. {
  5722. int rc;
  5723. QETH_CARD_TEXT(card, 3, "sttso");
  5724. if (on) {
  5725. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5726. IPA_CMD_ASS_START, 0);
  5727. if (rc) {
  5728. dev_warn(&card->gdev->dev,
  5729. "Starting outbound TCP segmentation offload for %s failed\n",
  5730. QETH_CARD_IFNAME(card));
  5731. return -EIO;
  5732. }
  5733. dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
  5734. } else {
  5735. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5736. IPA_CMD_ASS_STOP, 0);
  5737. }
  5738. return rc;
  5739. }
  5740. #define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO)
  5741. /**
  5742. * qeth_recover_features() - Restore device features after recovery
  5743. * @dev: the recovering net_device
  5744. *
  5745. * Caller must hold rtnl lock.
  5746. */
  5747. void qeth_recover_features(struct net_device *dev)
  5748. {
  5749. netdev_features_t features = dev->features;
  5750. struct qeth_card *card = dev->ml_priv;
  5751. /* force-off any feature that needs an IPA sequence.
  5752. * netdev_update_features() will restart them.
  5753. */
  5754. dev->features &= ~QETH_HW_FEATURES;
  5755. netdev_update_features(dev);
  5756. if (features == dev->features)
  5757. return;
  5758. dev_warn(&card->gdev->dev,
  5759. "Device recovery failed to restore all offload features\n");
  5760. }
  5761. EXPORT_SYMBOL_GPL(qeth_recover_features);
  5762. int qeth_set_features(struct net_device *dev, netdev_features_t features)
  5763. {
  5764. struct qeth_card *card = dev->ml_priv;
  5765. netdev_features_t changed = dev->features ^ features;
  5766. int rc = 0;
  5767. QETH_DBF_TEXT(SETUP, 2, "setfeat");
  5768. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5769. if ((changed & NETIF_F_IP_CSUM)) {
  5770. rc = qeth_set_ipa_csum(card,
  5771. features & NETIF_F_IP_CSUM ? 1 : 0,
  5772. IPA_OUTBOUND_CHECKSUM);
  5773. if (rc)
  5774. changed ^= NETIF_F_IP_CSUM;
  5775. }
  5776. if ((changed & NETIF_F_RXCSUM)) {
  5777. rc = qeth_set_ipa_csum(card,
  5778. features & NETIF_F_RXCSUM ? 1 : 0,
  5779. IPA_INBOUND_CHECKSUM);
  5780. if (rc)
  5781. changed ^= NETIF_F_RXCSUM;
  5782. }
  5783. if ((changed & NETIF_F_TSO)) {
  5784. rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
  5785. if (rc)
  5786. changed ^= NETIF_F_TSO;
  5787. }
  5788. /* everything changed successfully? */
  5789. if ((dev->features ^ features) == changed)
  5790. return 0;
  5791. /* something went wrong. save changed features and return error */
  5792. dev->features ^= changed;
  5793. return -EIO;
  5794. }
  5795. EXPORT_SYMBOL_GPL(qeth_set_features);
  5796. netdev_features_t qeth_fix_features(struct net_device *dev,
  5797. netdev_features_t features)
  5798. {
  5799. struct qeth_card *card = dev->ml_priv;
  5800. QETH_DBF_TEXT(SETUP, 2, "fixfeat");
  5801. if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
  5802. features &= ~NETIF_F_IP_CSUM;
  5803. if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
  5804. features &= ~NETIF_F_RXCSUM;
  5805. if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
  5806. features &= ~NETIF_F_TSO;
  5807. /* if the card isn't up, remove features that require hw changes */
  5808. if (card->state == CARD_STATE_DOWN ||
  5809. card->state == CARD_STATE_RECOVER)
  5810. features &= ~QETH_HW_FEATURES;
  5811. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5812. return features;
  5813. }
  5814. EXPORT_SYMBOL_GPL(qeth_fix_features);
  5815. netdev_features_t qeth_features_check(struct sk_buff *skb,
  5816. struct net_device *dev,
  5817. netdev_features_t features)
  5818. {
  5819. /* GSO segmentation builds skbs with
  5820. * a (small) linear part for the headers, and
  5821. * page frags for the data.
  5822. * Compared to a linear skb, the header-only part consumes an
  5823. * additional buffer element. This reduces buffer utilization, and
  5824. * hurts throughput. So compress small segments into one element.
  5825. */
  5826. if (netif_needs_gso(skb, features)) {
  5827. /* match skb_segment(): */
  5828. unsigned int doffset = skb->data - skb_mac_header(skb);
  5829. unsigned int hsize = skb_shinfo(skb)->gso_size;
  5830. unsigned int hroom = skb_headroom(skb);
  5831. /* linearize only if resulting skb allocations are order-0: */
  5832. if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
  5833. features &= ~NETIF_F_SG;
  5834. }
  5835. return vlan_features_check(skb, features);
  5836. }
  5837. EXPORT_SYMBOL_GPL(qeth_features_check);
  5838. static int __init qeth_core_init(void)
  5839. {
  5840. int rc;
  5841. pr_info("loading core functions\n");
  5842. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5843. INIT_LIST_HEAD(&qeth_dbf_list);
  5844. rwlock_init(&qeth_core_card_list.rwlock);
  5845. mutex_init(&qeth_mod_mutex);
  5846. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5847. rc = qeth_register_dbf_views();
  5848. if (rc)
  5849. goto out_err;
  5850. qeth_core_root_dev = root_device_register("qeth");
  5851. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5852. if (rc)
  5853. goto register_err;
  5854. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5855. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5856. if (!qeth_core_header_cache) {
  5857. rc = -ENOMEM;
  5858. goto slab_err;
  5859. }
  5860. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5861. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5862. if (!qeth_qdio_outbuf_cache) {
  5863. rc = -ENOMEM;
  5864. goto cqslab_err;
  5865. }
  5866. rc = ccw_driver_register(&qeth_ccw_driver);
  5867. if (rc)
  5868. goto ccw_err;
  5869. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5870. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5871. if (rc)
  5872. goto ccwgroup_err;
  5873. return 0;
  5874. ccwgroup_err:
  5875. ccw_driver_unregister(&qeth_ccw_driver);
  5876. ccw_err:
  5877. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5878. cqslab_err:
  5879. kmem_cache_destroy(qeth_core_header_cache);
  5880. slab_err:
  5881. root_device_unregister(qeth_core_root_dev);
  5882. register_err:
  5883. qeth_unregister_dbf_views();
  5884. out_err:
  5885. pr_err("Initializing the qeth device driver failed\n");
  5886. return rc;
  5887. }
  5888. static void __exit qeth_core_exit(void)
  5889. {
  5890. qeth_clear_dbf_list();
  5891. destroy_workqueue(qeth_wq);
  5892. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5893. ccw_driver_unregister(&qeth_ccw_driver);
  5894. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5895. kmem_cache_destroy(qeth_core_header_cache);
  5896. root_device_unregister(qeth_core_root_dev);
  5897. qeth_unregister_dbf_views();
  5898. pr_info("core functions removed\n");
  5899. }
  5900. module_init(qeth_core_init);
  5901. module_exit(qeth_core_exit);
  5902. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5903. MODULE_DESCRIPTION("qeth core functions");
  5904. MODULE_LICENSE("GPL");