usbmisc_imx.c 16 KB

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  1. /*
  2. * Copyright 2012 Freescale Semiconductor, Inc.
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include <linux/module.h>
  12. #include <linux/of_platform.h>
  13. #include <linux/err.h>
  14. #include <linux/io.h>
  15. #include <linux/delay.h>
  16. #include "ci_hdrc_imx.h"
  17. #define MX25_USB_PHY_CTRL_OFFSET 0x08
  18. #define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23)
  19. #define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
  20. #define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0)
  21. #define MX25_EHCI_INTERFACE_MASK (0xf)
  22. #define MX25_OTG_SIC_SHIFT 29
  23. #define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)
  24. #define MX25_OTG_PM_BIT BIT(24)
  25. #define MX25_OTG_PP_BIT BIT(11)
  26. #define MX25_OTG_OCPOL_BIT BIT(3)
  27. #define MX25_H1_SIC_SHIFT 21
  28. #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
  29. #define MX25_H1_PP_BIT BIT(18)
  30. #define MX25_H1_PM_BIT BIT(16)
  31. #define MX25_H1_IPPUE_UP_BIT BIT(7)
  32. #define MX25_H1_IPPUE_DOWN_BIT BIT(6)
  33. #define MX25_H1_TLL_BIT BIT(5)
  34. #define MX25_H1_USBTE_BIT BIT(4)
  35. #define MX25_H1_OCPOL_BIT BIT(2)
  36. #define MX27_H1_PM_BIT BIT(8)
  37. #define MX27_H2_PM_BIT BIT(16)
  38. #define MX27_OTG_PM_BIT BIT(24)
  39. #define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08
  40. #define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c
  41. #define MX53_USB_CTRL_1_OFFSET 0x10
  42. #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2)
  43. #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI BIT(2)
  44. #define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK (0x11 << 6)
  45. #define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI BIT(6)
  46. #define MX53_USB_UH2_CTRL_OFFSET 0x14
  47. #define MX53_USB_UH3_CTRL_OFFSET 0x18
  48. #define MX53_USB_CLKONOFF_CTRL_OFFSET 0x24
  49. #define MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF BIT(21)
  50. #define MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF BIT(22)
  51. #define MX53_BM_OVER_CUR_DIS_H1 BIT(5)
  52. #define MX53_BM_OVER_CUR_DIS_OTG BIT(8)
  53. #define MX53_BM_OVER_CUR_DIS_UHx BIT(30)
  54. #define MX53_USB_CTRL_1_UH2_ULPI_EN BIT(26)
  55. #define MX53_USB_CTRL_1_UH3_ULPI_EN BIT(27)
  56. #define MX53_USB_UHx_CTRL_WAKE_UP_EN BIT(7)
  57. #define MX53_USB_UHx_CTRL_ULPI_INT_EN BIT(8)
  58. #define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3
  59. #define MX53_USB_PLL_DIV_24_MHZ 0x01
  60. #define MX6_BM_NON_BURST_SETTING BIT(1)
  61. #define MX6_BM_OVER_CUR_DIS BIT(7)
  62. #define MX6_BM_OVER_CUR_POLARITY BIT(8)
  63. #define MX6_BM_WAKEUP_ENABLE BIT(10)
  64. #define MX6_BM_ID_WAKEUP BIT(16)
  65. #define MX6_BM_VBUS_WAKEUP BIT(17)
  66. #define MX6SX_BM_DPDM_WAKEUP_EN BIT(29)
  67. #define MX6_BM_WAKEUP_INTR BIT(31)
  68. #define MX6_USB_OTG1_PHY_CTRL 0x18
  69. /* For imx6dql, it is host-only controller, for later imx6, it is otg's */
  70. #define MX6_USB_OTG2_PHY_CTRL 0x1c
  71. #define MX6SX_USB_VBUS_WAKEUP_SOURCE(v) (v << 8)
  72. #define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS MX6SX_USB_VBUS_WAKEUP_SOURCE(0)
  73. #define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(1)
  74. #define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(2)
  75. #define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END MX6SX_USB_VBUS_WAKEUP_SOURCE(3)
  76. #define VF610_OVER_CUR_DIS BIT(7)
  77. #define MX7D_USBNC_USB_CTRL2 0x4
  78. #define MX7D_USB_VBUS_WAKEUP_SOURCE_MASK 0x3
  79. #define MX7D_USB_VBUS_WAKEUP_SOURCE(v) (v << 0)
  80. #define MX7D_USB_VBUS_WAKEUP_SOURCE_VBUS MX7D_USB_VBUS_WAKEUP_SOURCE(0)
  81. #define MX7D_USB_VBUS_WAKEUP_SOURCE_AVALID MX7D_USB_VBUS_WAKEUP_SOURCE(1)
  82. #define MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID MX7D_USB_VBUS_WAKEUP_SOURCE(2)
  83. #define MX7D_USB_VBUS_WAKEUP_SOURCE_SESS_END MX7D_USB_VBUS_WAKEUP_SOURCE(3)
  84. struct usbmisc_ops {
  85. /* It's called once when probe a usb device */
  86. int (*init)(struct imx_usbmisc_data *data);
  87. /* It's called once after adding a usb device */
  88. int (*post)(struct imx_usbmisc_data *data);
  89. /* It's called when we need to enable/disable usb wakeup */
  90. int (*set_wakeup)(struct imx_usbmisc_data *data, bool enabled);
  91. };
  92. struct imx_usbmisc {
  93. void __iomem *base;
  94. spinlock_t lock;
  95. const struct usbmisc_ops *ops;
  96. };
  97. static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data);
  98. static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
  99. {
  100. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  101. unsigned long flags;
  102. u32 val = 0;
  103. if (data->index > 1)
  104. return -EINVAL;
  105. spin_lock_irqsave(&usbmisc->lock, flags);
  106. switch (data->index) {
  107. case 0:
  108. val = readl(usbmisc->base);
  109. val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT);
  110. val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
  111. val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT);
  112. writel(val, usbmisc->base);
  113. break;
  114. case 1:
  115. val = readl(usbmisc->base);
  116. val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT | MX25_H1_IPPUE_UP_BIT);
  117. val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
  118. val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT |
  119. MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT);
  120. writel(val, usbmisc->base);
  121. break;
  122. }
  123. spin_unlock_irqrestore(&usbmisc->lock, flags);
  124. return 0;
  125. }
  126. static int usbmisc_imx25_post(struct imx_usbmisc_data *data)
  127. {
  128. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  129. void __iomem *reg;
  130. unsigned long flags;
  131. u32 val;
  132. if (data->index > 2)
  133. return -EINVAL;
  134. if (data->evdo) {
  135. spin_lock_irqsave(&usbmisc->lock, flags);
  136. reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET;
  137. val = readl(reg);
  138. writel(val | MX25_BM_EXTERNAL_VBUS_DIVIDER, reg);
  139. spin_unlock_irqrestore(&usbmisc->lock, flags);
  140. usleep_range(5000, 10000); /* needed to stabilize voltage */
  141. }
  142. return 0;
  143. }
  144. static int usbmisc_imx27_init(struct imx_usbmisc_data *data)
  145. {
  146. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  147. unsigned long flags;
  148. u32 val;
  149. switch (data->index) {
  150. case 0:
  151. val = MX27_OTG_PM_BIT;
  152. break;
  153. case 1:
  154. val = MX27_H1_PM_BIT;
  155. break;
  156. case 2:
  157. val = MX27_H2_PM_BIT;
  158. break;
  159. default:
  160. return -EINVAL;
  161. }
  162. spin_lock_irqsave(&usbmisc->lock, flags);
  163. if (data->disable_oc)
  164. val = readl(usbmisc->base) | val;
  165. else
  166. val = readl(usbmisc->base) & ~val;
  167. writel(val, usbmisc->base);
  168. spin_unlock_irqrestore(&usbmisc->lock, flags);
  169. return 0;
  170. }
  171. static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
  172. {
  173. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  174. void __iomem *reg = NULL;
  175. unsigned long flags;
  176. u32 val = 0;
  177. if (data->index > 3)
  178. return -EINVAL;
  179. /* Select a 24 MHz reference clock for the PHY */
  180. val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
  181. val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK;
  182. val |= MX53_USB_PLL_DIV_24_MHZ;
  183. writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
  184. spin_lock_irqsave(&usbmisc->lock, flags);
  185. switch (data->index) {
  186. case 0:
  187. if (data->disable_oc) {
  188. reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
  189. val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG;
  190. writel(val, reg);
  191. }
  192. break;
  193. case 1:
  194. if (data->disable_oc) {
  195. reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
  196. val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1;
  197. writel(val, reg);
  198. }
  199. break;
  200. case 2:
  201. if (data->ulpi) {
  202. /* set USBH2 into ULPI-mode. */
  203. reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
  204. val = readl(reg) | MX53_USB_CTRL_1_UH2_ULPI_EN;
  205. /* select ULPI clock */
  206. val &= ~MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK;
  207. val |= MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI;
  208. writel(val, reg);
  209. /* Set interrupt wake up enable */
  210. reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
  211. val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
  212. | MX53_USB_UHx_CTRL_ULPI_INT_EN;
  213. writel(val, reg);
  214. if (is_imx53_usbmisc(data)) {
  215. /* Disable internal 60Mhz clock */
  216. reg = usbmisc->base +
  217. MX53_USB_CLKONOFF_CTRL_OFFSET;
  218. val = readl(reg) |
  219. MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF;
  220. writel(val, reg);
  221. }
  222. }
  223. if (data->disable_oc) {
  224. reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
  225. val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
  226. writel(val, reg);
  227. }
  228. break;
  229. case 3:
  230. if (data->ulpi) {
  231. /* set USBH3 into ULPI-mode. */
  232. reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
  233. val = readl(reg) | MX53_USB_CTRL_1_UH3_ULPI_EN;
  234. /* select ULPI clock */
  235. val &= ~MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK;
  236. val |= MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI;
  237. writel(val, reg);
  238. /* Set interrupt wake up enable */
  239. reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
  240. val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
  241. | MX53_USB_UHx_CTRL_ULPI_INT_EN;
  242. writel(val, reg);
  243. if (is_imx53_usbmisc(data)) {
  244. /* Disable internal 60Mhz clock */
  245. reg = usbmisc->base +
  246. MX53_USB_CLKONOFF_CTRL_OFFSET;
  247. val = readl(reg) |
  248. MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF;
  249. writel(val, reg);
  250. }
  251. }
  252. if (data->disable_oc) {
  253. reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
  254. val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
  255. writel(val, reg);
  256. }
  257. break;
  258. }
  259. spin_unlock_irqrestore(&usbmisc->lock, flags);
  260. return 0;
  261. }
  262. static int usbmisc_imx6q_set_wakeup
  263. (struct imx_usbmisc_data *data, bool enabled)
  264. {
  265. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  266. unsigned long flags;
  267. u32 val;
  268. u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE |
  269. MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP);
  270. int ret = 0;
  271. if (data->index > 3)
  272. return -EINVAL;
  273. spin_lock_irqsave(&usbmisc->lock, flags);
  274. val = readl(usbmisc->base + data->index * 4);
  275. if (enabled) {
  276. val |= wakeup_setting;
  277. writel(val, usbmisc->base + data->index * 4);
  278. } else {
  279. if (val & MX6_BM_WAKEUP_INTR)
  280. pr_debug("wakeup int at ci_hdrc.%d\n", data->index);
  281. val &= ~wakeup_setting;
  282. writel(val, usbmisc->base + data->index * 4);
  283. }
  284. spin_unlock_irqrestore(&usbmisc->lock, flags);
  285. return ret;
  286. }
  287. static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
  288. {
  289. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  290. unsigned long flags;
  291. u32 reg;
  292. if (data->index > 3)
  293. return -EINVAL;
  294. spin_lock_irqsave(&usbmisc->lock, flags);
  295. reg = readl(usbmisc->base + data->index * 4);
  296. if (data->disable_oc) {
  297. reg |= MX6_BM_OVER_CUR_DIS;
  298. } else if (data->oc_polarity == 1) {
  299. /* High active */
  300. reg &= ~(MX6_BM_OVER_CUR_DIS | MX6_BM_OVER_CUR_POLARITY);
  301. }
  302. writel(reg, usbmisc->base + data->index * 4);
  303. /* SoC non-burst setting */
  304. reg = readl(usbmisc->base + data->index * 4);
  305. writel(reg | MX6_BM_NON_BURST_SETTING,
  306. usbmisc->base + data->index * 4);
  307. spin_unlock_irqrestore(&usbmisc->lock, flags);
  308. usbmisc_imx6q_set_wakeup(data, false);
  309. return 0;
  310. }
  311. static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data)
  312. {
  313. void __iomem *reg = NULL;
  314. unsigned long flags;
  315. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  316. u32 val;
  317. usbmisc_imx6q_init(data);
  318. if (data->index == 0 || data->index == 1) {
  319. reg = usbmisc->base + MX6_USB_OTG1_PHY_CTRL + data->index * 4;
  320. spin_lock_irqsave(&usbmisc->lock, flags);
  321. /* Set vbus wakeup source as bvalid */
  322. val = readl(reg);
  323. writel(val | MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg);
  324. /*
  325. * Disable dp/dm wakeup in device mode when vbus is
  326. * not there.
  327. */
  328. val = readl(usbmisc->base + data->index * 4);
  329. writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN,
  330. usbmisc->base + data->index * 4);
  331. spin_unlock_irqrestore(&usbmisc->lock, flags);
  332. }
  333. return 0;
  334. }
  335. static int usbmisc_vf610_init(struct imx_usbmisc_data *data)
  336. {
  337. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  338. u32 reg;
  339. /*
  340. * Vybrid only has one misc register set, but in two different
  341. * areas. These is reflected in two instances of this driver.
  342. */
  343. if (data->index >= 1)
  344. return -EINVAL;
  345. if (data->disable_oc) {
  346. reg = readl(usbmisc->base);
  347. writel(reg | VF610_OVER_CUR_DIS, usbmisc->base);
  348. }
  349. return 0;
  350. }
  351. static int usbmisc_imx7d_set_wakeup
  352. (struct imx_usbmisc_data *data, bool enabled)
  353. {
  354. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  355. unsigned long flags;
  356. u32 val;
  357. u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE |
  358. MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP);
  359. spin_lock_irqsave(&usbmisc->lock, flags);
  360. val = readl(usbmisc->base);
  361. if (enabled) {
  362. writel(val | wakeup_setting, usbmisc->base);
  363. } else {
  364. if (val & MX6_BM_WAKEUP_INTR)
  365. dev_dbg(data->dev, "wakeup int\n");
  366. writel(val & ~wakeup_setting, usbmisc->base);
  367. }
  368. spin_unlock_irqrestore(&usbmisc->lock, flags);
  369. return 0;
  370. }
  371. static int usbmisc_imx7d_init(struct imx_usbmisc_data *data)
  372. {
  373. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  374. unsigned long flags;
  375. u32 reg;
  376. if (data->index >= 1)
  377. return -EINVAL;
  378. spin_lock_irqsave(&usbmisc->lock, flags);
  379. reg = readl(usbmisc->base);
  380. if (data->disable_oc) {
  381. reg |= MX6_BM_OVER_CUR_DIS;
  382. } else if (data->oc_polarity == 1) {
  383. /* High active */
  384. reg &= ~(MX6_BM_OVER_CUR_DIS | MX6_BM_OVER_CUR_POLARITY);
  385. }
  386. writel(reg, usbmisc->base);
  387. reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
  388. reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK;
  389. writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID,
  390. usbmisc->base + MX7D_USBNC_USB_CTRL2);
  391. spin_unlock_irqrestore(&usbmisc->lock, flags);
  392. usbmisc_imx7d_set_wakeup(data, false);
  393. return 0;
  394. }
  395. static const struct usbmisc_ops imx25_usbmisc_ops = {
  396. .init = usbmisc_imx25_init,
  397. .post = usbmisc_imx25_post,
  398. };
  399. static const struct usbmisc_ops imx27_usbmisc_ops = {
  400. .init = usbmisc_imx27_init,
  401. };
  402. static const struct usbmisc_ops imx51_usbmisc_ops = {
  403. .init = usbmisc_imx53_init,
  404. };
  405. static const struct usbmisc_ops imx53_usbmisc_ops = {
  406. .init = usbmisc_imx53_init,
  407. };
  408. static const struct usbmisc_ops imx6q_usbmisc_ops = {
  409. .set_wakeup = usbmisc_imx6q_set_wakeup,
  410. .init = usbmisc_imx6q_init,
  411. };
  412. static const struct usbmisc_ops vf610_usbmisc_ops = {
  413. .init = usbmisc_vf610_init,
  414. };
  415. static const struct usbmisc_ops imx6sx_usbmisc_ops = {
  416. .set_wakeup = usbmisc_imx6q_set_wakeup,
  417. .init = usbmisc_imx6sx_init,
  418. };
  419. static const struct usbmisc_ops imx7d_usbmisc_ops = {
  420. .init = usbmisc_imx7d_init,
  421. .set_wakeup = usbmisc_imx7d_set_wakeup,
  422. };
  423. static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data)
  424. {
  425. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  426. return usbmisc->ops == &imx53_usbmisc_ops;
  427. }
  428. int imx_usbmisc_init(struct imx_usbmisc_data *data)
  429. {
  430. struct imx_usbmisc *usbmisc;
  431. if (!data)
  432. return 0;
  433. usbmisc = dev_get_drvdata(data->dev);
  434. if (!usbmisc->ops->init)
  435. return 0;
  436. return usbmisc->ops->init(data);
  437. }
  438. EXPORT_SYMBOL_GPL(imx_usbmisc_init);
  439. int imx_usbmisc_init_post(struct imx_usbmisc_data *data)
  440. {
  441. struct imx_usbmisc *usbmisc;
  442. if (!data)
  443. return 0;
  444. usbmisc = dev_get_drvdata(data->dev);
  445. if (!usbmisc->ops->post)
  446. return 0;
  447. return usbmisc->ops->post(data);
  448. }
  449. EXPORT_SYMBOL_GPL(imx_usbmisc_init_post);
  450. int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *data, bool enabled)
  451. {
  452. struct imx_usbmisc *usbmisc;
  453. if (!data)
  454. return 0;
  455. usbmisc = dev_get_drvdata(data->dev);
  456. if (!usbmisc->ops->set_wakeup)
  457. return 0;
  458. return usbmisc->ops->set_wakeup(data, enabled);
  459. }
  460. EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup);
  461. static const struct of_device_id usbmisc_imx_dt_ids[] = {
  462. {
  463. .compatible = "fsl,imx25-usbmisc",
  464. .data = &imx25_usbmisc_ops,
  465. },
  466. {
  467. .compatible = "fsl,imx35-usbmisc",
  468. .data = &imx25_usbmisc_ops,
  469. },
  470. {
  471. .compatible = "fsl,imx27-usbmisc",
  472. .data = &imx27_usbmisc_ops,
  473. },
  474. {
  475. .compatible = "fsl,imx51-usbmisc",
  476. .data = &imx51_usbmisc_ops,
  477. },
  478. {
  479. .compatible = "fsl,imx53-usbmisc",
  480. .data = &imx53_usbmisc_ops,
  481. },
  482. {
  483. .compatible = "fsl,imx6q-usbmisc",
  484. .data = &imx6q_usbmisc_ops,
  485. },
  486. {
  487. .compatible = "fsl,vf610-usbmisc",
  488. .data = &vf610_usbmisc_ops,
  489. },
  490. {
  491. .compatible = "fsl,imx6sx-usbmisc",
  492. .data = &imx6sx_usbmisc_ops,
  493. },
  494. {
  495. .compatible = "fsl,imx6ul-usbmisc",
  496. .data = &imx6sx_usbmisc_ops,
  497. },
  498. {
  499. .compatible = "fsl,imx7d-usbmisc",
  500. .data = &imx7d_usbmisc_ops,
  501. },
  502. { /* sentinel */ }
  503. };
  504. MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
  505. static int usbmisc_imx_probe(struct platform_device *pdev)
  506. {
  507. struct resource *res;
  508. struct imx_usbmisc *data;
  509. const struct of_device_id *of_id;
  510. of_id = of_match_device(usbmisc_imx_dt_ids, &pdev->dev);
  511. if (!of_id)
  512. return -ENODEV;
  513. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  514. if (!data)
  515. return -ENOMEM;
  516. spin_lock_init(&data->lock);
  517. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  518. data->base = devm_ioremap_resource(&pdev->dev, res);
  519. if (IS_ERR(data->base))
  520. return PTR_ERR(data->base);
  521. data->ops = (const struct usbmisc_ops *)of_id->data;
  522. platform_set_drvdata(pdev, data);
  523. return 0;
  524. }
  525. static int usbmisc_imx_remove(struct platform_device *pdev)
  526. {
  527. return 0;
  528. }
  529. static struct platform_driver usbmisc_imx_driver = {
  530. .probe = usbmisc_imx_probe,
  531. .remove = usbmisc_imx_remove,
  532. .driver = {
  533. .name = "usbmisc_imx",
  534. .of_match_table = usbmisc_imx_dt_ids,
  535. },
  536. };
  537. module_platform_driver(usbmisc_imx_driver);
  538. MODULE_ALIAS("platform:usbmisc-imx");
  539. MODULE_LICENSE("GPL v2");
  540. MODULE_DESCRIPTION("driver for imx usb non-core registers");
  541. MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>");