i40iw_utils.c 41 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/ethtool.h>
  39. #include <linux/mii.h>
  40. #include <linux/if_vlan.h>
  41. #include <linux/crc32.h>
  42. #include <linux/in.h>
  43. #include <linux/ip.h>
  44. #include <linux/tcp.h>
  45. #include <linux/init.h>
  46. #include <linux/io.h>
  47. #include <asm/irq.h>
  48. #include <asm/byteorder.h>
  49. #include <net/netevent.h>
  50. #include <net/neighbour.h>
  51. #include "i40iw.h"
  52. /**
  53. * i40iw_arp_table - manage arp table
  54. * @iwdev: iwarp device
  55. * @ip_addr: ip address for device
  56. * @mac_addr: mac address ptr
  57. * @action: modify, delete or add
  58. */
  59. int i40iw_arp_table(struct i40iw_device *iwdev,
  60. u32 *ip_addr,
  61. bool ipv4,
  62. u8 *mac_addr,
  63. u32 action)
  64. {
  65. int arp_index;
  66. int err;
  67. u32 ip[4];
  68. if (ipv4) {
  69. memset(ip, 0, sizeof(ip));
  70. ip[0] = *ip_addr;
  71. } else {
  72. memcpy(ip, ip_addr, sizeof(ip));
  73. }
  74. for (arp_index = 0; (u32)arp_index < iwdev->arp_table_size; arp_index++)
  75. if (memcmp(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip)) == 0)
  76. break;
  77. switch (action) {
  78. case I40IW_ARP_ADD:
  79. if (arp_index != iwdev->arp_table_size)
  80. return -1;
  81. arp_index = 0;
  82. err = i40iw_alloc_resource(iwdev, iwdev->allocated_arps,
  83. iwdev->arp_table_size,
  84. (u32 *)&arp_index,
  85. &iwdev->next_arp_index);
  86. if (err)
  87. return err;
  88. memcpy(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip));
  89. ether_addr_copy(iwdev->arp_table[arp_index].mac_addr, mac_addr);
  90. break;
  91. case I40IW_ARP_RESOLVE:
  92. if (arp_index == iwdev->arp_table_size)
  93. return -1;
  94. break;
  95. case I40IW_ARP_DELETE:
  96. if (arp_index == iwdev->arp_table_size)
  97. return -1;
  98. memset(iwdev->arp_table[arp_index].ip_addr, 0,
  99. sizeof(iwdev->arp_table[arp_index].ip_addr));
  100. eth_zero_addr(iwdev->arp_table[arp_index].mac_addr);
  101. i40iw_free_resource(iwdev, iwdev->allocated_arps, arp_index);
  102. break;
  103. default:
  104. return -1;
  105. }
  106. return arp_index;
  107. }
  108. /**
  109. * i40iw_wr32 - write 32 bits to hw register
  110. * @hw: hardware information including registers
  111. * @reg: register offset
  112. * @value: vvalue to write to register
  113. */
  114. inline void i40iw_wr32(struct i40iw_hw *hw, u32 reg, u32 value)
  115. {
  116. writel(value, hw->hw_addr + reg);
  117. }
  118. /**
  119. * i40iw_rd32 - read a 32 bit hw register
  120. * @hw: hardware information including registers
  121. * @reg: register offset
  122. *
  123. * Return value of register content
  124. */
  125. inline u32 i40iw_rd32(struct i40iw_hw *hw, u32 reg)
  126. {
  127. return readl(hw->hw_addr + reg);
  128. }
  129. /**
  130. * i40iw_inetaddr_event - system notifier for ipv4 addr events
  131. * @notfier: not used
  132. * @event: event for notifier
  133. * @ptr: if address
  134. */
  135. int i40iw_inetaddr_event(struct notifier_block *notifier,
  136. unsigned long event,
  137. void *ptr)
  138. {
  139. struct in_ifaddr *ifa = ptr;
  140. struct net_device *event_netdev = ifa->ifa_dev->dev;
  141. struct net_device *netdev;
  142. struct net_device *upper_dev;
  143. struct i40iw_device *iwdev;
  144. struct i40iw_handler *hdl;
  145. u32 local_ipaddr;
  146. u32 action = I40IW_ARP_ADD;
  147. hdl = i40iw_find_netdev(event_netdev);
  148. if (!hdl)
  149. return NOTIFY_DONE;
  150. iwdev = &hdl->device;
  151. if (iwdev->init_state < IP_ADDR_REGISTERED || iwdev->closing)
  152. return NOTIFY_DONE;
  153. netdev = iwdev->ldev->netdev;
  154. upper_dev = netdev_master_upper_dev_get(netdev);
  155. if (netdev != event_netdev)
  156. return NOTIFY_DONE;
  157. if (upper_dev) {
  158. struct in_device *in;
  159. rcu_read_lock();
  160. in = __in_dev_get_rcu(upper_dev);
  161. local_ipaddr = ntohl(in->ifa_list->ifa_address);
  162. rcu_read_unlock();
  163. } else {
  164. local_ipaddr = ntohl(ifa->ifa_address);
  165. }
  166. switch (event) {
  167. case NETDEV_DOWN:
  168. action = I40IW_ARP_DELETE;
  169. /* Fall through */
  170. case NETDEV_UP:
  171. /* Fall through */
  172. case NETDEV_CHANGEADDR:
  173. i40iw_manage_arp_cache(iwdev,
  174. netdev->dev_addr,
  175. &local_ipaddr,
  176. true,
  177. action);
  178. i40iw_if_notify(iwdev, netdev, &local_ipaddr, true,
  179. (action == I40IW_ARP_ADD) ? true : false);
  180. break;
  181. default:
  182. break;
  183. }
  184. return NOTIFY_DONE;
  185. }
  186. /**
  187. * i40iw_inet6addr_event - system notifier for ipv6 addr events
  188. * @notfier: not used
  189. * @event: event for notifier
  190. * @ptr: if address
  191. */
  192. int i40iw_inet6addr_event(struct notifier_block *notifier,
  193. unsigned long event,
  194. void *ptr)
  195. {
  196. struct inet6_ifaddr *ifa = (struct inet6_ifaddr *)ptr;
  197. struct net_device *event_netdev = ifa->idev->dev;
  198. struct net_device *netdev;
  199. struct i40iw_device *iwdev;
  200. struct i40iw_handler *hdl;
  201. u32 local_ipaddr6[4];
  202. u32 action = I40IW_ARP_ADD;
  203. hdl = i40iw_find_netdev(event_netdev);
  204. if (!hdl)
  205. return NOTIFY_DONE;
  206. iwdev = &hdl->device;
  207. if (iwdev->init_state < IP_ADDR_REGISTERED || iwdev->closing)
  208. return NOTIFY_DONE;
  209. netdev = iwdev->ldev->netdev;
  210. if (netdev != event_netdev)
  211. return NOTIFY_DONE;
  212. i40iw_copy_ip_ntohl(local_ipaddr6, ifa->addr.in6_u.u6_addr32);
  213. switch (event) {
  214. case NETDEV_DOWN:
  215. action = I40IW_ARP_DELETE;
  216. /* Fall through */
  217. case NETDEV_UP:
  218. /* Fall through */
  219. case NETDEV_CHANGEADDR:
  220. i40iw_manage_arp_cache(iwdev,
  221. netdev->dev_addr,
  222. local_ipaddr6,
  223. false,
  224. action);
  225. i40iw_if_notify(iwdev, netdev, local_ipaddr6, false,
  226. (action == I40IW_ARP_ADD) ? true : false);
  227. break;
  228. default:
  229. break;
  230. }
  231. return NOTIFY_DONE;
  232. }
  233. /**
  234. * i40iw_net_event - system notifier for netevents
  235. * @notfier: not used
  236. * @event: event for notifier
  237. * @ptr: neighbor
  238. */
  239. int i40iw_net_event(struct notifier_block *notifier, unsigned long event, void *ptr)
  240. {
  241. struct neighbour *neigh = ptr;
  242. struct i40iw_device *iwdev;
  243. struct i40iw_handler *iwhdl;
  244. __be32 *p;
  245. u32 local_ipaddr[4];
  246. switch (event) {
  247. case NETEVENT_NEIGH_UPDATE:
  248. iwhdl = i40iw_find_netdev((struct net_device *)neigh->dev);
  249. if (!iwhdl)
  250. return NOTIFY_DONE;
  251. iwdev = &iwhdl->device;
  252. if (iwdev->init_state < IP_ADDR_REGISTERED || iwdev->closing)
  253. return NOTIFY_DONE;
  254. p = (__be32 *)neigh->primary_key;
  255. i40iw_copy_ip_ntohl(local_ipaddr, p);
  256. if (neigh->nud_state & NUD_VALID) {
  257. i40iw_manage_arp_cache(iwdev,
  258. neigh->ha,
  259. local_ipaddr,
  260. false,
  261. I40IW_ARP_ADD);
  262. } else {
  263. i40iw_manage_arp_cache(iwdev,
  264. neigh->ha,
  265. local_ipaddr,
  266. false,
  267. I40IW_ARP_DELETE);
  268. }
  269. break;
  270. default:
  271. break;
  272. }
  273. return NOTIFY_DONE;
  274. }
  275. /**
  276. * i40iw_netdevice_event - system notifier for netdev events
  277. * @notfier: not used
  278. * @event: event for notifier
  279. * @ptr: netdev
  280. */
  281. int i40iw_netdevice_event(struct notifier_block *notifier,
  282. unsigned long event,
  283. void *ptr)
  284. {
  285. struct net_device *event_netdev;
  286. struct net_device *netdev;
  287. struct i40iw_device *iwdev;
  288. struct i40iw_handler *hdl;
  289. event_netdev = netdev_notifier_info_to_dev(ptr);
  290. hdl = i40iw_find_netdev(event_netdev);
  291. if (!hdl)
  292. return NOTIFY_DONE;
  293. iwdev = &hdl->device;
  294. if (iwdev->init_state < RDMA_DEV_REGISTERED || iwdev->closing)
  295. return NOTIFY_DONE;
  296. netdev = iwdev->ldev->netdev;
  297. if (netdev != event_netdev)
  298. return NOTIFY_DONE;
  299. iwdev->iw_status = 1;
  300. switch (event) {
  301. case NETDEV_DOWN:
  302. iwdev->iw_status = 0;
  303. /* Fall through */
  304. case NETDEV_UP:
  305. i40iw_port_ibevent(iwdev);
  306. break;
  307. default:
  308. break;
  309. }
  310. return NOTIFY_DONE;
  311. }
  312. /**
  313. * i40iw_get_cqp_request - get cqp struct
  314. * @cqp: device cqp ptr
  315. * @wait: cqp to be used in wait mode
  316. */
  317. struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait)
  318. {
  319. struct i40iw_cqp_request *cqp_request = NULL;
  320. unsigned long flags;
  321. spin_lock_irqsave(&cqp->req_lock, flags);
  322. if (!list_empty(&cqp->cqp_avail_reqs)) {
  323. cqp_request = list_entry(cqp->cqp_avail_reqs.next,
  324. struct i40iw_cqp_request, list);
  325. list_del_init(&cqp_request->list);
  326. }
  327. spin_unlock_irqrestore(&cqp->req_lock, flags);
  328. if (!cqp_request) {
  329. cqp_request = kzalloc(sizeof(*cqp_request), GFP_ATOMIC);
  330. if (cqp_request) {
  331. cqp_request->dynamic = true;
  332. INIT_LIST_HEAD(&cqp_request->list);
  333. init_waitqueue_head(&cqp_request->waitq);
  334. }
  335. }
  336. if (!cqp_request) {
  337. i40iw_pr_err("CQP Request Fail: No Memory");
  338. return NULL;
  339. }
  340. if (wait) {
  341. atomic_set(&cqp_request->refcount, 2);
  342. cqp_request->waiting = true;
  343. } else {
  344. atomic_set(&cqp_request->refcount, 1);
  345. }
  346. return cqp_request;
  347. }
  348. /**
  349. * i40iw_free_cqp_request - free cqp request
  350. * @cqp: cqp ptr
  351. * @cqp_request: to be put back in cqp list
  352. */
  353. void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request)
  354. {
  355. struct i40iw_device *iwdev = container_of(cqp, struct i40iw_device, cqp);
  356. unsigned long flags;
  357. if (cqp_request->dynamic) {
  358. kfree(cqp_request);
  359. } else {
  360. cqp_request->request_done = false;
  361. cqp_request->callback_fcn = NULL;
  362. cqp_request->waiting = false;
  363. spin_lock_irqsave(&cqp->req_lock, flags);
  364. list_add_tail(&cqp_request->list, &cqp->cqp_avail_reqs);
  365. spin_unlock_irqrestore(&cqp->req_lock, flags);
  366. }
  367. wake_up(&iwdev->close_wq);
  368. }
  369. /**
  370. * i40iw_put_cqp_request - dec ref count and free if 0
  371. * @cqp: cqp ptr
  372. * @cqp_request: to be put back in cqp list
  373. */
  374. void i40iw_put_cqp_request(struct i40iw_cqp *cqp,
  375. struct i40iw_cqp_request *cqp_request)
  376. {
  377. if (atomic_dec_and_test(&cqp_request->refcount))
  378. i40iw_free_cqp_request(cqp, cqp_request);
  379. }
  380. /**
  381. * i40iw_free_pending_cqp_request -free pending cqp request objs
  382. * @cqp: cqp ptr
  383. * @cqp_request: to be put back in cqp list
  384. */
  385. static void i40iw_free_pending_cqp_request(struct i40iw_cqp *cqp,
  386. struct i40iw_cqp_request *cqp_request)
  387. {
  388. struct i40iw_device *iwdev = container_of(cqp, struct i40iw_device, cqp);
  389. if (cqp_request->waiting) {
  390. cqp_request->compl_info.error = true;
  391. cqp_request->request_done = true;
  392. wake_up(&cqp_request->waitq);
  393. }
  394. i40iw_put_cqp_request(cqp, cqp_request);
  395. wait_event_timeout(iwdev->close_wq,
  396. !atomic_read(&cqp_request->refcount),
  397. 1000);
  398. }
  399. /**
  400. * i40iw_cleanup_pending_cqp_op - clean-up cqp with no completions
  401. * @iwdev: iwarp device
  402. */
  403. void i40iw_cleanup_pending_cqp_op(struct i40iw_device *iwdev)
  404. {
  405. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  406. struct i40iw_cqp *cqp = &iwdev->cqp;
  407. struct i40iw_cqp_request *cqp_request = NULL;
  408. struct cqp_commands_info *pcmdinfo = NULL;
  409. u32 i, pending_work, wqe_idx;
  410. pending_work = I40IW_RING_WORK_AVAILABLE(cqp->sc_cqp.sq_ring);
  411. wqe_idx = I40IW_RING_GETCURRENT_TAIL(cqp->sc_cqp.sq_ring);
  412. for (i = 0; i < pending_work; i++) {
  413. cqp_request = (struct i40iw_cqp_request *)(unsigned long)cqp->scratch_array[wqe_idx];
  414. if (cqp_request)
  415. i40iw_free_pending_cqp_request(cqp, cqp_request);
  416. wqe_idx = (wqe_idx + 1) % I40IW_RING_GETSIZE(cqp->sc_cqp.sq_ring);
  417. }
  418. while (!list_empty(&dev->cqp_cmd_head)) {
  419. pcmdinfo = (struct cqp_commands_info *)i40iw_remove_head(&dev->cqp_cmd_head);
  420. cqp_request = container_of(pcmdinfo, struct i40iw_cqp_request, info);
  421. if (cqp_request)
  422. i40iw_free_pending_cqp_request(cqp, cqp_request);
  423. }
  424. }
  425. /**
  426. * i40iw_free_qp - callback after destroy cqp completes
  427. * @cqp_request: cqp request for destroy qp
  428. * @num: not used
  429. */
  430. static void i40iw_free_qp(struct i40iw_cqp_request *cqp_request, u32 num)
  431. {
  432. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)cqp_request->param;
  433. struct i40iw_qp *iwqp = (struct i40iw_qp *)qp->back_qp;
  434. struct i40iw_device *iwdev;
  435. u32 qp_num = iwqp->ibqp.qp_num;
  436. iwdev = iwqp->iwdev;
  437. i40iw_rem_pdusecount(iwqp->iwpd, iwdev);
  438. i40iw_free_qp_resources(iwdev, iwqp, qp_num);
  439. i40iw_rem_devusecount(iwdev);
  440. }
  441. /**
  442. * i40iw_wait_event - wait for completion
  443. * @iwdev: iwarp device
  444. * @cqp_request: cqp request to wait
  445. */
  446. static int i40iw_wait_event(struct i40iw_device *iwdev,
  447. struct i40iw_cqp_request *cqp_request)
  448. {
  449. struct cqp_commands_info *info = &cqp_request->info;
  450. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  451. struct i40iw_cqp_timeout cqp_timeout;
  452. bool cqp_error = false;
  453. int err_code = 0;
  454. memset(&cqp_timeout, 0, sizeof(cqp_timeout));
  455. cqp_timeout.compl_cqp_cmds = iwdev->sc_dev.cqp_cmd_stats[OP_COMPLETED_COMMANDS];
  456. do {
  457. if (wait_event_timeout(cqp_request->waitq,
  458. cqp_request->request_done, CQP_COMPL_WAIT_TIME))
  459. break;
  460. i40iw_check_cqp_progress(&cqp_timeout, &iwdev->sc_dev);
  461. if (cqp_timeout.count < CQP_TIMEOUT_THRESHOLD)
  462. continue;
  463. i40iw_pr_err("error cqp command 0x%x timed out", info->cqp_cmd);
  464. err_code = -ETIME;
  465. if (!iwdev->reset) {
  466. iwdev->reset = true;
  467. i40iw_request_reset(iwdev);
  468. }
  469. goto done;
  470. } while (1);
  471. cqp_error = cqp_request->compl_info.error;
  472. if (cqp_error) {
  473. i40iw_pr_err("error cqp command 0x%x completion maj = 0x%x min=0x%x\n",
  474. info->cqp_cmd, cqp_request->compl_info.maj_err_code,
  475. cqp_request->compl_info.min_err_code);
  476. err_code = -EPROTO;
  477. goto done;
  478. }
  479. done:
  480. i40iw_put_cqp_request(iwcqp, cqp_request);
  481. return err_code;
  482. }
  483. /**
  484. * i40iw_handle_cqp_op - process cqp command
  485. * @iwdev: iwarp device
  486. * @cqp_request: cqp request to process
  487. */
  488. enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
  489. struct i40iw_cqp_request
  490. *cqp_request)
  491. {
  492. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  493. enum i40iw_status_code status;
  494. struct cqp_commands_info *info = &cqp_request->info;
  495. int err_code = 0;
  496. if (iwdev->reset) {
  497. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  498. return I40IW_ERR_CQP_COMPL_ERROR;
  499. }
  500. status = i40iw_process_cqp_cmd(dev, info);
  501. if (status) {
  502. i40iw_pr_err("error cqp command 0x%x failed\n", info->cqp_cmd);
  503. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  504. return status;
  505. }
  506. if (cqp_request->waiting)
  507. err_code = i40iw_wait_event(iwdev, cqp_request);
  508. if (err_code)
  509. status = I40IW_ERR_CQP_COMPL_ERROR;
  510. return status;
  511. }
  512. /**
  513. * i40iw_add_devusecount - add dev refcount
  514. * @iwdev: dev for refcount
  515. */
  516. void i40iw_add_devusecount(struct i40iw_device *iwdev)
  517. {
  518. atomic64_inc(&iwdev->use_count);
  519. }
  520. /**
  521. * i40iw_rem_devusecount - decrement refcount for dev
  522. * @iwdev: device
  523. */
  524. void i40iw_rem_devusecount(struct i40iw_device *iwdev)
  525. {
  526. if (!atomic64_dec_and_test(&iwdev->use_count))
  527. return;
  528. wake_up(&iwdev->close_wq);
  529. }
  530. /**
  531. * i40iw_add_pdusecount - add pd refcount
  532. * @iwpd: pd for refcount
  533. */
  534. void i40iw_add_pdusecount(struct i40iw_pd *iwpd)
  535. {
  536. atomic_inc(&iwpd->usecount);
  537. }
  538. /**
  539. * i40iw_rem_pdusecount - decrement refcount for pd and free if 0
  540. * @iwpd: pd for refcount
  541. * @iwdev: iwarp device
  542. */
  543. void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev)
  544. {
  545. if (!atomic_dec_and_test(&iwpd->usecount))
  546. return;
  547. i40iw_free_resource(iwdev, iwdev->allocated_pds, iwpd->sc_pd.pd_id);
  548. kfree(iwpd);
  549. }
  550. /**
  551. * i40iw_add_ref - add refcount for qp
  552. * @ibqp: iqarp qp
  553. */
  554. void i40iw_add_ref(struct ib_qp *ibqp)
  555. {
  556. struct i40iw_qp *iwqp = (struct i40iw_qp *)ibqp;
  557. atomic_inc(&iwqp->refcount);
  558. }
  559. /**
  560. * i40iw_rem_ref - rem refcount for qp and free if 0
  561. * @ibqp: iqarp qp
  562. */
  563. void i40iw_rem_ref(struct ib_qp *ibqp)
  564. {
  565. struct i40iw_qp *iwqp;
  566. enum i40iw_status_code status;
  567. struct i40iw_cqp_request *cqp_request;
  568. struct cqp_commands_info *cqp_info;
  569. struct i40iw_device *iwdev;
  570. u32 qp_num;
  571. unsigned long flags;
  572. iwqp = to_iwqp(ibqp);
  573. iwdev = iwqp->iwdev;
  574. spin_lock_irqsave(&iwdev->qptable_lock, flags);
  575. if (!atomic_dec_and_test(&iwqp->refcount)) {
  576. spin_unlock_irqrestore(&iwdev->qptable_lock, flags);
  577. return;
  578. }
  579. qp_num = iwqp->ibqp.qp_num;
  580. iwdev->qp_table[qp_num] = NULL;
  581. spin_unlock_irqrestore(&iwdev->qptable_lock, flags);
  582. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  583. if (!cqp_request)
  584. return;
  585. cqp_request->callback_fcn = i40iw_free_qp;
  586. cqp_request->param = (void *)&iwqp->sc_qp;
  587. cqp_info = &cqp_request->info;
  588. cqp_info->cqp_cmd = OP_QP_DESTROY;
  589. cqp_info->post_sq = 1;
  590. cqp_info->in.u.qp_destroy.qp = &iwqp->sc_qp;
  591. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  592. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  593. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  594. if (!status)
  595. return;
  596. i40iw_rem_pdusecount(iwqp->iwpd, iwdev);
  597. i40iw_free_qp_resources(iwdev, iwqp, qp_num);
  598. i40iw_rem_devusecount(iwdev);
  599. }
  600. /**
  601. * i40iw_get_qp - get qp address
  602. * @device: iwarp device
  603. * @qpn: qp number
  604. */
  605. struct ib_qp *i40iw_get_qp(struct ib_device *device, int qpn)
  606. {
  607. struct i40iw_device *iwdev = to_iwdev(device);
  608. if ((qpn < IW_FIRST_QPN) || (qpn >= iwdev->max_qp))
  609. return NULL;
  610. return &iwdev->qp_table[qpn]->ibqp;
  611. }
  612. /**
  613. * i40iw_debug_buf - print debug msg and buffer is mask set
  614. * @dev: hardware control device structure
  615. * @mask: mask to compare if to print debug buffer
  616. * @buf: points buffer addr
  617. * @size: saize of buffer to print
  618. */
  619. void i40iw_debug_buf(struct i40iw_sc_dev *dev,
  620. enum i40iw_debug_flag mask,
  621. char *desc,
  622. u64 *buf,
  623. u32 size)
  624. {
  625. u32 i;
  626. if (!(dev->debug_mask & mask))
  627. return;
  628. i40iw_debug(dev, mask, "%s\n", desc);
  629. i40iw_debug(dev, mask, "starting address virt=%p phy=%llxh\n", buf,
  630. (unsigned long long)virt_to_phys(buf));
  631. for (i = 0; i < size; i += 8)
  632. i40iw_debug(dev, mask, "index %03d val: %016llx\n", i, buf[i / 8]);
  633. }
  634. /**
  635. * i40iw_get_hw_addr - return hw addr
  636. * @par: points to shared dev
  637. */
  638. u8 __iomem *i40iw_get_hw_addr(void *par)
  639. {
  640. struct i40iw_sc_dev *dev = (struct i40iw_sc_dev *)par;
  641. return dev->hw->hw_addr;
  642. }
  643. /**
  644. * i40iw_remove_head - return head entry and remove from list
  645. * @list: list for entry
  646. */
  647. void *i40iw_remove_head(struct list_head *list)
  648. {
  649. struct list_head *entry;
  650. if (list_empty(list))
  651. return NULL;
  652. entry = (void *)list->next;
  653. list_del(entry);
  654. return (void *)entry;
  655. }
  656. /**
  657. * i40iw_allocate_dma_mem - Memory alloc helper fn
  658. * @hw: pointer to the HW structure
  659. * @mem: ptr to mem struct to fill out
  660. * @size: size of memory requested
  661. * @alignment: what to align the allocation to
  662. */
  663. enum i40iw_status_code i40iw_allocate_dma_mem(struct i40iw_hw *hw,
  664. struct i40iw_dma_mem *mem,
  665. u64 size,
  666. u32 alignment)
  667. {
  668. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  669. if (!mem)
  670. return I40IW_ERR_PARAM;
  671. mem->size = ALIGN(size, alignment);
  672. mem->va = dma_zalloc_coherent(&pcidev->dev, mem->size,
  673. (dma_addr_t *)&mem->pa, GFP_KERNEL);
  674. if (!mem->va)
  675. return I40IW_ERR_NO_MEMORY;
  676. return 0;
  677. }
  678. /**
  679. * i40iw_free_dma_mem - Memory free helper fn
  680. * @hw: pointer to the HW structure
  681. * @mem: ptr to mem struct to free
  682. */
  683. void i40iw_free_dma_mem(struct i40iw_hw *hw, struct i40iw_dma_mem *mem)
  684. {
  685. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  686. if (!mem || !mem->va)
  687. return;
  688. dma_free_coherent(&pcidev->dev, mem->size,
  689. mem->va, (dma_addr_t)mem->pa);
  690. mem->va = NULL;
  691. }
  692. /**
  693. * i40iw_allocate_virt_mem - virtual memory alloc helper fn
  694. * @hw: pointer to the HW structure
  695. * @mem: ptr to mem struct to fill out
  696. * @size: size of memory requested
  697. */
  698. enum i40iw_status_code i40iw_allocate_virt_mem(struct i40iw_hw *hw,
  699. struct i40iw_virt_mem *mem,
  700. u32 size)
  701. {
  702. if (!mem)
  703. return I40IW_ERR_PARAM;
  704. mem->size = size;
  705. mem->va = kzalloc(size, GFP_KERNEL);
  706. if (mem->va)
  707. return 0;
  708. else
  709. return I40IW_ERR_NO_MEMORY;
  710. }
  711. /**
  712. * i40iw_free_virt_mem - virtual memory free helper fn
  713. * @hw: pointer to the HW structure
  714. * @mem: ptr to mem struct to free
  715. */
  716. enum i40iw_status_code i40iw_free_virt_mem(struct i40iw_hw *hw,
  717. struct i40iw_virt_mem *mem)
  718. {
  719. if (!mem)
  720. return I40IW_ERR_PARAM;
  721. /*
  722. * mem->va points to the parent of mem, so both mem and mem->va
  723. * can not be touched once mem->va is freed
  724. */
  725. kfree(mem->va);
  726. return 0;
  727. }
  728. /**
  729. * i40iw_cqp_sds_cmd - create cqp command for sd
  730. * @dev: hardware control device structure
  731. * @sd_info: information for sd cqp
  732. *
  733. */
  734. enum i40iw_status_code i40iw_cqp_sds_cmd(struct i40iw_sc_dev *dev,
  735. struct i40iw_update_sds_info *sdinfo)
  736. {
  737. enum i40iw_status_code status;
  738. struct i40iw_cqp_request *cqp_request;
  739. struct cqp_commands_info *cqp_info;
  740. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  741. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  742. if (!cqp_request)
  743. return I40IW_ERR_NO_MEMORY;
  744. cqp_info = &cqp_request->info;
  745. memcpy(&cqp_info->in.u.update_pe_sds.info, sdinfo,
  746. sizeof(cqp_info->in.u.update_pe_sds.info));
  747. cqp_info->cqp_cmd = OP_UPDATE_PE_SDS;
  748. cqp_info->post_sq = 1;
  749. cqp_info->in.u.update_pe_sds.dev = dev;
  750. cqp_info->in.u.update_pe_sds.scratch = (uintptr_t)cqp_request;
  751. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  752. if (status)
  753. i40iw_pr_err("CQP-OP Update SD's fail");
  754. return status;
  755. }
  756. /**
  757. * i40iw_qp_suspend_resume - cqp command for suspend/resume
  758. * @dev: hardware control device structure
  759. * @qp: hardware control qp
  760. * @suspend: flag if suspend or resume
  761. */
  762. void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp, bool suspend)
  763. {
  764. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  765. struct i40iw_cqp_request *cqp_request;
  766. struct i40iw_sc_cqp *cqp = dev->cqp;
  767. struct cqp_commands_info *cqp_info;
  768. enum i40iw_status_code status;
  769. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  770. if (!cqp_request)
  771. return;
  772. cqp_info = &cqp_request->info;
  773. cqp_info->cqp_cmd = (suspend) ? OP_SUSPEND : OP_RESUME;
  774. cqp_info->in.u.suspend_resume.cqp = cqp;
  775. cqp_info->in.u.suspend_resume.qp = qp;
  776. cqp_info->in.u.suspend_resume.scratch = (uintptr_t)cqp_request;
  777. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  778. if (status)
  779. i40iw_pr_err("CQP-OP QP Suspend/Resume fail");
  780. }
  781. /**
  782. * i40iw_term_modify_qp - modify qp for term message
  783. * @qp: hardware control qp
  784. * @next_state: qp's next state
  785. * @term: terminate code
  786. * @term_len: length
  787. */
  788. void i40iw_term_modify_qp(struct i40iw_sc_qp *qp, u8 next_state, u8 term, u8 term_len)
  789. {
  790. struct i40iw_qp *iwqp;
  791. iwqp = (struct i40iw_qp *)qp->back_qp;
  792. i40iw_next_iw_state(iwqp, next_state, 0, term, term_len);
  793. };
  794. /**
  795. * i40iw_terminate_done - after terminate is completed
  796. * @qp: hardware control qp
  797. * @timeout_occurred: indicates if terminate timer expired
  798. */
  799. void i40iw_terminate_done(struct i40iw_sc_qp *qp, int timeout_occurred)
  800. {
  801. struct i40iw_qp *iwqp;
  802. u32 next_iwarp_state = I40IW_QP_STATE_ERROR;
  803. u8 hte = 0;
  804. bool first_time;
  805. unsigned long flags;
  806. iwqp = (struct i40iw_qp *)qp->back_qp;
  807. spin_lock_irqsave(&iwqp->lock, flags);
  808. if (iwqp->hte_added) {
  809. iwqp->hte_added = 0;
  810. hte = 1;
  811. }
  812. first_time = !(qp->term_flags & I40IW_TERM_DONE);
  813. qp->term_flags |= I40IW_TERM_DONE;
  814. spin_unlock_irqrestore(&iwqp->lock, flags);
  815. if (first_time) {
  816. if (!timeout_occurred)
  817. i40iw_terminate_del_timer(qp);
  818. else
  819. next_iwarp_state = I40IW_QP_STATE_CLOSING;
  820. i40iw_next_iw_state(iwqp, next_iwarp_state, hte, 0, 0);
  821. i40iw_cm_disconn(iwqp);
  822. }
  823. }
  824. /**
  825. * i40iw_terminate_imeout - timeout happened
  826. * @context: points to iwarp qp
  827. */
  828. static void i40iw_terminate_timeout(struct timer_list *t)
  829. {
  830. struct i40iw_qp *iwqp = from_timer(iwqp, t, terminate_timer);
  831. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)&iwqp->sc_qp;
  832. i40iw_terminate_done(qp, 1);
  833. i40iw_rem_ref(&iwqp->ibqp);
  834. }
  835. /**
  836. * i40iw_terminate_start_timer - start terminate timeout
  837. * @qp: hardware control qp
  838. */
  839. void i40iw_terminate_start_timer(struct i40iw_sc_qp *qp)
  840. {
  841. struct i40iw_qp *iwqp;
  842. iwqp = (struct i40iw_qp *)qp->back_qp;
  843. i40iw_add_ref(&iwqp->ibqp);
  844. timer_setup(&iwqp->terminate_timer, i40iw_terminate_timeout, 0);
  845. iwqp->terminate_timer.expires = jiffies + HZ;
  846. add_timer(&iwqp->terminate_timer);
  847. }
  848. /**
  849. * i40iw_terminate_del_timer - delete terminate timeout
  850. * @qp: hardware control qp
  851. */
  852. void i40iw_terminate_del_timer(struct i40iw_sc_qp *qp)
  853. {
  854. struct i40iw_qp *iwqp;
  855. iwqp = (struct i40iw_qp *)qp->back_qp;
  856. if (del_timer(&iwqp->terminate_timer))
  857. i40iw_rem_ref(&iwqp->ibqp);
  858. }
  859. /**
  860. * i40iw_cqp_generic_worker - generic worker for cqp
  861. * @work: work pointer
  862. */
  863. static void i40iw_cqp_generic_worker(struct work_struct *work)
  864. {
  865. struct i40iw_virtchnl_work_info *work_info =
  866. &((struct virtchnl_work *)work)->work_info;
  867. if (work_info->worker_vf_dev)
  868. work_info->callback_fcn(work_info->worker_vf_dev);
  869. }
  870. /**
  871. * i40iw_cqp_spawn_worker - spawn worket thread
  872. * @iwdev: device struct pointer
  873. * @work_info: work request info
  874. * @iw_vf_idx: virtual function index
  875. */
  876. void i40iw_cqp_spawn_worker(struct i40iw_sc_dev *dev,
  877. struct i40iw_virtchnl_work_info *work_info,
  878. u32 iw_vf_idx)
  879. {
  880. struct virtchnl_work *work;
  881. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  882. work = &iwdev->virtchnl_w[iw_vf_idx];
  883. memcpy(&work->work_info, work_info, sizeof(*work_info));
  884. INIT_WORK(&work->work, i40iw_cqp_generic_worker);
  885. queue_work(iwdev->virtchnl_wq, &work->work);
  886. }
  887. /**
  888. * i40iw_cqp_manage_hmc_fcn_worker -
  889. * @work: work pointer for hmc info
  890. */
  891. static void i40iw_cqp_manage_hmc_fcn_worker(struct work_struct *work)
  892. {
  893. struct i40iw_cqp_request *cqp_request =
  894. ((struct virtchnl_work *)work)->cqp_request;
  895. struct i40iw_ccq_cqe_info ccq_cqe_info;
  896. struct i40iw_hmc_fcn_info *hmcfcninfo =
  897. &cqp_request->info.in.u.manage_hmc_pm.info;
  898. struct i40iw_device *iwdev =
  899. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->back_dev;
  900. ccq_cqe_info.cqp = NULL;
  901. ccq_cqe_info.maj_err_code = cqp_request->compl_info.maj_err_code;
  902. ccq_cqe_info.min_err_code = cqp_request->compl_info.min_err_code;
  903. ccq_cqe_info.op_code = cqp_request->compl_info.op_code;
  904. ccq_cqe_info.op_ret_val = cqp_request->compl_info.op_ret_val;
  905. ccq_cqe_info.scratch = 0;
  906. ccq_cqe_info.error = cqp_request->compl_info.error;
  907. hmcfcninfo->callback_fcn(cqp_request->info.in.u.manage_hmc_pm.dev,
  908. hmcfcninfo->cqp_callback_param, &ccq_cqe_info);
  909. i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
  910. }
  911. /**
  912. * i40iw_cqp_manage_hmc_fcn_callback - called function after cqp completion
  913. * @cqp_request: cqp request info struct for hmc fun
  914. * @unused: unused param of callback
  915. */
  916. static void i40iw_cqp_manage_hmc_fcn_callback(struct i40iw_cqp_request *cqp_request,
  917. u32 unused)
  918. {
  919. struct virtchnl_work *work;
  920. struct i40iw_hmc_fcn_info *hmcfcninfo =
  921. &cqp_request->info.in.u.manage_hmc_pm.info;
  922. struct i40iw_device *iwdev =
  923. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->
  924. back_dev;
  925. if (hmcfcninfo && hmcfcninfo->callback_fcn) {
  926. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s1\n", __func__);
  927. atomic_inc(&cqp_request->refcount);
  928. work = &iwdev->virtchnl_w[hmcfcninfo->iw_vf_idx];
  929. work->cqp_request = cqp_request;
  930. INIT_WORK(&work->work, i40iw_cqp_manage_hmc_fcn_worker);
  931. queue_work(iwdev->virtchnl_wq, &work->work);
  932. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s2\n", __func__);
  933. } else {
  934. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s: Something wrong\n", __func__);
  935. }
  936. }
  937. /**
  938. * i40iw_cqp_manage_hmc_fcn_cmd - issue cqp command to manage hmc
  939. * @dev: hardware control device structure
  940. * @hmcfcninfo: info for hmc
  941. */
  942. enum i40iw_status_code i40iw_cqp_manage_hmc_fcn_cmd(struct i40iw_sc_dev *dev,
  943. struct i40iw_hmc_fcn_info *hmcfcninfo)
  944. {
  945. enum i40iw_status_code status;
  946. struct i40iw_cqp_request *cqp_request;
  947. struct cqp_commands_info *cqp_info;
  948. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  949. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s\n", __func__);
  950. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  951. if (!cqp_request)
  952. return I40IW_ERR_NO_MEMORY;
  953. cqp_info = &cqp_request->info;
  954. cqp_request->callback_fcn = i40iw_cqp_manage_hmc_fcn_callback;
  955. cqp_request->param = hmcfcninfo;
  956. memcpy(&cqp_info->in.u.manage_hmc_pm.info, hmcfcninfo,
  957. sizeof(*hmcfcninfo));
  958. cqp_info->in.u.manage_hmc_pm.dev = dev;
  959. cqp_info->cqp_cmd = OP_MANAGE_HMC_PM_FUNC_TABLE;
  960. cqp_info->post_sq = 1;
  961. cqp_info->in.u.manage_hmc_pm.scratch = (uintptr_t)cqp_request;
  962. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  963. if (status)
  964. i40iw_pr_err("CQP-OP Manage HMC fail");
  965. return status;
  966. }
  967. /**
  968. * i40iw_cqp_query_fpm_values_cmd - send cqp command for fpm
  969. * @iwdev: function device struct
  970. * @values_mem: buffer for fpm
  971. * @hmc_fn_id: function id for fpm
  972. */
  973. enum i40iw_status_code i40iw_cqp_query_fpm_values_cmd(struct i40iw_sc_dev *dev,
  974. struct i40iw_dma_mem *values_mem,
  975. u8 hmc_fn_id)
  976. {
  977. enum i40iw_status_code status;
  978. struct i40iw_cqp_request *cqp_request;
  979. struct cqp_commands_info *cqp_info;
  980. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  981. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  982. if (!cqp_request)
  983. return I40IW_ERR_NO_MEMORY;
  984. cqp_info = &cqp_request->info;
  985. cqp_request->param = NULL;
  986. cqp_info->in.u.query_fpm_values.cqp = dev->cqp;
  987. cqp_info->in.u.query_fpm_values.fpm_values_pa = values_mem->pa;
  988. cqp_info->in.u.query_fpm_values.fpm_values_va = values_mem->va;
  989. cqp_info->in.u.query_fpm_values.hmc_fn_id = hmc_fn_id;
  990. cqp_info->cqp_cmd = OP_QUERY_FPM_VALUES;
  991. cqp_info->post_sq = 1;
  992. cqp_info->in.u.query_fpm_values.scratch = (uintptr_t)cqp_request;
  993. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  994. if (status)
  995. i40iw_pr_err("CQP-OP Query FPM fail");
  996. return status;
  997. }
  998. /**
  999. * i40iw_cqp_commit_fpm_values_cmd - commit fpm values in hw
  1000. * @dev: hardware control device structure
  1001. * @values_mem: buffer with fpm values
  1002. * @hmc_fn_id: function id for fpm
  1003. */
  1004. enum i40iw_status_code i40iw_cqp_commit_fpm_values_cmd(struct i40iw_sc_dev *dev,
  1005. struct i40iw_dma_mem *values_mem,
  1006. u8 hmc_fn_id)
  1007. {
  1008. enum i40iw_status_code status;
  1009. struct i40iw_cqp_request *cqp_request;
  1010. struct cqp_commands_info *cqp_info;
  1011. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1012. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  1013. if (!cqp_request)
  1014. return I40IW_ERR_NO_MEMORY;
  1015. cqp_info = &cqp_request->info;
  1016. cqp_request->param = NULL;
  1017. cqp_info->in.u.commit_fpm_values.cqp = dev->cqp;
  1018. cqp_info->in.u.commit_fpm_values.fpm_values_pa = values_mem->pa;
  1019. cqp_info->in.u.commit_fpm_values.fpm_values_va = values_mem->va;
  1020. cqp_info->in.u.commit_fpm_values.hmc_fn_id = hmc_fn_id;
  1021. cqp_info->cqp_cmd = OP_COMMIT_FPM_VALUES;
  1022. cqp_info->post_sq = 1;
  1023. cqp_info->in.u.commit_fpm_values.scratch = (uintptr_t)cqp_request;
  1024. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1025. if (status)
  1026. i40iw_pr_err("CQP-OP Commit FPM fail");
  1027. return status;
  1028. }
  1029. /**
  1030. * i40iw_vf_wait_vchnl_resp - wait for channel msg
  1031. * @iwdev: function's device struct
  1032. */
  1033. enum i40iw_status_code i40iw_vf_wait_vchnl_resp(struct i40iw_sc_dev *dev)
  1034. {
  1035. struct i40iw_device *iwdev = dev->back_dev;
  1036. int timeout_ret;
  1037. i40iw_debug(dev, I40IW_DEBUG_VIRT, "%s[%u] dev %p, iwdev %p\n",
  1038. __func__, __LINE__, dev, iwdev);
  1039. atomic_set(&iwdev->vchnl_msgs, 2);
  1040. timeout_ret = wait_event_timeout(iwdev->vchnl_waitq,
  1041. (atomic_read(&iwdev->vchnl_msgs) == 1),
  1042. I40IW_VCHNL_EVENT_TIMEOUT);
  1043. atomic_dec(&iwdev->vchnl_msgs);
  1044. if (!timeout_ret) {
  1045. i40iw_pr_err("virt channel completion timeout = 0x%x\n", timeout_ret);
  1046. atomic_set(&iwdev->vchnl_msgs, 0);
  1047. dev->vchnl_up = false;
  1048. return I40IW_ERR_TIMEOUT;
  1049. }
  1050. wake_up(&dev->vf_reqs);
  1051. return 0;
  1052. }
  1053. /**
  1054. * i40iw_cqp_cq_create_cmd - create a cq for the cqp
  1055. * @dev: device pointer
  1056. * @cq: pointer to created cq
  1057. */
  1058. enum i40iw_status_code i40iw_cqp_cq_create_cmd(struct i40iw_sc_dev *dev,
  1059. struct i40iw_sc_cq *cq)
  1060. {
  1061. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1062. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1063. struct i40iw_cqp_request *cqp_request;
  1064. struct cqp_commands_info *cqp_info;
  1065. enum i40iw_status_code status;
  1066. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1067. if (!cqp_request)
  1068. return I40IW_ERR_NO_MEMORY;
  1069. cqp_info = &cqp_request->info;
  1070. cqp_info->cqp_cmd = OP_CQ_CREATE;
  1071. cqp_info->post_sq = 1;
  1072. cqp_info->in.u.cq_create.cq = cq;
  1073. cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
  1074. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1075. if (status)
  1076. i40iw_pr_err("CQP-OP Create QP fail");
  1077. return status;
  1078. }
  1079. /**
  1080. * i40iw_cqp_qp_create_cmd - create a qp for the cqp
  1081. * @dev: device pointer
  1082. * @qp: pointer to created qp
  1083. */
  1084. enum i40iw_status_code i40iw_cqp_qp_create_cmd(struct i40iw_sc_dev *dev,
  1085. struct i40iw_sc_qp *qp)
  1086. {
  1087. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1088. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1089. struct i40iw_cqp_request *cqp_request;
  1090. struct cqp_commands_info *cqp_info;
  1091. struct i40iw_create_qp_info *qp_info;
  1092. enum i40iw_status_code status;
  1093. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1094. if (!cqp_request)
  1095. return I40IW_ERR_NO_MEMORY;
  1096. cqp_info = &cqp_request->info;
  1097. qp_info = &cqp_request->info.in.u.qp_create.info;
  1098. memset(qp_info, 0, sizeof(*qp_info));
  1099. qp_info->cq_num_valid = true;
  1100. qp_info->next_iwarp_state = I40IW_QP_STATE_RTS;
  1101. cqp_info->cqp_cmd = OP_QP_CREATE;
  1102. cqp_info->post_sq = 1;
  1103. cqp_info->in.u.qp_create.qp = qp;
  1104. cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
  1105. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1106. if (status)
  1107. i40iw_pr_err("CQP-OP QP create fail");
  1108. return status;
  1109. }
  1110. /**
  1111. * i40iw_cqp_cq_destroy_cmd - destroy the cqp cq
  1112. * @dev: device pointer
  1113. * @cq: pointer to cq
  1114. */
  1115. void i40iw_cqp_cq_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_cq *cq)
  1116. {
  1117. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1118. i40iw_cq_wq_destroy(iwdev, cq);
  1119. }
  1120. /**
  1121. * i40iw_cqp_qp_destroy_cmd - destroy the cqp
  1122. * @dev: device pointer
  1123. * @qp: pointer to qp
  1124. */
  1125. void i40iw_cqp_qp_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  1126. {
  1127. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1128. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1129. struct i40iw_cqp_request *cqp_request;
  1130. struct cqp_commands_info *cqp_info;
  1131. enum i40iw_status_code status;
  1132. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1133. if (!cqp_request)
  1134. return;
  1135. cqp_info = &cqp_request->info;
  1136. memset(cqp_info, 0, sizeof(*cqp_info));
  1137. cqp_info->cqp_cmd = OP_QP_DESTROY;
  1138. cqp_info->post_sq = 1;
  1139. cqp_info->in.u.qp_destroy.qp = qp;
  1140. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  1141. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  1142. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1143. if (status)
  1144. i40iw_pr_err("CQP QP_DESTROY fail");
  1145. }
  1146. /**
  1147. * i40iw_ieq_mpa_crc_ae - generate AE for crc error
  1148. * @dev: hardware control device structure
  1149. * @qp: hardware control qp
  1150. */
  1151. void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  1152. {
  1153. struct i40iw_gen_ae_info info;
  1154. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1155. i40iw_debug(dev, I40IW_DEBUG_AEQ, "%s entered\n", __func__);
  1156. info.ae_code = I40IW_AE_LLP_RECEIVED_MPA_CRC_ERROR;
  1157. info.ae_source = I40IW_AE_SOURCE_RQ;
  1158. i40iw_gen_ae(iwdev, qp, &info, false);
  1159. }
  1160. /**
  1161. * i40iw_init_hash_desc - initialize hash for crc calculation
  1162. * @desc: cryption type
  1163. */
  1164. enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc)
  1165. {
  1166. struct crypto_shash *tfm;
  1167. struct shash_desc *tdesc;
  1168. tfm = crypto_alloc_shash("crc32c", 0, 0);
  1169. if (IS_ERR(tfm))
  1170. return I40IW_ERR_MPA_CRC;
  1171. tdesc = kzalloc(sizeof(*tdesc) + crypto_shash_descsize(tfm),
  1172. GFP_KERNEL);
  1173. if (!tdesc) {
  1174. crypto_free_shash(tfm);
  1175. return I40IW_ERR_MPA_CRC;
  1176. }
  1177. tdesc->tfm = tfm;
  1178. *desc = tdesc;
  1179. return 0;
  1180. }
  1181. /**
  1182. * i40iw_free_hash_desc - free hash desc
  1183. * @desc: to be freed
  1184. */
  1185. void i40iw_free_hash_desc(struct shash_desc *desc)
  1186. {
  1187. if (desc) {
  1188. crypto_free_shash(desc->tfm);
  1189. kfree(desc);
  1190. }
  1191. }
  1192. /**
  1193. * i40iw_alloc_query_fpm_buf - allocate buffer for fpm
  1194. * @dev: hardware control device structure
  1195. * @mem: buffer ptr for fpm to be allocated
  1196. * @return: memory allocation status
  1197. */
  1198. enum i40iw_status_code i40iw_alloc_query_fpm_buf(struct i40iw_sc_dev *dev,
  1199. struct i40iw_dma_mem *mem)
  1200. {
  1201. enum i40iw_status_code status;
  1202. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1203. status = i40iw_obj_aligned_mem(iwdev, mem, I40IW_QUERY_FPM_BUF_SIZE,
  1204. I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK);
  1205. return status;
  1206. }
  1207. /**
  1208. * i40iw_ieq_check_mpacrc - check if mpa crc is OK
  1209. * @desc: desc for hash
  1210. * @addr: address of buffer for crc
  1211. * @length: length of buffer
  1212. * @value: value to be compared
  1213. */
  1214. enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
  1215. void *addr,
  1216. u32 length,
  1217. u32 value)
  1218. {
  1219. u32 crc = 0;
  1220. int ret;
  1221. enum i40iw_status_code ret_code = 0;
  1222. crypto_shash_init(desc);
  1223. ret = crypto_shash_update(desc, addr, length);
  1224. if (!ret)
  1225. crypto_shash_final(desc, (u8 *)&crc);
  1226. if (crc != value) {
  1227. i40iw_pr_err("mpa crc check fail\n");
  1228. ret_code = I40IW_ERR_MPA_CRC;
  1229. }
  1230. return ret_code;
  1231. }
  1232. /**
  1233. * i40iw_ieq_get_qp - get qp based on quad in puda buffer
  1234. * @dev: hardware control device structure
  1235. * @buf: receive puda buffer on exception q
  1236. */
  1237. struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev,
  1238. struct i40iw_puda_buf *buf)
  1239. {
  1240. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1241. struct i40iw_qp *iwqp;
  1242. struct i40iw_cm_node *cm_node;
  1243. u32 loc_addr[4], rem_addr[4];
  1244. u16 loc_port, rem_port;
  1245. struct ipv6hdr *ip6h;
  1246. struct iphdr *iph = (struct iphdr *)buf->iph;
  1247. struct tcphdr *tcph = (struct tcphdr *)buf->tcph;
  1248. if (iph->version == 4) {
  1249. memset(loc_addr, 0, sizeof(loc_addr));
  1250. loc_addr[0] = ntohl(iph->daddr);
  1251. memset(rem_addr, 0, sizeof(rem_addr));
  1252. rem_addr[0] = ntohl(iph->saddr);
  1253. } else {
  1254. ip6h = (struct ipv6hdr *)buf->iph;
  1255. i40iw_copy_ip_ntohl(loc_addr, ip6h->daddr.in6_u.u6_addr32);
  1256. i40iw_copy_ip_ntohl(rem_addr, ip6h->saddr.in6_u.u6_addr32);
  1257. }
  1258. loc_port = ntohs(tcph->dest);
  1259. rem_port = ntohs(tcph->source);
  1260. cm_node = i40iw_find_node(&iwdev->cm_core, rem_port, rem_addr, loc_port,
  1261. loc_addr, false, true);
  1262. if (!cm_node)
  1263. return NULL;
  1264. iwqp = cm_node->iwqp;
  1265. return &iwqp->sc_qp;
  1266. }
  1267. /**
  1268. * i40iw_ieq_update_tcpip_info - update tcpip in the buffer
  1269. * @buf: puda to update
  1270. * @length: length of buffer
  1271. * @seqnum: seq number for tcp
  1272. */
  1273. void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length, u32 seqnum)
  1274. {
  1275. struct tcphdr *tcph;
  1276. struct iphdr *iph;
  1277. u16 iphlen;
  1278. u16 packetsize;
  1279. u8 *addr = (u8 *)buf->mem.va;
  1280. iphlen = (buf->ipv4) ? 20 : 40;
  1281. iph = (struct iphdr *)(addr + buf->maclen);
  1282. tcph = (struct tcphdr *)(addr + buf->maclen + iphlen);
  1283. packetsize = length + buf->tcphlen + iphlen;
  1284. iph->tot_len = htons(packetsize);
  1285. tcph->seq = htonl(seqnum);
  1286. }
  1287. /**
  1288. * i40iw_puda_get_tcpip_info - get tcpip info from puda buffer
  1289. * @info: to get information
  1290. * @buf: puda buffer
  1291. */
  1292. enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
  1293. struct i40iw_puda_buf *buf)
  1294. {
  1295. struct iphdr *iph;
  1296. struct ipv6hdr *ip6h;
  1297. struct tcphdr *tcph;
  1298. u16 iphlen;
  1299. u16 pkt_len;
  1300. u8 *mem = (u8 *)buf->mem.va;
  1301. struct ethhdr *ethh = (struct ethhdr *)buf->mem.va;
  1302. if (ethh->h_proto == htons(0x8100)) {
  1303. info->vlan_valid = true;
  1304. buf->vlan_id = ntohs(((struct vlan_ethhdr *)ethh)->h_vlan_TCI) & VLAN_VID_MASK;
  1305. }
  1306. buf->maclen = (info->vlan_valid) ? 18 : 14;
  1307. iphlen = (info->l3proto) ? 40 : 20;
  1308. buf->ipv4 = (info->l3proto) ? false : true;
  1309. buf->iph = mem + buf->maclen;
  1310. iph = (struct iphdr *)buf->iph;
  1311. buf->tcph = buf->iph + iphlen;
  1312. tcph = (struct tcphdr *)buf->tcph;
  1313. if (buf->ipv4) {
  1314. pkt_len = ntohs(iph->tot_len);
  1315. } else {
  1316. ip6h = (struct ipv6hdr *)buf->iph;
  1317. pkt_len = ntohs(ip6h->payload_len) + iphlen;
  1318. }
  1319. buf->totallen = pkt_len + buf->maclen;
  1320. if (info->payload_len < buf->totallen) {
  1321. i40iw_pr_err("payload_len = 0x%x totallen expected0x%x\n",
  1322. info->payload_len, buf->totallen);
  1323. return I40IW_ERR_INVALID_SIZE;
  1324. }
  1325. buf->tcphlen = (tcph->doff) << 2;
  1326. buf->datalen = pkt_len - iphlen - buf->tcphlen;
  1327. buf->data = (buf->datalen) ? buf->tcph + buf->tcphlen : NULL;
  1328. buf->hdrlen = buf->maclen + iphlen + buf->tcphlen;
  1329. buf->seqnum = ntohl(tcph->seq);
  1330. return 0;
  1331. }
  1332. /**
  1333. * i40iw_hw_stats_timeout - Stats timer-handler which updates all HW stats
  1334. * @vsi: pointer to the vsi structure
  1335. */
  1336. static void i40iw_hw_stats_timeout(struct timer_list *t)
  1337. {
  1338. struct i40iw_vsi_pestat *pf_devstat = from_timer(pf_devstat, t,
  1339. stats_timer);
  1340. struct i40iw_sc_vsi *sc_vsi = pf_devstat->vsi;
  1341. struct i40iw_sc_dev *pf_dev = sc_vsi->dev;
  1342. struct i40iw_vsi_pestat *vf_devstat = NULL;
  1343. u16 iw_vf_idx;
  1344. unsigned long flags;
  1345. /*PF*/
  1346. i40iw_hw_stats_read_all(pf_devstat, &pf_devstat->hw_stats);
  1347. for (iw_vf_idx = 0; iw_vf_idx < I40IW_MAX_PE_ENABLED_VF_COUNT; iw_vf_idx++) {
  1348. spin_lock_irqsave(&pf_devstat->lock, flags);
  1349. if (pf_dev->vf_dev[iw_vf_idx]) {
  1350. if (pf_dev->vf_dev[iw_vf_idx]->stats_initialized) {
  1351. vf_devstat = &pf_dev->vf_dev[iw_vf_idx]->pestat;
  1352. i40iw_hw_stats_read_all(vf_devstat, &vf_devstat->hw_stats);
  1353. }
  1354. }
  1355. spin_unlock_irqrestore(&pf_devstat->lock, flags);
  1356. }
  1357. mod_timer(&pf_devstat->stats_timer,
  1358. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1359. }
  1360. /**
  1361. * i40iw_hw_stats_start_timer - Start periodic stats timer
  1362. * @vsi: pointer to the vsi structure
  1363. */
  1364. void i40iw_hw_stats_start_timer(struct i40iw_sc_vsi *vsi)
  1365. {
  1366. struct i40iw_vsi_pestat *devstat = vsi->pestat;
  1367. timer_setup(&devstat->stats_timer, i40iw_hw_stats_timeout, 0);
  1368. mod_timer(&devstat->stats_timer,
  1369. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1370. }
  1371. /**
  1372. * i40iw_hw_stats_stop_timer - Delete periodic stats timer
  1373. * @vsi: pointer to the vsi structure
  1374. */
  1375. void i40iw_hw_stats_stop_timer(struct i40iw_sc_vsi *vsi)
  1376. {
  1377. struct i40iw_vsi_pestat *devstat = vsi->pestat;
  1378. del_timer_sync(&devstat->stats_timer);
  1379. }