main.c 42 KB

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  1. /*
  2. * Broadcom NetXtreme-E RoCE driver.
  3. *
  4. * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
  5. * Broadcom refers to Broadcom Limited and/or its subsidiaries.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or without
  14. * modification, are permitted provided that the following conditions
  15. * are met:
  16. *
  17. * 1. Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * 2. Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
  28. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  31. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  32. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  33. * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  34. * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. *
  36. * Description: Main component of the bnxt_re driver
  37. */
  38. #include <linux/module.h>
  39. #include <linux/netdevice.h>
  40. #include <linux/ethtool.h>
  41. #include <linux/mutex.h>
  42. #include <linux/list.h>
  43. #include <linux/rculist.h>
  44. #include <linux/spinlock.h>
  45. #include <linux/pci.h>
  46. #include <net/dcbnl.h>
  47. #include <net/ipv6.h>
  48. #include <net/addrconf.h>
  49. #include <linux/if_ether.h>
  50. #include <rdma/ib_verbs.h>
  51. #include <rdma/ib_user_verbs.h>
  52. #include <rdma/ib_umem.h>
  53. #include <rdma/ib_addr.h>
  54. #include "bnxt_ulp.h"
  55. #include "roce_hsi.h"
  56. #include "qplib_res.h"
  57. #include "qplib_sp.h"
  58. #include "qplib_fp.h"
  59. #include "qplib_rcfw.h"
  60. #include "bnxt_re.h"
  61. #include "ib_verbs.h"
  62. #include <rdma/bnxt_re-abi.h>
  63. #include "bnxt.h"
  64. #include "hw_counters.h"
  65. static char version[] =
  66. BNXT_RE_DESC " v" ROCE_DRV_MODULE_VERSION "\n";
  67. MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
  68. MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
  69. MODULE_LICENSE("Dual BSD/GPL");
  70. /* globals */
  71. static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list);
  72. /* Mutex to protect the list of bnxt_re devices added */
  73. static DEFINE_MUTEX(bnxt_re_dev_lock);
  74. static struct workqueue_struct *bnxt_re_wq;
  75. static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait);
  76. /* SR-IOV helper functions */
  77. static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
  78. {
  79. struct bnxt *bp;
  80. bp = netdev_priv(rdev->en_dev->net);
  81. if (BNXT_VF(bp))
  82. rdev->is_virtfn = 1;
  83. }
  84. /* Set the maximum number of each resource that the driver actually wants
  85. * to allocate. This may be up to the maximum number the firmware has
  86. * reserved for the function. The driver may choose to allocate fewer
  87. * resources than the firmware maximum.
  88. */
  89. static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
  90. {
  91. u32 vf_qps = 0, vf_srqs = 0, vf_cqs = 0, vf_mrws = 0, vf_gids = 0;
  92. u32 i;
  93. u32 vf_pct;
  94. u32 num_vfs;
  95. struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr;
  96. rdev->qplib_ctx.qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT,
  97. dev_attr->max_qp);
  98. rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT_256K;
  99. /* Use max_mr from fw since max_mrw does not get set */
  100. rdev->qplib_ctx.mrw_count = min_t(u32, rdev->qplib_ctx.mrw_count,
  101. dev_attr->max_mr);
  102. rdev->qplib_ctx.srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,
  103. dev_attr->max_srq);
  104. rdev->qplib_ctx.cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT,
  105. dev_attr->max_cq);
  106. for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
  107. rdev->qplib_ctx.tqm_count[i] =
  108. rdev->dev_attr.tqm_alloc_reqs[i];
  109. if (rdev->num_vfs) {
  110. /*
  111. * Reserve a set of resources for the PF. Divide the remaining
  112. * resources among the VFs
  113. */
  114. vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF;
  115. num_vfs = 100 * rdev->num_vfs;
  116. vf_qps = (rdev->qplib_ctx.qpc_count * vf_pct) / num_vfs;
  117. vf_srqs = (rdev->qplib_ctx.srqc_count * vf_pct) / num_vfs;
  118. vf_cqs = (rdev->qplib_ctx.cq_count * vf_pct) / num_vfs;
  119. /*
  120. * The driver allows many more MRs than other resources. If the
  121. * firmware does also, then reserve a fixed amount for the PF
  122. * and divide the rest among VFs. VFs may use many MRs for NFS
  123. * mounts, ISER, NVME applications, etc. If the firmware
  124. * severely restricts the number of MRs, then let PF have
  125. * half and divide the rest among VFs, as for the other
  126. * resource types.
  127. */
  128. if (rdev->qplib_ctx.mrw_count < BNXT_RE_MAX_MRW_COUNT_64K)
  129. vf_mrws = rdev->qplib_ctx.mrw_count * vf_pct / num_vfs;
  130. else
  131. vf_mrws = (rdev->qplib_ctx.mrw_count -
  132. BNXT_RE_RESVD_MR_FOR_PF) / rdev->num_vfs;
  133. vf_gids = BNXT_RE_MAX_GID_PER_VF;
  134. }
  135. rdev->qplib_ctx.vf_res.max_mrw_per_vf = vf_mrws;
  136. rdev->qplib_ctx.vf_res.max_gid_per_vf = vf_gids;
  137. rdev->qplib_ctx.vf_res.max_qp_per_vf = vf_qps;
  138. rdev->qplib_ctx.vf_res.max_srq_per_vf = vf_srqs;
  139. rdev->qplib_ctx.vf_res.max_cq_per_vf = vf_cqs;
  140. }
  141. /* for handling bnxt_en callbacks later */
  142. static void bnxt_re_stop(void *p)
  143. {
  144. }
  145. static void bnxt_re_start(void *p)
  146. {
  147. }
  148. static void bnxt_re_sriov_config(void *p, int num_vfs)
  149. {
  150. struct bnxt_re_dev *rdev = p;
  151. if (!rdev)
  152. return;
  153. rdev->num_vfs = num_vfs;
  154. bnxt_re_set_resource_limits(rdev);
  155. bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,
  156. &rdev->qplib_ctx);
  157. }
  158. static void bnxt_re_shutdown(void *p)
  159. {
  160. struct bnxt_re_dev *rdev = p;
  161. if (!rdev)
  162. return;
  163. bnxt_re_ib_unreg(rdev, false);
  164. }
  165. static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
  166. .ulp_async_notifier = NULL,
  167. .ulp_stop = bnxt_re_stop,
  168. .ulp_start = bnxt_re_start,
  169. .ulp_sriov_config = bnxt_re_sriov_config,
  170. .ulp_shutdown = bnxt_re_shutdown
  171. };
  172. /* RoCE -> Net driver */
  173. /* Driver registration routines used to let the networking driver (bnxt_en)
  174. * to know that the RoCE driver is now installed
  175. */
  176. static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev, bool lock_wait)
  177. {
  178. struct bnxt_en_dev *en_dev;
  179. int rc;
  180. if (!rdev)
  181. return -EINVAL;
  182. en_dev = rdev->en_dev;
  183. /* Acquire rtnl lock if it is not invokded from netdev event */
  184. if (lock_wait)
  185. rtnl_lock();
  186. rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev,
  187. BNXT_ROCE_ULP);
  188. if (lock_wait)
  189. rtnl_unlock();
  190. return rc;
  191. }
  192. static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
  193. {
  194. struct bnxt_en_dev *en_dev;
  195. int rc = 0;
  196. if (!rdev)
  197. return -EINVAL;
  198. en_dev = rdev->en_dev;
  199. rtnl_lock();
  200. rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
  201. &bnxt_re_ulp_ops, rdev);
  202. rtnl_unlock();
  203. return rc;
  204. }
  205. static int bnxt_re_free_msix(struct bnxt_re_dev *rdev, bool lock_wait)
  206. {
  207. struct bnxt_en_dev *en_dev;
  208. int rc;
  209. if (!rdev)
  210. return -EINVAL;
  211. en_dev = rdev->en_dev;
  212. if (lock_wait)
  213. rtnl_lock();
  214. rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP);
  215. if (lock_wait)
  216. rtnl_unlock();
  217. return rc;
  218. }
  219. static int bnxt_re_request_msix(struct bnxt_re_dev *rdev)
  220. {
  221. int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got;
  222. struct bnxt_en_dev *en_dev;
  223. if (!rdev)
  224. return -EINVAL;
  225. en_dev = rdev->en_dev;
  226. num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus());
  227. rtnl_lock();
  228. num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP,
  229. rdev->msix_entries,
  230. num_msix_want);
  231. if (num_msix_got < BNXT_RE_MIN_MSIX) {
  232. rc = -EINVAL;
  233. goto done;
  234. }
  235. if (num_msix_got != num_msix_want) {
  236. dev_warn(rdev_to_dev(rdev),
  237. "Requested %d MSI-X vectors, got %d\n",
  238. num_msix_want, num_msix_got);
  239. }
  240. rdev->num_msix = num_msix_got;
  241. done:
  242. rtnl_unlock();
  243. return rc;
  244. }
  245. static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr,
  246. u16 opcd, u16 crid, u16 trid)
  247. {
  248. hdr->req_type = cpu_to_le16(opcd);
  249. hdr->cmpl_ring = cpu_to_le16(crid);
  250. hdr->target_id = cpu_to_le16(trid);
  251. }
  252. static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
  253. int msg_len, void *resp, int resp_max_len,
  254. int timeout)
  255. {
  256. fw_msg->msg = msg;
  257. fw_msg->msg_len = msg_len;
  258. fw_msg->resp = resp;
  259. fw_msg->resp_max_len = resp_max_len;
  260. fw_msg->timeout = timeout;
  261. }
  262. static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id,
  263. bool lock_wait)
  264. {
  265. struct bnxt_en_dev *en_dev = rdev->en_dev;
  266. struct hwrm_ring_free_input req = {0};
  267. struct hwrm_ring_free_output resp;
  268. struct bnxt_fw_msg fw_msg;
  269. bool do_unlock = false;
  270. int rc = -EINVAL;
  271. if (!en_dev)
  272. return rc;
  273. memset(&fw_msg, 0, sizeof(fw_msg));
  274. if (lock_wait) {
  275. rtnl_lock();
  276. do_unlock = true;
  277. }
  278. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
  279. req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
  280. req.ring_id = cpu_to_le16(fw_ring_id);
  281. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  282. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  283. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  284. if (rc)
  285. dev_err(rdev_to_dev(rdev),
  286. "Failed to free HW ring:%d :%#x", req.ring_id, rc);
  287. if (do_unlock)
  288. rtnl_unlock();
  289. return rc;
  290. }
  291. static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr,
  292. int pages, int type, u32 ring_mask,
  293. u32 map_index, u16 *fw_ring_id)
  294. {
  295. struct bnxt_en_dev *en_dev = rdev->en_dev;
  296. struct hwrm_ring_alloc_input req = {0};
  297. struct hwrm_ring_alloc_output resp;
  298. struct bnxt_fw_msg fw_msg;
  299. int rc = -EINVAL;
  300. if (!en_dev)
  301. return rc;
  302. memset(&fw_msg, 0, sizeof(fw_msg));
  303. rtnl_lock();
  304. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
  305. req.enables = 0;
  306. req.page_tbl_addr = cpu_to_le64(dma_arr[0]);
  307. if (pages > 1) {
  308. /* Page size is in log2 units */
  309. req.page_size = BNXT_PAGE_SHIFT;
  310. req.page_tbl_depth = 1;
  311. }
  312. req.fbo = 0;
  313. /* Association of ring index with doorbell index and MSIX number */
  314. req.logical_id = cpu_to_le16(map_index);
  315. req.length = cpu_to_le32(ring_mask + 1);
  316. req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
  317. req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;
  318. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  319. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  320. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  321. if (!rc)
  322. *fw_ring_id = le16_to_cpu(resp.ring_id);
  323. rtnl_unlock();
  324. return rc;
  325. }
  326. static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
  327. u32 fw_stats_ctx_id, bool lock_wait)
  328. {
  329. struct bnxt_en_dev *en_dev = rdev->en_dev;
  330. struct hwrm_stat_ctx_free_input req = {0};
  331. struct bnxt_fw_msg fw_msg;
  332. bool do_unlock = false;
  333. int rc = -EINVAL;
  334. if (!en_dev)
  335. return rc;
  336. memset(&fw_msg, 0, sizeof(fw_msg));
  337. if (lock_wait) {
  338. rtnl_lock();
  339. do_unlock = true;
  340. }
  341. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
  342. req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
  343. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req,
  344. sizeof(req), DFLT_HWRM_CMD_TIMEOUT);
  345. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  346. if (rc)
  347. dev_err(rdev_to_dev(rdev),
  348. "Failed to free HW stats context %#x", rc);
  349. if (do_unlock)
  350. rtnl_unlock();
  351. return rc;
  352. }
  353. static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
  354. dma_addr_t dma_map,
  355. u32 *fw_stats_ctx_id)
  356. {
  357. struct hwrm_stat_ctx_alloc_output resp = {0};
  358. struct hwrm_stat_ctx_alloc_input req = {0};
  359. struct bnxt_en_dev *en_dev = rdev->en_dev;
  360. struct bnxt_fw_msg fw_msg;
  361. int rc = -EINVAL;
  362. *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
  363. if (!en_dev)
  364. return rc;
  365. memset(&fw_msg, 0, sizeof(fw_msg));
  366. rtnl_lock();
  367. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
  368. req.update_period_ms = cpu_to_le32(1000);
  369. req.stats_dma_addr = cpu_to_le64(dma_map);
  370. req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE;
  371. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  372. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  373. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  374. if (!rc)
  375. *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
  376. rtnl_unlock();
  377. return rc;
  378. }
  379. /* Device */
  380. static bool is_bnxt_re_dev(struct net_device *netdev)
  381. {
  382. struct ethtool_drvinfo drvinfo;
  383. if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) {
  384. memset(&drvinfo, 0, sizeof(drvinfo));
  385. netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo);
  386. if (strcmp(drvinfo.driver, "bnxt_en"))
  387. return false;
  388. return true;
  389. }
  390. return false;
  391. }
  392. static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
  393. {
  394. struct bnxt_re_dev *rdev;
  395. rcu_read_lock();
  396. list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) {
  397. if (rdev->netdev == netdev) {
  398. rcu_read_unlock();
  399. return rdev;
  400. }
  401. }
  402. rcu_read_unlock();
  403. return NULL;
  404. }
  405. static void bnxt_re_dev_unprobe(struct net_device *netdev,
  406. struct bnxt_en_dev *en_dev)
  407. {
  408. dev_put(netdev);
  409. module_put(en_dev->pdev->driver->driver.owner);
  410. }
  411. static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev)
  412. {
  413. struct bnxt *bp = netdev_priv(netdev);
  414. struct bnxt_en_dev *en_dev;
  415. struct pci_dev *pdev;
  416. /* Call bnxt_en's RoCE probe via indirect API */
  417. if (!bp->ulp_probe)
  418. return ERR_PTR(-EINVAL);
  419. en_dev = bp->ulp_probe(netdev);
  420. if (IS_ERR(en_dev))
  421. return en_dev;
  422. pdev = en_dev->pdev;
  423. if (!pdev)
  424. return ERR_PTR(-EINVAL);
  425. if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) {
  426. dev_info(&pdev->dev,
  427. "%s: probe error: RoCE is not supported on this device",
  428. ROCE_DRV_MODULE_NAME);
  429. return ERR_PTR(-ENODEV);
  430. }
  431. /* Bump net device reference count */
  432. if (!try_module_get(pdev->driver->driver.owner))
  433. return ERR_PTR(-ENODEV);
  434. dev_hold(netdev);
  435. return en_dev;
  436. }
  437. static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev)
  438. {
  439. ib_unregister_device(&rdev->ibdev);
  440. }
  441. static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
  442. {
  443. struct ib_device *ibdev = &rdev->ibdev;
  444. /* ib device init */
  445. ibdev->owner = THIS_MODULE;
  446. ibdev->node_type = RDMA_NODE_IB_CA;
  447. strlcpy(ibdev->name, "bnxt_re%d", IB_DEVICE_NAME_MAX);
  448. strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
  449. strlen(BNXT_RE_DESC) + 5);
  450. ibdev->phys_port_cnt = 1;
  451. bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid);
  452. ibdev->num_comp_vectors = 1;
  453. ibdev->dev.parent = &rdev->en_dev->pdev->dev;
  454. ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
  455. /* User space */
  456. ibdev->uverbs_abi_ver = BNXT_RE_ABI_VERSION;
  457. ibdev->uverbs_cmd_mask =
  458. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  459. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  460. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  461. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  462. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  463. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  464. (1ull << IB_USER_VERBS_CMD_REREG_MR) |
  465. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  466. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  467. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  468. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  469. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  470. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  471. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  472. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  473. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  474. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  475. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  476. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  477. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  478. (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
  479. (1ull << IB_USER_VERBS_CMD_MODIFY_AH) |
  480. (1ull << IB_USER_VERBS_CMD_QUERY_AH) |
  481. (1ull << IB_USER_VERBS_CMD_DESTROY_AH);
  482. /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */
  483. /* Kernel verbs */
  484. ibdev->query_device = bnxt_re_query_device;
  485. ibdev->modify_device = bnxt_re_modify_device;
  486. ibdev->query_port = bnxt_re_query_port;
  487. ibdev->get_port_immutable = bnxt_re_get_port_immutable;
  488. ibdev->get_dev_fw_str = bnxt_re_query_fw_str;
  489. ibdev->query_pkey = bnxt_re_query_pkey;
  490. ibdev->get_netdev = bnxt_re_get_netdev;
  491. ibdev->add_gid = bnxt_re_add_gid;
  492. ibdev->del_gid = bnxt_re_del_gid;
  493. ibdev->get_link_layer = bnxt_re_get_link_layer;
  494. ibdev->alloc_pd = bnxt_re_alloc_pd;
  495. ibdev->dealloc_pd = bnxt_re_dealloc_pd;
  496. ibdev->create_ah = bnxt_re_create_ah;
  497. ibdev->modify_ah = bnxt_re_modify_ah;
  498. ibdev->query_ah = bnxt_re_query_ah;
  499. ibdev->destroy_ah = bnxt_re_destroy_ah;
  500. ibdev->create_srq = bnxt_re_create_srq;
  501. ibdev->modify_srq = bnxt_re_modify_srq;
  502. ibdev->query_srq = bnxt_re_query_srq;
  503. ibdev->destroy_srq = bnxt_re_destroy_srq;
  504. ibdev->post_srq_recv = bnxt_re_post_srq_recv;
  505. ibdev->create_qp = bnxt_re_create_qp;
  506. ibdev->modify_qp = bnxt_re_modify_qp;
  507. ibdev->query_qp = bnxt_re_query_qp;
  508. ibdev->destroy_qp = bnxt_re_destroy_qp;
  509. ibdev->post_send = bnxt_re_post_send;
  510. ibdev->post_recv = bnxt_re_post_recv;
  511. ibdev->create_cq = bnxt_re_create_cq;
  512. ibdev->destroy_cq = bnxt_re_destroy_cq;
  513. ibdev->poll_cq = bnxt_re_poll_cq;
  514. ibdev->req_notify_cq = bnxt_re_req_notify_cq;
  515. ibdev->get_dma_mr = bnxt_re_get_dma_mr;
  516. ibdev->dereg_mr = bnxt_re_dereg_mr;
  517. ibdev->alloc_mr = bnxt_re_alloc_mr;
  518. ibdev->map_mr_sg = bnxt_re_map_mr_sg;
  519. ibdev->reg_user_mr = bnxt_re_reg_user_mr;
  520. ibdev->alloc_ucontext = bnxt_re_alloc_ucontext;
  521. ibdev->dealloc_ucontext = bnxt_re_dealloc_ucontext;
  522. ibdev->mmap = bnxt_re_mmap;
  523. ibdev->get_hw_stats = bnxt_re_ib_get_hw_stats;
  524. ibdev->alloc_hw_stats = bnxt_re_ib_alloc_hw_stats;
  525. ibdev->driver_id = RDMA_DRIVER_BNXT_RE;
  526. return ib_register_device(ibdev, NULL);
  527. }
  528. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  529. char *buf)
  530. {
  531. struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev);
  532. return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor);
  533. }
  534. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  535. char *buf)
  536. {
  537. struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev);
  538. return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc);
  539. }
  540. static DEVICE_ATTR(hw_rev, 0444, show_rev, NULL);
  541. static DEVICE_ATTR(hca_type, 0444, show_hca, NULL);
  542. static struct device_attribute *bnxt_re_attributes[] = {
  543. &dev_attr_hw_rev,
  544. &dev_attr_hca_type
  545. };
  546. static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev)
  547. {
  548. dev_put(rdev->netdev);
  549. rdev->netdev = NULL;
  550. mutex_lock(&bnxt_re_dev_lock);
  551. list_del_rcu(&rdev->list);
  552. mutex_unlock(&bnxt_re_dev_lock);
  553. synchronize_rcu();
  554. ib_dealloc_device(&rdev->ibdev);
  555. /* rdev is gone */
  556. }
  557. static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev,
  558. struct bnxt_en_dev *en_dev)
  559. {
  560. struct bnxt_re_dev *rdev;
  561. /* Allocate bnxt_re_dev instance here */
  562. rdev = (struct bnxt_re_dev *)ib_alloc_device(sizeof(*rdev));
  563. if (!rdev) {
  564. dev_err(NULL, "%s: bnxt_re_dev allocation failure!",
  565. ROCE_DRV_MODULE_NAME);
  566. return NULL;
  567. }
  568. /* Default values */
  569. rdev->netdev = netdev;
  570. dev_hold(rdev->netdev);
  571. rdev->en_dev = en_dev;
  572. rdev->id = rdev->en_dev->pdev->devfn;
  573. INIT_LIST_HEAD(&rdev->qp_list);
  574. mutex_init(&rdev->qp_lock);
  575. atomic_set(&rdev->qp_count, 0);
  576. atomic_set(&rdev->cq_count, 0);
  577. atomic_set(&rdev->srq_count, 0);
  578. atomic_set(&rdev->mr_count, 0);
  579. atomic_set(&rdev->mw_count, 0);
  580. rdev->cosq[0] = 0xFFFF;
  581. rdev->cosq[1] = 0xFFFF;
  582. mutex_lock(&bnxt_re_dev_lock);
  583. list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list);
  584. mutex_unlock(&bnxt_re_dev_lock);
  585. return rdev;
  586. }
  587. static int bnxt_re_handle_unaffi_async_event(struct creq_func_event
  588. *unaffi_async)
  589. {
  590. switch (unaffi_async->event) {
  591. case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
  592. break;
  593. case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
  594. break;
  595. case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
  596. break;
  597. case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
  598. break;
  599. case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
  600. break;
  601. case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
  602. break;
  603. case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
  604. break;
  605. case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
  606. break;
  607. case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
  608. break;
  609. case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
  610. break;
  611. case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
  612. break;
  613. default:
  614. return -EINVAL;
  615. }
  616. return 0;
  617. }
  618. static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event,
  619. struct bnxt_re_qp *qp)
  620. {
  621. struct ib_event event;
  622. unsigned int flags;
  623. if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  624. flags = bnxt_re_lock_cqs(qp);
  625. bnxt_qplib_add_flush_qp(&qp->qplib_qp);
  626. bnxt_re_unlock_cqs(qp, flags);
  627. }
  628. memset(&event, 0, sizeof(event));
  629. if (qp->qplib_qp.srq) {
  630. event.device = &qp->rdev->ibdev;
  631. event.element.qp = &qp->ib_qp;
  632. event.event = IB_EVENT_QP_LAST_WQE_REACHED;
  633. }
  634. if (event.device && qp->ib_qp.event_handler)
  635. qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context);
  636. return 0;
  637. }
  638. static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async,
  639. void *obj)
  640. {
  641. int rc = 0;
  642. u8 event;
  643. if (!obj)
  644. return rc; /* QP was already dead, still return success */
  645. event = affi_async->event;
  646. if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) {
  647. struct bnxt_qplib_qp *lib_qp = obj;
  648. struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp,
  649. qplib_qp);
  650. rc = bnxt_re_handle_qp_async_event(affi_async, qp);
  651. }
  652. return rc;
  653. }
  654. static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
  655. void *aeqe, void *obj)
  656. {
  657. struct creq_qp_event *affi_async;
  658. struct creq_func_event *unaffi_async;
  659. u8 type;
  660. int rc;
  661. type = ((struct creq_base *)aeqe)->type;
  662. if (type == CREQ_BASE_TYPE_FUNC_EVENT) {
  663. unaffi_async = aeqe;
  664. rc = bnxt_re_handle_unaffi_async_event(unaffi_async);
  665. } else {
  666. affi_async = aeqe;
  667. rc = bnxt_re_handle_affi_async_event(affi_async, obj);
  668. }
  669. return rc;
  670. }
  671. static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq,
  672. struct bnxt_qplib_srq *handle, u8 event)
  673. {
  674. struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq,
  675. qplib_srq);
  676. struct ib_event ib_event;
  677. int rc = 0;
  678. if (!srq) {
  679. dev_err(NULL, "%s: SRQ is NULL, SRQN not handled",
  680. ROCE_DRV_MODULE_NAME);
  681. rc = -EINVAL;
  682. goto done;
  683. }
  684. ib_event.device = &srq->rdev->ibdev;
  685. ib_event.element.srq = &srq->ib_srq;
  686. if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT)
  687. ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED;
  688. else
  689. ib_event.event = IB_EVENT_SRQ_ERR;
  690. if (srq->ib_srq.event_handler) {
  691. /* Lock event_handler? */
  692. (*srq->ib_srq.event_handler)(&ib_event,
  693. srq->ib_srq.srq_context);
  694. }
  695. done:
  696. return rc;
  697. }
  698. static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
  699. struct bnxt_qplib_cq *handle)
  700. {
  701. struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
  702. qplib_cq);
  703. if (!cq) {
  704. dev_err(NULL, "%s: CQ is NULL, CQN not handled",
  705. ROCE_DRV_MODULE_NAME);
  706. return -EINVAL;
  707. }
  708. if (cq->ib_cq.comp_handler) {
  709. /* Lock comp_handler? */
  710. (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
  711. }
  712. return 0;
  713. }
  714. static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
  715. {
  716. int i;
  717. if (rdev->nq[0].hwq.max_elements) {
  718. for (i = 1; i < rdev->num_msix; i++)
  719. bnxt_qplib_disable_nq(&rdev->nq[i - 1]);
  720. }
  721. if (rdev->qplib_res.rcfw)
  722. bnxt_qplib_cleanup_res(&rdev->qplib_res);
  723. }
  724. static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
  725. {
  726. int rc = 0, i;
  727. bnxt_qplib_init_res(&rdev->qplib_res);
  728. for (i = 1; i < rdev->num_msix ; i++) {
  729. rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1],
  730. i - 1, rdev->msix_entries[i].vector,
  731. rdev->msix_entries[i].db_offset,
  732. &bnxt_re_cqn_handler,
  733. &bnxt_re_srqn_handler);
  734. if (rc) {
  735. dev_err(rdev_to_dev(rdev),
  736. "Failed to enable NQ with rc = 0x%x", rc);
  737. goto fail;
  738. }
  739. }
  740. return 0;
  741. fail:
  742. return rc;
  743. }
  744. static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev, bool lock_wait)
  745. {
  746. int i;
  747. for (i = 0; i < rdev->num_msix - 1; i++) {
  748. bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, lock_wait);
  749. bnxt_qplib_free_nq(&rdev->nq[i]);
  750. }
  751. }
  752. static void bnxt_re_free_res(struct bnxt_re_dev *rdev, bool lock_wait)
  753. {
  754. bnxt_re_free_nq_res(rdev, lock_wait);
  755. if (rdev->qplib_res.dpi_tbl.max) {
  756. bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
  757. &rdev->qplib_res.dpi_tbl,
  758. &rdev->dpi_privileged);
  759. }
  760. if (rdev->qplib_res.rcfw) {
  761. bnxt_qplib_free_res(&rdev->qplib_res);
  762. rdev->qplib_res.rcfw = NULL;
  763. }
  764. }
  765. static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
  766. {
  767. int rc = 0, i;
  768. /* Configure and allocate resources for qplib */
  769. rdev->qplib_res.rcfw = &rdev->rcfw;
  770. rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
  771. rdev->is_virtfn);
  772. if (rc)
  773. goto fail;
  774. rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
  775. rdev->netdev, &rdev->dev_attr);
  776. if (rc)
  777. goto fail;
  778. rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
  779. &rdev->dpi_privileged,
  780. rdev);
  781. if (rc)
  782. goto dealloc_res;
  783. for (i = 0; i < rdev->num_msix - 1; i++) {
  784. rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT +
  785. BNXT_RE_MAX_SRQC_COUNT + 2;
  786. rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]);
  787. if (rc) {
  788. dev_err(rdev_to_dev(rdev), "Alloc Failed NQ%d rc:%#x",
  789. i, rc);
  790. goto dealloc_dpi;
  791. }
  792. rc = bnxt_re_net_ring_alloc
  793. (rdev, rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr,
  794. rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count,
  795. HWRM_RING_ALLOC_CMPL,
  796. BNXT_QPLIB_NQE_MAX_CNT - 1,
  797. rdev->msix_entries[i + 1].ring_idx,
  798. &rdev->nq[i].ring_id);
  799. if (rc) {
  800. dev_err(rdev_to_dev(rdev),
  801. "Failed to allocate NQ fw id with rc = 0x%x",
  802. rc);
  803. goto free_nq;
  804. }
  805. }
  806. return 0;
  807. free_nq:
  808. for (i = 0; i < rdev->num_msix - 1; i++)
  809. bnxt_qplib_free_nq(&rdev->nq[i]);
  810. dealloc_dpi:
  811. bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
  812. &rdev->qplib_res.dpi_tbl,
  813. &rdev->dpi_privileged);
  814. dealloc_res:
  815. bnxt_qplib_free_res(&rdev->qplib_res);
  816. fail:
  817. rdev->qplib_res.rcfw = NULL;
  818. return rc;
  819. }
  820. static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
  821. u8 port_num, enum ib_event_type event)
  822. {
  823. struct ib_event ib_event;
  824. ib_event.device = ibdev;
  825. if (qp)
  826. ib_event.element.qp = qp;
  827. else
  828. ib_event.element.port_num = port_num;
  829. ib_event.event = event;
  830. ib_dispatch_event(&ib_event);
  831. }
  832. #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02
  833. static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir,
  834. u64 *cid_map)
  835. {
  836. struct hwrm_queue_pri2cos_qcfg_input req = {0};
  837. struct bnxt *bp = netdev_priv(rdev->netdev);
  838. struct hwrm_queue_pri2cos_qcfg_output resp;
  839. struct bnxt_en_dev *en_dev = rdev->en_dev;
  840. struct bnxt_fw_msg fw_msg;
  841. u32 flags = 0;
  842. u8 *qcfgmap, *tmp_map;
  843. int rc = 0, i;
  844. if (!cid_map)
  845. return -EINVAL;
  846. memset(&fw_msg, 0, sizeof(fw_msg));
  847. bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
  848. HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
  849. flags |= (dir & 0x01);
  850. flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN;
  851. req.flags = cpu_to_le32(flags);
  852. req.port_id = bp->pf.port_id;
  853. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  854. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  855. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  856. if (rc)
  857. return rc;
  858. if (resp.queue_cfg_info) {
  859. dev_warn(rdev_to_dev(rdev),
  860. "Asymmetric cos queue configuration detected");
  861. dev_warn(rdev_to_dev(rdev),
  862. " on device, QoS may not be fully functional\n");
  863. }
  864. qcfgmap = &resp.pri0_cos_queue_id;
  865. tmp_map = (u8 *)cid_map;
  866. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  867. tmp_map[i] = qcfgmap[i];
  868. return rc;
  869. }
  870. static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
  871. struct bnxt_re_qp *qp)
  872. {
  873. return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp);
  874. }
  875. static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
  876. {
  877. int mask = IB_QP_STATE;
  878. struct ib_qp_attr qp_attr;
  879. struct bnxt_re_qp *qp;
  880. qp_attr.qp_state = IB_QPS_ERR;
  881. mutex_lock(&rdev->qp_lock);
  882. list_for_each_entry(qp, &rdev->qp_list, list) {
  883. /* Modify the state of all QPs except QP1/Shadow QP */
  884. if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
  885. if (qp->qplib_qp.state !=
  886. CMDQ_MODIFY_QP_NEW_STATE_RESET &&
  887. qp->qplib_qp.state !=
  888. CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  889. bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
  890. 1, IB_EVENT_QP_FATAL);
  891. bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
  892. NULL);
  893. }
  894. }
  895. }
  896. mutex_unlock(&rdev->qp_lock);
  897. }
  898. static int bnxt_re_update_gid(struct bnxt_re_dev *rdev)
  899. {
  900. struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
  901. struct bnxt_qplib_gid gid;
  902. u16 gid_idx, index;
  903. int rc = 0;
  904. if (!test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
  905. return 0;
  906. if (!sgid_tbl) {
  907. dev_err(rdev_to_dev(rdev), "QPLIB: SGID table not allocated");
  908. return -EINVAL;
  909. }
  910. for (index = 0; index < sgid_tbl->active; index++) {
  911. gid_idx = sgid_tbl->hw_id[index];
  912. if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
  913. sizeof(bnxt_qplib_gid_zero)))
  914. continue;
  915. /* need to modify the VLAN enable setting of non VLAN GID only
  916. * as setting is done for VLAN GID while adding GID
  917. */
  918. if (sgid_tbl->vlan[index])
  919. continue;
  920. memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid));
  921. rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx,
  922. rdev->qplib_res.netdev->dev_addr);
  923. }
  924. return rc;
  925. }
  926. static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
  927. {
  928. u32 prio_map = 0, tmp_map = 0;
  929. struct net_device *netdev;
  930. struct dcb_app app;
  931. netdev = rdev->netdev;
  932. memset(&app, 0, sizeof(app));
  933. app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
  934. app.protocol = ETH_P_IBOE;
  935. tmp_map = dcb_ieee_getapp_mask(netdev, &app);
  936. prio_map = tmp_map;
  937. app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
  938. app.protocol = ROCE_V2_UDP_DPORT;
  939. tmp_map = dcb_ieee_getapp_mask(netdev, &app);
  940. prio_map |= tmp_map;
  941. return prio_map;
  942. }
  943. static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq)
  944. {
  945. u16 prio;
  946. u8 id;
  947. for (prio = 0, id = 0; prio < 8; prio++) {
  948. if (prio_map & (1 << prio)) {
  949. cosq[id] = cid_map[prio];
  950. id++;
  951. if (id == 2) /* Max 2 tcs supported */
  952. break;
  953. }
  954. }
  955. }
  956. static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
  957. {
  958. u8 prio_map = 0;
  959. u64 cid_map;
  960. int rc;
  961. /* Get priority for roce */
  962. prio_map = bnxt_re_get_priority_mask(rdev);
  963. if (prio_map == rdev->cur_prio_map)
  964. return 0;
  965. rdev->cur_prio_map = prio_map;
  966. /* Get cosq id for this priority */
  967. rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map);
  968. if (rc) {
  969. dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map);
  970. return rc;
  971. }
  972. /* Parse CoS IDs for app priority */
  973. bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq);
  974. /* Config BONO. */
  975. rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq);
  976. if (rc) {
  977. dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n",
  978. rdev->cosq[0], rdev->cosq[1]);
  979. return rc;
  980. }
  981. /* Actual priorities are not programmed as they are already
  982. * done by L2 driver; just enable or disable priority vlan tagging
  983. */
  984. if ((prio_map == 0 && rdev->qplib_res.prio) ||
  985. (prio_map != 0 && !rdev->qplib_res.prio)) {
  986. rdev->qplib_res.prio = prio_map ? true : false;
  987. bnxt_re_update_gid(rdev);
  988. }
  989. return 0;
  990. }
  991. static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait)
  992. {
  993. int i, rc;
  994. if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) {
  995. for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++)
  996. device_remove_file(&rdev->ibdev.dev,
  997. bnxt_re_attributes[i]);
  998. /* Cleanup ib dev */
  999. bnxt_re_unregister_ib(rdev);
  1000. }
  1001. if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
  1002. cancel_delayed_work(&rdev->worker);
  1003. bnxt_re_cleanup_res(rdev);
  1004. bnxt_re_free_res(rdev, lock_wait);
  1005. if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
  1006. rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
  1007. if (rc)
  1008. dev_warn(rdev_to_dev(rdev),
  1009. "Failed to deinitialize RCFW: %#x", rc);
  1010. bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id,
  1011. lock_wait);
  1012. bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
  1013. bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
  1014. bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, lock_wait);
  1015. bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
  1016. }
  1017. if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) {
  1018. rc = bnxt_re_free_msix(rdev, lock_wait);
  1019. if (rc)
  1020. dev_warn(rdev_to_dev(rdev),
  1021. "Failed to free MSI-X vectors: %#x", rc);
  1022. }
  1023. if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
  1024. rc = bnxt_re_unregister_netdev(rdev, lock_wait);
  1025. if (rc)
  1026. dev_warn(rdev_to_dev(rdev),
  1027. "Failed to unregister with netdev: %#x", rc);
  1028. }
  1029. }
  1030. /* worker thread for polling periodic events. Now used for QoS programming*/
  1031. static void bnxt_re_worker(struct work_struct *work)
  1032. {
  1033. struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
  1034. worker.work);
  1035. bnxt_re_setup_qos(rdev);
  1036. schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
  1037. }
  1038. static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
  1039. {
  1040. int i, j, rc;
  1041. /* Registered a new RoCE device instance to netdev */
  1042. rc = bnxt_re_register_netdev(rdev);
  1043. if (rc) {
  1044. pr_err("Failed to register with netedev: %#x\n", rc);
  1045. return -EINVAL;
  1046. }
  1047. set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
  1048. /* Check whether VF or PF */
  1049. bnxt_re_get_sriov_func_type(rdev);
  1050. rc = bnxt_re_request_msix(rdev);
  1051. if (rc) {
  1052. pr_err("Failed to get MSI-X vectors: %#x\n", rc);
  1053. rc = -EINVAL;
  1054. goto fail;
  1055. }
  1056. set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
  1057. /* Establish RCFW Communication Channel to initialize the context
  1058. * memory for the function and all child VFs
  1059. */
  1060. rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw,
  1061. BNXT_RE_MAX_QPC_COUNT);
  1062. if (rc) {
  1063. pr_err("Failed to allocate RCFW Channel: %#x\n", rc);
  1064. goto fail;
  1065. }
  1066. rc = bnxt_re_net_ring_alloc
  1067. (rdev, rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr,
  1068. rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count,
  1069. HWRM_RING_ALLOC_CMPL, BNXT_QPLIB_CREQE_MAX_CNT - 1,
  1070. rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx,
  1071. &rdev->rcfw.creq_ring_id);
  1072. if (rc) {
  1073. pr_err("Failed to allocate CREQ: %#x\n", rc);
  1074. goto free_rcfw;
  1075. }
  1076. rc = bnxt_qplib_enable_rcfw_channel
  1077. (rdev->en_dev->pdev, &rdev->rcfw,
  1078. rdev->msix_entries[BNXT_RE_AEQ_IDX].vector,
  1079. rdev->msix_entries[BNXT_RE_AEQ_IDX].db_offset,
  1080. rdev->is_virtfn, &bnxt_re_aeq_handler);
  1081. if (rc) {
  1082. pr_err("Failed to enable RCFW channel: %#x\n", rc);
  1083. goto free_ring;
  1084. }
  1085. rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
  1086. rdev->is_virtfn);
  1087. if (rc)
  1088. goto disable_rcfw;
  1089. if (!rdev->is_virtfn)
  1090. bnxt_re_set_resource_limits(rdev);
  1091. rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0);
  1092. if (rc) {
  1093. pr_err("Failed to allocate QPLIB context: %#x\n", rc);
  1094. goto disable_rcfw;
  1095. }
  1096. rc = bnxt_re_net_stats_ctx_alloc(rdev,
  1097. rdev->qplib_ctx.stats.dma_map,
  1098. &rdev->qplib_ctx.stats.fw_id);
  1099. if (rc) {
  1100. pr_err("Failed to allocate stats context: %#x\n", rc);
  1101. goto free_ctx;
  1102. }
  1103. rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx,
  1104. rdev->is_virtfn);
  1105. if (rc) {
  1106. pr_err("Failed to initialize RCFW: %#x\n", rc);
  1107. goto free_sctx;
  1108. }
  1109. set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
  1110. /* Resources based on the 'new' device caps */
  1111. rc = bnxt_re_alloc_res(rdev);
  1112. if (rc) {
  1113. pr_err("Failed to allocate resources: %#x\n", rc);
  1114. goto fail;
  1115. }
  1116. rc = bnxt_re_init_res(rdev);
  1117. if (rc) {
  1118. pr_err("Failed to initialize resources: %#x\n", rc);
  1119. goto fail;
  1120. }
  1121. if (!rdev->is_virtfn) {
  1122. rc = bnxt_re_setup_qos(rdev);
  1123. if (rc)
  1124. pr_info("RoCE priority not yet configured\n");
  1125. INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
  1126. set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
  1127. schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
  1128. }
  1129. /* Register ib dev */
  1130. rc = bnxt_re_register_ib(rdev);
  1131. if (rc) {
  1132. pr_err("Failed to register with IB: %#x\n", rc);
  1133. goto fail;
  1134. }
  1135. dev_info(rdev_to_dev(rdev), "Device registered successfully");
  1136. for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) {
  1137. rc = device_create_file(&rdev->ibdev.dev,
  1138. bnxt_re_attributes[i]);
  1139. if (rc) {
  1140. dev_err(rdev_to_dev(rdev),
  1141. "Failed to create IB sysfs: %#x", rc);
  1142. /* Must clean up all created device files */
  1143. for (j = 0; j < i; j++)
  1144. device_remove_file(&rdev->ibdev.dev,
  1145. bnxt_re_attributes[j]);
  1146. bnxt_re_unregister_ib(rdev);
  1147. goto fail;
  1148. }
  1149. }
  1150. set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags);
  1151. ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
  1152. &rdev->active_width);
  1153. set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags);
  1154. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE);
  1155. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_GID_CHANGE);
  1156. return 0;
  1157. free_sctx:
  1158. bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id, true);
  1159. free_ctx:
  1160. bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
  1161. disable_rcfw:
  1162. bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
  1163. free_ring:
  1164. bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, true);
  1165. free_rcfw:
  1166. bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
  1167. fail:
  1168. bnxt_re_ib_unreg(rdev, true);
  1169. return rc;
  1170. }
  1171. static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev)
  1172. {
  1173. struct bnxt_en_dev *en_dev = rdev->en_dev;
  1174. struct net_device *netdev = rdev->netdev;
  1175. bnxt_re_dev_remove(rdev);
  1176. if (netdev)
  1177. bnxt_re_dev_unprobe(netdev, en_dev);
  1178. }
  1179. static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev)
  1180. {
  1181. struct bnxt_en_dev *en_dev;
  1182. int rc = 0;
  1183. if (!is_bnxt_re_dev(netdev))
  1184. return -ENODEV;
  1185. en_dev = bnxt_re_dev_probe(netdev);
  1186. if (IS_ERR(en_dev)) {
  1187. if (en_dev != ERR_PTR(-ENODEV))
  1188. pr_err("%s: Failed to probe\n", ROCE_DRV_MODULE_NAME);
  1189. rc = PTR_ERR(en_dev);
  1190. goto exit;
  1191. }
  1192. *rdev = bnxt_re_dev_add(netdev, en_dev);
  1193. if (!*rdev) {
  1194. rc = -ENOMEM;
  1195. bnxt_re_dev_unprobe(netdev, en_dev);
  1196. goto exit;
  1197. }
  1198. exit:
  1199. return rc;
  1200. }
  1201. static void bnxt_re_remove_one(struct bnxt_re_dev *rdev)
  1202. {
  1203. pci_dev_put(rdev->en_dev->pdev);
  1204. }
  1205. /* Handle all deferred netevents tasks */
  1206. static void bnxt_re_task(struct work_struct *work)
  1207. {
  1208. struct bnxt_re_work *re_work;
  1209. struct bnxt_re_dev *rdev;
  1210. int rc = 0;
  1211. re_work = container_of(work, struct bnxt_re_work, work);
  1212. rdev = re_work->rdev;
  1213. if (re_work->event != NETDEV_REGISTER &&
  1214. !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
  1215. return;
  1216. switch (re_work->event) {
  1217. case NETDEV_REGISTER:
  1218. rc = bnxt_re_ib_reg(rdev);
  1219. if (rc) {
  1220. dev_err(rdev_to_dev(rdev),
  1221. "Failed to register with IB: %#x", rc);
  1222. bnxt_re_remove_one(rdev);
  1223. bnxt_re_dev_unreg(rdev);
  1224. }
  1225. break;
  1226. case NETDEV_UP:
  1227. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
  1228. IB_EVENT_PORT_ACTIVE);
  1229. break;
  1230. case NETDEV_DOWN:
  1231. bnxt_re_dev_stop(rdev);
  1232. break;
  1233. case NETDEV_CHANGE:
  1234. if (!netif_carrier_ok(rdev->netdev))
  1235. bnxt_re_dev_stop(rdev);
  1236. else if (netif_carrier_ok(rdev->netdev))
  1237. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
  1238. IB_EVENT_PORT_ACTIVE);
  1239. ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
  1240. &rdev->active_width);
  1241. break;
  1242. default:
  1243. break;
  1244. }
  1245. smp_mb__before_atomic();
  1246. atomic_dec(&rdev->sched_count);
  1247. kfree(re_work);
  1248. }
  1249. static void bnxt_re_init_one(struct bnxt_re_dev *rdev)
  1250. {
  1251. pci_dev_get(rdev->en_dev->pdev);
  1252. }
  1253. /*
  1254. * "Notifier chain callback can be invoked for the same chain from
  1255. * different CPUs at the same time".
  1256. *
  1257. * For cases when the netdev is already present, our call to the
  1258. * register_netdevice_notifier() will actually get the rtnl_lock()
  1259. * before sending NETDEV_REGISTER and (if up) NETDEV_UP
  1260. * events.
  1261. *
  1262. * But for cases when the netdev is not already present, the notifier
  1263. * chain is subjected to be invoked from different CPUs simultaneously.
  1264. *
  1265. * This is protected by the netdev_mutex.
  1266. */
  1267. static int bnxt_re_netdev_event(struct notifier_block *notifier,
  1268. unsigned long event, void *ptr)
  1269. {
  1270. struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
  1271. struct bnxt_re_work *re_work;
  1272. struct bnxt_re_dev *rdev;
  1273. int rc = 0;
  1274. bool sch_work = false;
  1275. real_dev = rdma_vlan_dev_real_dev(netdev);
  1276. if (!real_dev)
  1277. real_dev = netdev;
  1278. rdev = bnxt_re_from_netdev(real_dev);
  1279. if (!rdev && event != NETDEV_REGISTER)
  1280. goto exit;
  1281. if (real_dev != netdev)
  1282. goto exit;
  1283. switch (event) {
  1284. case NETDEV_REGISTER:
  1285. if (rdev)
  1286. break;
  1287. rc = bnxt_re_dev_reg(&rdev, real_dev);
  1288. if (rc == -ENODEV)
  1289. break;
  1290. if (rc) {
  1291. pr_err("Failed to register with the device %s: %#x\n",
  1292. real_dev->name, rc);
  1293. break;
  1294. }
  1295. bnxt_re_init_one(rdev);
  1296. sch_work = true;
  1297. break;
  1298. case NETDEV_UNREGISTER:
  1299. /* netdev notifier will call NETDEV_UNREGISTER again later since
  1300. * we are still holding the reference to the netdev
  1301. */
  1302. if (atomic_read(&rdev->sched_count) > 0)
  1303. goto exit;
  1304. bnxt_re_ib_unreg(rdev, false);
  1305. bnxt_re_remove_one(rdev);
  1306. bnxt_re_dev_unreg(rdev);
  1307. break;
  1308. default:
  1309. sch_work = true;
  1310. break;
  1311. }
  1312. if (sch_work) {
  1313. /* Allocate for the deferred task */
  1314. re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC);
  1315. if (re_work) {
  1316. re_work->rdev = rdev;
  1317. re_work->event = event;
  1318. re_work->vlan_dev = (real_dev == netdev ?
  1319. NULL : netdev);
  1320. INIT_WORK(&re_work->work, bnxt_re_task);
  1321. atomic_inc(&rdev->sched_count);
  1322. queue_work(bnxt_re_wq, &re_work->work);
  1323. }
  1324. }
  1325. exit:
  1326. return NOTIFY_DONE;
  1327. }
  1328. static struct notifier_block bnxt_re_netdev_notifier = {
  1329. .notifier_call = bnxt_re_netdev_event
  1330. };
  1331. static int __init bnxt_re_mod_init(void)
  1332. {
  1333. int rc = 0;
  1334. pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
  1335. bnxt_re_wq = create_singlethread_workqueue("bnxt_re");
  1336. if (!bnxt_re_wq)
  1337. return -ENOMEM;
  1338. INIT_LIST_HEAD(&bnxt_re_dev_list);
  1339. rc = register_netdevice_notifier(&bnxt_re_netdev_notifier);
  1340. if (rc) {
  1341. pr_err("%s: Cannot register to netdevice_notifier",
  1342. ROCE_DRV_MODULE_NAME);
  1343. goto err_netdev;
  1344. }
  1345. return 0;
  1346. err_netdev:
  1347. destroy_workqueue(bnxt_re_wq);
  1348. return rc;
  1349. }
  1350. static void __exit bnxt_re_mod_exit(void)
  1351. {
  1352. struct bnxt_re_dev *rdev, *next;
  1353. LIST_HEAD(to_be_deleted);
  1354. mutex_lock(&bnxt_re_dev_lock);
  1355. /* Free all adapter allocated resources */
  1356. if (!list_empty(&bnxt_re_dev_list))
  1357. list_splice_init(&bnxt_re_dev_list, &to_be_deleted);
  1358. mutex_unlock(&bnxt_re_dev_lock);
  1359. /*
  1360. * Cleanup the devices in reverse order so that the VF device
  1361. * cleanup is done before PF cleanup
  1362. */
  1363. list_for_each_entry_safe_reverse(rdev, next, &to_be_deleted, list) {
  1364. dev_info(rdev_to_dev(rdev), "Unregistering Device");
  1365. /*
  1366. * Flush out any scheduled tasks before destroying the
  1367. * resources
  1368. */
  1369. flush_workqueue(bnxt_re_wq);
  1370. bnxt_re_dev_stop(rdev);
  1371. bnxt_re_ib_unreg(rdev, true);
  1372. bnxt_re_remove_one(rdev);
  1373. bnxt_re_dev_unreg(rdev);
  1374. }
  1375. unregister_netdevice_notifier(&bnxt_re_netdev_notifier);
  1376. if (bnxt_re_wq)
  1377. destroy_workqueue(bnxt_re_wq);
  1378. }
  1379. module_init(bnxt_re_mod_init);
  1380. module_exit(bnxt_re_mod_exit);