pgtable_64.c 22 KB

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  1. /*
  2. * This file contains ioremap and related functions for 64-bit machines.
  3. *
  4. * Derived from arch/ppc64/mm/init.c
  5. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  6. *
  7. * Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
  8. * and Cort Dougan (PReP) (cort@cs.nmt.edu)
  9. * Copyright (C) 1996 Paul Mackerras
  10. *
  11. * Derived from "arch/i386/mm/init.c"
  12. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  13. *
  14. * Dave Engebretsen <engebret@us.ibm.com>
  15. * Rework for PPC64 port.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License
  19. * as published by the Free Software Foundation; either version
  20. * 2 of the License, or (at your option) any later version.
  21. *
  22. */
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/kernel.h>
  26. #include <linux/errno.h>
  27. #include <linux/string.h>
  28. #include <linux/export.h>
  29. #include <linux/types.h>
  30. #include <linux/mman.h>
  31. #include <linux/mm.h>
  32. #include <linux/swap.h>
  33. #include <linux/stddef.h>
  34. #include <linux/vmalloc.h>
  35. #include <linux/memblock.h>
  36. #include <linux/slab.h>
  37. #include <linux/hugetlb.h>
  38. #include <asm/pgalloc.h>
  39. #include <asm/page.h>
  40. #include <asm/prom.h>
  41. #include <asm/io.h>
  42. #include <asm/mmu_context.h>
  43. #include <asm/pgtable.h>
  44. #include <asm/mmu.h>
  45. #include <asm/smp.h>
  46. #include <asm/machdep.h>
  47. #include <asm/tlb.h>
  48. #include <asm/processor.h>
  49. #include <asm/cputable.h>
  50. #include <asm/sections.h>
  51. #include <asm/firmware.h>
  52. #include <asm/dma.h>
  53. #include "mmu_decl.h"
  54. #define CREATE_TRACE_POINTS
  55. #include <trace/events/thp.h>
  56. /* Some sanity checking */
  57. #if TASK_SIZE_USER64 > PGTABLE_RANGE
  58. #error TASK_SIZE_USER64 exceeds pagetable range
  59. #endif
  60. #ifdef CONFIG_PPC_STD_MMU_64
  61. #if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
  62. #error TASK_SIZE_USER64 exceeds user VSID range
  63. #endif
  64. #endif
  65. unsigned long ioremap_bot = IOREMAP_BASE;
  66. #ifdef CONFIG_PPC_MMU_NOHASH
  67. static __ref void *early_alloc_pgtable(unsigned long size)
  68. {
  69. void *pt;
  70. pt = __va(memblock_alloc_base(size, size, __pa(MAX_DMA_ADDRESS)));
  71. memset(pt, 0, size);
  72. return pt;
  73. }
  74. #endif /* CONFIG_PPC_MMU_NOHASH */
  75. /*
  76. * map_kernel_page currently only called by __ioremap
  77. * map_kernel_page adds an entry to the ioremap page table
  78. * and adds an entry to the HPT, possibly bolting it
  79. */
  80. int map_kernel_page(unsigned long ea, unsigned long pa, int flags)
  81. {
  82. pgd_t *pgdp;
  83. pud_t *pudp;
  84. pmd_t *pmdp;
  85. pte_t *ptep;
  86. if (slab_is_available()) {
  87. pgdp = pgd_offset_k(ea);
  88. pudp = pud_alloc(&init_mm, pgdp, ea);
  89. if (!pudp)
  90. return -ENOMEM;
  91. pmdp = pmd_alloc(&init_mm, pudp, ea);
  92. if (!pmdp)
  93. return -ENOMEM;
  94. ptep = pte_alloc_kernel(pmdp, ea);
  95. if (!ptep)
  96. return -ENOMEM;
  97. set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
  98. __pgprot(flags)));
  99. } else {
  100. #ifdef CONFIG_PPC_MMU_NOHASH
  101. pgdp = pgd_offset_k(ea);
  102. #ifdef PUD_TABLE_SIZE
  103. if (pgd_none(*pgdp)) {
  104. pudp = early_alloc_pgtable(PUD_TABLE_SIZE);
  105. BUG_ON(pudp == NULL);
  106. pgd_populate(&init_mm, pgdp, pudp);
  107. }
  108. #endif /* PUD_TABLE_SIZE */
  109. pudp = pud_offset(pgdp, ea);
  110. if (pud_none(*pudp)) {
  111. pmdp = early_alloc_pgtable(PMD_TABLE_SIZE);
  112. BUG_ON(pmdp == NULL);
  113. pud_populate(&init_mm, pudp, pmdp);
  114. }
  115. pmdp = pmd_offset(pudp, ea);
  116. if (!pmd_present(*pmdp)) {
  117. ptep = early_alloc_pgtable(PAGE_SIZE);
  118. BUG_ON(ptep == NULL);
  119. pmd_populate_kernel(&init_mm, pmdp, ptep);
  120. }
  121. ptep = pte_offset_kernel(pmdp, ea);
  122. set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
  123. __pgprot(flags)));
  124. #else /* CONFIG_PPC_MMU_NOHASH */
  125. /*
  126. * If the mm subsystem is not fully up, we cannot create a
  127. * linux page table entry for this mapping. Simply bolt an
  128. * entry in the hardware page table.
  129. *
  130. */
  131. if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
  132. mmu_io_psize, mmu_kernel_ssize)) {
  133. printk(KERN_ERR "Failed to do bolted mapping IO "
  134. "memory at %016lx !\n", pa);
  135. return -ENOMEM;
  136. }
  137. #endif /* !CONFIG_PPC_MMU_NOHASH */
  138. }
  139. #ifdef CONFIG_PPC_BOOK3E_64
  140. /*
  141. * With hardware tablewalk, a sync is needed to ensure that
  142. * subsequent accesses see the PTE we just wrote. Unlike userspace
  143. * mappings, we can't tolerate spurious faults, so make sure
  144. * the new PTE will be seen the first time.
  145. */
  146. mb();
  147. #else
  148. smp_wmb();
  149. #endif
  150. return 0;
  151. }
  152. /**
  153. * __ioremap_at - Low level function to establish the page tables
  154. * for an IO mapping
  155. */
  156. void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
  157. unsigned long flags)
  158. {
  159. unsigned long i;
  160. /* Make sure we have the base flags */
  161. if ((flags & _PAGE_PRESENT) == 0)
  162. flags |= pgprot_val(PAGE_KERNEL);
  163. /* Non-cacheable page cannot be coherent */
  164. if (flags & _PAGE_NO_CACHE)
  165. flags &= ~_PAGE_COHERENT;
  166. /* We don't support the 4K PFN hack with ioremap */
  167. if (flags & _PAGE_4K_PFN)
  168. return NULL;
  169. WARN_ON(pa & ~PAGE_MASK);
  170. WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
  171. WARN_ON(size & ~PAGE_MASK);
  172. for (i = 0; i < size; i += PAGE_SIZE)
  173. if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
  174. return NULL;
  175. return (void __iomem *)ea;
  176. }
  177. /**
  178. * __iounmap_from - Low level function to tear down the page tables
  179. * for an IO mapping. This is used for mappings that
  180. * are manipulated manually, like partial unmapping of
  181. * PCI IOs or ISA space.
  182. */
  183. void __iounmap_at(void *ea, unsigned long size)
  184. {
  185. WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
  186. WARN_ON(size & ~PAGE_MASK);
  187. unmap_kernel_range((unsigned long)ea, size);
  188. }
  189. void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
  190. unsigned long flags, void *caller)
  191. {
  192. phys_addr_t paligned;
  193. void __iomem *ret;
  194. /*
  195. * Choose an address to map it to.
  196. * Once the imalloc system is running, we use it.
  197. * Before that, we map using addresses going
  198. * up from ioremap_bot. imalloc will use
  199. * the addresses from ioremap_bot through
  200. * IMALLOC_END
  201. *
  202. */
  203. paligned = addr & PAGE_MASK;
  204. size = PAGE_ALIGN(addr + size) - paligned;
  205. if ((size == 0) || (paligned == 0))
  206. return NULL;
  207. if (slab_is_available()) {
  208. struct vm_struct *area;
  209. area = __get_vm_area_caller(size, VM_IOREMAP,
  210. ioremap_bot, IOREMAP_END,
  211. caller);
  212. if (area == NULL)
  213. return NULL;
  214. area->phys_addr = paligned;
  215. ret = __ioremap_at(paligned, area->addr, size, flags);
  216. if (!ret)
  217. vunmap(area->addr);
  218. } else {
  219. ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
  220. if (ret)
  221. ioremap_bot += size;
  222. }
  223. if (ret)
  224. ret += addr & ~PAGE_MASK;
  225. return ret;
  226. }
  227. void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
  228. unsigned long flags)
  229. {
  230. return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
  231. }
  232. void __iomem * ioremap(phys_addr_t addr, unsigned long size)
  233. {
  234. unsigned long flags = _PAGE_NO_CACHE | _PAGE_GUARDED;
  235. void *caller = __builtin_return_address(0);
  236. if (ppc_md.ioremap)
  237. return ppc_md.ioremap(addr, size, flags, caller);
  238. return __ioremap_caller(addr, size, flags, caller);
  239. }
  240. void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
  241. {
  242. unsigned long flags = _PAGE_NO_CACHE;
  243. void *caller = __builtin_return_address(0);
  244. if (ppc_md.ioremap)
  245. return ppc_md.ioremap(addr, size, flags, caller);
  246. return __ioremap_caller(addr, size, flags, caller);
  247. }
  248. void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
  249. unsigned long flags)
  250. {
  251. void *caller = __builtin_return_address(0);
  252. /* writeable implies dirty for kernel addresses */
  253. if (flags & _PAGE_RW)
  254. flags |= _PAGE_DIRTY;
  255. /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */
  256. flags &= ~(_PAGE_USER | _PAGE_EXEC);
  257. #ifdef _PAGE_BAP_SR
  258. /* _PAGE_USER contains _PAGE_BAP_SR on BookE using the new PTE format
  259. * which means that we just cleared supervisor access... oops ;-) This
  260. * restores it
  261. */
  262. flags |= _PAGE_BAP_SR;
  263. #endif
  264. if (ppc_md.ioremap)
  265. return ppc_md.ioremap(addr, size, flags, caller);
  266. return __ioremap_caller(addr, size, flags, caller);
  267. }
  268. /*
  269. * Unmap an IO region and remove it from imalloc'd list.
  270. * Access to IO memory should be serialized by driver.
  271. */
  272. void __iounmap(volatile void __iomem *token)
  273. {
  274. void *addr;
  275. if (!slab_is_available())
  276. return;
  277. addr = (void *) ((unsigned long __force)
  278. PCI_FIX_ADDR(token) & PAGE_MASK);
  279. if ((unsigned long)addr < ioremap_bot) {
  280. printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
  281. " at 0x%p\n", addr);
  282. return;
  283. }
  284. vunmap(addr);
  285. }
  286. void iounmap(volatile void __iomem *token)
  287. {
  288. if (ppc_md.iounmap)
  289. ppc_md.iounmap(token);
  290. else
  291. __iounmap(token);
  292. }
  293. EXPORT_SYMBOL(ioremap);
  294. EXPORT_SYMBOL(ioremap_wc);
  295. EXPORT_SYMBOL(ioremap_prot);
  296. EXPORT_SYMBOL(__ioremap);
  297. EXPORT_SYMBOL(__ioremap_at);
  298. EXPORT_SYMBOL(iounmap);
  299. EXPORT_SYMBOL(__iounmap);
  300. EXPORT_SYMBOL(__iounmap_at);
  301. #ifndef __PAGETABLE_PUD_FOLDED
  302. /* 4 level page table */
  303. struct page *pgd_page(pgd_t pgd)
  304. {
  305. if (pgd_huge(pgd))
  306. return pte_page(pgd_pte(pgd));
  307. return virt_to_page(pgd_page_vaddr(pgd));
  308. }
  309. #endif
  310. struct page *pud_page(pud_t pud)
  311. {
  312. if (pud_huge(pud))
  313. return pte_page(pud_pte(pud));
  314. return virt_to_page(pud_page_vaddr(pud));
  315. }
  316. /*
  317. * For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
  318. * For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
  319. */
  320. struct page *pmd_page(pmd_t pmd)
  321. {
  322. if (pmd_trans_huge(pmd) || pmd_huge(pmd))
  323. return pfn_to_page(pmd_pfn(pmd));
  324. return virt_to_page(pmd_page_vaddr(pmd));
  325. }
  326. #ifdef CONFIG_PPC_64K_PAGES
  327. static pte_t *get_from_cache(struct mm_struct *mm)
  328. {
  329. void *pte_frag, *ret;
  330. spin_lock(&mm->page_table_lock);
  331. ret = mm->context.pte_frag;
  332. if (ret) {
  333. pte_frag = ret + PTE_FRAG_SIZE;
  334. /*
  335. * If we have taken up all the fragments mark PTE page NULL
  336. */
  337. if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
  338. pte_frag = NULL;
  339. mm->context.pte_frag = pte_frag;
  340. }
  341. spin_unlock(&mm->page_table_lock);
  342. return (pte_t *)ret;
  343. }
  344. static pte_t *__alloc_for_cache(struct mm_struct *mm, int kernel)
  345. {
  346. void *ret = NULL;
  347. struct page *page = alloc_page(GFP_KERNEL | __GFP_NOTRACK |
  348. __GFP_REPEAT | __GFP_ZERO);
  349. if (!page)
  350. return NULL;
  351. if (!kernel && !pgtable_page_ctor(page)) {
  352. __free_page(page);
  353. return NULL;
  354. }
  355. ret = page_address(page);
  356. spin_lock(&mm->page_table_lock);
  357. /*
  358. * If we find pgtable_page set, we return
  359. * the allocated page with single fragement
  360. * count.
  361. */
  362. if (likely(!mm->context.pte_frag)) {
  363. atomic_set(&page->_count, PTE_FRAG_NR);
  364. mm->context.pte_frag = ret + PTE_FRAG_SIZE;
  365. }
  366. spin_unlock(&mm->page_table_lock);
  367. return (pte_t *)ret;
  368. }
  369. pte_t *page_table_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
  370. {
  371. pte_t *pte;
  372. pte = get_from_cache(mm);
  373. if (pte)
  374. return pte;
  375. return __alloc_for_cache(mm, kernel);
  376. }
  377. void page_table_free(struct mm_struct *mm, unsigned long *table, int kernel)
  378. {
  379. struct page *page = virt_to_page(table);
  380. if (put_page_testzero(page)) {
  381. if (!kernel)
  382. pgtable_page_dtor(page);
  383. free_hot_cold_page(page, 0);
  384. }
  385. }
  386. #ifdef CONFIG_SMP
  387. static void page_table_free_rcu(void *table)
  388. {
  389. struct page *page = virt_to_page(table);
  390. if (put_page_testzero(page)) {
  391. pgtable_page_dtor(page);
  392. free_hot_cold_page(page, 0);
  393. }
  394. }
  395. void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
  396. {
  397. unsigned long pgf = (unsigned long)table;
  398. BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
  399. pgf |= shift;
  400. tlb_remove_table(tlb, (void *)pgf);
  401. }
  402. void __tlb_remove_table(void *_table)
  403. {
  404. void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
  405. unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
  406. if (!shift)
  407. /* PTE page needs special handling */
  408. page_table_free_rcu(table);
  409. else {
  410. BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
  411. kmem_cache_free(PGT_CACHE(shift), table);
  412. }
  413. }
  414. #else
  415. void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
  416. {
  417. if (!shift) {
  418. /* PTE page needs special handling */
  419. struct page *page = virt_to_page(table);
  420. if (put_page_testzero(page)) {
  421. pgtable_page_dtor(page);
  422. free_hot_cold_page(page, 0);
  423. }
  424. } else {
  425. BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
  426. kmem_cache_free(PGT_CACHE(shift), table);
  427. }
  428. }
  429. #endif
  430. #endif /* CONFIG_PPC_64K_PAGES */
  431. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  432. /*
  433. * This is called when relaxing access to a hugepage. It's also called in the page
  434. * fault path when we don't hit any of the major fault cases, ie, a minor
  435. * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
  436. * handled those two for us, we additionally deal with missing execute
  437. * permission here on some processors
  438. */
  439. int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
  440. pmd_t *pmdp, pmd_t entry, int dirty)
  441. {
  442. int changed;
  443. #ifdef CONFIG_DEBUG_VM
  444. WARN_ON(!pmd_trans_huge(*pmdp));
  445. assert_spin_locked(&vma->vm_mm->page_table_lock);
  446. #endif
  447. changed = !pmd_same(*(pmdp), entry);
  448. if (changed) {
  449. __ptep_set_access_flags(pmdp_ptep(pmdp), pmd_pte(entry));
  450. /*
  451. * Since we are not supporting SW TLB systems, we don't
  452. * have any thing similar to flush_tlb_page_nohash()
  453. */
  454. }
  455. return changed;
  456. }
  457. unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,
  458. pmd_t *pmdp, unsigned long clr,
  459. unsigned long set)
  460. {
  461. unsigned long old, tmp;
  462. #ifdef CONFIG_DEBUG_VM
  463. WARN_ON(!pmd_trans_huge(*pmdp));
  464. assert_spin_locked(&mm->page_table_lock);
  465. #endif
  466. #ifdef PTE_ATOMIC_UPDATES
  467. __asm__ __volatile__(
  468. "1: ldarx %0,0,%3\n\
  469. andi. %1,%0,%6\n\
  470. bne- 1b \n\
  471. andc %1,%0,%4 \n\
  472. or %1,%1,%7\n\
  473. stdcx. %1,0,%3 \n\
  474. bne- 1b"
  475. : "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
  476. : "r" (pmdp), "r" (clr), "m" (*pmdp), "i" (_PAGE_BUSY), "r" (set)
  477. : "cc" );
  478. #else
  479. old = pmd_val(*pmdp);
  480. *pmdp = __pmd((old & ~clr) | set);
  481. #endif
  482. trace_hugepage_update(addr, old, clr, set);
  483. if (old & _PAGE_HASHPTE)
  484. hpte_do_hugepage_flush(mm, addr, pmdp, old);
  485. return old;
  486. }
  487. pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,
  488. pmd_t *pmdp)
  489. {
  490. pmd_t pmd;
  491. VM_BUG_ON(address & ~HPAGE_PMD_MASK);
  492. if (pmd_trans_huge(*pmdp)) {
  493. pmd = pmdp_get_and_clear(vma->vm_mm, address, pmdp);
  494. } else {
  495. /*
  496. * khugepaged calls this for normal pmd
  497. */
  498. pmd = *pmdp;
  499. pmd_clear(pmdp);
  500. /*
  501. * Wait for all pending hash_page to finish. This is needed
  502. * in case of subpage collapse. When we collapse normal pages
  503. * to hugepage, we first clear the pmd, then invalidate all
  504. * the PTE entries. The assumption here is that any low level
  505. * page fault will see a none pmd and take the slow path that
  506. * will wait on mmap_sem. But we could very well be in a
  507. * hash_page with local ptep pointer value. Such a hash page
  508. * can result in adding new HPTE entries for normal subpages.
  509. * That means we could be modifying the page content as we
  510. * copy them to a huge page. So wait for parallel hash_page
  511. * to finish before invalidating HPTE entries. We can do this
  512. * by sending an IPI to all the cpus and executing a dummy
  513. * function there.
  514. */
  515. kick_all_cpus_sync();
  516. /*
  517. * Now invalidate the hpte entries in the range
  518. * covered by pmd. This make sure we take a
  519. * fault and will find the pmd as none, which will
  520. * result in a major fault which takes mmap_sem and
  521. * hence wait for collapse to complete. Without this
  522. * the __collapse_huge_page_copy can result in copying
  523. * the old content.
  524. */
  525. flush_tlb_pmd_range(vma->vm_mm, &pmd, address);
  526. }
  527. return pmd;
  528. }
  529. int pmdp_test_and_clear_young(struct vm_area_struct *vma,
  530. unsigned long address, pmd_t *pmdp)
  531. {
  532. return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
  533. }
  534. /*
  535. * We currently remove entries from the hashtable regardless of whether
  536. * the entry was young or dirty. The generic routines only flush if the
  537. * entry was young or dirty which is not good enough.
  538. *
  539. * We should be more intelligent about this but for the moment we override
  540. * these functions and force a tlb flush unconditionally
  541. */
  542. int pmdp_clear_flush_young(struct vm_area_struct *vma,
  543. unsigned long address, pmd_t *pmdp)
  544. {
  545. return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
  546. }
  547. /*
  548. * We mark the pmd splitting and invalidate all the hpte
  549. * entries for this hugepage.
  550. */
  551. void pmdp_splitting_flush(struct vm_area_struct *vma,
  552. unsigned long address, pmd_t *pmdp)
  553. {
  554. unsigned long old, tmp;
  555. VM_BUG_ON(address & ~HPAGE_PMD_MASK);
  556. #ifdef CONFIG_DEBUG_VM
  557. WARN_ON(!pmd_trans_huge(*pmdp));
  558. assert_spin_locked(&vma->vm_mm->page_table_lock);
  559. #endif
  560. #ifdef PTE_ATOMIC_UPDATES
  561. __asm__ __volatile__(
  562. "1: ldarx %0,0,%3\n\
  563. andi. %1,%0,%6\n\
  564. bne- 1b \n\
  565. ori %1,%0,%4 \n\
  566. stdcx. %1,0,%3 \n\
  567. bne- 1b"
  568. : "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
  569. : "r" (pmdp), "i" (_PAGE_SPLITTING), "m" (*pmdp), "i" (_PAGE_BUSY)
  570. : "cc" );
  571. #else
  572. old = pmd_val(*pmdp);
  573. *pmdp = __pmd(old | _PAGE_SPLITTING);
  574. #endif
  575. /*
  576. * If we didn't had the splitting flag set, go and flush the
  577. * HPTE entries.
  578. */
  579. trace_hugepage_splitting(address, old);
  580. if (!(old & _PAGE_SPLITTING)) {
  581. /* We need to flush the hpte */
  582. if (old & _PAGE_HASHPTE)
  583. hpte_do_hugepage_flush(vma->vm_mm, address, pmdp, old);
  584. }
  585. /*
  586. * This ensures that generic code that rely on IRQ disabling
  587. * to prevent a parallel THP split work as expected.
  588. */
  589. kick_all_cpus_sync();
  590. }
  591. /*
  592. * We want to put the pgtable in pmd and use pgtable for tracking
  593. * the base page size hptes
  594. */
  595. void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
  596. pgtable_t pgtable)
  597. {
  598. pgtable_t *pgtable_slot;
  599. assert_spin_locked(&mm->page_table_lock);
  600. /*
  601. * we store the pgtable in the second half of PMD
  602. */
  603. pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
  604. *pgtable_slot = pgtable;
  605. /*
  606. * expose the deposited pgtable to other cpus.
  607. * before we set the hugepage PTE at pmd level
  608. * hash fault code looks at the deposted pgtable
  609. * to store hash index values.
  610. */
  611. smp_wmb();
  612. }
  613. pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
  614. {
  615. pgtable_t pgtable;
  616. pgtable_t *pgtable_slot;
  617. assert_spin_locked(&mm->page_table_lock);
  618. pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
  619. pgtable = *pgtable_slot;
  620. /*
  621. * Once we withdraw, mark the entry NULL.
  622. */
  623. *pgtable_slot = NULL;
  624. /*
  625. * We store HPTE information in the deposited PTE fragment.
  626. * zero out the content on withdraw.
  627. */
  628. memset(pgtable, 0, PTE_FRAG_SIZE);
  629. return pgtable;
  630. }
  631. /*
  632. * set a new huge pmd. We should not be called for updating
  633. * an existing pmd entry. That should go via pmd_hugepage_update.
  634. */
  635. void set_pmd_at(struct mm_struct *mm, unsigned long addr,
  636. pmd_t *pmdp, pmd_t pmd)
  637. {
  638. #ifdef CONFIG_DEBUG_VM
  639. WARN_ON((pmd_val(*pmdp) & (_PAGE_PRESENT | _PAGE_USER)) ==
  640. (_PAGE_PRESENT | _PAGE_USER));
  641. assert_spin_locked(&mm->page_table_lock);
  642. WARN_ON(!pmd_trans_huge(pmd));
  643. #endif
  644. trace_hugepage_set_pmd(addr, pmd_val(pmd));
  645. return set_pte_at(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd));
  646. }
  647. void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
  648. pmd_t *pmdp)
  649. {
  650. pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, 0);
  651. }
  652. /*
  653. * A linux hugepage PMD was changed and the corresponding hash table entries
  654. * neesd to be flushed.
  655. */
  656. void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
  657. pmd_t *pmdp, unsigned long old_pmd)
  658. {
  659. int ssize;
  660. unsigned int psize;
  661. unsigned long vsid;
  662. unsigned long flags = 0;
  663. const struct cpumask *tmp;
  664. /* get the base page size,vsid and segment size */
  665. #ifdef CONFIG_DEBUG_VM
  666. psize = get_slice_psize(mm, addr);
  667. BUG_ON(psize == MMU_PAGE_16M);
  668. #endif
  669. if (old_pmd & _PAGE_COMBO)
  670. psize = MMU_PAGE_4K;
  671. else
  672. psize = MMU_PAGE_64K;
  673. if (!is_kernel_addr(addr)) {
  674. ssize = user_segment_size(addr);
  675. vsid = get_vsid(mm->context.id, addr, ssize);
  676. WARN_ON(vsid == 0);
  677. } else {
  678. vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
  679. ssize = mmu_kernel_ssize;
  680. }
  681. tmp = cpumask_of(smp_processor_id());
  682. if (cpumask_equal(mm_cpumask(mm), tmp))
  683. flags |= HPTE_LOCAL_UPDATE;
  684. return flush_hash_hugepage(vsid, addr, pmdp, psize, ssize, flags);
  685. }
  686. static pmd_t pmd_set_protbits(pmd_t pmd, pgprot_t pgprot)
  687. {
  688. pmd_val(pmd) |= pgprot_val(pgprot);
  689. return pmd;
  690. }
  691. pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
  692. {
  693. pmd_t pmd;
  694. /*
  695. * For a valid pte, we would have _PAGE_PRESENT always
  696. * set. We use this to check THP page at pmd level.
  697. * leaf pte for huge page, bottom two bits != 00
  698. */
  699. pmd_val(pmd) = pfn << PTE_RPN_SHIFT;
  700. pmd_val(pmd) |= _PAGE_THP_HUGE;
  701. pmd = pmd_set_protbits(pmd, pgprot);
  702. return pmd;
  703. }
  704. pmd_t mk_pmd(struct page *page, pgprot_t pgprot)
  705. {
  706. return pfn_pmd(page_to_pfn(page), pgprot);
  707. }
  708. pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
  709. {
  710. pmd_val(pmd) &= _HPAGE_CHG_MASK;
  711. pmd = pmd_set_protbits(pmd, newprot);
  712. return pmd;
  713. }
  714. /*
  715. * This is called at the end of handling a user page fault, when the
  716. * fault has been handled by updating a HUGE PMD entry in the linux page tables.
  717. * We use it to preload an HPTE into the hash table corresponding to
  718. * the updated linux HUGE PMD entry.
  719. */
  720. void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
  721. pmd_t *pmd)
  722. {
  723. return;
  724. }
  725. pmd_t pmdp_get_and_clear(struct mm_struct *mm,
  726. unsigned long addr, pmd_t *pmdp)
  727. {
  728. pmd_t old_pmd;
  729. pgtable_t pgtable;
  730. unsigned long old;
  731. pgtable_t *pgtable_slot;
  732. old = pmd_hugepage_update(mm, addr, pmdp, ~0UL, 0);
  733. old_pmd = __pmd(old);
  734. /*
  735. * We have pmd == none and we are holding page_table_lock.
  736. * So we can safely go and clear the pgtable hash
  737. * index info.
  738. */
  739. pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
  740. pgtable = *pgtable_slot;
  741. /*
  742. * Let's zero out old valid and hash index details
  743. * hash fault look at them.
  744. */
  745. memset(pgtable, 0, PTE_FRAG_SIZE);
  746. /*
  747. * Serialize against find_linux_pte_or_hugepte which does lock-less
  748. * lookup in page tables with local interrupts disabled. For huge pages
  749. * it casts pmd_t to pte_t. Since format of pte_t is different from
  750. * pmd_t we want to prevent transit from pmd pointing to page table
  751. * to pmd pointing to huge page (and back) while interrupts are disabled.
  752. * We clear pmd to possibly replace it with page table pointer in
  753. * different code paths. So make sure we wait for the parallel
  754. * find_linux_pte_or_hugepage to finish.
  755. */
  756. kick_all_cpus_sync();
  757. return old_pmd;
  758. }
  759. int has_transparent_hugepage(void)
  760. {
  761. if (!mmu_has_feature(MMU_FTR_16M_PAGE))
  762. return 0;
  763. /*
  764. * We support THP only if PMD_SIZE is 16MB.
  765. */
  766. if (mmu_psize_defs[MMU_PAGE_16M].shift != PMD_SHIFT)
  767. return 0;
  768. /*
  769. * We need to make sure that we support 16MB hugepage in a segement
  770. * with base page size 64K or 4K. We only enable THP with a PAGE_SIZE
  771. * of 64K.
  772. */
  773. /*
  774. * If we have 64K HPTE, we will be using that by default
  775. */
  776. if (mmu_psize_defs[MMU_PAGE_64K].shift &&
  777. (mmu_psize_defs[MMU_PAGE_64K].penc[MMU_PAGE_16M] == -1))
  778. return 0;
  779. /*
  780. * Ok we only have 4K HPTE
  781. */
  782. if (mmu_psize_defs[MMU_PAGE_4K].penc[MMU_PAGE_16M] == -1)
  783. return 0;
  784. return 1;
  785. }
  786. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */