perf_event_cpu.c 10 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License version 2 as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. *
  15. * Copyright (C) 2012 ARM Limited
  16. *
  17. * Author: Will Deacon <will.deacon@arm.com>
  18. */
  19. #define pr_fmt(fmt) "CPU PMU: " fmt
  20. #include <linux/bitmap.h>
  21. #include <linux/export.h>
  22. #include <linux/kernel.h>
  23. #include <linux/of.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/slab.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/irq.h>
  28. #include <linux/irqdesc.h>
  29. #include <asm/cputype.h>
  30. #include <asm/irq_regs.h>
  31. #include <asm/pmu.h>
  32. /* Set at runtime when we know what CPU type we are. */
  33. static struct arm_pmu *cpu_pmu;
  34. /*
  35. * Despite the names, these two functions are CPU-specific and are used
  36. * by the OProfile/perf code.
  37. */
  38. const char *perf_pmu_name(void)
  39. {
  40. if (!cpu_pmu)
  41. return NULL;
  42. return cpu_pmu->name;
  43. }
  44. EXPORT_SYMBOL_GPL(perf_pmu_name);
  45. int perf_num_counters(void)
  46. {
  47. int max_events = 0;
  48. if (cpu_pmu != NULL)
  49. max_events = cpu_pmu->num_events;
  50. return max_events;
  51. }
  52. EXPORT_SYMBOL_GPL(perf_num_counters);
  53. /* Include the PMU-specific implementations. */
  54. #include "perf_event_xscale.c"
  55. #include "perf_event_v6.c"
  56. #include "perf_event_v7.c"
  57. static void cpu_pmu_enable_percpu_irq(void *data)
  58. {
  59. int irq = *(int *)data;
  60. enable_percpu_irq(irq, IRQ_TYPE_NONE);
  61. }
  62. static void cpu_pmu_disable_percpu_irq(void *data)
  63. {
  64. int irq = *(int *)data;
  65. disable_percpu_irq(irq);
  66. }
  67. static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
  68. {
  69. int i, irq, irqs;
  70. struct platform_device *pmu_device = cpu_pmu->plat_device;
  71. struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
  72. irqs = min(pmu_device->num_resources, num_possible_cpus());
  73. irq = platform_get_irq(pmu_device, 0);
  74. if (irq >= 0 && irq_is_percpu(irq)) {
  75. on_each_cpu(cpu_pmu_disable_percpu_irq, &irq, 1);
  76. free_percpu_irq(irq, &hw_events->percpu_pmu);
  77. } else {
  78. for (i = 0; i < irqs; ++i) {
  79. int cpu = i;
  80. if (cpu_pmu->irq_affinity)
  81. cpu = cpu_pmu->irq_affinity[i];
  82. if (!cpumask_test_and_clear_cpu(cpu, &cpu_pmu->active_irqs))
  83. continue;
  84. irq = platform_get_irq(pmu_device, i);
  85. if (irq >= 0)
  86. free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, cpu));
  87. }
  88. }
  89. }
  90. static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
  91. {
  92. int i, err, irq, irqs;
  93. struct platform_device *pmu_device = cpu_pmu->plat_device;
  94. struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
  95. if (!pmu_device)
  96. return -ENODEV;
  97. irqs = min(pmu_device->num_resources, num_possible_cpus());
  98. if (irqs < 1) {
  99. pr_warn_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");
  100. return 0;
  101. }
  102. irq = platform_get_irq(pmu_device, 0);
  103. if (irq >= 0 && irq_is_percpu(irq)) {
  104. err = request_percpu_irq(irq, handler, "arm-pmu",
  105. &hw_events->percpu_pmu);
  106. if (err) {
  107. pr_err("unable to request IRQ%d for ARM PMU counters\n",
  108. irq);
  109. return err;
  110. }
  111. on_each_cpu(cpu_pmu_enable_percpu_irq, &irq, 1);
  112. } else {
  113. for (i = 0; i < irqs; ++i) {
  114. int cpu = i;
  115. err = 0;
  116. irq = platform_get_irq(pmu_device, i);
  117. if (irq < 0)
  118. continue;
  119. if (cpu_pmu->irq_affinity)
  120. cpu = cpu_pmu->irq_affinity[i];
  121. /*
  122. * If we have a single PMU interrupt that we can't shift,
  123. * assume that we're running on a uniprocessor machine and
  124. * continue. Otherwise, continue without this interrupt.
  125. */
  126. if (irq_set_affinity(irq, cpumask_of(cpu)) && irqs > 1) {
  127. pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",
  128. irq, cpu);
  129. continue;
  130. }
  131. err = request_irq(irq, handler,
  132. IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",
  133. per_cpu_ptr(&hw_events->percpu_pmu, cpu));
  134. if (err) {
  135. pr_err("unable to request IRQ%d for ARM PMU counters\n",
  136. irq);
  137. return err;
  138. }
  139. cpumask_set_cpu(cpu, &cpu_pmu->active_irqs);
  140. }
  141. }
  142. return 0;
  143. }
  144. /*
  145. * PMU hardware loses all context when a CPU goes offline.
  146. * When a CPU is hotplugged back in, since some hardware registers are
  147. * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
  148. * junk values out of them.
  149. */
  150. static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
  151. void *hcpu)
  152. {
  153. struct arm_pmu *pmu = container_of(b, struct arm_pmu, hotplug_nb);
  154. if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
  155. return NOTIFY_DONE;
  156. if (pmu->reset)
  157. pmu->reset(pmu);
  158. else
  159. return NOTIFY_DONE;
  160. return NOTIFY_OK;
  161. }
  162. static int cpu_pmu_init(struct arm_pmu *cpu_pmu)
  163. {
  164. int err;
  165. int cpu;
  166. struct pmu_hw_events __percpu *cpu_hw_events;
  167. cpu_hw_events = alloc_percpu(struct pmu_hw_events);
  168. if (!cpu_hw_events)
  169. return -ENOMEM;
  170. cpu_pmu->hotplug_nb.notifier_call = cpu_pmu_notify;
  171. err = register_cpu_notifier(&cpu_pmu->hotplug_nb);
  172. if (err)
  173. goto out_hw_events;
  174. for_each_possible_cpu(cpu) {
  175. struct pmu_hw_events *events = per_cpu_ptr(cpu_hw_events, cpu);
  176. raw_spin_lock_init(&events->pmu_lock);
  177. events->percpu_pmu = cpu_pmu;
  178. }
  179. cpu_pmu->hw_events = cpu_hw_events;
  180. cpu_pmu->request_irq = cpu_pmu_request_irq;
  181. cpu_pmu->free_irq = cpu_pmu_free_irq;
  182. /* Ensure the PMU has sane values out of reset. */
  183. if (cpu_pmu->reset)
  184. on_each_cpu(cpu_pmu->reset, cpu_pmu, 1);
  185. /* If no interrupts available, set the corresponding capability flag */
  186. if (!platform_get_irq(cpu_pmu->plat_device, 0))
  187. cpu_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
  188. return 0;
  189. out_hw_events:
  190. free_percpu(cpu_hw_events);
  191. return err;
  192. }
  193. static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)
  194. {
  195. unregister_cpu_notifier(&cpu_pmu->hotplug_nb);
  196. free_percpu(cpu_pmu->hw_events);
  197. }
  198. /*
  199. * PMU platform driver and devicetree bindings.
  200. */
  201. static const struct of_device_id cpu_pmu_of_device_ids[] = {
  202. {.compatible = "arm,cortex-a17-pmu", .data = armv7_a17_pmu_init},
  203. {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
  204. {.compatible = "arm,cortex-a12-pmu", .data = armv7_a12_pmu_init},
  205. {.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init},
  206. {.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init},
  207. {.compatible = "arm,cortex-a7-pmu", .data = armv7_a7_pmu_init},
  208. {.compatible = "arm,cortex-a5-pmu", .data = armv7_a5_pmu_init},
  209. {.compatible = "arm,arm11mpcore-pmu", .data = armv6mpcore_pmu_init},
  210. {.compatible = "arm,arm1176-pmu", .data = armv6_1176_pmu_init},
  211. {.compatible = "arm,arm1136-pmu", .data = armv6_1136_pmu_init},
  212. {.compatible = "qcom,krait-pmu", .data = krait_pmu_init},
  213. {.compatible = "qcom,scorpion-pmu", .data = scorpion_pmu_init},
  214. {.compatible = "qcom,scorpion-mp-pmu", .data = scorpion_mp_pmu_init},
  215. {},
  216. };
  217. static struct platform_device_id cpu_pmu_plat_device_ids[] = {
  218. {.name = "arm-pmu"},
  219. {.name = "armv6-pmu"},
  220. {.name = "armv7-pmu"},
  221. {.name = "xscale-pmu"},
  222. {},
  223. };
  224. static const struct pmu_probe_info pmu_probe_table[] = {
  225. ARM_PMU_PROBE(ARM_CPU_PART_ARM1136, armv6_1136_pmu_init),
  226. ARM_PMU_PROBE(ARM_CPU_PART_ARM1156, armv6_1156_pmu_init),
  227. ARM_PMU_PROBE(ARM_CPU_PART_ARM1176, armv6_1176_pmu_init),
  228. ARM_PMU_PROBE(ARM_CPU_PART_ARM11MPCORE, armv6mpcore_pmu_init),
  229. ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A8, armv7_a8_pmu_init),
  230. ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A9, armv7_a9_pmu_init),
  231. XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V1, xscale1pmu_init),
  232. XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V2, xscale2pmu_init),
  233. { /* sentinel value */ }
  234. };
  235. /*
  236. * CPU PMU identification and probing.
  237. */
  238. static int probe_current_pmu(struct arm_pmu *pmu)
  239. {
  240. int cpu = get_cpu();
  241. unsigned int cpuid = read_cpuid_id();
  242. int ret = -ENODEV;
  243. const struct pmu_probe_info *info;
  244. pr_info("probing PMU on CPU %d\n", cpu);
  245. for (info = pmu_probe_table; info->init != NULL; info++) {
  246. if ((cpuid & info->mask) != info->cpuid)
  247. continue;
  248. ret = info->init(pmu);
  249. break;
  250. }
  251. put_cpu();
  252. return ret;
  253. }
  254. static int of_pmu_irq_cfg(struct platform_device *pdev)
  255. {
  256. int i, irq;
  257. int *irqs;
  258. /* Don't bother with PPIs; they're already affine */
  259. irq = platform_get_irq(pdev, 0);
  260. if (irq >= 0 && irq_is_percpu(irq))
  261. return 0;
  262. irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
  263. if (!irqs)
  264. return -ENOMEM;
  265. for (i = 0; i < pdev->num_resources; ++i) {
  266. struct device_node *dn;
  267. int cpu;
  268. dn = of_parse_phandle(pdev->dev.of_node, "interrupt-affinity",
  269. i);
  270. if (!dn) {
  271. pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",
  272. of_node_full_name(pdev->dev.of_node), i);
  273. break;
  274. }
  275. for_each_possible_cpu(cpu)
  276. if (arch_find_n_match_cpu_physical_id(dn, cpu, NULL))
  277. break;
  278. of_node_put(dn);
  279. if (cpu >= nr_cpu_ids) {
  280. pr_warn("Failed to find logical CPU for %s\n",
  281. dn->name);
  282. break;
  283. }
  284. irqs[i] = cpu;
  285. }
  286. if (i == pdev->num_resources)
  287. cpu_pmu->irq_affinity = irqs;
  288. else
  289. kfree(irqs);
  290. return 0;
  291. }
  292. static int cpu_pmu_device_probe(struct platform_device *pdev)
  293. {
  294. const struct of_device_id *of_id;
  295. const int (*init_fn)(struct arm_pmu *);
  296. struct device_node *node = pdev->dev.of_node;
  297. struct arm_pmu *pmu;
  298. int ret = -ENODEV;
  299. if (cpu_pmu) {
  300. pr_info("attempt to register multiple PMU devices!\n");
  301. return -ENOSPC;
  302. }
  303. pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL);
  304. if (!pmu) {
  305. pr_info("failed to allocate PMU device!\n");
  306. return -ENOMEM;
  307. }
  308. cpu_pmu = pmu;
  309. cpu_pmu->plat_device = pdev;
  310. if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) {
  311. init_fn = of_id->data;
  312. ret = of_pmu_irq_cfg(pdev);
  313. if (!ret)
  314. ret = init_fn(pmu);
  315. } else {
  316. ret = probe_current_pmu(pmu);
  317. }
  318. if (ret) {
  319. pr_info("failed to probe PMU!\n");
  320. goto out_free;
  321. }
  322. ret = cpu_pmu_init(cpu_pmu);
  323. if (ret)
  324. goto out_free;
  325. ret = armpmu_register(cpu_pmu, -1);
  326. if (ret)
  327. goto out_destroy;
  328. return 0;
  329. out_destroy:
  330. cpu_pmu_destroy(cpu_pmu);
  331. out_free:
  332. pr_info("failed to register PMU devices!\n");
  333. kfree(pmu);
  334. return ret;
  335. }
  336. static struct platform_driver cpu_pmu_driver = {
  337. .driver = {
  338. .name = "arm-pmu",
  339. .pm = &armpmu_dev_pm_ops,
  340. .of_match_table = cpu_pmu_of_device_ids,
  341. },
  342. .probe = cpu_pmu_device_probe,
  343. .id_table = cpu_pmu_plat_device_ids,
  344. };
  345. static int __init register_pmu_driver(void)
  346. {
  347. return platform_driver_register(&cpu_pmu_driver);
  348. }
  349. device_initcall(register_pmu_driver);