intel_panel.c 36 KB

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  1. /*
  2. * Copyright © 2006-2010 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. * Chris Wilson <chris@chris-wilson.co.uk>
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/moduleparam.h>
  32. #include "intel_drv.h"
  33. #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
  34. void
  35. intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
  36. struct drm_display_mode *adjusted_mode)
  37. {
  38. drm_mode_copy(adjusted_mode, fixed_mode);
  39. drm_mode_set_crtcinfo(adjusted_mode, 0);
  40. }
  41. /* adjusted_mode has been preset to be the panel's fixed mode */
  42. void
  43. intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
  44. struct intel_crtc_config *pipe_config,
  45. int fitting_mode)
  46. {
  47. struct drm_display_mode *adjusted_mode;
  48. int x, y, width, height;
  49. adjusted_mode = &pipe_config->adjusted_mode;
  50. x = y = width = height = 0;
  51. /* Native modes don't need fitting */
  52. if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
  53. adjusted_mode->vdisplay == pipe_config->pipe_src_h)
  54. goto done;
  55. switch (fitting_mode) {
  56. case DRM_MODE_SCALE_CENTER:
  57. width = pipe_config->pipe_src_w;
  58. height = pipe_config->pipe_src_h;
  59. x = (adjusted_mode->hdisplay - width + 1)/2;
  60. y = (adjusted_mode->vdisplay - height + 1)/2;
  61. break;
  62. case DRM_MODE_SCALE_ASPECT:
  63. /* Scale but preserve the aspect ratio */
  64. {
  65. u32 scaled_width = adjusted_mode->hdisplay
  66. * pipe_config->pipe_src_h;
  67. u32 scaled_height = pipe_config->pipe_src_w
  68. * adjusted_mode->vdisplay;
  69. if (scaled_width > scaled_height) { /* pillar */
  70. width = scaled_height / pipe_config->pipe_src_h;
  71. if (width & 1)
  72. width++;
  73. x = (adjusted_mode->hdisplay - width + 1) / 2;
  74. y = 0;
  75. height = adjusted_mode->vdisplay;
  76. } else if (scaled_width < scaled_height) { /* letter */
  77. height = scaled_width / pipe_config->pipe_src_w;
  78. if (height & 1)
  79. height++;
  80. y = (adjusted_mode->vdisplay - height + 1) / 2;
  81. x = 0;
  82. width = adjusted_mode->hdisplay;
  83. } else {
  84. x = y = 0;
  85. width = adjusted_mode->hdisplay;
  86. height = adjusted_mode->vdisplay;
  87. }
  88. }
  89. break;
  90. case DRM_MODE_SCALE_FULLSCREEN:
  91. x = y = 0;
  92. width = adjusted_mode->hdisplay;
  93. height = adjusted_mode->vdisplay;
  94. break;
  95. default:
  96. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  97. return;
  98. }
  99. done:
  100. pipe_config->pch_pfit.pos = (x << 16) | y;
  101. pipe_config->pch_pfit.size = (width << 16) | height;
  102. pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
  103. }
  104. static void
  105. centre_horizontally(struct drm_display_mode *mode,
  106. int width)
  107. {
  108. u32 border, sync_pos, blank_width, sync_width;
  109. /* keep the hsync and hblank widths constant */
  110. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  111. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  112. sync_pos = (blank_width - sync_width + 1) / 2;
  113. border = (mode->hdisplay - width + 1) / 2;
  114. border += border & 1; /* make the border even */
  115. mode->crtc_hdisplay = width;
  116. mode->crtc_hblank_start = width + border;
  117. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  118. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  119. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  120. }
  121. static void
  122. centre_vertically(struct drm_display_mode *mode,
  123. int height)
  124. {
  125. u32 border, sync_pos, blank_width, sync_width;
  126. /* keep the vsync and vblank widths constant */
  127. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  128. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  129. sync_pos = (blank_width - sync_width + 1) / 2;
  130. border = (mode->vdisplay - height + 1) / 2;
  131. mode->crtc_vdisplay = height;
  132. mode->crtc_vblank_start = height + border;
  133. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  134. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  135. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  136. }
  137. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  138. {
  139. /*
  140. * Floating point operation is not supported. So the FACTOR
  141. * is defined, which can avoid the floating point computation
  142. * when calculating the panel ratio.
  143. */
  144. #define ACCURACY 12
  145. #define FACTOR (1 << ACCURACY)
  146. u32 ratio = source * FACTOR / target;
  147. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  148. }
  149. static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
  150. u32 *pfit_control)
  151. {
  152. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  153. u32 scaled_width = adjusted_mode->hdisplay *
  154. pipe_config->pipe_src_h;
  155. u32 scaled_height = pipe_config->pipe_src_w *
  156. adjusted_mode->vdisplay;
  157. /* 965+ is easy, it does everything in hw */
  158. if (scaled_width > scaled_height)
  159. *pfit_control |= PFIT_ENABLE |
  160. PFIT_SCALING_PILLAR;
  161. else if (scaled_width < scaled_height)
  162. *pfit_control |= PFIT_ENABLE |
  163. PFIT_SCALING_LETTER;
  164. else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
  165. *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  166. }
  167. static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
  168. u32 *pfit_control, u32 *pfit_pgm_ratios,
  169. u32 *border)
  170. {
  171. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  172. u32 scaled_width = adjusted_mode->hdisplay *
  173. pipe_config->pipe_src_h;
  174. u32 scaled_height = pipe_config->pipe_src_w *
  175. adjusted_mode->vdisplay;
  176. u32 bits;
  177. /*
  178. * For earlier chips we have to calculate the scaling
  179. * ratio by hand and program it into the
  180. * PFIT_PGM_RATIO register
  181. */
  182. if (scaled_width > scaled_height) { /* pillar */
  183. centre_horizontally(adjusted_mode,
  184. scaled_height /
  185. pipe_config->pipe_src_h);
  186. *border = LVDS_BORDER_ENABLE;
  187. if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
  188. bits = panel_fitter_scaling(pipe_config->pipe_src_h,
  189. adjusted_mode->vdisplay);
  190. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  191. bits << PFIT_VERT_SCALE_SHIFT);
  192. *pfit_control |= (PFIT_ENABLE |
  193. VERT_INTERP_BILINEAR |
  194. HORIZ_INTERP_BILINEAR);
  195. }
  196. } else if (scaled_width < scaled_height) { /* letter */
  197. centre_vertically(adjusted_mode,
  198. scaled_width /
  199. pipe_config->pipe_src_w);
  200. *border = LVDS_BORDER_ENABLE;
  201. if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
  202. bits = panel_fitter_scaling(pipe_config->pipe_src_w,
  203. adjusted_mode->hdisplay);
  204. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  205. bits << PFIT_VERT_SCALE_SHIFT);
  206. *pfit_control |= (PFIT_ENABLE |
  207. VERT_INTERP_BILINEAR |
  208. HORIZ_INTERP_BILINEAR);
  209. }
  210. } else {
  211. /* Aspects match, Let hw scale both directions */
  212. *pfit_control |= (PFIT_ENABLE |
  213. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  214. VERT_INTERP_BILINEAR |
  215. HORIZ_INTERP_BILINEAR);
  216. }
  217. }
  218. void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
  219. struct intel_crtc_config *pipe_config,
  220. int fitting_mode)
  221. {
  222. struct drm_device *dev = intel_crtc->base.dev;
  223. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  224. struct drm_display_mode *adjusted_mode;
  225. adjusted_mode = &pipe_config->adjusted_mode;
  226. /* Native modes don't need fitting */
  227. if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
  228. adjusted_mode->vdisplay == pipe_config->pipe_src_h)
  229. goto out;
  230. switch (fitting_mode) {
  231. case DRM_MODE_SCALE_CENTER:
  232. /*
  233. * For centered modes, we have to calculate border widths &
  234. * heights and modify the values programmed into the CRTC.
  235. */
  236. centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
  237. centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
  238. border = LVDS_BORDER_ENABLE;
  239. break;
  240. case DRM_MODE_SCALE_ASPECT:
  241. /* Scale but preserve the aspect ratio */
  242. if (INTEL_INFO(dev)->gen >= 4)
  243. i965_scale_aspect(pipe_config, &pfit_control);
  244. else
  245. i9xx_scale_aspect(pipe_config, &pfit_control,
  246. &pfit_pgm_ratios, &border);
  247. break;
  248. case DRM_MODE_SCALE_FULLSCREEN:
  249. /*
  250. * Full scaling, even if it changes the aspect ratio.
  251. * Fortunately this is all done for us in hw.
  252. */
  253. if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
  254. pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
  255. pfit_control |= PFIT_ENABLE;
  256. if (INTEL_INFO(dev)->gen >= 4)
  257. pfit_control |= PFIT_SCALING_AUTO;
  258. else
  259. pfit_control |= (VERT_AUTO_SCALE |
  260. VERT_INTERP_BILINEAR |
  261. HORIZ_AUTO_SCALE |
  262. HORIZ_INTERP_BILINEAR);
  263. }
  264. break;
  265. default:
  266. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  267. return;
  268. }
  269. /* 965+ wants fuzzy fitting */
  270. /* FIXME: handle multiple panels by failing gracefully */
  271. if (INTEL_INFO(dev)->gen >= 4)
  272. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  273. PFIT_FILTER_FUZZY);
  274. out:
  275. if ((pfit_control & PFIT_ENABLE) == 0) {
  276. pfit_control = 0;
  277. pfit_pgm_ratios = 0;
  278. }
  279. /* Make sure pre-965 set dither correctly for 18bpp panels. */
  280. if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
  281. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  282. pipe_config->gmch_pfit.control = pfit_control;
  283. pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
  284. pipe_config->gmch_pfit.lvds_border_bits = border;
  285. }
  286. static int i915_panel_invert_brightness;
  287. MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
  288. "(-1 force normal, 0 machine defaults, 1 force inversion), please "
  289. "report PCI device ID, subsystem vendor and subsystem device ID "
  290. "to dri-devel@lists.freedesktop.org, if your machine needs it. "
  291. "It will then be included in an upcoming module version.");
  292. module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
  293. static u32 intel_panel_compute_brightness(struct intel_connector *connector,
  294. u32 val)
  295. {
  296. struct drm_device *dev = connector->base.dev;
  297. struct drm_i915_private *dev_priv = dev->dev_private;
  298. struct intel_panel *panel = &connector->panel;
  299. WARN_ON(panel->backlight.max == 0);
  300. if (i915_panel_invert_brightness < 0)
  301. return val;
  302. if (i915_panel_invert_brightness > 0 ||
  303. dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
  304. return panel->backlight.max - val;
  305. }
  306. return val;
  307. }
  308. static u32 bdw_get_backlight(struct intel_connector *connector)
  309. {
  310. struct drm_device *dev = connector->base.dev;
  311. struct drm_i915_private *dev_priv = dev->dev_private;
  312. return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
  313. }
  314. static u32 pch_get_backlight(struct intel_connector *connector)
  315. {
  316. struct drm_device *dev = connector->base.dev;
  317. struct drm_i915_private *dev_priv = dev->dev_private;
  318. return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  319. }
  320. static u32 i9xx_get_backlight(struct intel_connector *connector)
  321. {
  322. struct drm_device *dev = connector->base.dev;
  323. struct drm_i915_private *dev_priv = dev->dev_private;
  324. struct intel_panel *panel = &connector->panel;
  325. u32 val;
  326. val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  327. if (INTEL_INFO(dev)->gen < 4)
  328. val >>= 1;
  329. if (panel->backlight.combination_mode) {
  330. u8 lbpc;
  331. pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
  332. val *= lbpc;
  333. }
  334. return val;
  335. }
  336. static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
  337. {
  338. struct drm_i915_private *dev_priv = dev->dev_private;
  339. return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
  340. }
  341. static u32 vlv_get_backlight(struct intel_connector *connector)
  342. {
  343. struct drm_device *dev = connector->base.dev;
  344. enum pipe pipe = intel_get_pipe_from_connector(connector);
  345. return _vlv_get_backlight(dev, pipe);
  346. }
  347. static u32 intel_panel_get_backlight(struct intel_connector *connector)
  348. {
  349. struct drm_device *dev = connector->base.dev;
  350. struct drm_i915_private *dev_priv = dev->dev_private;
  351. u32 val;
  352. unsigned long flags;
  353. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  354. val = dev_priv->display.get_backlight(connector);
  355. val = intel_panel_compute_brightness(connector, val);
  356. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  357. DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
  358. return val;
  359. }
  360. static void bdw_set_backlight(struct intel_connector *connector, u32 level)
  361. {
  362. struct drm_device *dev = connector->base.dev;
  363. struct drm_i915_private *dev_priv = dev->dev_private;
  364. u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  365. I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
  366. }
  367. static void pch_set_backlight(struct intel_connector *connector, u32 level)
  368. {
  369. struct drm_device *dev = connector->base.dev;
  370. struct drm_i915_private *dev_priv = dev->dev_private;
  371. u32 tmp;
  372. tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  373. I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
  374. }
  375. static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
  376. {
  377. struct drm_device *dev = connector->base.dev;
  378. struct drm_i915_private *dev_priv = dev->dev_private;
  379. struct intel_panel *panel = &connector->panel;
  380. u32 tmp, mask;
  381. WARN_ON(panel->backlight.max == 0);
  382. if (panel->backlight.combination_mode) {
  383. u8 lbpc;
  384. lbpc = level * 0xfe / panel->backlight.max + 1;
  385. level /= lbpc;
  386. pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
  387. }
  388. if (IS_GEN4(dev)) {
  389. mask = BACKLIGHT_DUTY_CYCLE_MASK;
  390. } else {
  391. level <<= 1;
  392. mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
  393. }
  394. tmp = I915_READ(BLC_PWM_CTL) & ~mask;
  395. I915_WRITE(BLC_PWM_CTL, tmp | level);
  396. }
  397. static void vlv_set_backlight(struct intel_connector *connector, u32 level)
  398. {
  399. struct drm_device *dev = connector->base.dev;
  400. struct drm_i915_private *dev_priv = dev->dev_private;
  401. enum pipe pipe = intel_get_pipe_from_connector(connector);
  402. u32 tmp;
  403. tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  404. I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
  405. }
  406. static void
  407. intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
  408. {
  409. struct drm_device *dev = connector->base.dev;
  410. struct drm_i915_private *dev_priv = dev->dev_private;
  411. DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
  412. level = intel_panel_compute_brightness(connector, level);
  413. dev_priv->display.set_backlight(connector, level);
  414. }
  415. /* set backlight brightness to level in range [0..max] */
  416. void intel_panel_set_backlight(struct intel_connector *connector, u32 level,
  417. u32 max)
  418. {
  419. struct drm_device *dev = connector->base.dev;
  420. struct drm_i915_private *dev_priv = dev->dev_private;
  421. struct intel_panel *panel = &connector->panel;
  422. enum pipe pipe = intel_get_pipe_from_connector(connector);
  423. u32 freq;
  424. unsigned long flags;
  425. if (!panel->backlight.present || pipe == INVALID_PIPE)
  426. return;
  427. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  428. WARN_ON(panel->backlight.max == 0);
  429. /* scale to hardware max, but be careful to not overflow */
  430. freq = panel->backlight.max;
  431. if (freq < max)
  432. level = level * freq / max;
  433. else
  434. level = freq / max * level;
  435. panel->backlight.level = level;
  436. if (panel->backlight.device)
  437. panel->backlight.device->props.brightness = level;
  438. if (panel->backlight.enabled)
  439. intel_panel_actually_set_backlight(connector, level);
  440. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  441. }
  442. static void pch_disable_backlight(struct intel_connector *connector)
  443. {
  444. struct drm_device *dev = connector->base.dev;
  445. struct drm_i915_private *dev_priv = dev->dev_private;
  446. u32 tmp;
  447. intel_panel_actually_set_backlight(connector, 0);
  448. tmp = I915_READ(BLC_PWM_CPU_CTL2);
  449. I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  450. tmp = I915_READ(BLC_PWM_PCH_CTL1);
  451. I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  452. }
  453. static void i9xx_disable_backlight(struct intel_connector *connector)
  454. {
  455. intel_panel_actually_set_backlight(connector, 0);
  456. }
  457. static void i965_disable_backlight(struct intel_connector *connector)
  458. {
  459. struct drm_device *dev = connector->base.dev;
  460. struct drm_i915_private *dev_priv = dev->dev_private;
  461. u32 tmp;
  462. intel_panel_actually_set_backlight(connector, 0);
  463. tmp = I915_READ(BLC_PWM_CTL2);
  464. I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
  465. }
  466. static void vlv_disable_backlight(struct intel_connector *connector)
  467. {
  468. struct drm_device *dev = connector->base.dev;
  469. struct drm_i915_private *dev_priv = dev->dev_private;
  470. enum pipe pipe = intel_get_pipe_from_connector(connector);
  471. u32 tmp;
  472. intel_panel_actually_set_backlight(connector, 0);
  473. tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  474. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
  475. }
  476. void intel_panel_disable_backlight(struct intel_connector *connector)
  477. {
  478. struct drm_device *dev = connector->base.dev;
  479. struct drm_i915_private *dev_priv = dev->dev_private;
  480. struct intel_panel *panel = &connector->panel;
  481. enum pipe pipe = intel_get_pipe_from_connector(connector);
  482. unsigned long flags;
  483. if (!panel->backlight.present || pipe == INVALID_PIPE)
  484. return;
  485. /*
  486. * Do not disable backlight on the vgaswitcheroo path. When switching
  487. * away from i915, the other client may depend on i915 to handle the
  488. * backlight. This will leave the backlight on unnecessarily when
  489. * another client is not activated.
  490. */
  491. if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
  492. DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
  493. return;
  494. }
  495. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  496. panel->backlight.enabled = false;
  497. dev_priv->display.disable_backlight(connector);
  498. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  499. }
  500. static void bdw_enable_backlight(struct intel_connector *connector)
  501. {
  502. struct drm_device *dev = connector->base.dev;
  503. struct drm_i915_private *dev_priv = dev->dev_private;
  504. struct intel_panel *panel = &connector->panel;
  505. u32 pch_ctl1, pch_ctl2;
  506. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  507. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  508. DRM_DEBUG_KMS("pch backlight already enabled\n");
  509. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  510. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  511. }
  512. pch_ctl2 = panel->backlight.max << 16;
  513. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  514. pch_ctl1 = 0;
  515. if (panel->backlight.active_low_pwm)
  516. pch_ctl1 |= BLM_PCH_POLARITY;
  517. /* BDW always uses the pch pwm controls. */
  518. pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
  519. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  520. POSTING_READ(BLC_PWM_PCH_CTL1);
  521. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  522. /* This won't stick until the above enable. */
  523. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  524. }
  525. static void pch_enable_backlight(struct intel_connector *connector)
  526. {
  527. struct drm_device *dev = connector->base.dev;
  528. struct drm_i915_private *dev_priv = dev->dev_private;
  529. struct intel_panel *panel = &connector->panel;
  530. enum pipe pipe = intel_get_pipe_from_connector(connector);
  531. enum transcoder cpu_transcoder =
  532. intel_pipe_to_cpu_transcoder(dev_priv, pipe);
  533. u32 cpu_ctl2, pch_ctl1, pch_ctl2;
  534. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  535. if (cpu_ctl2 & BLM_PWM_ENABLE) {
  536. WARN(1, "cpu backlight already enabled\n");
  537. cpu_ctl2 &= ~BLM_PWM_ENABLE;
  538. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  539. }
  540. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  541. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  542. DRM_DEBUG_KMS("pch backlight already enabled\n");
  543. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  544. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  545. }
  546. if (cpu_transcoder == TRANSCODER_EDP)
  547. cpu_ctl2 = BLM_TRANSCODER_EDP;
  548. else
  549. cpu_ctl2 = BLM_PIPE(cpu_transcoder);
  550. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  551. POSTING_READ(BLC_PWM_CPU_CTL2);
  552. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
  553. /* This won't stick until the above enable. */
  554. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  555. pch_ctl2 = panel->backlight.max << 16;
  556. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  557. pch_ctl1 = 0;
  558. if (panel->backlight.active_low_pwm)
  559. pch_ctl1 |= BLM_PCH_POLARITY;
  560. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  561. POSTING_READ(BLC_PWM_PCH_CTL1);
  562. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  563. }
  564. static void i9xx_enable_backlight(struct intel_connector *connector)
  565. {
  566. struct drm_device *dev = connector->base.dev;
  567. struct drm_i915_private *dev_priv = dev->dev_private;
  568. struct intel_panel *panel = &connector->panel;
  569. u32 ctl, freq;
  570. ctl = I915_READ(BLC_PWM_CTL);
  571. if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
  572. WARN(1, "backlight already enabled\n");
  573. I915_WRITE(BLC_PWM_CTL, 0);
  574. }
  575. freq = panel->backlight.max;
  576. if (panel->backlight.combination_mode)
  577. freq /= 0xff;
  578. ctl = freq << 17;
  579. if (panel->backlight.combination_mode)
  580. ctl |= BLM_LEGACY_MODE;
  581. if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
  582. ctl |= BLM_POLARITY_PNV;
  583. I915_WRITE(BLC_PWM_CTL, ctl);
  584. POSTING_READ(BLC_PWM_CTL);
  585. /* XXX: combine this into above write? */
  586. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  587. }
  588. static void i965_enable_backlight(struct intel_connector *connector)
  589. {
  590. struct drm_device *dev = connector->base.dev;
  591. struct drm_i915_private *dev_priv = dev->dev_private;
  592. struct intel_panel *panel = &connector->panel;
  593. enum pipe pipe = intel_get_pipe_from_connector(connector);
  594. u32 ctl, ctl2, freq;
  595. ctl2 = I915_READ(BLC_PWM_CTL2);
  596. if (ctl2 & BLM_PWM_ENABLE) {
  597. WARN(1, "backlight already enabled\n");
  598. ctl2 &= ~BLM_PWM_ENABLE;
  599. I915_WRITE(BLC_PWM_CTL2, ctl2);
  600. }
  601. freq = panel->backlight.max;
  602. if (panel->backlight.combination_mode)
  603. freq /= 0xff;
  604. ctl = freq << 16;
  605. I915_WRITE(BLC_PWM_CTL, ctl);
  606. /* XXX: combine this into above write? */
  607. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  608. ctl2 = BLM_PIPE(pipe);
  609. if (panel->backlight.combination_mode)
  610. ctl2 |= BLM_COMBINATION_MODE;
  611. if (panel->backlight.active_low_pwm)
  612. ctl2 |= BLM_POLARITY_I965;
  613. I915_WRITE(BLC_PWM_CTL2, ctl2);
  614. POSTING_READ(BLC_PWM_CTL2);
  615. I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
  616. }
  617. static void vlv_enable_backlight(struct intel_connector *connector)
  618. {
  619. struct drm_device *dev = connector->base.dev;
  620. struct drm_i915_private *dev_priv = dev->dev_private;
  621. struct intel_panel *panel = &connector->panel;
  622. enum pipe pipe = intel_get_pipe_from_connector(connector);
  623. u32 ctl, ctl2;
  624. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  625. if (ctl2 & BLM_PWM_ENABLE) {
  626. WARN(1, "backlight already enabled\n");
  627. ctl2 &= ~BLM_PWM_ENABLE;
  628. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  629. }
  630. ctl = panel->backlight.max << 16;
  631. I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
  632. /* XXX: combine this into above write? */
  633. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  634. ctl2 = 0;
  635. if (panel->backlight.active_low_pwm)
  636. ctl2 |= BLM_POLARITY_I965;
  637. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  638. POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
  639. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
  640. }
  641. void intel_panel_enable_backlight(struct intel_connector *connector)
  642. {
  643. struct drm_device *dev = connector->base.dev;
  644. struct drm_i915_private *dev_priv = dev->dev_private;
  645. struct intel_panel *panel = &connector->panel;
  646. enum pipe pipe = intel_get_pipe_from_connector(connector);
  647. unsigned long flags;
  648. if (!panel->backlight.present || pipe == INVALID_PIPE)
  649. return;
  650. DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
  651. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  652. WARN_ON(panel->backlight.max == 0);
  653. if (panel->backlight.level == 0) {
  654. panel->backlight.level = panel->backlight.max;
  655. if (panel->backlight.device)
  656. panel->backlight.device->props.brightness =
  657. panel->backlight.level;
  658. }
  659. dev_priv->display.enable_backlight(connector);
  660. panel->backlight.enabled = true;
  661. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  662. }
  663. enum drm_connector_status
  664. intel_panel_detect(struct drm_device *dev)
  665. {
  666. struct drm_i915_private *dev_priv = dev->dev_private;
  667. /* Assume that the BIOS does not lie through the OpRegion... */
  668. if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
  669. return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
  670. connector_status_connected :
  671. connector_status_disconnected;
  672. }
  673. switch (i915_panel_ignore_lid) {
  674. case -2:
  675. return connector_status_connected;
  676. case -1:
  677. return connector_status_disconnected;
  678. default:
  679. return connector_status_unknown;
  680. }
  681. }
  682. #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
  683. static int intel_backlight_device_update_status(struct backlight_device *bd)
  684. {
  685. struct intel_connector *connector = bl_get_data(bd);
  686. struct drm_device *dev = connector->base.dev;
  687. mutex_lock(&dev->mode_config.mutex);
  688. DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
  689. bd->props.brightness, bd->props.max_brightness);
  690. intel_panel_set_backlight(connector, bd->props.brightness,
  691. bd->props.max_brightness);
  692. mutex_unlock(&dev->mode_config.mutex);
  693. return 0;
  694. }
  695. static int intel_backlight_device_get_brightness(struct backlight_device *bd)
  696. {
  697. struct intel_connector *connector = bl_get_data(bd);
  698. struct drm_device *dev = connector->base.dev;
  699. struct drm_i915_private *dev_priv = dev->dev_private;
  700. int ret;
  701. intel_runtime_pm_get(dev_priv);
  702. mutex_lock(&dev->mode_config.mutex);
  703. ret = intel_panel_get_backlight(connector);
  704. mutex_unlock(&dev->mode_config.mutex);
  705. intel_runtime_pm_put(dev_priv);
  706. return ret;
  707. }
  708. static const struct backlight_ops intel_backlight_device_ops = {
  709. .update_status = intel_backlight_device_update_status,
  710. .get_brightness = intel_backlight_device_get_brightness,
  711. };
  712. static int intel_backlight_device_register(struct intel_connector *connector)
  713. {
  714. struct intel_panel *panel = &connector->panel;
  715. struct backlight_properties props;
  716. if (WARN_ON(panel->backlight.device))
  717. return -ENODEV;
  718. BUG_ON(panel->backlight.max == 0);
  719. memset(&props, 0, sizeof(props));
  720. props.type = BACKLIGHT_RAW;
  721. props.brightness = panel->backlight.level;
  722. props.max_brightness = panel->backlight.max;
  723. /*
  724. * Note: using the same name independent of the connector prevents
  725. * registration of multiple backlight devices in the driver.
  726. */
  727. panel->backlight.device =
  728. backlight_device_register("intel_backlight",
  729. connector->base.kdev,
  730. connector,
  731. &intel_backlight_device_ops, &props);
  732. if (IS_ERR(panel->backlight.device)) {
  733. DRM_ERROR("Failed to register backlight: %ld\n",
  734. PTR_ERR(panel->backlight.device));
  735. panel->backlight.device = NULL;
  736. return -ENODEV;
  737. }
  738. return 0;
  739. }
  740. static void intel_backlight_device_unregister(struct intel_connector *connector)
  741. {
  742. struct intel_panel *panel = &connector->panel;
  743. if (panel->backlight.device) {
  744. backlight_device_unregister(panel->backlight.device);
  745. panel->backlight.device = NULL;
  746. }
  747. }
  748. #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  749. static int intel_backlight_device_register(struct intel_connector *connector)
  750. {
  751. return 0;
  752. }
  753. static void intel_backlight_device_unregister(struct intel_connector *connector)
  754. {
  755. }
  756. #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  757. /*
  758. * Note: The setup hooks can't assume pipe is set!
  759. *
  760. * XXX: Query mode clock or hardware clock and program PWM modulation frequency
  761. * appropriately when it's 0. Use VBT and/or sane defaults.
  762. */
  763. static int bdw_setup_backlight(struct intel_connector *connector)
  764. {
  765. struct drm_device *dev = connector->base.dev;
  766. struct drm_i915_private *dev_priv = dev->dev_private;
  767. struct intel_panel *panel = &connector->panel;
  768. u32 pch_ctl1, pch_ctl2, val;
  769. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  770. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  771. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  772. panel->backlight.max = pch_ctl2 >> 16;
  773. if (!panel->backlight.max)
  774. return -ENODEV;
  775. val = bdw_get_backlight(connector);
  776. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  777. panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
  778. panel->backlight.level != 0;
  779. return 0;
  780. }
  781. static int pch_setup_backlight(struct intel_connector *connector)
  782. {
  783. struct drm_device *dev = connector->base.dev;
  784. struct drm_i915_private *dev_priv = dev->dev_private;
  785. struct intel_panel *panel = &connector->panel;
  786. u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
  787. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  788. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  789. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  790. panel->backlight.max = pch_ctl2 >> 16;
  791. if (!panel->backlight.max)
  792. return -ENODEV;
  793. val = pch_get_backlight(connector);
  794. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  795. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  796. panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
  797. (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
  798. return 0;
  799. }
  800. static int i9xx_setup_backlight(struct intel_connector *connector)
  801. {
  802. struct drm_device *dev = connector->base.dev;
  803. struct drm_i915_private *dev_priv = dev->dev_private;
  804. struct intel_panel *panel = &connector->panel;
  805. u32 ctl, val;
  806. ctl = I915_READ(BLC_PWM_CTL);
  807. if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
  808. panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
  809. if (IS_PINEVIEW(dev))
  810. panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
  811. panel->backlight.max = ctl >> 17;
  812. if (panel->backlight.combination_mode)
  813. panel->backlight.max *= 0xff;
  814. if (!panel->backlight.max)
  815. return -ENODEV;
  816. val = i9xx_get_backlight(connector);
  817. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  818. panel->backlight.enabled = panel->backlight.level != 0;
  819. return 0;
  820. }
  821. static int i965_setup_backlight(struct intel_connector *connector)
  822. {
  823. struct drm_device *dev = connector->base.dev;
  824. struct drm_i915_private *dev_priv = dev->dev_private;
  825. struct intel_panel *panel = &connector->panel;
  826. u32 ctl, ctl2, val;
  827. ctl2 = I915_READ(BLC_PWM_CTL2);
  828. panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
  829. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  830. ctl = I915_READ(BLC_PWM_CTL);
  831. panel->backlight.max = ctl >> 16;
  832. if (panel->backlight.combination_mode)
  833. panel->backlight.max *= 0xff;
  834. if (!panel->backlight.max)
  835. return -ENODEV;
  836. val = i9xx_get_backlight(connector);
  837. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  838. panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
  839. panel->backlight.level != 0;
  840. return 0;
  841. }
  842. static int vlv_setup_backlight(struct intel_connector *connector)
  843. {
  844. struct drm_device *dev = connector->base.dev;
  845. struct drm_i915_private *dev_priv = dev->dev_private;
  846. struct intel_panel *panel = &connector->panel;
  847. enum pipe pipe;
  848. u32 ctl, ctl2, val;
  849. for_each_pipe(pipe) {
  850. u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe));
  851. /* Skip if the modulation freq is already set */
  852. if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK)
  853. continue;
  854. cur_val &= BACKLIGHT_DUTY_CYCLE_MASK;
  855. I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 << 16) |
  856. cur_val);
  857. }
  858. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(PIPE_A));
  859. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  860. ctl = I915_READ(VLV_BLC_PWM_CTL(PIPE_A));
  861. panel->backlight.max = ctl >> 16;
  862. if (!panel->backlight.max)
  863. return -ENODEV;
  864. val = _vlv_get_backlight(dev, PIPE_A);
  865. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  866. panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
  867. panel->backlight.level != 0;
  868. return 0;
  869. }
  870. int intel_panel_setup_backlight(struct drm_connector *connector)
  871. {
  872. struct drm_device *dev = connector->dev;
  873. struct drm_i915_private *dev_priv = dev->dev_private;
  874. struct intel_connector *intel_connector = to_intel_connector(connector);
  875. struct intel_panel *panel = &intel_connector->panel;
  876. unsigned long flags;
  877. int ret;
  878. /* set level and max in panel struct */
  879. spin_lock_irqsave(&dev_priv->backlight_lock, flags);
  880. ret = dev_priv->display.setup_backlight(intel_connector);
  881. spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
  882. if (ret) {
  883. DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
  884. drm_get_connector_name(connector));
  885. return ret;
  886. }
  887. intel_backlight_device_register(intel_connector);
  888. panel->backlight.present = true;
  889. DRM_DEBUG_KMS("backlight initialized, %s, brightness %u/%u, "
  890. "sysfs interface %sregistered\n",
  891. panel->backlight.enabled ? "enabled" : "disabled",
  892. panel->backlight.level, panel->backlight.max,
  893. panel->backlight.device ? "" : "not ");
  894. return 0;
  895. }
  896. void intel_panel_destroy_backlight(struct drm_connector *connector)
  897. {
  898. struct intel_connector *intel_connector = to_intel_connector(connector);
  899. struct intel_panel *panel = &intel_connector->panel;
  900. panel->backlight.present = false;
  901. intel_backlight_device_unregister(intel_connector);
  902. }
  903. /**
  904. * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
  905. * @dev: drm device
  906. * @fixed_mode : panel native mode
  907. * @connector: LVDS/eDP connector
  908. *
  909. * Return downclock_avail
  910. * Find the reduced downclock for LVDS/eDP in EDID.
  911. */
  912. struct drm_display_mode *
  913. intel_find_panel_downclock(struct drm_device *dev,
  914. struct drm_display_mode *fixed_mode,
  915. struct drm_connector *connector)
  916. {
  917. struct drm_display_mode *scan, *tmp_mode;
  918. int temp_downclock;
  919. temp_downclock = fixed_mode->clock;
  920. tmp_mode = NULL;
  921. list_for_each_entry(scan, &connector->probed_modes, head) {
  922. /*
  923. * If one mode has the same resolution with the fixed_panel
  924. * mode while they have the different refresh rate, it means
  925. * that the reduced downclock is found. In such
  926. * case we can set the different FPx0/1 to dynamically select
  927. * between low and high frequency.
  928. */
  929. if (scan->hdisplay == fixed_mode->hdisplay &&
  930. scan->hsync_start == fixed_mode->hsync_start &&
  931. scan->hsync_end == fixed_mode->hsync_end &&
  932. scan->htotal == fixed_mode->htotal &&
  933. scan->vdisplay == fixed_mode->vdisplay &&
  934. scan->vsync_start == fixed_mode->vsync_start &&
  935. scan->vsync_end == fixed_mode->vsync_end &&
  936. scan->vtotal == fixed_mode->vtotal) {
  937. if (scan->clock < temp_downclock) {
  938. /*
  939. * The downclock is already found. But we
  940. * expect to find the lower downclock.
  941. */
  942. temp_downclock = scan->clock;
  943. tmp_mode = scan;
  944. }
  945. }
  946. }
  947. if (temp_downclock < fixed_mode->clock)
  948. return drm_mode_duplicate(dev, tmp_mode);
  949. else
  950. return NULL;
  951. }
  952. /* Set up chip specific backlight functions */
  953. void intel_panel_init_backlight_funcs(struct drm_device *dev)
  954. {
  955. struct drm_i915_private *dev_priv = dev->dev_private;
  956. if (IS_BROADWELL(dev)) {
  957. dev_priv->display.setup_backlight = bdw_setup_backlight;
  958. dev_priv->display.enable_backlight = bdw_enable_backlight;
  959. dev_priv->display.disable_backlight = pch_disable_backlight;
  960. dev_priv->display.set_backlight = bdw_set_backlight;
  961. dev_priv->display.get_backlight = bdw_get_backlight;
  962. } else if (HAS_PCH_SPLIT(dev)) {
  963. dev_priv->display.setup_backlight = pch_setup_backlight;
  964. dev_priv->display.enable_backlight = pch_enable_backlight;
  965. dev_priv->display.disable_backlight = pch_disable_backlight;
  966. dev_priv->display.set_backlight = pch_set_backlight;
  967. dev_priv->display.get_backlight = pch_get_backlight;
  968. } else if (IS_VALLEYVIEW(dev)) {
  969. dev_priv->display.setup_backlight = vlv_setup_backlight;
  970. dev_priv->display.enable_backlight = vlv_enable_backlight;
  971. dev_priv->display.disable_backlight = vlv_disable_backlight;
  972. dev_priv->display.set_backlight = vlv_set_backlight;
  973. dev_priv->display.get_backlight = vlv_get_backlight;
  974. } else if (IS_GEN4(dev)) {
  975. dev_priv->display.setup_backlight = i965_setup_backlight;
  976. dev_priv->display.enable_backlight = i965_enable_backlight;
  977. dev_priv->display.disable_backlight = i965_disable_backlight;
  978. dev_priv->display.set_backlight = i9xx_set_backlight;
  979. dev_priv->display.get_backlight = i9xx_get_backlight;
  980. } else {
  981. dev_priv->display.setup_backlight = i9xx_setup_backlight;
  982. dev_priv->display.enable_backlight = i9xx_enable_backlight;
  983. dev_priv->display.disable_backlight = i9xx_disable_backlight;
  984. dev_priv->display.set_backlight = i9xx_set_backlight;
  985. dev_priv->display.get_backlight = i9xx_get_backlight;
  986. }
  987. }
  988. int intel_panel_init(struct intel_panel *panel,
  989. struct drm_display_mode *fixed_mode)
  990. {
  991. panel->fixed_mode = fixed_mode;
  992. return 0;
  993. }
  994. void intel_panel_fini(struct intel_panel *panel)
  995. {
  996. struct intel_connector *intel_connector =
  997. container_of(panel, struct intel_connector, panel);
  998. if (panel->fixed_mode)
  999. drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
  1000. if (panel->downclock_mode)
  1001. drm_mode_destroy(intel_connector->base.dev,
  1002. panel->downclock_mode);
  1003. }