cros_ec_lpc.c 7.8 KB

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  1. /*
  2. * cros_ec_lpc - LPC access to the Chrome OS Embedded Controller
  3. *
  4. * Copyright (C) 2012-2015 Google, Inc
  5. *
  6. * This software is licensed under the terms of the GNU General Public
  7. * License version 2, as published by the Free Software Foundation, and
  8. * may be copied, distributed, and modified under those terms.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * This driver uses the Chrome OS EC byte-level message-based protocol for
  16. * communicating the keyboard state (which keys are pressed) from a keyboard EC
  17. * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
  18. * but everything else (including deghosting) is done here. The main
  19. * motivation for this is to keep the EC firmware as simple as possible, since
  20. * it cannot be easily upgraded and EC flash/IRAM space is relatively
  21. * expensive.
  22. */
  23. #include <linux/dmi.h>
  24. #include <linux/delay.h>
  25. #include <linux/io.h>
  26. #include <linux/mfd/cros_ec.h>
  27. #include <linux/mfd/cros_ec_commands.h>
  28. #include <linux/module.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/printk.h>
  31. #define DRV_NAME "cros_ec_lpc"
  32. static int ec_response_timed_out(void)
  33. {
  34. unsigned long one_second = jiffies + HZ;
  35. usleep_range(200, 300);
  36. do {
  37. if (!(inb(EC_LPC_ADDR_HOST_CMD) & EC_LPC_STATUS_BUSY_MASK))
  38. return 0;
  39. usleep_range(100, 200);
  40. } while (time_before(jiffies, one_second));
  41. return 1;
  42. }
  43. static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
  44. struct cros_ec_command *msg)
  45. {
  46. struct ec_lpc_host_args args;
  47. int csum;
  48. int i;
  49. int ret = 0;
  50. if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
  51. msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
  52. dev_err(ec->dev,
  53. "invalid buffer sizes (out %d, in %d)\n",
  54. msg->outsize, msg->insize);
  55. return -EINVAL;
  56. }
  57. /* Now actually send the command to the EC and get the result */
  58. args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
  59. args.command_version = msg->version;
  60. args.data_size = msg->outsize;
  61. /* Initialize checksum */
  62. csum = msg->command + args.flags +
  63. args.command_version + args.data_size;
  64. /* Copy data and update checksum */
  65. for (i = 0; i < msg->outsize; i++) {
  66. outb(msg->outdata[i], EC_LPC_ADDR_HOST_PARAM + i);
  67. csum += msg->outdata[i];
  68. }
  69. /* Finalize checksum and write args */
  70. args.checksum = csum & 0xFF;
  71. outb(args.flags, EC_LPC_ADDR_HOST_ARGS);
  72. outb(args.command_version, EC_LPC_ADDR_HOST_ARGS + 1);
  73. outb(args.data_size, EC_LPC_ADDR_HOST_ARGS + 2);
  74. outb(args.checksum, EC_LPC_ADDR_HOST_ARGS + 3);
  75. /* Here we go */
  76. outb(msg->command, EC_LPC_ADDR_HOST_CMD);
  77. if (ec_response_timed_out()) {
  78. dev_warn(ec->dev, "EC responsed timed out\n");
  79. ret = -EIO;
  80. goto done;
  81. }
  82. /* Check result */
  83. msg->result = inb(EC_LPC_ADDR_HOST_DATA);
  84. switch (msg->result) {
  85. case EC_RES_SUCCESS:
  86. break;
  87. case EC_RES_IN_PROGRESS:
  88. ret = -EAGAIN;
  89. dev_dbg(ec->dev, "command 0x%02x in progress\n",
  90. msg->command);
  91. goto done;
  92. default:
  93. dev_dbg(ec->dev, "command 0x%02x returned %d\n",
  94. msg->command, msg->result);
  95. }
  96. /* Read back args */
  97. args.flags = inb(EC_LPC_ADDR_HOST_ARGS);
  98. args.command_version = inb(EC_LPC_ADDR_HOST_ARGS + 1);
  99. args.data_size = inb(EC_LPC_ADDR_HOST_ARGS + 2);
  100. args.checksum = inb(EC_LPC_ADDR_HOST_ARGS + 3);
  101. if (args.data_size > msg->insize) {
  102. dev_err(ec->dev,
  103. "packet too long (%d bytes, expected %d)",
  104. args.data_size, msg->insize);
  105. ret = -ENOSPC;
  106. goto done;
  107. }
  108. /* Start calculating response checksum */
  109. csum = msg->command + args.flags +
  110. args.command_version + args.data_size;
  111. /* Read response and update checksum */
  112. for (i = 0; i < args.data_size; i++) {
  113. msg->indata[i] = inb(EC_LPC_ADDR_HOST_PARAM + i);
  114. csum += msg->indata[i];
  115. }
  116. /* Verify checksum */
  117. if (args.checksum != (csum & 0xFF)) {
  118. dev_err(ec->dev,
  119. "bad packet checksum, expected %02x, got %02x\n",
  120. args.checksum, csum & 0xFF);
  121. ret = -EBADMSG;
  122. goto done;
  123. }
  124. /* Return actual amount of data received */
  125. ret = args.data_size;
  126. done:
  127. return ret;
  128. }
  129. /* Returns num bytes read, or negative on error. Doesn't need locking. */
  130. static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
  131. unsigned int bytes, void *dest)
  132. {
  133. int i = offset;
  134. char *s = dest;
  135. int cnt = 0;
  136. if (offset >= EC_MEMMAP_SIZE - bytes)
  137. return -EINVAL;
  138. /* fixed length */
  139. if (bytes) {
  140. for (; cnt < bytes; i++, s++, cnt++)
  141. *s = inb(EC_LPC_ADDR_MEMMAP + i);
  142. return cnt;
  143. }
  144. /* string */
  145. for (; i < EC_MEMMAP_SIZE; i++, s++) {
  146. *s = inb(EC_LPC_ADDR_MEMMAP + i);
  147. cnt++;
  148. if (!*s)
  149. break;
  150. }
  151. return cnt;
  152. }
  153. static int cros_ec_lpc_probe(struct platform_device *pdev)
  154. {
  155. struct device *dev = &pdev->dev;
  156. struct cros_ec_device *ec_dev;
  157. int ret;
  158. if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
  159. dev_name(dev))) {
  160. dev_err(dev, "couldn't reserve memmap region\n");
  161. return -EBUSY;
  162. }
  163. if ((inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID) != 'E') ||
  164. (inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID + 1) != 'C')) {
  165. dev_err(dev, "EC ID not detected\n");
  166. return -ENODEV;
  167. }
  168. if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
  169. EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
  170. dev_err(dev, "couldn't reserve region0\n");
  171. return -EBUSY;
  172. }
  173. if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
  174. EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
  175. dev_err(dev, "couldn't reserve region1\n");
  176. return -EBUSY;
  177. }
  178. ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
  179. if (!ec_dev)
  180. return -ENOMEM;
  181. platform_set_drvdata(pdev, ec_dev);
  182. ec_dev->dev = dev;
  183. ec_dev->ec_name = pdev->name;
  184. ec_dev->phys_name = dev_name(dev);
  185. ec_dev->parent = dev;
  186. ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
  187. ec_dev->cmd_readmem = cros_ec_lpc_readmem;
  188. ret = cros_ec_register(ec_dev);
  189. if (ret) {
  190. dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
  191. return ret;
  192. }
  193. return 0;
  194. }
  195. static int cros_ec_lpc_remove(struct platform_device *pdev)
  196. {
  197. struct cros_ec_device *ec_dev;
  198. ec_dev = platform_get_drvdata(pdev);
  199. cros_ec_remove(ec_dev);
  200. return 0;
  201. }
  202. static struct dmi_system_id cros_ec_lpc_dmi_table[] __initdata = {
  203. {
  204. /*
  205. * Today all Chromebooks/boxes ship with Google_* as version and
  206. * coreboot as bios vendor. No other systems with this
  207. * combination are known to date.
  208. */
  209. .matches = {
  210. DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
  211. DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
  212. },
  213. },
  214. {
  215. /* x86-link, the Chromebook Pixel. */
  216. .matches = {
  217. DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
  218. DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
  219. },
  220. },
  221. {
  222. /* x86-peppy, the Acer C720 Chromebook. */
  223. .matches = {
  224. DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
  225. DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
  226. },
  227. },
  228. { /* sentinel */ }
  229. };
  230. MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
  231. static struct platform_driver cros_ec_lpc_driver = {
  232. .driver = {
  233. .name = DRV_NAME,
  234. },
  235. .probe = cros_ec_lpc_probe,
  236. .remove = cros_ec_lpc_remove,
  237. };
  238. static struct platform_device cros_ec_lpc_device = {
  239. .name = DRV_NAME
  240. };
  241. static int __init cros_ec_lpc_init(void)
  242. {
  243. int ret;
  244. if (!dmi_check_system(cros_ec_lpc_dmi_table)) {
  245. pr_err(DRV_NAME ": unsupported system.\n");
  246. return -ENODEV;
  247. }
  248. /* Register the driver */
  249. ret = platform_driver_register(&cros_ec_lpc_driver);
  250. if (ret) {
  251. pr_err(DRV_NAME ": can't register driver: %d\n", ret);
  252. return ret;
  253. }
  254. /* Register the device, and it'll get hooked up automatically */
  255. ret = platform_device_register(&cros_ec_lpc_device);
  256. if (ret) {
  257. pr_err(DRV_NAME ": can't register device: %d\n", ret);
  258. platform_driver_unregister(&cros_ec_lpc_driver);
  259. return ret;
  260. }
  261. return 0;
  262. }
  263. static void __exit cros_ec_lpc_exit(void)
  264. {
  265. platform_device_unregister(&cros_ec_lpc_device);
  266. platform_driver_unregister(&cros_ec_lpc_driver);
  267. }
  268. module_init(cros_ec_lpc_init);
  269. module_exit(cros_ec_lpc_exit);
  270. MODULE_LICENSE("GPL");
  271. MODULE_DESCRIPTION("ChromeOS EC LPC driver");