xen.c 14 KB

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  1. /*
  2. * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
  3. * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
  4. * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
  5. * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
  6. * 0xcf8 PCI configuration read/write.
  7. *
  8. * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
  9. * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
  10. * Stefano Stabellini <stefano.stabellini@eu.citrix.com>
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/acpi.h>
  16. #include <linux/io.h>
  17. #include <asm/io_apic.h>
  18. #include <asm/pci_x86.h>
  19. #include <asm/xen/hypervisor.h>
  20. #include <xen/features.h>
  21. #include <xen/events.h>
  22. #include <asm/xen/pci.h>
  23. #include <asm/xen/cpuid.h>
  24. #include <asm/apic.h>
  25. #include <asm/i8259.h>
  26. static int xen_pcifront_enable_irq(struct pci_dev *dev)
  27. {
  28. int rc;
  29. int share = 1;
  30. int pirq;
  31. u8 gsi;
  32. rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
  33. if (rc < 0) {
  34. dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
  35. rc);
  36. return rc;
  37. }
  38. /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
  39. pirq = gsi;
  40. if (gsi < nr_legacy_irqs())
  41. share = 0;
  42. rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
  43. if (rc < 0) {
  44. dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
  45. gsi, pirq, rc);
  46. return rc;
  47. }
  48. dev->irq = rc;
  49. dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
  50. return 0;
  51. }
  52. #ifdef CONFIG_ACPI
  53. static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
  54. bool set_pirq)
  55. {
  56. int rc, pirq = -1, irq = -1;
  57. struct physdev_map_pirq map_irq;
  58. int shareable = 0;
  59. char *name;
  60. irq = xen_irq_from_gsi(gsi);
  61. if (irq > 0)
  62. return irq;
  63. if (set_pirq)
  64. pirq = gsi;
  65. map_irq.domid = DOMID_SELF;
  66. map_irq.type = MAP_PIRQ_TYPE_GSI;
  67. map_irq.index = gsi;
  68. map_irq.pirq = pirq;
  69. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  70. if (rc) {
  71. printk(KERN_WARNING "xen map irq failed %d\n", rc);
  72. return -1;
  73. }
  74. if (triggering == ACPI_EDGE_SENSITIVE) {
  75. shareable = 0;
  76. name = "ioapic-edge";
  77. } else {
  78. shareable = 1;
  79. name = "ioapic-level";
  80. }
  81. if (gsi_override >= 0)
  82. gsi = gsi_override;
  83. irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
  84. if (irq < 0)
  85. goto out;
  86. printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
  87. out:
  88. return irq;
  89. }
  90. static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
  91. int trigger, int polarity)
  92. {
  93. if (!xen_hvm_domain())
  94. return -1;
  95. return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
  96. false /* no mapping of GSI to PIRQ */);
  97. }
  98. #ifdef CONFIG_XEN_DOM0
  99. static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
  100. {
  101. int rc, irq;
  102. struct physdev_setup_gsi setup_gsi;
  103. if (!xen_pv_domain())
  104. return -1;
  105. printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
  106. gsi, triggering, polarity);
  107. irq = xen_register_pirq(gsi, gsi_override, triggering, true);
  108. setup_gsi.gsi = gsi;
  109. setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
  110. setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
  111. rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
  112. if (rc == -EEXIST)
  113. printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
  114. else if (rc) {
  115. printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
  116. gsi, rc);
  117. }
  118. return irq;
  119. }
  120. static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
  121. int trigger, int polarity)
  122. {
  123. return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
  124. }
  125. #endif
  126. #endif
  127. #if defined(CONFIG_PCI_MSI)
  128. #include <linux/msi.h>
  129. #include <asm/msidef.h>
  130. struct xen_pci_frontend_ops *xen_pci_frontend;
  131. EXPORT_SYMBOL_GPL(xen_pci_frontend);
  132. static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  133. {
  134. int irq, ret, i;
  135. struct msi_desc *msidesc;
  136. int *v;
  137. if (type == PCI_CAP_ID_MSI && nvec > 1)
  138. return 1;
  139. v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
  140. if (!v)
  141. return -ENOMEM;
  142. if (type == PCI_CAP_ID_MSIX)
  143. ret = xen_pci_frontend_enable_msix(dev, v, nvec);
  144. else
  145. ret = xen_pci_frontend_enable_msi(dev, v);
  146. if (ret)
  147. goto error;
  148. i = 0;
  149. for_each_pci_msi_entry(msidesc, dev) {
  150. irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
  151. (type == PCI_CAP_ID_MSI) ? nvec : 1,
  152. (type == PCI_CAP_ID_MSIX) ?
  153. "pcifront-msi-x" :
  154. "pcifront-msi",
  155. DOMID_SELF);
  156. if (irq < 0) {
  157. ret = irq;
  158. goto free;
  159. }
  160. i++;
  161. }
  162. kfree(v);
  163. return 0;
  164. error:
  165. dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
  166. free:
  167. kfree(v);
  168. return ret;
  169. }
  170. #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
  171. MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
  172. static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
  173. struct msi_msg *msg)
  174. {
  175. /* We set vector == 0 to tell the hypervisor we don't care about it,
  176. * but we want a pirq setup instead.
  177. * We use the dest_id field to pass the pirq that we want. */
  178. msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
  179. msg->address_lo =
  180. MSI_ADDR_BASE_LO |
  181. MSI_ADDR_DEST_MODE_PHYSICAL |
  182. MSI_ADDR_REDIRECTION_CPU |
  183. MSI_ADDR_DEST_ID(pirq);
  184. msg->data = XEN_PIRQ_MSI_DATA;
  185. }
  186. static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  187. {
  188. int irq, pirq;
  189. struct msi_desc *msidesc;
  190. struct msi_msg msg;
  191. if (type == PCI_CAP_ID_MSI && nvec > 1)
  192. return 1;
  193. for_each_pci_msi_entry(msidesc, dev) {
  194. __pci_read_msi_msg(msidesc, &msg);
  195. pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) |
  196. ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
  197. if (msg.data != XEN_PIRQ_MSI_DATA ||
  198. xen_irq_from_pirq(pirq) < 0) {
  199. pirq = xen_allocate_pirq_msi(dev, msidesc);
  200. if (pirq < 0) {
  201. irq = -ENODEV;
  202. goto error;
  203. }
  204. xen_msi_compose_msg(dev, pirq, &msg);
  205. __pci_write_msi_msg(msidesc, &msg);
  206. dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
  207. } else {
  208. dev_dbg(&dev->dev,
  209. "xen: msi already bound to pirq=%d\n", pirq);
  210. }
  211. irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
  212. (type == PCI_CAP_ID_MSI) ? nvec : 1,
  213. (type == PCI_CAP_ID_MSIX) ?
  214. "msi-x" : "msi",
  215. DOMID_SELF);
  216. if (irq < 0)
  217. goto error;
  218. dev_dbg(&dev->dev,
  219. "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
  220. }
  221. return 0;
  222. error:
  223. dev_err(&dev->dev,
  224. "Xen PCI frontend has not registered MSI/MSI-X support!\n");
  225. return irq;
  226. }
  227. #ifdef CONFIG_XEN_DOM0
  228. static bool __read_mostly pci_seg_supported = true;
  229. static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  230. {
  231. int ret = 0;
  232. struct msi_desc *msidesc;
  233. for_each_pci_msi_entry(msidesc, dev) {
  234. struct physdev_map_pirq map_irq;
  235. domid_t domid;
  236. domid = ret = xen_find_device_domain_owner(dev);
  237. /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
  238. * hence check ret value for < 0. */
  239. if (ret < 0)
  240. domid = DOMID_SELF;
  241. memset(&map_irq, 0, sizeof(map_irq));
  242. map_irq.domid = domid;
  243. map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
  244. map_irq.index = -1;
  245. map_irq.pirq = -1;
  246. map_irq.bus = dev->bus->number |
  247. (pci_domain_nr(dev->bus) << 16);
  248. map_irq.devfn = dev->devfn;
  249. if (type == PCI_CAP_ID_MSI && nvec > 1) {
  250. map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
  251. map_irq.entry_nr = nvec;
  252. } else if (type == PCI_CAP_ID_MSIX) {
  253. int pos;
  254. unsigned long flags;
  255. u32 table_offset, bir;
  256. pos = dev->msix_cap;
  257. pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
  258. &table_offset);
  259. bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
  260. flags = pci_resource_flags(dev, bir);
  261. if (!flags || (flags & IORESOURCE_UNSET))
  262. return -EINVAL;
  263. map_irq.table_base = pci_resource_start(dev, bir);
  264. map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
  265. }
  266. ret = -EINVAL;
  267. if (pci_seg_supported)
  268. ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
  269. &map_irq);
  270. if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
  271. /*
  272. * If MAP_PIRQ_TYPE_MULTI_MSI is not available
  273. * there's nothing else we can do in this case.
  274. * Just set ret > 0 so driver can retry with
  275. * single MSI.
  276. */
  277. ret = 1;
  278. goto out;
  279. }
  280. if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
  281. map_irq.type = MAP_PIRQ_TYPE_MSI;
  282. map_irq.index = -1;
  283. map_irq.pirq = -1;
  284. map_irq.bus = dev->bus->number;
  285. ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
  286. &map_irq);
  287. if (ret != -EINVAL)
  288. pci_seg_supported = false;
  289. }
  290. if (ret) {
  291. dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
  292. ret, domid);
  293. goto out;
  294. }
  295. ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
  296. (type == PCI_CAP_ID_MSI) ? nvec : 1,
  297. (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
  298. domid);
  299. if (ret < 0)
  300. goto out;
  301. }
  302. ret = 0;
  303. out:
  304. return ret;
  305. }
  306. static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
  307. {
  308. int ret = 0;
  309. if (pci_seg_supported) {
  310. struct physdev_pci_device restore_ext;
  311. restore_ext.seg = pci_domain_nr(dev->bus);
  312. restore_ext.bus = dev->bus->number;
  313. restore_ext.devfn = dev->devfn;
  314. ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
  315. &restore_ext);
  316. if (ret == -ENOSYS)
  317. pci_seg_supported = false;
  318. WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
  319. }
  320. if (!pci_seg_supported) {
  321. struct physdev_restore_msi restore;
  322. restore.bus = dev->bus->number;
  323. restore.devfn = dev->devfn;
  324. ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
  325. WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
  326. }
  327. }
  328. #endif
  329. static void xen_teardown_msi_irqs(struct pci_dev *dev)
  330. {
  331. struct msi_desc *msidesc;
  332. msidesc = first_pci_msi_entry(dev);
  333. if (msidesc->msi_attrib.is_msix)
  334. xen_pci_frontend_disable_msix(dev);
  335. else
  336. xen_pci_frontend_disable_msi(dev);
  337. /* Free the IRQ's and the msidesc using the generic code. */
  338. default_teardown_msi_irqs(dev);
  339. }
  340. static void xen_teardown_msi_irq(unsigned int irq)
  341. {
  342. xen_destroy_irq(irq);
  343. }
  344. #endif
  345. int __init pci_xen_init(void)
  346. {
  347. if (!xen_pv_domain() || xen_initial_domain())
  348. return -ENODEV;
  349. printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
  350. pcibios_set_cache_line_size();
  351. pcibios_enable_irq = xen_pcifront_enable_irq;
  352. pcibios_disable_irq = NULL;
  353. #ifdef CONFIG_ACPI
  354. /* Keep ACPI out of the picture */
  355. acpi_noirq = 1;
  356. #endif
  357. #ifdef CONFIG_PCI_MSI
  358. x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
  359. x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
  360. x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
  361. pci_msi_ignore_mask = 1;
  362. #endif
  363. return 0;
  364. }
  365. #ifdef CONFIG_PCI_MSI
  366. void __init xen_msi_init(void)
  367. {
  368. if (!disable_apic) {
  369. /*
  370. * If hardware supports (x2)APIC virtualization (as indicated
  371. * by hypervisor's leaf 4) then we don't need to use pirqs/
  372. * event channels for MSI handling and instead use regular
  373. * APIC processing
  374. */
  375. uint32_t eax = cpuid_eax(xen_cpuid_base() + 4);
  376. if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) ||
  377. ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && cpu_has_apic))
  378. return;
  379. }
  380. x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
  381. x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
  382. }
  383. #endif
  384. int __init pci_xen_hvm_init(void)
  385. {
  386. if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
  387. return 0;
  388. #ifdef CONFIG_ACPI
  389. /*
  390. * We don't want to change the actual ACPI delivery model,
  391. * just how GSIs get registered.
  392. */
  393. __acpi_register_gsi = acpi_register_gsi_xen_hvm;
  394. __acpi_unregister_gsi = NULL;
  395. #endif
  396. #ifdef CONFIG_PCI_MSI
  397. /*
  398. * We need to wait until after x2apic is initialized
  399. * before we can set MSI IRQ ops.
  400. */
  401. x86_platform.apic_post_init = xen_msi_init;
  402. #endif
  403. return 0;
  404. }
  405. #ifdef CONFIG_XEN_DOM0
  406. int __init pci_xen_initial_domain(void)
  407. {
  408. int irq;
  409. #ifdef CONFIG_PCI_MSI
  410. x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
  411. x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
  412. x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
  413. pci_msi_ignore_mask = 1;
  414. #endif
  415. __acpi_register_gsi = acpi_register_gsi_xen;
  416. __acpi_unregister_gsi = NULL;
  417. /* Pre-allocate legacy irqs */
  418. for (irq = 0; irq < nr_legacy_irqs(); irq++) {
  419. int trigger, polarity;
  420. if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
  421. continue;
  422. xen_register_pirq(irq, -1 /* no GSI override */,
  423. trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
  424. true /* Map GSI to PIRQ */);
  425. }
  426. if (0 == nr_ioapics) {
  427. for (irq = 0; irq < nr_legacy_irqs(); irq++)
  428. xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
  429. }
  430. return 0;
  431. }
  432. struct xen_device_domain_owner {
  433. domid_t domain;
  434. struct pci_dev *dev;
  435. struct list_head list;
  436. };
  437. static DEFINE_SPINLOCK(dev_domain_list_spinlock);
  438. static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
  439. static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
  440. {
  441. struct xen_device_domain_owner *owner;
  442. list_for_each_entry(owner, &dev_domain_list, list) {
  443. if (owner->dev == dev)
  444. return owner;
  445. }
  446. return NULL;
  447. }
  448. int xen_find_device_domain_owner(struct pci_dev *dev)
  449. {
  450. struct xen_device_domain_owner *owner;
  451. int domain = -ENODEV;
  452. spin_lock(&dev_domain_list_spinlock);
  453. owner = find_device(dev);
  454. if (owner)
  455. domain = owner->domain;
  456. spin_unlock(&dev_domain_list_spinlock);
  457. return domain;
  458. }
  459. EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
  460. int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
  461. {
  462. struct xen_device_domain_owner *owner;
  463. owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
  464. if (!owner)
  465. return -ENODEV;
  466. spin_lock(&dev_domain_list_spinlock);
  467. if (find_device(dev)) {
  468. spin_unlock(&dev_domain_list_spinlock);
  469. kfree(owner);
  470. return -EEXIST;
  471. }
  472. owner->domain = domain;
  473. owner->dev = dev;
  474. list_add_tail(&owner->list, &dev_domain_list);
  475. spin_unlock(&dev_domain_list_spinlock);
  476. return 0;
  477. }
  478. EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
  479. int xen_unregister_device_domain_owner(struct pci_dev *dev)
  480. {
  481. struct xen_device_domain_owner *owner;
  482. spin_lock(&dev_domain_list_spinlock);
  483. owner = find_device(dev);
  484. if (!owner) {
  485. spin_unlock(&dev_domain_list_spinlock);
  486. return -ENODEV;
  487. }
  488. list_del(&owner->list);
  489. spin_unlock(&dev_domain_list_spinlock);
  490. kfree(owner);
  491. return 0;
  492. }
  493. EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
  494. #endif