phy-rcar-gen3-usb2.c 13 KB

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  1. /*
  2. * Renesas R-Car Gen3 for USB2.0 PHY driver
  3. *
  4. * Copyright (C) 2015 Renesas Electronics Corporation
  5. *
  6. * This is based on the phy-rcar-gen2 driver:
  7. * Copyright (C) 2014 Renesas Solutions Corp.
  8. * Copyright (C) 2014 Cogent Embedded, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/extcon-provider.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/io.h>
  17. #include <linux/module.h>
  18. #include <linux/of.h>
  19. #include <linux/of_address.h>
  20. #include <linux/phy/phy.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/regulator/consumer.h>
  24. #include <linux/workqueue.h>
  25. /******* USB2.0 Host registers (original offset is +0x200) *******/
  26. #define USB2_INT_ENABLE 0x000
  27. #define USB2_USBCTR 0x00c
  28. #define USB2_SPD_RSM_TIMSET 0x10c
  29. #define USB2_OC_TIMSET 0x110
  30. #define USB2_COMMCTRL 0x600
  31. #define USB2_OBINTSTA 0x604
  32. #define USB2_OBINTEN 0x608
  33. #define USB2_VBCTRL 0x60c
  34. #define USB2_LINECTRL1 0x610
  35. #define USB2_ADPCTRL 0x630
  36. /* INT_ENABLE */
  37. #define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
  38. #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2)
  39. #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1)
  40. #define USB2_INT_ENABLE_INIT (USB2_INT_ENABLE_UCOM_INTEN | \
  41. USB2_INT_ENABLE_USBH_INTB_EN | \
  42. USB2_INT_ENABLE_USBH_INTA_EN)
  43. /* USBCTR */
  44. #define USB2_USBCTR_DIRPD BIT(2)
  45. #define USB2_USBCTR_PLL_RST BIT(1)
  46. /* SPD_RSM_TIMSET */
  47. #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
  48. /* OC_TIMSET */
  49. #define USB2_OC_TIMSET_INIT 0x000209ab
  50. /* COMMCTRL */
  51. #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
  52. /* OBINTSTA and OBINTEN */
  53. #define USB2_OBINT_SESSVLDCHG BIT(12)
  54. #define USB2_OBINT_IDDIGCHG BIT(11)
  55. #define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \
  56. USB2_OBINT_IDDIGCHG)
  57. /* VBCTRL */
  58. #define USB2_VBCTRL_DRVVBUSSEL BIT(8)
  59. /* LINECTRL1 */
  60. #define USB2_LINECTRL1_DPRPD_EN BIT(19)
  61. #define USB2_LINECTRL1_DP_RPD BIT(18)
  62. #define USB2_LINECTRL1_DMRPD_EN BIT(17)
  63. #define USB2_LINECTRL1_DM_RPD BIT(16)
  64. #define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
  65. /* ADPCTRL */
  66. #define USB2_ADPCTRL_OTGSESSVLD BIT(20)
  67. #define USB2_ADPCTRL_IDDIG BIT(19)
  68. #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
  69. #define USB2_ADPCTRL_DRVVBUS BIT(4)
  70. struct rcar_gen3_chan {
  71. void __iomem *base;
  72. struct extcon_dev *extcon;
  73. struct phy *phy;
  74. struct regulator *vbus;
  75. struct work_struct work;
  76. bool extcon_host;
  77. bool has_otg;
  78. };
  79. static void rcar_gen3_phy_usb2_work(struct work_struct *work)
  80. {
  81. struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
  82. work);
  83. if (ch->extcon_host) {
  84. extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
  85. extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
  86. } else {
  87. extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
  88. extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
  89. }
  90. }
  91. static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
  92. {
  93. void __iomem *usb2_base = ch->base;
  94. u32 val = readl(usb2_base + USB2_COMMCTRL);
  95. dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host);
  96. if (host)
  97. val &= ~USB2_COMMCTRL_OTG_PERI;
  98. else
  99. val |= USB2_COMMCTRL_OTG_PERI;
  100. writel(val, usb2_base + USB2_COMMCTRL);
  101. }
  102. static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
  103. {
  104. void __iomem *usb2_base = ch->base;
  105. u32 val = readl(usb2_base + USB2_LINECTRL1);
  106. dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
  107. val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
  108. if (dp)
  109. val |= USB2_LINECTRL1_DP_RPD;
  110. if (dm)
  111. val |= USB2_LINECTRL1_DM_RPD;
  112. writel(val, usb2_base + USB2_LINECTRL1);
  113. }
  114. static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
  115. {
  116. void __iomem *usb2_base = ch->base;
  117. u32 val = readl(usb2_base + USB2_ADPCTRL);
  118. dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus);
  119. if (vbus)
  120. val |= USB2_ADPCTRL_DRVVBUS;
  121. else
  122. val &= ~USB2_ADPCTRL_DRVVBUS;
  123. writel(val, usb2_base + USB2_ADPCTRL);
  124. }
  125. static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
  126. {
  127. rcar_gen3_set_linectrl(ch, 1, 1);
  128. rcar_gen3_set_host_mode(ch, 1);
  129. rcar_gen3_enable_vbus_ctrl(ch, 1);
  130. ch->extcon_host = true;
  131. schedule_work(&ch->work);
  132. }
  133. static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
  134. {
  135. rcar_gen3_set_linectrl(ch, 0, 1);
  136. rcar_gen3_set_host_mode(ch, 0);
  137. rcar_gen3_enable_vbus_ctrl(ch, 0);
  138. ch->extcon_host = false;
  139. schedule_work(&ch->work);
  140. }
  141. static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
  142. {
  143. void __iomem *usb2_base = ch->base;
  144. u32 val;
  145. val = readl(usb2_base + USB2_LINECTRL1);
  146. writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
  147. rcar_gen3_set_linectrl(ch, 1, 1);
  148. rcar_gen3_set_host_mode(ch, 1);
  149. rcar_gen3_enable_vbus_ctrl(ch, 0);
  150. val = readl(usb2_base + USB2_LINECTRL1);
  151. writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
  152. }
  153. static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
  154. {
  155. rcar_gen3_set_linectrl(ch, 0, 1);
  156. rcar_gen3_set_host_mode(ch, 0);
  157. rcar_gen3_enable_vbus_ctrl(ch, 1);
  158. }
  159. static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
  160. {
  161. void __iomem *usb2_base = ch->base;
  162. u32 val;
  163. val = readl(usb2_base + USB2_OBINTEN);
  164. writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
  165. rcar_gen3_enable_vbus_ctrl(ch, 0);
  166. rcar_gen3_init_for_host(ch);
  167. writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
  168. }
  169. static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
  170. {
  171. return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
  172. }
  173. static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
  174. {
  175. if (!rcar_gen3_check_id(ch))
  176. rcar_gen3_init_for_host(ch);
  177. else
  178. rcar_gen3_init_for_peri(ch);
  179. }
  180. static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
  181. {
  182. return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
  183. }
  184. static ssize_t role_store(struct device *dev, struct device_attribute *attr,
  185. const char *buf, size_t count)
  186. {
  187. struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
  188. bool is_b_device, is_host, new_mode_is_host;
  189. if (!ch->has_otg || !ch->phy->init_count)
  190. return -EIO;
  191. /*
  192. * is_b_device: true is B-Device. false is A-Device.
  193. * If {new_mode_}is_host: true is Host mode. false is Peripheral mode.
  194. */
  195. is_b_device = rcar_gen3_check_id(ch);
  196. is_host = rcar_gen3_is_host(ch);
  197. if (!strncmp(buf, "host", strlen("host")))
  198. new_mode_is_host = true;
  199. else if (!strncmp(buf, "peripheral", strlen("peripheral")))
  200. new_mode_is_host = false;
  201. else
  202. return -EINVAL;
  203. /* If current and new mode is the same, this returns the error */
  204. if (is_host == new_mode_is_host)
  205. return -EINVAL;
  206. if (new_mode_is_host) { /* And is_host must be false */
  207. if (!is_b_device) /* A-Peripheral */
  208. rcar_gen3_init_from_a_peri_to_a_host(ch);
  209. else /* B-Peripheral */
  210. rcar_gen3_init_for_b_host(ch);
  211. } else { /* And is_host must be true */
  212. if (!is_b_device) /* A-Host */
  213. rcar_gen3_init_for_a_peri(ch);
  214. else /* B-Host */
  215. rcar_gen3_init_for_peri(ch);
  216. }
  217. return count;
  218. }
  219. static ssize_t role_show(struct device *dev, struct device_attribute *attr,
  220. char *buf)
  221. {
  222. struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
  223. if (!ch->has_otg || !ch->phy->init_count)
  224. return -EIO;
  225. return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
  226. "peripheral");
  227. }
  228. static DEVICE_ATTR_RW(role);
  229. static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
  230. {
  231. void __iomem *usb2_base = ch->base;
  232. u32 val;
  233. val = readl(usb2_base + USB2_VBCTRL);
  234. writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
  235. writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
  236. val = readl(usb2_base + USB2_OBINTEN);
  237. writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
  238. val = readl(usb2_base + USB2_ADPCTRL);
  239. writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
  240. val = readl(usb2_base + USB2_LINECTRL1);
  241. rcar_gen3_set_linectrl(ch, 0, 0);
  242. writel(val | USB2_LINECTRL1_DPRPD_EN | USB2_LINECTRL1_DMRPD_EN,
  243. usb2_base + USB2_LINECTRL1);
  244. rcar_gen3_device_recognition(ch);
  245. }
  246. static int rcar_gen3_phy_usb2_init(struct phy *p)
  247. {
  248. struct rcar_gen3_chan *channel = phy_get_drvdata(p);
  249. void __iomem *usb2_base = channel->base;
  250. /* Initialize USB2 part */
  251. writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
  252. writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
  253. writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
  254. /* Initialize otg part */
  255. if (channel->has_otg)
  256. rcar_gen3_init_otg(channel);
  257. return 0;
  258. }
  259. static int rcar_gen3_phy_usb2_exit(struct phy *p)
  260. {
  261. struct rcar_gen3_chan *channel = phy_get_drvdata(p);
  262. writel(0, channel->base + USB2_INT_ENABLE);
  263. return 0;
  264. }
  265. static int rcar_gen3_phy_usb2_power_on(struct phy *p)
  266. {
  267. struct rcar_gen3_chan *channel = phy_get_drvdata(p);
  268. void __iomem *usb2_base = channel->base;
  269. u32 val;
  270. int ret;
  271. if (channel->vbus) {
  272. ret = regulator_enable(channel->vbus);
  273. if (ret)
  274. return ret;
  275. }
  276. val = readl(usb2_base + USB2_USBCTR);
  277. val |= USB2_USBCTR_PLL_RST;
  278. writel(val, usb2_base + USB2_USBCTR);
  279. val &= ~USB2_USBCTR_PLL_RST;
  280. writel(val, usb2_base + USB2_USBCTR);
  281. return 0;
  282. }
  283. static int rcar_gen3_phy_usb2_power_off(struct phy *p)
  284. {
  285. struct rcar_gen3_chan *channel = phy_get_drvdata(p);
  286. int ret = 0;
  287. if (channel->vbus)
  288. ret = regulator_disable(channel->vbus);
  289. return ret;
  290. }
  291. static const struct phy_ops rcar_gen3_phy_usb2_ops = {
  292. .init = rcar_gen3_phy_usb2_init,
  293. .exit = rcar_gen3_phy_usb2_exit,
  294. .power_on = rcar_gen3_phy_usb2_power_on,
  295. .power_off = rcar_gen3_phy_usb2_power_off,
  296. .owner = THIS_MODULE,
  297. };
  298. static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
  299. {
  300. struct rcar_gen3_chan *ch = _ch;
  301. void __iomem *usb2_base = ch->base;
  302. u32 status = readl(usb2_base + USB2_OBINTSTA);
  303. irqreturn_t ret = IRQ_NONE;
  304. if (status & USB2_OBINT_BITS) {
  305. dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status);
  306. writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
  307. rcar_gen3_device_recognition(ch);
  308. ret = IRQ_HANDLED;
  309. }
  310. return ret;
  311. }
  312. static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
  313. { .compatible = "renesas,usb2-phy-r8a7795" },
  314. { .compatible = "renesas,usb2-phy-r8a7796" },
  315. { .compatible = "renesas,rcar-gen3-usb2-phy" },
  316. { }
  317. };
  318. MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
  319. static const unsigned int rcar_gen3_phy_cable[] = {
  320. EXTCON_USB,
  321. EXTCON_USB_HOST,
  322. EXTCON_NONE,
  323. };
  324. static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
  325. {
  326. struct device *dev = &pdev->dev;
  327. struct rcar_gen3_chan *channel;
  328. struct phy_provider *provider;
  329. struct resource *res;
  330. int irq, ret = 0;
  331. if (!dev->of_node) {
  332. dev_err(dev, "This driver needs device tree\n");
  333. return -EINVAL;
  334. }
  335. channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
  336. if (!channel)
  337. return -ENOMEM;
  338. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  339. channel->base = devm_ioremap_resource(dev, res);
  340. if (IS_ERR(channel->base))
  341. return PTR_ERR(channel->base);
  342. /* call request_irq for OTG */
  343. irq = platform_get_irq(pdev, 0);
  344. if (irq >= 0) {
  345. int ret;
  346. INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
  347. irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
  348. IRQF_SHARED, dev_name(dev), channel);
  349. if (irq < 0)
  350. dev_err(dev, "No irq handler (%d)\n", irq);
  351. channel->has_otg = true;
  352. channel->extcon = devm_extcon_dev_allocate(dev,
  353. rcar_gen3_phy_cable);
  354. if (IS_ERR(channel->extcon))
  355. return PTR_ERR(channel->extcon);
  356. ret = devm_extcon_dev_register(dev, channel->extcon);
  357. if (ret < 0) {
  358. dev_err(dev, "Failed to register extcon\n");
  359. return ret;
  360. }
  361. }
  362. /*
  363. * devm_phy_create() will call pm_runtime_enable(&phy->dev);
  364. * And then, phy-core will manage runtime pm for this device.
  365. */
  366. pm_runtime_enable(dev);
  367. channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
  368. if (IS_ERR(channel->phy)) {
  369. dev_err(dev, "Failed to create USB2 PHY\n");
  370. ret = PTR_ERR(channel->phy);
  371. goto error;
  372. }
  373. channel->vbus = devm_regulator_get_optional(dev, "vbus");
  374. if (IS_ERR(channel->vbus)) {
  375. if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
  376. ret = PTR_ERR(channel->vbus);
  377. goto error;
  378. }
  379. channel->vbus = NULL;
  380. }
  381. platform_set_drvdata(pdev, channel);
  382. phy_set_drvdata(channel->phy, channel);
  383. provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
  384. if (IS_ERR(provider)) {
  385. dev_err(dev, "Failed to register PHY provider\n");
  386. ret = PTR_ERR(provider);
  387. goto error;
  388. } else if (channel->has_otg) {
  389. int ret;
  390. ret = device_create_file(dev, &dev_attr_role);
  391. if (ret < 0)
  392. goto error;
  393. }
  394. return 0;
  395. error:
  396. pm_runtime_disable(dev);
  397. return ret;
  398. }
  399. static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
  400. {
  401. struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
  402. if (channel->has_otg)
  403. device_remove_file(&pdev->dev, &dev_attr_role);
  404. pm_runtime_disable(&pdev->dev);
  405. return 0;
  406. };
  407. static struct platform_driver rcar_gen3_phy_usb2_driver = {
  408. .driver = {
  409. .name = "phy_rcar_gen3_usb2",
  410. .of_match_table = rcar_gen3_phy_usb2_match_table,
  411. },
  412. .probe = rcar_gen3_phy_usb2_probe,
  413. .remove = rcar_gen3_phy_usb2_remove,
  414. };
  415. module_platform_driver(rcar_gen3_phy_usb2_driver);
  416. MODULE_LICENSE("GPL v2");
  417. MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
  418. MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");