ixgbevf_main.c 114 KB

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  1. /*******************************************************************************
  2. Intel 82599 Virtual Function driver
  3. Copyright(c) 1999 - 2015 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, see <http://www.gnu.org/licenses/>.
  13. The full GNU General Public License is included in this distribution in
  14. the file called "COPYING".
  15. Contact Information:
  16. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  17. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  18. *******************************************************************************/
  19. /******************************************************************************
  20. Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
  21. ******************************************************************************/
  22. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23. #include <linux/types.h>
  24. #include <linux/bitops.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/vmalloc.h>
  29. #include <linux/string.h>
  30. #include <linux/in.h>
  31. #include <linux/ip.h>
  32. #include <linux/tcp.h>
  33. #include <linux/sctp.h>
  34. #include <linux/ipv6.h>
  35. #include <linux/slab.h>
  36. #include <net/checksum.h>
  37. #include <net/ip6_checksum.h>
  38. #include <linux/ethtool.h>
  39. #include <linux/if.h>
  40. #include <linux/if_vlan.h>
  41. #include <linux/prefetch.h>
  42. #include "ixgbevf.h"
  43. const char ixgbevf_driver_name[] = "ixgbevf";
  44. static const char ixgbevf_driver_string[] =
  45. "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
  46. #define DRV_VERSION "2.12.1-k"
  47. const char ixgbevf_driver_version[] = DRV_VERSION;
  48. static char ixgbevf_copyright[] =
  49. "Copyright (c) 2009 - 2015 Intel Corporation.";
  50. static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
  51. [board_82599_vf] = &ixgbevf_82599_vf_info,
  52. [board_X540_vf] = &ixgbevf_X540_vf_info,
  53. [board_X550_vf] = &ixgbevf_X550_vf_info,
  54. [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
  55. };
  56. /* ixgbevf_pci_tbl - PCI Device ID Table
  57. *
  58. * Wildcard entries (PCI_ANY_ID) should come last
  59. * Last entry must be all 0s
  60. *
  61. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  62. * Class, Class Mask, private data (not used) }
  63. */
  64. static const struct pci_device_id ixgbevf_pci_tbl[] = {
  65. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
  66. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
  67. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
  68. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
  69. /* required last entry */
  70. {0, }
  71. };
  72. MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
  73. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  74. MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
  75. MODULE_LICENSE("GPL");
  76. MODULE_VERSION(DRV_VERSION);
  77. #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  78. static int debug = -1;
  79. module_param(debug, int, 0);
  80. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  81. static struct workqueue_struct *ixgbevf_wq;
  82. static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
  83. {
  84. if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
  85. !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
  86. !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
  87. queue_work(ixgbevf_wq, &adapter->service_task);
  88. }
  89. static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
  90. {
  91. BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
  92. /* flush memory to make sure state is correct before next watchdog */
  93. smp_mb__before_atomic();
  94. clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
  95. }
  96. /* forward decls */
  97. static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
  98. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
  99. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
  100. static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
  101. {
  102. struct ixgbevf_adapter *adapter = hw->back;
  103. if (!hw->hw_addr)
  104. return;
  105. hw->hw_addr = NULL;
  106. dev_err(&adapter->pdev->dev, "Adapter removed\n");
  107. if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
  108. ixgbevf_service_event_schedule(adapter);
  109. }
  110. static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
  111. {
  112. u32 value;
  113. /* The following check not only optimizes a bit by not
  114. * performing a read on the status register when the
  115. * register just read was a status register read that
  116. * returned IXGBE_FAILED_READ_REG. It also blocks any
  117. * potential recursion.
  118. */
  119. if (reg == IXGBE_VFSTATUS) {
  120. ixgbevf_remove_adapter(hw);
  121. return;
  122. }
  123. value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
  124. if (value == IXGBE_FAILED_READ_REG)
  125. ixgbevf_remove_adapter(hw);
  126. }
  127. u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
  128. {
  129. u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
  130. u32 value;
  131. if (IXGBE_REMOVED(reg_addr))
  132. return IXGBE_FAILED_READ_REG;
  133. value = readl(reg_addr + reg);
  134. if (unlikely(value == IXGBE_FAILED_READ_REG))
  135. ixgbevf_check_remove(hw, reg);
  136. return value;
  137. }
  138. /**
  139. * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
  140. * @adapter: pointer to adapter struct
  141. * @direction: 0 for Rx, 1 for Tx, -1 for other causes
  142. * @queue: queue to map the corresponding interrupt to
  143. * @msix_vector: the vector to map to the corresponding queue
  144. **/
  145. static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
  146. u8 queue, u8 msix_vector)
  147. {
  148. u32 ivar, index;
  149. struct ixgbe_hw *hw = &adapter->hw;
  150. if (direction == -1) {
  151. /* other causes */
  152. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  153. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
  154. ivar &= ~0xFF;
  155. ivar |= msix_vector;
  156. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
  157. } else {
  158. /* Tx or Rx causes */
  159. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  160. index = ((16 * (queue & 1)) + (8 * direction));
  161. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
  162. ivar &= ~(0xFF << index);
  163. ivar |= (msix_vector << index);
  164. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
  165. }
  166. }
  167. static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
  168. struct ixgbevf_tx_buffer *tx_buffer)
  169. {
  170. if (tx_buffer->skb) {
  171. dev_kfree_skb_any(tx_buffer->skb);
  172. if (dma_unmap_len(tx_buffer, len))
  173. dma_unmap_single(tx_ring->dev,
  174. dma_unmap_addr(tx_buffer, dma),
  175. dma_unmap_len(tx_buffer, len),
  176. DMA_TO_DEVICE);
  177. } else if (dma_unmap_len(tx_buffer, len)) {
  178. dma_unmap_page(tx_ring->dev,
  179. dma_unmap_addr(tx_buffer, dma),
  180. dma_unmap_len(tx_buffer, len),
  181. DMA_TO_DEVICE);
  182. }
  183. tx_buffer->next_to_watch = NULL;
  184. tx_buffer->skb = NULL;
  185. dma_unmap_len_set(tx_buffer, len, 0);
  186. /* tx_buffer must be completely set up in the transmit path */
  187. }
  188. static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
  189. {
  190. return ring->stats.packets;
  191. }
  192. static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
  193. {
  194. struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
  195. struct ixgbe_hw *hw = &adapter->hw;
  196. u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
  197. u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
  198. if (head != tail)
  199. return (head < tail) ?
  200. tail - head : (tail + ring->count - head);
  201. return 0;
  202. }
  203. static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
  204. {
  205. u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
  206. u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
  207. u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
  208. clear_check_for_tx_hang(tx_ring);
  209. /* Check for a hung queue, but be thorough. This verifies
  210. * that a transmit has been completed since the previous
  211. * check AND there is at least one packet pending. The
  212. * ARMED bit is set to indicate a potential hang.
  213. */
  214. if ((tx_done_old == tx_done) && tx_pending) {
  215. /* make sure it is true for two checks in a row */
  216. return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
  217. &tx_ring->state);
  218. }
  219. /* reset the countdown */
  220. clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
  221. /* update completed stats and continue */
  222. tx_ring->tx_stats.tx_done_old = tx_done;
  223. return false;
  224. }
  225. static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
  226. {
  227. /* Do the reset outside of interrupt context */
  228. if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  229. set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
  230. ixgbevf_service_event_schedule(adapter);
  231. }
  232. }
  233. /**
  234. * ixgbevf_tx_timeout - Respond to a Tx Hang
  235. * @netdev: network interface device structure
  236. **/
  237. static void ixgbevf_tx_timeout(struct net_device *netdev)
  238. {
  239. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  240. ixgbevf_tx_timeout_reset(adapter);
  241. }
  242. /**
  243. * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
  244. * @q_vector: board private structure
  245. * @tx_ring: tx ring to clean
  246. * @napi_budget: Used to determine if we are in netpoll
  247. **/
  248. static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
  249. struct ixgbevf_ring *tx_ring, int napi_budget)
  250. {
  251. struct ixgbevf_adapter *adapter = q_vector->adapter;
  252. struct ixgbevf_tx_buffer *tx_buffer;
  253. union ixgbe_adv_tx_desc *tx_desc;
  254. unsigned int total_bytes = 0, total_packets = 0;
  255. unsigned int budget = tx_ring->count / 2;
  256. unsigned int i = tx_ring->next_to_clean;
  257. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  258. return true;
  259. tx_buffer = &tx_ring->tx_buffer_info[i];
  260. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  261. i -= tx_ring->count;
  262. do {
  263. union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
  264. /* if next_to_watch is not set then there is no work pending */
  265. if (!eop_desc)
  266. break;
  267. /* prevent any other reads prior to eop_desc */
  268. read_barrier_depends();
  269. /* if DD is not set pending work has not been completed */
  270. if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
  271. break;
  272. /* clear next_to_watch to prevent false hangs */
  273. tx_buffer->next_to_watch = NULL;
  274. /* update the statistics for this packet */
  275. total_bytes += tx_buffer->bytecount;
  276. total_packets += tx_buffer->gso_segs;
  277. /* free the skb */
  278. napi_consume_skb(tx_buffer->skb, napi_budget);
  279. /* unmap skb header data */
  280. dma_unmap_single(tx_ring->dev,
  281. dma_unmap_addr(tx_buffer, dma),
  282. dma_unmap_len(tx_buffer, len),
  283. DMA_TO_DEVICE);
  284. /* clear tx_buffer data */
  285. tx_buffer->skb = NULL;
  286. dma_unmap_len_set(tx_buffer, len, 0);
  287. /* unmap remaining buffers */
  288. while (tx_desc != eop_desc) {
  289. tx_buffer++;
  290. tx_desc++;
  291. i++;
  292. if (unlikely(!i)) {
  293. i -= tx_ring->count;
  294. tx_buffer = tx_ring->tx_buffer_info;
  295. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  296. }
  297. /* unmap any remaining paged data */
  298. if (dma_unmap_len(tx_buffer, len)) {
  299. dma_unmap_page(tx_ring->dev,
  300. dma_unmap_addr(tx_buffer, dma),
  301. dma_unmap_len(tx_buffer, len),
  302. DMA_TO_DEVICE);
  303. dma_unmap_len_set(tx_buffer, len, 0);
  304. }
  305. }
  306. /* move us one more past the eop_desc for start of next pkt */
  307. tx_buffer++;
  308. tx_desc++;
  309. i++;
  310. if (unlikely(!i)) {
  311. i -= tx_ring->count;
  312. tx_buffer = tx_ring->tx_buffer_info;
  313. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  314. }
  315. /* issue prefetch for next Tx descriptor */
  316. prefetch(tx_desc);
  317. /* update budget accounting */
  318. budget--;
  319. } while (likely(budget));
  320. i += tx_ring->count;
  321. tx_ring->next_to_clean = i;
  322. u64_stats_update_begin(&tx_ring->syncp);
  323. tx_ring->stats.bytes += total_bytes;
  324. tx_ring->stats.packets += total_packets;
  325. u64_stats_update_end(&tx_ring->syncp);
  326. q_vector->tx.total_bytes += total_bytes;
  327. q_vector->tx.total_packets += total_packets;
  328. if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
  329. struct ixgbe_hw *hw = &adapter->hw;
  330. union ixgbe_adv_tx_desc *eop_desc;
  331. eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
  332. pr_err("Detected Tx Unit Hang\n"
  333. " Tx Queue <%d>\n"
  334. " TDH, TDT <%x>, <%x>\n"
  335. " next_to_use <%x>\n"
  336. " next_to_clean <%x>\n"
  337. "tx_buffer_info[next_to_clean]\n"
  338. " next_to_watch <%p>\n"
  339. " eop_desc->wb.status <%x>\n"
  340. " time_stamp <%lx>\n"
  341. " jiffies <%lx>\n",
  342. tx_ring->queue_index,
  343. IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
  344. IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
  345. tx_ring->next_to_use, i,
  346. eop_desc, (eop_desc ? eop_desc->wb.status : 0),
  347. tx_ring->tx_buffer_info[i].time_stamp, jiffies);
  348. netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
  349. /* schedule immediate reset if we believe we hung */
  350. ixgbevf_tx_timeout_reset(adapter);
  351. return true;
  352. }
  353. #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
  354. if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
  355. (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
  356. /* Make sure that anybody stopping the queue after this
  357. * sees the new next_to_clean.
  358. */
  359. smp_mb();
  360. if (__netif_subqueue_stopped(tx_ring->netdev,
  361. tx_ring->queue_index) &&
  362. !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  363. netif_wake_subqueue(tx_ring->netdev,
  364. tx_ring->queue_index);
  365. ++tx_ring->tx_stats.restart_queue;
  366. }
  367. }
  368. return !!budget;
  369. }
  370. /**
  371. * ixgbevf_rx_skb - Helper function to determine proper Rx method
  372. * @q_vector: structure containing interrupt and ring information
  373. * @skb: packet to send up
  374. **/
  375. static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
  376. struct sk_buff *skb)
  377. {
  378. #ifdef CONFIG_NET_RX_BUSY_POLL
  379. skb_mark_napi_id(skb, &q_vector->napi);
  380. if (ixgbevf_qv_busy_polling(q_vector)) {
  381. netif_receive_skb(skb);
  382. /* exit early if we busy polled */
  383. return;
  384. }
  385. #endif /* CONFIG_NET_RX_BUSY_POLL */
  386. napi_gro_receive(&q_vector->napi, skb);
  387. }
  388. #define IXGBE_RSS_L4_TYPES_MASK \
  389. ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
  390. (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
  391. (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
  392. (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
  393. static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
  394. union ixgbe_adv_rx_desc *rx_desc,
  395. struct sk_buff *skb)
  396. {
  397. u16 rss_type;
  398. if (!(ring->netdev->features & NETIF_F_RXHASH))
  399. return;
  400. rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
  401. IXGBE_RXDADV_RSSTYPE_MASK;
  402. if (!rss_type)
  403. return;
  404. skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
  405. (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
  406. PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
  407. }
  408. /**
  409. * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
  410. * @ring: structure containig ring specific data
  411. * @rx_desc: current Rx descriptor being processed
  412. * @skb: skb currently being received and modified
  413. **/
  414. static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
  415. union ixgbe_adv_rx_desc *rx_desc,
  416. struct sk_buff *skb)
  417. {
  418. skb_checksum_none_assert(skb);
  419. /* Rx csum disabled */
  420. if (!(ring->netdev->features & NETIF_F_RXCSUM))
  421. return;
  422. /* if IP and error */
  423. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
  424. ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
  425. ring->rx_stats.csum_err++;
  426. return;
  427. }
  428. if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
  429. return;
  430. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
  431. ring->rx_stats.csum_err++;
  432. return;
  433. }
  434. /* It must be a TCP or UDP packet with a valid checksum */
  435. skb->ip_summed = CHECKSUM_UNNECESSARY;
  436. }
  437. /**
  438. * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
  439. * @rx_ring: rx descriptor ring packet is being transacted on
  440. * @rx_desc: pointer to the EOP Rx descriptor
  441. * @skb: pointer to current skb being populated
  442. *
  443. * This function checks the ring, descriptor, and packet information in
  444. * order to populate the checksum, VLAN, protocol, and other fields within
  445. * the skb.
  446. **/
  447. static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
  448. union ixgbe_adv_rx_desc *rx_desc,
  449. struct sk_buff *skb)
  450. {
  451. ixgbevf_rx_hash(rx_ring, rx_desc, skb);
  452. ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
  453. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
  454. u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
  455. unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
  456. if (test_bit(vid & VLAN_VID_MASK, active_vlans))
  457. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
  458. }
  459. skb->protocol = eth_type_trans(skb, rx_ring->netdev);
  460. }
  461. /**
  462. * ixgbevf_is_non_eop - process handling of non-EOP buffers
  463. * @rx_ring: Rx ring being processed
  464. * @rx_desc: Rx descriptor for current buffer
  465. * @skb: current socket buffer containing buffer in progress
  466. *
  467. * This function updates next to clean. If the buffer is an EOP buffer
  468. * this function exits returning false, otherwise it will place the
  469. * sk_buff in the next buffer to be chained and return true indicating
  470. * that this is in fact a non-EOP buffer.
  471. **/
  472. static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
  473. union ixgbe_adv_rx_desc *rx_desc)
  474. {
  475. u32 ntc = rx_ring->next_to_clean + 1;
  476. /* fetch, update, and store next to clean */
  477. ntc = (ntc < rx_ring->count) ? ntc : 0;
  478. rx_ring->next_to_clean = ntc;
  479. prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
  480. if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
  481. return false;
  482. return true;
  483. }
  484. static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
  485. struct ixgbevf_rx_buffer *bi)
  486. {
  487. struct page *page = bi->page;
  488. dma_addr_t dma = bi->dma;
  489. /* since we are recycling buffers we should seldom need to alloc */
  490. if (likely(page))
  491. return true;
  492. /* alloc new page for storage */
  493. page = dev_alloc_page();
  494. if (unlikely(!page)) {
  495. rx_ring->rx_stats.alloc_rx_page_failed++;
  496. return false;
  497. }
  498. /* map page for use */
  499. dma = dma_map_page(rx_ring->dev, page, 0,
  500. PAGE_SIZE, DMA_FROM_DEVICE);
  501. /* if mapping failed free memory back to system since
  502. * there isn't much point in holding memory we can't use
  503. */
  504. if (dma_mapping_error(rx_ring->dev, dma)) {
  505. __free_page(page);
  506. rx_ring->rx_stats.alloc_rx_buff_failed++;
  507. return false;
  508. }
  509. bi->dma = dma;
  510. bi->page = page;
  511. bi->page_offset = 0;
  512. return true;
  513. }
  514. /**
  515. * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
  516. * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
  517. * @cleaned_count: number of buffers to replace
  518. **/
  519. static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
  520. u16 cleaned_count)
  521. {
  522. union ixgbe_adv_rx_desc *rx_desc;
  523. struct ixgbevf_rx_buffer *bi;
  524. unsigned int i = rx_ring->next_to_use;
  525. /* nothing to do or no valid netdev defined */
  526. if (!cleaned_count || !rx_ring->netdev)
  527. return;
  528. rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
  529. bi = &rx_ring->rx_buffer_info[i];
  530. i -= rx_ring->count;
  531. do {
  532. if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
  533. break;
  534. /* Refresh the desc even if pkt_addr didn't change
  535. * because each write-back erases this info.
  536. */
  537. rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
  538. rx_desc++;
  539. bi++;
  540. i++;
  541. if (unlikely(!i)) {
  542. rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
  543. bi = rx_ring->rx_buffer_info;
  544. i -= rx_ring->count;
  545. }
  546. /* clear the hdr_addr for the next_to_use descriptor */
  547. rx_desc->read.hdr_addr = 0;
  548. cleaned_count--;
  549. } while (cleaned_count);
  550. i += rx_ring->count;
  551. if (rx_ring->next_to_use != i) {
  552. /* record the next descriptor to use */
  553. rx_ring->next_to_use = i;
  554. /* update next to alloc since we have filled the ring */
  555. rx_ring->next_to_alloc = i;
  556. /* Force memory writes to complete before letting h/w
  557. * know there are new descriptors to fetch. (Only
  558. * applicable for weak-ordered memory model archs,
  559. * such as IA-64).
  560. */
  561. wmb();
  562. ixgbevf_write_tail(rx_ring, i);
  563. }
  564. }
  565. /**
  566. * ixgbevf_cleanup_headers - Correct corrupted or empty headers
  567. * @rx_ring: rx descriptor ring packet is being transacted on
  568. * @rx_desc: pointer to the EOP Rx descriptor
  569. * @skb: pointer to current skb being fixed
  570. *
  571. * Check for corrupted packet headers caused by senders on the local L2
  572. * embedded NIC switch not setting up their Tx Descriptors right. These
  573. * should be very rare.
  574. *
  575. * Also address the case where we are pulling data in on pages only
  576. * and as such no data is present in the skb header.
  577. *
  578. * In addition if skb is not at least 60 bytes we need to pad it so that
  579. * it is large enough to qualify as a valid Ethernet frame.
  580. *
  581. * Returns true if an error was encountered and skb was freed.
  582. **/
  583. static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
  584. union ixgbe_adv_rx_desc *rx_desc,
  585. struct sk_buff *skb)
  586. {
  587. /* verify that the packet does not have any known errors */
  588. if (unlikely(ixgbevf_test_staterr(rx_desc,
  589. IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
  590. struct net_device *netdev = rx_ring->netdev;
  591. if (!(netdev->features & NETIF_F_RXALL)) {
  592. dev_kfree_skb_any(skb);
  593. return true;
  594. }
  595. }
  596. /* if eth_skb_pad returns an error the skb was freed */
  597. if (eth_skb_pad(skb))
  598. return true;
  599. return false;
  600. }
  601. /**
  602. * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
  603. * @rx_ring: rx descriptor ring to store buffers on
  604. * @old_buff: donor buffer to have page reused
  605. *
  606. * Synchronizes page for reuse by the adapter
  607. **/
  608. static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
  609. struct ixgbevf_rx_buffer *old_buff)
  610. {
  611. struct ixgbevf_rx_buffer *new_buff;
  612. u16 nta = rx_ring->next_to_alloc;
  613. new_buff = &rx_ring->rx_buffer_info[nta];
  614. /* update, and store next to alloc */
  615. nta++;
  616. rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
  617. /* transfer page from old buffer to new buffer */
  618. new_buff->page = old_buff->page;
  619. new_buff->dma = old_buff->dma;
  620. new_buff->page_offset = old_buff->page_offset;
  621. /* sync the buffer for use by the device */
  622. dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
  623. new_buff->page_offset,
  624. IXGBEVF_RX_BUFSZ,
  625. DMA_FROM_DEVICE);
  626. }
  627. static inline bool ixgbevf_page_is_reserved(struct page *page)
  628. {
  629. return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
  630. }
  631. /**
  632. * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
  633. * @rx_ring: rx descriptor ring to transact packets on
  634. * @rx_buffer: buffer containing page to add
  635. * @rx_desc: descriptor containing length of buffer written by hardware
  636. * @skb: sk_buff to place the data into
  637. *
  638. * This function will add the data contained in rx_buffer->page to the skb.
  639. * This is done either through a direct copy if the data in the buffer is
  640. * less than the skb header size, otherwise it will just attach the page as
  641. * a frag to the skb.
  642. *
  643. * The function will then update the page offset if necessary and return
  644. * true if the buffer can be reused by the adapter.
  645. **/
  646. static bool ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
  647. struct ixgbevf_rx_buffer *rx_buffer,
  648. union ixgbe_adv_rx_desc *rx_desc,
  649. struct sk_buff *skb)
  650. {
  651. struct page *page = rx_buffer->page;
  652. unsigned char *va = page_address(page) + rx_buffer->page_offset;
  653. unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
  654. #if (PAGE_SIZE < 8192)
  655. unsigned int truesize = IXGBEVF_RX_BUFSZ;
  656. #else
  657. unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
  658. #endif
  659. unsigned int pull_len;
  660. if (unlikely(skb_is_nonlinear(skb)))
  661. goto add_tail_frag;
  662. if (likely(size <= IXGBEVF_RX_HDR_SIZE)) {
  663. memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
  664. /* page is not reserved, we can reuse buffer as is */
  665. if (likely(!ixgbevf_page_is_reserved(page)))
  666. return true;
  667. /* this page cannot be reused so discard it */
  668. put_page(page);
  669. return false;
  670. }
  671. /* we need the header to contain the greater of either ETH_HLEN or
  672. * 60 bytes if the skb->len is less than 60 for skb_pad.
  673. */
  674. pull_len = eth_get_headlen(va, IXGBEVF_RX_HDR_SIZE);
  675. /* align pull length to size of long to optimize memcpy performance */
  676. memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
  677. /* update all of the pointers */
  678. va += pull_len;
  679. size -= pull_len;
  680. add_tail_frag:
  681. skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
  682. (unsigned long)va & ~PAGE_MASK, size, truesize);
  683. /* avoid re-using remote pages */
  684. if (unlikely(ixgbevf_page_is_reserved(page)))
  685. return false;
  686. #if (PAGE_SIZE < 8192)
  687. /* if we are only owner of page we can reuse it */
  688. if (unlikely(page_count(page) != 1))
  689. return false;
  690. /* flip page offset to other buffer */
  691. rx_buffer->page_offset ^= IXGBEVF_RX_BUFSZ;
  692. #else
  693. /* move offset up to the next cache line */
  694. rx_buffer->page_offset += truesize;
  695. if (rx_buffer->page_offset > (PAGE_SIZE - IXGBEVF_RX_BUFSZ))
  696. return false;
  697. #endif
  698. /* Even if we own the page, we are not allowed to use atomic_set()
  699. * This would break get_page_unless_zero() users.
  700. */
  701. page_ref_inc(page);
  702. return true;
  703. }
  704. static struct sk_buff *ixgbevf_fetch_rx_buffer(struct ixgbevf_ring *rx_ring,
  705. union ixgbe_adv_rx_desc *rx_desc,
  706. struct sk_buff *skb)
  707. {
  708. struct ixgbevf_rx_buffer *rx_buffer;
  709. struct page *page;
  710. rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
  711. page = rx_buffer->page;
  712. prefetchw(page);
  713. if (likely(!skb)) {
  714. void *page_addr = page_address(page) +
  715. rx_buffer->page_offset;
  716. /* prefetch first cache line of first page */
  717. prefetch(page_addr);
  718. #if L1_CACHE_BYTES < 128
  719. prefetch(page_addr + L1_CACHE_BYTES);
  720. #endif
  721. /* allocate a skb to store the frags */
  722. skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
  723. IXGBEVF_RX_HDR_SIZE);
  724. if (unlikely(!skb)) {
  725. rx_ring->rx_stats.alloc_rx_buff_failed++;
  726. return NULL;
  727. }
  728. /* we will be copying header into skb->data in
  729. * pskb_may_pull so it is in our interest to prefetch
  730. * it now to avoid a possible cache miss
  731. */
  732. prefetchw(skb->data);
  733. }
  734. /* we are reusing so sync this buffer for CPU use */
  735. dma_sync_single_range_for_cpu(rx_ring->dev,
  736. rx_buffer->dma,
  737. rx_buffer->page_offset,
  738. IXGBEVF_RX_BUFSZ,
  739. DMA_FROM_DEVICE);
  740. /* pull page into skb */
  741. if (ixgbevf_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
  742. /* hand second half of page back to the ring */
  743. ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
  744. } else {
  745. /* we are not reusing the buffer so unmap it */
  746. dma_unmap_page(rx_ring->dev, rx_buffer->dma,
  747. PAGE_SIZE, DMA_FROM_DEVICE);
  748. }
  749. /* clear contents of buffer_info */
  750. rx_buffer->dma = 0;
  751. rx_buffer->page = NULL;
  752. return skb;
  753. }
  754. static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
  755. u32 qmask)
  756. {
  757. struct ixgbe_hw *hw = &adapter->hw;
  758. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
  759. }
  760. static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
  761. struct ixgbevf_ring *rx_ring,
  762. int budget)
  763. {
  764. unsigned int total_rx_bytes = 0, total_rx_packets = 0;
  765. u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
  766. struct sk_buff *skb = rx_ring->skb;
  767. while (likely(total_rx_packets < budget)) {
  768. union ixgbe_adv_rx_desc *rx_desc;
  769. /* return some buffers to hardware, one at a time is too slow */
  770. if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
  771. ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
  772. cleaned_count = 0;
  773. }
  774. rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
  775. if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
  776. break;
  777. /* This memory barrier is needed to keep us from reading
  778. * any other fields out of the rx_desc until we know the
  779. * RXD_STAT_DD bit is set
  780. */
  781. rmb();
  782. /* retrieve a buffer from the ring */
  783. skb = ixgbevf_fetch_rx_buffer(rx_ring, rx_desc, skb);
  784. /* exit if we failed to retrieve a buffer */
  785. if (!skb)
  786. break;
  787. cleaned_count++;
  788. /* fetch next buffer in frame if non-eop */
  789. if (ixgbevf_is_non_eop(rx_ring, rx_desc))
  790. continue;
  791. /* verify the packet layout is correct */
  792. if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
  793. skb = NULL;
  794. continue;
  795. }
  796. /* probably a little skewed due to removing CRC */
  797. total_rx_bytes += skb->len;
  798. /* Workaround hardware that can't do proper VEPA multicast
  799. * source pruning.
  800. */
  801. if ((skb->pkt_type == PACKET_BROADCAST ||
  802. skb->pkt_type == PACKET_MULTICAST) &&
  803. ether_addr_equal(rx_ring->netdev->dev_addr,
  804. eth_hdr(skb)->h_source)) {
  805. dev_kfree_skb_irq(skb);
  806. continue;
  807. }
  808. /* populate checksum, VLAN, and protocol */
  809. ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
  810. ixgbevf_rx_skb(q_vector, skb);
  811. /* reset skb pointer */
  812. skb = NULL;
  813. /* update budget accounting */
  814. total_rx_packets++;
  815. }
  816. /* place incomplete frames back on ring for completion */
  817. rx_ring->skb = skb;
  818. u64_stats_update_begin(&rx_ring->syncp);
  819. rx_ring->stats.packets += total_rx_packets;
  820. rx_ring->stats.bytes += total_rx_bytes;
  821. u64_stats_update_end(&rx_ring->syncp);
  822. q_vector->rx.total_packets += total_rx_packets;
  823. q_vector->rx.total_bytes += total_rx_bytes;
  824. return total_rx_packets;
  825. }
  826. /**
  827. * ixgbevf_poll - NAPI polling calback
  828. * @napi: napi struct with our devices info in it
  829. * @budget: amount of work driver is allowed to do this pass, in packets
  830. *
  831. * This function will clean more than one or more rings associated with a
  832. * q_vector.
  833. **/
  834. static int ixgbevf_poll(struct napi_struct *napi, int budget)
  835. {
  836. struct ixgbevf_q_vector *q_vector =
  837. container_of(napi, struct ixgbevf_q_vector, napi);
  838. struct ixgbevf_adapter *adapter = q_vector->adapter;
  839. struct ixgbevf_ring *ring;
  840. int per_ring_budget, work_done = 0;
  841. bool clean_complete = true;
  842. ixgbevf_for_each_ring(ring, q_vector->tx) {
  843. if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
  844. clean_complete = false;
  845. }
  846. if (budget <= 0)
  847. return budget;
  848. #ifdef CONFIG_NET_RX_BUSY_POLL
  849. if (!ixgbevf_qv_lock_napi(q_vector))
  850. return budget;
  851. #endif
  852. /* attempt to distribute budget to each queue fairly, but don't allow
  853. * the budget to go below 1 because we'll exit polling
  854. */
  855. if (q_vector->rx.count > 1)
  856. per_ring_budget = max(budget/q_vector->rx.count, 1);
  857. else
  858. per_ring_budget = budget;
  859. ixgbevf_for_each_ring(ring, q_vector->rx) {
  860. int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
  861. per_ring_budget);
  862. work_done += cleaned;
  863. if (cleaned >= per_ring_budget)
  864. clean_complete = false;
  865. }
  866. #ifdef CONFIG_NET_RX_BUSY_POLL
  867. ixgbevf_qv_unlock_napi(q_vector);
  868. #endif
  869. /* If all work not completed, return budget and keep polling */
  870. if (!clean_complete)
  871. return budget;
  872. /* all work done, exit the polling mode */
  873. napi_complete_done(napi, work_done);
  874. if (adapter->rx_itr_setting == 1)
  875. ixgbevf_set_itr(q_vector);
  876. if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
  877. !test_bit(__IXGBEVF_REMOVING, &adapter->state))
  878. ixgbevf_irq_enable_queues(adapter,
  879. 1 << q_vector->v_idx);
  880. return 0;
  881. }
  882. /**
  883. * ixgbevf_write_eitr - write VTEITR register in hardware specific way
  884. * @q_vector: structure containing interrupt and ring information
  885. **/
  886. void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
  887. {
  888. struct ixgbevf_adapter *adapter = q_vector->adapter;
  889. struct ixgbe_hw *hw = &adapter->hw;
  890. int v_idx = q_vector->v_idx;
  891. u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
  892. /* set the WDIS bit to not clear the timer bits and cause an
  893. * immediate assertion of the interrupt
  894. */
  895. itr_reg |= IXGBE_EITR_CNT_WDIS;
  896. IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
  897. }
  898. #ifdef CONFIG_NET_RX_BUSY_POLL
  899. /* must be called with local_bh_disable()d */
  900. static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
  901. {
  902. struct ixgbevf_q_vector *q_vector =
  903. container_of(napi, struct ixgbevf_q_vector, napi);
  904. struct ixgbevf_adapter *adapter = q_vector->adapter;
  905. struct ixgbevf_ring *ring;
  906. int found = 0;
  907. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  908. return LL_FLUSH_FAILED;
  909. if (!ixgbevf_qv_lock_poll(q_vector))
  910. return LL_FLUSH_BUSY;
  911. ixgbevf_for_each_ring(ring, q_vector->rx) {
  912. found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
  913. #ifdef BP_EXTENDED_STATS
  914. if (found)
  915. ring->stats.cleaned += found;
  916. else
  917. ring->stats.misses++;
  918. #endif
  919. if (found)
  920. break;
  921. }
  922. ixgbevf_qv_unlock_poll(q_vector);
  923. return found;
  924. }
  925. #endif /* CONFIG_NET_RX_BUSY_POLL */
  926. /**
  927. * ixgbevf_configure_msix - Configure MSI-X hardware
  928. * @adapter: board private structure
  929. *
  930. * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
  931. * interrupts.
  932. **/
  933. static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
  934. {
  935. struct ixgbevf_q_vector *q_vector;
  936. int q_vectors, v_idx;
  937. q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  938. adapter->eims_enable_mask = 0;
  939. /* Populate the IVAR table and set the ITR values to the
  940. * corresponding register.
  941. */
  942. for (v_idx = 0; v_idx < q_vectors; v_idx++) {
  943. struct ixgbevf_ring *ring;
  944. q_vector = adapter->q_vector[v_idx];
  945. ixgbevf_for_each_ring(ring, q_vector->rx)
  946. ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
  947. ixgbevf_for_each_ring(ring, q_vector->tx)
  948. ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
  949. if (q_vector->tx.ring && !q_vector->rx.ring) {
  950. /* Tx only vector */
  951. if (adapter->tx_itr_setting == 1)
  952. q_vector->itr = IXGBE_12K_ITR;
  953. else
  954. q_vector->itr = adapter->tx_itr_setting;
  955. } else {
  956. /* Rx or Rx/Tx vector */
  957. if (adapter->rx_itr_setting == 1)
  958. q_vector->itr = IXGBE_20K_ITR;
  959. else
  960. q_vector->itr = adapter->rx_itr_setting;
  961. }
  962. /* add q_vector eims value to global eims_enable_mask */
  963. adapter->eims_enable_mask |= 1 << v_idx;
  964. ixgbevf_write_eitr(q_vector);
  965. }
  966. ixgbevf_set_ivar(adapter, -1, 1, v_idx);
  967. /* setup eims_other and add value to global eims_enable_mask */
  968. adapter->eims_other = 1 << v_idx;
  969. adapter->eims_enable_mask |= adapter->eims_other;
  970. }
  971. enum latency_range {
  972. lowest_latency = 0,
  973. low_latency = 1,
  974. bulk_latency = 2,
  975. latency_invalid = 255
  976. };
  977. /**
  978. * ixgbevf_update_itr - update the dynamic ITR value based on statistics
  979. * @q_vector: structure containing interrupt and ring information
  980. * @ring_container: structure containing ring performance data
  981. *
  982. * Stores a new ITR value based on packets and byte
  983. * counts during the last interrupt. The advantage of per interrupt
  984. * computation is faster updates and more accurate ITR for the current
  985. * traffic pattern. Constants in this function were computed
  986. * based on theoretical maximum wire speed and thresholds were set based
  987. * on testing data as well as attempting to minimize response time
  988. * while increasing bulk throughput.
  989. **/
  990. static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
  991. struct ixgbevf_ring_container *ring_container)
  992. {
  993. int bytes = ring_container->total_bytes;
  994. int packets = ring_container->total_packets;
  995. u32 timepassed_us;
  996. u64 bytes_perint;
  997. u8 itr_setting = ring_container->itr;
  998. if (packets == 0)
  999. return;
  1000. /* simple throttle rate management
  1001. * 0-20MB/s lowest (100000 ints/s)
  1002. * 20-100MB/s low (20000 ints/s)
  1003. * 100-1249MB/s bulk (12000 ints/s)
  1004. */
  1005. /* what was last interrupt timeslice? */
  1006. timepassed_us = q_vector->itr >> 2;
  1007. bytes_perint = bytes / timepassed_us; /* bytes/usec */
  1008. switch (itr_setting) {
  1009. case lowest_latency:
  1010. if (bytes_perint > 10)
  1011. itr_setting = low_latency;
  1012. break;
  1013. case low_latency:
  1014. if (bytes_perint > 20)
  1015. itr_setting = bulk_latency;
  1016. else if (bytes_perint <= 10)
  1017. itr_setting = lowest_latency;
  1018. break;
  1019. case bulk_latency:
  1020. if (bytes_perint <= 20)
  1021. itr_setting = low_latency;
  1022. break;
  1023. }
  1024. /* clear work counters since we have the values we need */
  1025. ring_container->total_bytes = 0;
  1026. ring_container->total_packets = 0;
  1027. /* write updated itr to ring container */
  1028. ring_container->itr = itr_setting;
  1029. }
  1030. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
  1031. {
  1032. u32 new_itr = q_vector->itr;
  1033. u8 current_itr;
  1034. ixgbevf_update_itr(q_vector, &q_vector->tx);
  1035. ixgbevf_update_itr(q_vector, &q_vector->rx);
  1036. current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
  1037. switch (current_itr) {
  1038. /* counts and packets in update_itr are dependent on these numbers */
  1039. case lowest_latency:
  1040. new_itr = IXGBE_100K_ITR;
  1041. break;
  1042. case low_latency:
  1043. new_itr = IXGBE_20K_ITR;
  1044. break;
  1045. case bulk_latency:
  1046. new_itr = IXGBE_12K_ITR;
  1047. break;
  1048. default:
  1049. break;
  1050. }
  1051. if (new_itr != q_vector->itr) {
  1052. /* do an exponential smoothing */
  1053. new_itr = (10 * new_itr * q_vector->itr) /
  1054. ((9 * new_itr) + q_vector->itr);
  1055. /* save the algorithm value here */
  1056. q_vector->itr = new_itr;
  1057. ixgbevf_write_eitr(q_vector);
  1058. }
  1059. }
  1060. static irqreturn_t ixgbevf_msix_other(int irq, void *data)
  1061. {
  1062. struct ixgbevf_adapter *adapter = data;
  1063. struct ixgbe_hw *hw = &adapter->hw;
  1064. hw->mac.get_link_status = 1;
  1065. ixgbevf_service_event_schedule(adapter);
  1066. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
  1067. return IRQ_HANDLED;
  1068. }
  1069. /**
  1070. * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
  1071. * @irq: unused
  1072. * @data: pointer to our q_vector struct for this interrupt vector
  1073. **/
  1074. static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
  1075. {
  1076. struct ixgbevf_q_vector *q_vector = data;
  1077. /* EIAM disabled interrupts (on this vector) for us */
  1078. if (q_vector->rx.ring || q_vector->tx.ring)
  1079. napi_schedule_irqoff(&q_vector->napi);
  1080. return IRQ_HANDLED;
  1081. }
  1082. static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
  1083. int r_idx)
  1084. {
  1085. struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
  1086. a->rx_ring[r_idx]->next = q_vector->rx.ring;
  1087. q_vector->rx.ring = a->rx_ring[r_idx];
  1088. q_vector->rx.count++;
  1089. }
  1090. static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
  1091. int t_idx)
  1092. {
  1093. struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
  1094. a->tx_ring[t_idx]->next = q_vector->tx.ring;
  1095. q_vector->tx.ring = a->tx_ring[t_idx];
  1096. q_vector->tx.count++;
  1097. }
  1098. /**
  1099. * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
  1100. * @adapter: board private structure to initialize
  1101. *
  1102. * This function maps descriptor rings to the queue-specific vectors
  1103. * we were allotted through the MSI-X enabling code. Ideally, we'd have
  1104. * one vector per ring/queue, but on a constrained vector budget, we
  1105. * group the rings as "efficiently" as possible. You would add new
  1106. * mapping configurations in here.
  1107. **/
  1108. static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
  1109. {
  1110. int q_vectors;
  1111. int v_start = 0;
  1112. int rxr_idx = 0, txr_idx = 0;
  1113. int rxr_remaining = adapter->num_rx_queues;
  1114. int txr_remaining = adapter->num_tx_queues;
  1115. int i, j;
  1116. int rqpv, tqpv;
  1117. q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1118. /* The ideal configuration...
  1119. * We have enough vectors to map one per queue.
  1120. */
  1121. if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
  1122. for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
  1123. map_vector_to_rxq(adapter, v_start, rxr_idx);
  1124. for (; txr_idx < txr_remaining; v_start++, txr_idx++)
  1125. map_vector_to_txq(adapter, v_start, txr_idx);
  1126. return 0;
  1127. }
  1128. /* If we don't have enough vectors for a 1-to-1
  1129. * mapping, we'll have to group them so there are
  1130. * multiple queues per vector.
  1131. */
  1132. /* Re-adjusting *qpv takes care of the remainder. */
  1133. for (i = v_start; i < q_vectors; i++) {
  1134. rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
  1135. for (j = 0; j < rqpv; j++) {
  1136. map_vector_to_rxq(adapter, i, rxr_idx);
  1137. rxr_idx++;
  1138. rxr_remaining--;
  1139. }
  1140. }
  1141. for (i = v_start; i < q_vectors; i++) {
  1142. tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
  1143. for (j = 0; j < tqpv; j++) {
  1144. map_vector_to_txq(adapter, i, txr_idx);
  1145. txr_idx++;
  1146. txr_remaining--;
  1147. }
  1148. }
  1149. return 0;
  1150. }
  1151. /**
  1152. * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
  1153. * @adapter: board private structure
  1154. *
  1155. * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
  1156. * interrupts from the kernel.
  1157. **/
  1158. static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
  1159. {
  1160. struct net_device *netdev = adapter->netdev;
  1161. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1162. int vector, err;
  1163. int ri = 0, ti = 0;
  1164. for (vector = 0; vector < q_vectors; vector++) {
  1165. struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
  1166. struct msix_entry *entry = &adapter->msix_entries[vector];
  1167. if (q_vector->tx.ring && q_vector->rx.ring) {
  1168. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  1169. "%s-%s-%d", netdev->name, "TxRx", ri++);
  1170. ti++;
  1171. } else if (q_vector->rx.ring) {
  1172. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  1173. "%s-%s-%d", netdev->name, "rx", ri++);
  1174. } else if (q_vector->tx.ring) {
  1175. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  1176. "%s-%s-%d", netdev->name, "tx", ti++);
  1177. } else {
  1178. /* skip this unused q_vector */
  1179. continue;
  1180. }
  1181. err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
  1182. q_vector->name, q_vector);
  1183. if (err) {
  1184. hw_dbg(&adapter->hw,
  1185. "request_irq failed for MSIX interrupt Error: %d\n",
  1186. err);
  1187. goto free_queue_irqs;
  1188. }
  1189. }
  1190. err = request_irq(adapter->msix_entries[vector].vector,
  1191. &ixgbevf_msix_other, 0, netdev->name, adapter);
  1192. if (err) {
  1193. hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
  1194. err);
  1195. goto free_queue_irqs;
  1196. }
  1197. return 0;
  1198. free_queue_irqs:
  1199. while (vector) {
  1200. vector--;
  1201. free_irq(adapter->msix_entries[vector].vector,
  1202. adapter->q_vector[vector]);
  1203. }
  1204. /* This failure is non-recoverable - it indicates the system is
  1205. * out of MSIX vector resources and the VF driver cannot run
  1206. * without them. Set the number of msix vectors to zero
  1207. * indicating that not enough can be allocated. The error
  1208. * will be returned to the user indicating device open failed.
  1209. * Any further attempts to force the driver to open will also
  1210. * fail. The only way to recover is to unload the driver and
  1211. * reload it again. If the system has recovered some MSIX
  1212. * vectors then it may succeed.
  1213. */
  1214. adapter->num_msix_vectors = 0;
  1215. return err;
  1216. }
  1217. static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
  1218. {
  1219. int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1220. for (i = 0; i < q_vectors; i++) {
  1221. struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
  1222. q_vector->rx.ring = NULL;
  1223. q_vector->tx.ring = NULL;
  1224. q_vector->rx.count = 0;
  1225. q_vector->tx.count = 0;
  1226. }
  1227. }
  1228. /**
  1229. * ixgbevf_request_irq - initialize interrupts
  1230. * @adapter: board private structure
  1231. *
  1232. * Attempts to configure interrupts using the best available
  1233. * capabilities of the hardware and kernel.
  1234. **/
  1235. static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
  1236. {
  1237. int err = ixgbevf_request_msix_irqs(adapter);
  1238. if (err)
  1239. hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
  1240. return err;
  1241. }
  1242. static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
  1243. {
  1244. int i, q_vectors;
  1245. q_vectors = adapter->num_msix_vectors;
  1246. i = q_vectors - 1;
  1247. free_irq(adapter->msix_entries[i].vector, adapter);
  1248. i--;
  1249. for (; i >= 0; i--) {
  1250. /* free only the irqs that were actually requested */
  1251. if (!adapter->q_vector[i]->rx.ring &&
  1252. !adapter->q_vector[i]->tx.ring)
  1253. continue;
  1254. free_irq(adapter->msix_entries[i].vector,
  1255. adapter->q_vector[i]);
  1256. }
  1257. ixgbevf_reset_q_vectors(adapter);
  1258. }
  1259. /**
  1260. * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
  1261. * @adapter: board private structure
  1262. **/
  1263. static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
  1264. {
  1265. struct ixgbe_hw *hw = &adapter->hw;
  1266. int i;
  1267. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
  1268. IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
  1269. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
  1270. IXGBE_WRITE_FLUSH(hw);
  1271. for (i = 0; i < adapter->num_msix_vectors; i++)
  1272. synchronize_irq(adapter->msix_entries[i].vector);
  1273. }
  1274. /**
  1275. * ixgbevf_irq_enable - Enable default interrupt generation settings
  1276. * @adapter: board private structure
  1277. **/
  1278. static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
  1279. {
  1280. struct ixgbe_hw *hw = &adapter->hw;
  1281. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
  1282. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
  1283. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
  1284. }
  1285. /**
  1286. * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
  1287. * @adapter: board private structure
  1288. * @ring: structure containing ring specific data
  1289. *
  1290. * Configure the Tx descriptor ring after a reset.
  1291. **/
  1292. static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
  1293. struct ixgbevf_ring *ring)
  1294. {
  1295. struct ixgbe_hw *hw = &adapter->hw;
  1296. u64 tdba = ring->dma;
  1297. int wait_loop = 10;
  1298. u32 txdctl = IXGBE_TXDCTL_ENABLE;
  1299. u8 reg_idx = ring->reg_idx;
  1300. /* disable queue to avoid issues while updating state */
  1301. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
  1302. IXGBE_WRITE_FLUSH(hw);
  1303. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
  1304. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
  1305. IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
  1306. ring->count * sizeof(union ixgbe_adv_tx_desc));
  1307. /* disable head writeback */
  1308. IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
  1309. IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
  1310. /* enable relaxed ordering */
  1311. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
  1312. (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
  1313. IXGBE_DCA_TXCTRL_DATA_RRO_EN));
  1314. /* reset head and tail pointers */
  1315. IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
  1316. IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
  1317. ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
  1318. /* reset ntu and ntc to place SW in sync with hardwdare */
  1319. ring->next_to_clean = 0;
  1320. ring->next_to_use = 0;
  1321. /* In order to avoid issues WTHRESH + PTHRESH should always be equal
  1322. * to or less than the number of on chip descriptors, which is
  1323. * currently 40.
  1324. */
  1325. txdctl |= (8 << 16); /* WTHRESH = 8 */
  1326. /* Setting PTHRESH to 32 both improves performance */
  1327. txdctl |= (1 << 8) | /* HTHRESH = 1 */
  1328. 32; /* PTHRESH = 32 */
  1329. clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
  1330. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
  1331. /* poll to verify queue is enabled */
  1332. do {
  1333. usleep_range(1000, 2000);
  1334. txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
  1335. } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
  1336. if (!wait_loop)
  1337. pr_err("Could not enable Tx Queue %d\n", reg_idx);
  1338. }
  1339. /**
  1340. * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
  1341. * @adapter: board private structure
  1342. *
  1343. * Configure the Tx unit of the MAC after a reset.
  1344. **/
  1345. static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
  1346. {
  1347. u32 i;
  1348. /* Setup the HW Tx Head and Tail descriptor pointers */
  1349. for (i = 0; i < adapter->num_tx_queues; i++)
  1350. ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
  1351. }
  1352. #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
  1353. static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
  1354. {
  1355. struct ixgbe_hw *hw = &adapter->hw;
  1356. u32 srrctl;
  1357. srrctl = IXGBE_SRRCTL_DROP_EN;
  1358. srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
  1359. srrctl |= IXGBEVF_RX_BUFSZ >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
  1360. srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
  1361. IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
  1362. }
  1363. static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
  1364. {
  1365. struct ixgbe_hw *hw = &adapter->hw;
  1366. /* PSRTYPE must be initialized in 82599 */
  1367. u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
  1368. IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
  1369. IXGBE_PSRTYPE_L2HDR;
  1370. if (adapter->num_rx_queues > 1)
  1371. psrtype |= 1 << 29;
  1372. IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
  1373. }
  1374. #define IXGBEVF_MAX_RX_DESC_POLL 10
  1375. static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
  1376. struct ixgbevf_ring *ring)
  1377. {
  1378. struct ixgbe_hw *hw = &adapter->hw;
  1379. int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
  1380. u32 rxdctl;
  1381. u8 reg_idx = ring->reg_idx;
  1382. if (IXGBE_REMOVED(hw->hw_addr))
  1383. return;
  1384. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1385. rxdctl &= ~IXGBE_RXDCTL_ENABLE;
  1386. /* write value back with RXDCTL.ENABLE bit cleared */
  1387. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
  1388. /* the hardware may take up to 100us to really disable the Rx queue */
  1389. do {
  1390. udelay(10);
  1391. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1392. } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
  1393. if (!wait_loop)
  1394. pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
  1395. reg_idx);
  1396. }
  1397. static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
  1398. struct ixgbevf_ring *ring)
  1399. {
  1400. struct ixgbe_hw *hw = &adapter->hw;
  1401. int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
  1402. u32 rxdctl;
  1403. u8 reg_idx = ring->reg_idx;
  1404. if (IXGBE_REMOVED(hw->hw_addr))
  1405. return;
  1406. do {
  1407. usleep_range(1000, 2000);
  1408. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1409. } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
  1410. if (!wait_loop)
  1411. pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
  1412. reg_idx);
  1413. }
  1414. static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
  1415. {
  1416. struct ixgbe_hw *hw = &adapter->hw;
  1417. u32 vfmrqc = 0, vfreta = 0;
  1418. u16 rss_i = adapter->num_rx_queues;
  1419. u8 i, j;
  1420. /* Fill out hash function seeds */
  1421. netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
  1422. for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
  1423. IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), adapter->rss_key[i]);
  1424. for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
  1425. if (j == rss_i)
  1426. j = 0;
  1427. adapter->rss_indir_tbl[i] = j;
  1428. vfreta |= j << (i & 0x3) * 8;
  1429. if ((i & 3) == 3) {
  1430. IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
  1431. vfreta = 0;
  1432. }
  1433. }
  1434. /* Perform hash on these packet types */
  1435. vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
  1436. IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
  1437. IXGBE_VFMRQC_RSS_FIELD_IPV6 |
  1438. IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
  1439. vfmrqc |= IXGBE_VFMRQC_RSSEN;
  1440. IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
  1441. }
  1442. static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
  1443. struct ixgbevf_ring *ring)
  1444. {
  1445. struct ixgbe_hw *hw = &adapter->hw;
  1446. u64 rdba = ring->dma;
  1447. u32 rxdctl;
  1448. u8 reg_idx = ring->reg_idx;
  1449. /* disable queue to avoid issues while updating state */
  1450. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1451. ixgbevf_disable_rx_queue(adapter, ring);
  1452. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
  1453. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
  1454. IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
  1455. ring->count * sizeof(union ixgbe_adv_rx_desc));
  1456. /* enable relaxed ordering */
  1457. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
  1458. IXGBE_DCA_RXCTRL_DESC_RRO_EN);
  1459. /* reset head and tail pointers */
  1460. IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
  1461. IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
  1462. ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
  1463. /* reset ntu and ntc to place SW in sync with hardwdare */
  1464. ring->next_to_clean = 0;
  1465. ring->next_to_use = 0;
  1466. ring->next_to_alloc = 0;
  1467. ixgbevf_configure_srrctl(adapter, reg_idx);
  1468. /* allow any size packet since we can handle overflow */
  1469. rxdctl &= ~IXGBE_RXDCTL_RLPML_EN;
  1470. rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
  1471. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
  1472. ixgbevf_rx_desc_queue_enable(adapter, ring);
  1473. ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
  1474. }
  1475. /**
  1476. * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
  1477. * @adapter: board private structure
  1478. *
  1479. * Configure the Rx unit of the MAC after a reset.
  1480. **/
  1481. static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
  1482. {
  1483. int i;
  1484. struct ixgbe_hw *hw = &adapter->hw;
  1485. struct net_device *netdev = adapter->netdev;
  1486. ixgbevf_setup_psrtype(adapter);
  1487. if (hw->mac.type >= ixgbe_mac_X550_vf)
  1488. ixgbevf_setup_vfmrqc(adapter);
  1489. /* notify the PF of our intent to use this size of frame */
  1490. ixgbevf_rlpml_set_vf(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
  1491. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1492. * the Base and Length of the Rx Descriptor Ring
  1493. */
  1494. for (i = 0; i < adapter->num_rx_queues; i++)
  1495. ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
  1496. }
  1497. static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
  1498. __be16 proto, u16 vid)
  1499. {
  1500. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1501. struct ixgbe_hw *hw = &adapter->hw;
  1502. int err;
  1503. spin_lock_bh(&adapter->mbx_lock);
  1504. /* add VID to filter table */
  1505. err = hw->mac.ops.set_vfta(hw, vid, 0, true);
  1506. spin_unlock_bh(&adapter->mbx_lock);
  1507. /* translate error return types so error makes sense */
  1508. if (err == IXGBE_ERR_MBX)
  1509. return -EIO;
  1510. if (err == IXGBE_ERR_INVALID_ARGUMENT)
  1511. return -EACCES;
  1512. set_bit(vid, adapter->active_vlans);
  1513. return err;
  1514. }
  1515. static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
  1516. __be16 proto, u16 vid)
  1517. {
  1518. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1519. struct ixgbe_hw *hw = &adapter->hw;
  1520. int err;
  1521. spin_lock_bh(&adapter->mbx_lock);
  1522. /* remove VID from filter table */
  1523. err = hw->mac.ops.set_vfta(hw, vid, 0, false);
  1524. spin_unlock_bh(&adapter->mbx_lock);
  1525. clear_bit(vid, adapter->active_vlans);
  1526. return err;
  1527. }
  1528. static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
  1529. {
  1530. u16 vid;
  1531. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  1532. ixgbevf_vlan_rx_add_vid(adapter->netdev,
  1533. htons(ETH_P_8021Q), vid);
  1534. }
  1535. static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
  1536. {
  1537. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1538. struct ixgbe_hw *hw = &adapter->hw;
  1539. int count = 0;
  1540. if ((netdev_uc_count(netdev)) > 10) {
  1541. pr_err("Too many unicast filters - No Space\n");
  1542. return -ENOSPC;
  1543. }
  1544. if (!netdev_uc_empty(netdev)) {
  1545. struct netdev_hw_addr *ha;
  1546. netdev_for_each_uc_addr(ha, netdev) {
  1547. hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
  1548. udelay(200);
  1549. }
  1550. } else {
  1551. /* If the list is empty then send message to PF driver to
  1552. * clear all MAC VLANs on this VF.
  1553. */
  1554. hw->mac.ops.set_uc_addr(hw, 0, NULL);
  1555. }
  1556. return count;
  1557. }
  1558. /**
  1559. * ixgbevf_set_rx_mode - Multicast and unicast set
  1560. * @netdev: network interface device structure
  1561. *
  1562. * The set_rx_method entry point is called whenever the multicast address
  1563. * list, unicast address list or the network interface flags are updated.
  1564. * This routine is responsible for configuring the hardware for proper
  1565. * multicast mode and configuring requested unicast filters.
  1566. **/
  1567. static void ixgbevf_set_rx_mode(struct net_device *netdev)
  1568. {
  1569. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1570. struct ixgbe_hw *hw = &adapter->hw;
  1571. unsigned int flags = netdev->flags;
  1572. int xcast_mode;
  1573. xcast_mode = (flags & IFF_ALLMULTI) ? IXGBEVF_XCAST_MODE_ALLMULTI :
  1574. (flags & (IFF_BROADCAST | IFF_MULTICAST)) ?
  1575. IXGBEVF_XCAST_MODE_MULTI : IXGBEVF_XCAST_MODE_NONE;
  1576. spin_lock_bh(&adapter->mbx_lock);
  1577. hw->mac.ops.update_xcast_mode(hw, netdev, xcast_mode);
  1578. /* reprogram multicast list */
  1579. hw->mac.ops.update_mc_addr_list(hw, netdev);
  1580. ixgbevf_write_uc_addr_list(netdev);
  1581. spin_unlock_bh(&adapter->mbx_lock);
  1582. }
  1583. static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
  1584. {
  1585. int q_idx;
  1586. struct ixgbevf_q_vector *q_vector;
  1587. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1588. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1589. q_vector = adapter->q_vector[q_idx];
  1590. #ifdef CONFIG_NET_RX_BUSY_POLL
  1591. ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
  1592. #endif
  1593. napi_enable(&q_vector->napi);
  1594. }
  1595. }
  1596. static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
  1597. {
  1598. int q_idx;
  1599. struct ixgbevf_q_vector *q_vector;
  1600. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1601. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1602. q_vector = adapter->q_vector[q_idx];
  1603. napi_disable(&q_vector->napi);
  1604. #ifdef CONFIG_NET_RX_BUSY_POLL
  1605. while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
  1606. pr_info("QV %d locked\n", q_idx);
  1607. usleep_range(1000, 20000);
  1608. }
  1609. #endif /* CONFIG_NET_RX_BUSY_POLL */
  1610. }
  1611. }
  1612. static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
  1613. {
  1614. struct ixgbe_hw *hw = &adapter->hw;
  1615. unsigned int def_q = 0;
  1616. unsigned int num_tcs = 0;
  1617. unsigned int num_rx_queues = adapter->num_rx_queues;
  1618. unsigned int num_tx_queues = adapter->num_tx_queues;
  1619. int err;
  1620. spin_lock_bh(&adapter->mbx_lock);
  1621. /* fetch queue configuration from the PF */
  1622. err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
  1623. spin_unlock_bh(&adapter->mbx_lock);
  1624. if (err)
  1625. return err;
  1626. if (num_tcs > 1) {
  1627. /* we need only one Tx queue */
  1628. num_tx_queues = 1;
  1629. /* update default Tx ring register index */
  1630. adapter->tx_ring[0]->reg_idx = def_q;
  1631. /* we need as many queues as traffic classes */
  1632. num_rx_queues = num_tcs;
  1633. }
  1634. /* if we have a bad config abort request queue reset */
  1635. if ((adapter->num_rx_queues != num_rx_queues) ||
  1636. (adapter->num_tx_queues != num_tx_queues)) {
  1637. /* force mailbox timeout to prevent further messages */
  1638. hw->mbx.timeout = 0;
  1639. /* wait for watchdog to come around and bail us out */
  1640. set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
  1641. }
  1642. return 0;
  1643. }
  1644. static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
  1645. {
  1646. ixgbevf_configure_dcb(adapter);
  1647. ixgbevf_set_rx_mode(adapter->netdev);
  1648. ixgbevf_restore_vlan(adapter);
  1649. ixgbevf_configure_tx(adapter);
  1650. ixgbevf_configure_rx(adapter);
  1651. }
  1652. static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
  1653. {
  1654. /* Only save pre-reset stats if there are some */
  1655. if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
  1656. adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
  1657. adapter->stats.base_vfgprc;
  1658. adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
  1659. adapter->stats.base_vfgptc;
  1660. adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
  1661. adapter->stats.base_vfgorc;
  1662. adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
  1663. adapter->stats.base_vfgotc;
  1664. adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
  1665. adapter->stats.base_vfmprc;
  1666. }
  1667. }
  1668. static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
  1669. {
  1670. struct ixgbe_hw *hw = &adapter->hw;
  1671. adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
  1672. adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
  1673. adapter->stats.last_vfgorc |=
  1674. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
  1675. adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
  1676. adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
  1677. adapter->stats.last_vfgotc |=
  1678. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
  1679. adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
  1680. adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
  1681. adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
  1682. adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
  1683. adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
  1684. adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
  1685. }
  1686. static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
  1687. {
  1688. struct ixgbe_hw *hw = &adapter->hw;
  1689. int api[] = { ixgbe_mbox_api_12,
  1690. ixgbe_mbox_api_11,
  1691. ixgbe_mbox_api_10,
  1692. ixgbe_mbox_api_unknown };
  1693. int err, idx = 0;
  1694. spin_lock_bh(&adapter->mbx_lock);
  1695. while (api[idx] != ixgbe_mbox_api_unknown) {
  1696. err = ixgbevf_negotiate_api_version(hw, api[idx]);
  1697. if (!err)
  1698. break;
  1699. idx++;
  1700. }
  1701. spin_unlock_bh(&adapter->mbx_lock);
  1702. }
  1703. static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
  1704. {
  1705. struct net_device *netdev = adapter->netdev;
  1706. struct ixgbe_hw *hw = &adapter->hw;
  1707. ixgbevf_configure_msix(adapter);
  1708. spin_lock_bh(&adapter->mbx_lock);
  1709. if (is_valid_ether_addr(hw->mac.addr))
  1710. hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
  1711. else
  1712. hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
  1713. spin_unlock_bh(&adapter->mbx_lock);
  1714. smp_mb__before_atomic();
  1715. clear_bit(__IXGBEVF_DOWN, &adapter->state);
  1716. ixgbevf_napi_enable_all(adapter);
  1717. /* clear any pending interrupts, may auto mask */
  1718. IXGBE_READ_REG(hw, IXGBE_VTEICR);
  1719. ixgbevf_irq_enable(adapter);
  1720. /* enable transmits */
  1721. netif_tx_start_all_queues(netdev);
  1722. ixgbevf_save_reset_stats(adapter);
  1723. ixgbevf_init_last_counter_stats(adapter);
  1724. hw->mac.get_link_status = 1;
  1725. mod_timer(&adapter->service_timer, jiffies);
  1726. }
  1727. void ixgbevf_up(struct ixgbevf_adapter *adapter)
  1728. {
  1729. ixgbevf_configure(adapter);
  1730. ixgbevf_up_complete(adapter);
  1731. }
  1732. /**
  1733. * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
  1734. * @rx_ring: ring to free buffers from
  1735. **/
  1736. static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
  1737. {
  1738. struct device *dev = rx_ring->dev;
  1739. unsigned long size;
  1740. unsigned int i;
  1741. /* Free Rx ring sk_buff */
  1742. if (rx_ring->skb) {
  1743. dev_kfree_skb(rx_ring->skb);
  1744. rx_ring->skb = NULL;
  1745. }
  1746. /* ring already cleared, nothing to do */
  1747. if (!rx_ring->rx_buffer_info)
  1748. return;
  1749. /* Free all the Rx ring pages */
  1750. for (i = 0; i < rx_ring->count; i++) {
  1751. struct ixgbevf_rx_buffer *rx_buffer;
  1752. rx_buffer = &rx_ring->rx_buffer_info[i];
  1753. if (rx_buffer->dma)
  1754. dma_unmap_page(dev, rx_buffer->dma,
  1755. PAGE_SIZE, DMA_FROM_DEVICE);
  1756. rx_buffer->dma = 0;
  1757. if (rx_buffer->page)
  1758. __free_page(rx_buffer->page);
  1759. rx_buffer->page = NULL;
  1760. }
  1761. size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
  1762. memset(rx_ring->rx_buffer_info, 0, size);
  1763. /* Zero out the descriptor ring */
  1764. memset(rx_ring->desc, 0, rx_ring->size);
  1765. }
  1766. /**
  1767. * ixgbevf_clean_tx_ring - Free Tx Buffers
  1768. * @tx_ring: ring to be cleaned
  1769. **/
  1770. static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
  1771. {
  1772. struct ixgbevf_tx_buffer *tx_buffer_info;
  1773. unsigned long size;
  1774. unsigned int i;
  1775. if (!tx_ring->tx_buffer_info)
  1776. return;
  1777. /* Free all the Tx ring sk_buffs */
  1778. for (i = 0; i < tx_ring->count; i++) {
  1779. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  1780. ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
  1781. }
  1782. size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
  1783. memset(tx_ring->tx_buffer_info, 0, size);
  1784. memset(tx_ring->desc, 0, tx_ring->size);
  1785. }
  1786. /**
  1787. * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
  1788. * @adapter: board private structure
  1789. **/
  1790. static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
  1791. {
  1792. int i;
  1793. for (i = 0; i < adapter->num_rx_queues; i++)
  1794. ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
  1795. }
  1796. /**
  1797. * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
  1798. * @adapter: board private structure
  1799. **/
  1800. static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
  1801. {
  1802. int i;
  1803. for (i = 0; i < adapter->num_tx_queues; i++)
  1804. ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
  1805. }
  1806. void ixgbevf_down(struct ixgbevf_adapter *adapter)
  1807. {
  1808. struct net_device *netdev = adapter->netdev;
  1809. struct ixgbe_hw *hw = &adapter->hw;
  1810. int i;
  1811. /* signal that we are down to the interrupt handler */
  1812. if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
  1813. return; /* do nothing if already down */
  1814. /* disable all enabled Rx queues */
  1815. for (i = 0; i < adapter->num_rx_queues; i++)
  1816. ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
  1817. usleep_range(10000, 20000);
  1818. netif_tx_stop_all_queues(netdev);
  1819. /* call carrier off first to avoid false dev_watchdog timeouts */
  1820. netif_carrier_off(netdev);
  1821. netif_tx_disable(netdev);
  1822. ixgbevf_irq_disable(adapter);
  1823. ixgbevf_napi_disable_all(adapter);
  1824. del_timer_sync(&adapter->service_timer);
  1825. /* disable transmits in the hardware now that interrupts are off */
  1826. for (i = 0; i < adapter->num_tx_queues; i++) {
  1827. u8 reg_idx = adapter->tx_ring[i]->reg_idx;
  1828. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
  1829. IXGBE_TXDCTL_SWFLSH);
  1830. }
  1831. if (!pci_channel_offline(adapter->pdev))
  1832. ixgbevf_reset(adapter);
  1833. ixgbevf_clean_all_tx_rings(adapter);
  1834. ixgbevf_clean_all_rx_rings(adapter);
  1835. }
  1836. void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
  1837. {
  1838. WARN_ON(in_interrupt());
  1839. while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
  1840. msleep(1);
  1841. ixgbevf_down(adapter);
  1842. ixgbevf_up(adapter);
  1843. clear_bit(__IXGBEVF_RESETTING, &adapter->state);
  1844. }
  1845. void ixgbevf_reset(struct ixgbevf_adapter *adapter)
  1846. {
  1847. struct ixgbe_hw *hw = &adapter->hw;
  1848. struct net_device *netdev = adapter->netdev;
  1849. if (hw->mac.ops.reset_hw(hw)) {
  1850. hw_dbg(hw, "PF still resetting\n");
  1851. } else {
  1852. hw->mac.ops.init_hw(hw);
  1853. ixgbevf_negotiate_api(adapter);
  1854. }
  1855. if (is_valid_ether_addr(adapter->hw.mac.addr)) {
  1856. ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
  1857. ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
  1858. }
  1859. adapter->last_reset = jiffies;
  1860. }
  1861. static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
  1862. int vectors)
  1863. {
  1864. int vector_threshold;
  1865. /* We'll want at least 2 (vector_threshold):
  1866. * 1) TxQ[0] + RxQ[0] handler
  1867. * 2) Other (Link Status Change, etc.)
  1868. */
  1869. vector_threshold = MIN_MSIX_COUNT;
  1870. /* The more we get, the more we will assign to Tx/Rx Cleanup
  1871. * for the separate queues...where Rx Cleanup >= Tx Cleanup.
  1872. * Right now, we simply care about how many we'll get; we'll
  1873. * set them up later while requesting irq's.
  1874. */
  1875. vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
  1876. vector_threshold, vectors);
  1877. if (vectors < 0) {
  1878. dev_err(&adapter->pdev->dev,
  1879. "Unable to allocate MSI-X interrupts\n");
  1880. kfree(adapter->msix_entries);
  1881. adapter->msix_entries = NULL;
  1882. return vectors;
  1883. }
  1884. /* Adjust for only the vectors we'll use, which is minimum
  1885. * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
  1886. * vectors we were allocated.
  1887. */
  1888. adapter->num_msix_vectors = vectors;
  1889. return 0;
  1890. }
  1891. /**
  1892. * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
  1893. * @adapter: board private structure to initialize
  1894. *
  1895. * This is the top level queue allocation routine. The order here is very
  1896. * important, starting with the "most" number of features turned on at once,
  1897. * and ending with the smallest set of features. This way large combinations
  1898. * can be allocated if they're turned on, and smaller combinations are the
  1899. * fallthrough conditions.
  1900. *
  1901. **/
  1902. static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
  1903. {
  1904. struct ixgbe_hw *hw = &adapter->hw;
  1905. unsigned int def_q = 0;
  1906. unsigned int num_tcs = 0;
  1907. int err;
  1908. /* Start with base case */
  1909. adapter->num_rx_queues = 1;
  1910. adapter->num_tx_queues = 1;
  1911. spin_lock_bh(&adapter->mbx_lock);
  1912. /* fetch queue configuration from the PF */
  1913. err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
  1914. spin_unlock_bh(&adapter->mbx_lock);
  1915. if (err)
  1916. return;
  1917. /* we need as many queues as traffic classes */
  1918. if (num_tcs > 1) {
  1919. adapter->num_rx_queues = num_tcs;
  1920. } else {
  1921. u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
  1922. switch (hw->api_version) {
  1923. case ixgbe_mbox_api_11:
  1924. case ixgbe_mbox_api_12:
  1925. adapter->num_rx_queues = rss;
  1926. adapter->num_tx_queues = rss;
  1927. default:
  1928. break;
  1929. }
  1930. }
  1931. }
  1932. /**
  1933. * ixgbevf_alloc_queues - Allocate memory for all rings
  1934. * @adapter: board private structure to initialize
  1935. *
  1936. * We allocate one ring per queue at run-time since we don't know the
  1937. * number of queues at compile-time. The polling_netdev array is
  1938. * intended for Multiqueue, but should work fine with a single queue.
  1939. **/
  1940. static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
  1941. {
  1942. struct ixgbevf_ring *ring;
  1943. int rx = 0, tx = 0;
  1944. for (; tx < adapter->num_tx_queues; tx++) {
  1945. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  1946. if (!ring)
  1947. goto err_allocation;
  1948. ring->dev = &adapter->pdev->dev;
  1949. ring->netdev = adapter->netdev;
  1950. ring->count = adapter->tx_ring_count;
  1951. ring->queue_index = tx;
  1952. ring->reg_idx = tx;
  1953. adapter->tx_ring[tx] = ring;
  1954. }
  1955. for (; rx < adapter->num_rx_queues; rx++) {
  1956. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  1957. if (!ring)
  1958. goto err_allocation;
  1959. ring->dev = &adapter->pdev->dev;
  1960. ring->netdev = adapter->netdev;
  1961. ring->count = adapter->rx_ring_count;
  1962. ring->queue_index = rx;
  1963. ring->reg_idx = rx;
  1964. adapter->rx_ring[rx] = ring;
  1965. }
  1966. return 0;
  1967. err_allocation:
  1968. while (tx) {
  1969. kfree(adapter->tx_ring[--tx]);
  1970. adapter->tx_ring[tx] = NULL;
  1971. }
  1972. while (rx) {
  1973. kfree(adapter->rx_ring[--rx]);
  1974. adapter->rx_ring[rx] = NULL;
  1975. }
  1976. return -ENOMEM;
  1977. }
  1978. /**
  1979. * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
  1980. * @adapter: board private structure to initialize
  1981. *
  1982. * Attempt to configure the interrupts using the best available
  1983. * capabilities of the hardware and the kernel.
  1984. **/
  1985. static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
  1986. {
  1987. struct net_device *netdev = adapter->netdev;
  1988. int err;
  1989. int vector, v_budget;
  1990. /* It's easy to be greedy for MSI-X vectors, but it really
  1991. * doesn't do us much good if we have a lot more vectors
  1992. * than CPU's. So let's be conservative and only ask for
  1993. * (roughly) the same number of vectors as there are CPU's.
  1994. * The default is to use pairs of vectors.
  1995. */
  1996. v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
  1997. v_budget = min_t(int, v_budget, num_online_cpus());
  1998. v_budget += NON_Q_VECTORS;
  1999. /* A failure in MSI-X entry allocation isn't fatal, but it does
  2000. * mean we disable MSI-X capabilities of the adapter.
  2001. */
  2002. adapter->msix_entries = kcalloc(v_budget,
  2003. sizeof(struct msix_entry), GFP_KERNEL);
  2004. if (!adapter->msix_entries)
  2005. return -ENOMEM;
  2006. for (vector = 0; vector < v_budget; vector++)
  2007. adapter->msix_entries[vector].entry = vector;
  2008. err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
  2009. if (err)
  2010. return err;
  2011. err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
  2012. if (err)
  2013. return err;
  2014. return netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
  2015. }
  2016. /**
  2017. * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
  2018. * @adapter: board private structure to initialize
  2019. *
  2020. * We allocate one q_vector per queue interrupt. If allocation fails we
  2021. * return -ENOMEM.
  2022. **/
  2023. static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
  2024. {
  2025. int q_idx, num_q_vectors;
  2026. struct ixgbevf_q_vector *q_vector;
  2027. num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  2028. for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
  2029. q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
  2030. if (!q_vector)
  2031. goto err_out;
  2032. q_vector->adapter = adapter;
  2033. q_vector->v_idx = q_idx;
  2034. netif_napi_add(adapter->netdev, &q_vector->napi,
  2035. ixgbevf_poll, 64);
  2036. adapter->q_vector[q_idx] = q_vector;
  2037. }
  2038. return 0;
  2039. err_out:
  2040. while (q_idx) {
  2041. q_idx--;
  2042. q_vector = adapter->q_vector[q_idx];
  2043. #ifdef CONFIG_NET_RX_BUSY_POLL
  2044. napi_hash_del(&q_vector->napi);
  2045. #endif
  2046. netif_napi_del(&q_vector->napi);
  2047. kfree(q_vector);
  2048. adapter->q_vector[q_idx] = NULL;
  2049. }
  2050. return -ENOMEM;
  2051. }
  2052. /**
  2053. * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
  2054. * @adapter: board private structure to initialize
  2055. *
  2056. * This function frees the memory allocated to the q_vectors. In addition if
  2057. * NAPI is enabled it will delete any references to the NAPI struct prior
  2058. * to freeing the q_vector.
  2059. **/
  2060. static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
  2061. {
  2062. int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  2063. for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
  2064. struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
  2065. adapter->q_vector[q_idx] = NULL;
  2066. #ifdef CONFIG_NET_RX_BUSY_POLL
  2067. napi_hash_del(&q_vector->napi);
  2068. #endif
  2069. netif_napi_del(&q_vector->napi);
  2070. kfree(q_vector);
  2071. }
  2072. }
  2073. /**
  2074. * ixgbevf_reset_interrupt_capability - Reset MSIX setup
  2075. * @adapter: board private structure
  2076. *
  2077. **/
  2078. static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
  2079. {
  2080. pci_disable_msix(adapter->pdev);
  2081. kfree(adapter->msix_entries);
  2082. adapter->msix_entries = NULL;
  2083. }
  2084. /**
  2085. * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
  2086. * @adapter: board private structure to initialize
  2087. *
  2088. **/
  2089. static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
  2090. {
  2091. int err;
  2092. /* Number of supported queues */
  2093. ixgbevf_set_num_queues(adapter);
  2094. err = ixgbevf_set_interrupt_capability(adapter);
  2095. if (err) {
  2096. hw_dbg(&adapter->hw,
  2097. "Unable to setup interrupt capabilities\n");
  2098. goto err_set_interrupt;
  2099. }
  2100. err = ixgbevf_alloc_q_vectors(adapter);
  2101. if (err) {
  2102. hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
  2103. goto err_alloc_q_vectors;
  2104. }
  2105. err = ixgbevf_alloc_queues(adapter);
  2106. if (err) {
  2107. pr_err("Unable to allocate memory for queues\n");
  2108. goto err_alloc_queues;
  2109. }
  2110. hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
  2111. (adapter->num_rx_queues > 1) ? "Enabled" :
  2112. "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
  2113. set_bit(__IXGBEVF_DOWN, &adapter->state);
  2114. return 0;
  2115. err_alloc_queues:
  2116. ixgbevf_free_q_vectors(adapter);
  2117. err_alloc_q_vectors:
  2118. ixgbevf_reset_interrupt_capability(adapter);
  2119. err_set_interrupt:
  2120. return err;
  2121. }
  2122. /**
  2123. * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
  2124. * @adapter: board private structure to clear interrupt scheme on
  2125. *
  2126. * We go through and clear interrupt specific resources and reset the structure
  2127. * to pre-load conditions
  2128. **/
  2129. static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
  2130. {
  2131. int i;
  2132. for (i = 0; i < adapter->num_tx_queues; i++) {
  2133. kfree(adapter->tx_ring[i]);
  2134. adapter->tx_ring[i] = NULL;
  2135. }
  2136. for (i = 0; i < adapter->num_rx_queues; i++) {
  2137. kfree(adapter->rx_ring[i]);
  2138. adapter->rx_ring[i] = NULL;
  2139. }
  2140. adapter->num_tx_queues = 0;
  2141. adapter->num_rx_queues = 0;
  2142. ixgbevf_free_q_vectors(adapter);
  2143. ixgbevf_reset_interrupt_capability(adapter);
  2144. }
  2145. /**
  2146. * ixgbevf_sw_init - Initialize general software structures
  2147. * @adapter: board private structure to initialize
  2148. *
  2149. * ixgbevf_sw_init initializes the Adapter private data structure.
  2150. * Fields are initialized based on PCI device information and
  2151. * OS network device settings (MTU size).
  2152. **/
  2153. static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
  2154. {
  2155. struct ixgbe_hw *hw = &adapter->hw;
  2156. struct pci_dev *pdev = adapter->pdev;
  2157. struct net_device *netdev = adapter->netdev;
  2158. int err;
  2159. /* PCI config space info */
  2160. hw->vendor_id = pdev->vendor;
  2161. hw->device_id = pdev->device;
  2162. hw->revision_id = pdev->revision;
  2163. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  2164. hw->subsystem_device_id = pdev->subsystem_device;
  2165. hw->mbx.ops.init_params(hw);
  2166. /* assume legacy case in which PF would only give VF 2 queues */
  2167. hw->mac.max_tx_queues = 2;
  2168. hw->mac.max_rx_queues = 2;
  2169. /* lock to protect mailbox accesses */
  2170. spin_lock_init(&adapter->mbx_lock);
  2171. err = hw->mac.ops.reset_hw(hw);
  2172. if (err) {
  2173. dev_info(&pdev->dev,
  2174. "PF still in reset state. Is the PF interface up?\n");
  2175. } else {
  2176. err = hw->mac.ops.init_hw(hw);
  2177. if (err) {
  2178. pr_err("init_shared_code failed: %d\n", err);
  2179. goto out;
  2180. }
  2181. ixgbevf_negotiate_api(adapter);
  2182. err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
  2183. if (err)
  2184. dev_info(&pdev->dev, "Error reading MAC address\n");
  2185. else if (is_zero_ether_addr(adapter->hw.mac.addr))
  2186. dev_info(&pdev->dev,
  2187. "MAC address not assigned by administrator.\n");
  2188. ether_addr_copy(netdev->dev_addr, hw->mac.addr);
  2189. }
  2190. if (!is_valid_ether_addr(netdev->dev_addr)) {
  2191. dev_info(&pdev->dev, "Assigning random MAC address\n");
  2192. eth_hw_addr_random(netdev);
  2193. ether_addr_copy(hw->mac.addr, netdev->dev_addr);
  2194. ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
  2195. }
  2196. /* Enable dynamic interrupt throttling rates */
  2197. adapter->rx_itr_setting = 1;
  2198. adapter->tx_itr_setting = 1;
  2199. /* set default ring sizes */
  2200. adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
  2201. adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
  2202. set_bit(__IXGBEVF_DOWN, &adapter->state);
  2203. return 0;
  2204. out:
  2205. return err;
  2206. }
  2207. #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
  2208. { \
  2209. u32 current_counter = IXGBE_READ_REG(hw, reg); \
  2210. if (current_counter < last_counter) \
  2211. counter += 0x100000000LL; \
  2212. last_counter = current_counter; \
  2213. counter &= 0xFFFFFFFF00000000LL; \
  2214. counter |= current_counter; \
  2215. }
  2216. #define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
  2217. { \
  2218. u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
  2219. u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
  2220. u64 current_counter = (current_counter_msb << 32) | \
  2221. current_counter_lsb; \
  2222. if (current_counter < last_counter) \
  2223. counter += 0x1000000000LL; \
  2224. last_counter = current_counter; \
  2225. counter &= 0xFFFFFFF000000000LL; \
  2226. counter |= current_counter; \
  2227. }
  2228. /**
  2229. * ixgbevf_update_stats - Update the board statistics counters.
  2230. * @adapter: board private structure
  2231. **/
  2232. void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
  2233. {
  2234. struct ixgbe_hw *hw = &adapter->hw;
  2235. int i;
  2236. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2237. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2238. return;
  2239. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
  2240. adapter->stats.vfgprc);
  2241. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
  2242. adapter->stats.vfgptc);
  2243. UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
  2244. adapter->stats.last_vfgorc,
  2245. adapter->stats.vfgorc);
  2246. UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
  2247. adapter->stats.last_vfgotc,
  2248. adapter->stats.vfgotc);
  2249. UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
  2250. adapter->stats.vfmprc);
  2251. for (i = 0; i < adapter->num_rx_queues; i++) {
  2252. adapter->hw_csum_rx_error +=
  2253. adapter->rx_ring[i]->hw_csum_rx_error;
  2254. adapter->rx_ring[i]->hw_csum_rx_error = 0;
  2255. }
  2256. }
  2257. /**
  2258. * ixgbevf_service_timer - Timer Call-back
  2259. * @data: pointer to adapter cast into an unsigned long
  2260. **/
  2261. static void ixgbevf_service_timer(unsigned long data)
  2262. {
  2263. struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
  2264. /* Reset the timer */
  2265. mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
  2266. ixgbevf_service_event_schedule(adapter);
  2267. }
  2268. static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
  2269. {
  2270. if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
  2271. return;
  2272. /* If we're already down or resetting, just bail */
  2273. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2274. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2275. return;
  2276. adapter->tx_timeout_count++;
  2277. ixgbevf_reinit_locked(adapter);
  2278. }
  2279. /**
  2280. * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
  2281. * @adapter: pointer to the device adapter structure
  2282. *
  2283. * This function serves two purposes. First it strobes the interrupt lines
  2284. * in order to make certain interrupts are occurring. Secondly it sets the
  2285. * bits needed to check for TX hangs. As a result we should immediately
  2286. * determine if a hang has occurred.
  2287. **/
  2288. static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
  2289. {
  2290. struct ixgbe_hw *hw = &adapter->hw;
  2291. u32 eics = 0;
  2292. int i;
  2293. /* If we're down or resetting, just bail */
  2294. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2295. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2296. return;
  2297. /* Force detection of hung controller */
  2298. if (netif_carrier_ok(adapter->netdev)) {
  2299. for (i = 0; i < adapter->num_tx_queues; i++)
  2300. set_check_for_tx_hang(adapter->tx_ring[i]);
  2301. }
  2302. /* get one bit for every active Tx/Rx interrupt vector */
  2303. for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
  2304. struct ixgbevf_q_vector *qv = adapter->q_vector[i];
  2305. if (qv->rx.ring || qv->tx.ring)
  2306. eics |= 1 << i;
  2307. }
  2308. /* Cause software interrupt to ensure rings are cleaned */
  2309. IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
  2310. }
  2311. /**
  2312. * ixgbevf_watchdog_update_link - update the link status
  2313. * @adapter: pointer to the device adapter structure
  2314. **/
  2315. static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
  2316. {
  2317. struct ixgbe_hw *hw = &adapter->hw;
  2318. u32 link_speed = adapter->link_speed;
  2319. bool link_up = adapter->link_up;
  2320. s32 err;
  2321. spin_lock_bh(&adapter->mbx_lock);
  2322. err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
  2323. spin_unlock_bh(&adapter->mbx_lock);
  2324. /* if check for link returns error we will need to reset */
  2325. if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
  2326. set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
  2327. link_up = false;
  2328. }
  2329. adapter->link_up = link_up;
  2330. adapter->link_speed = link_speed;
  2331. }
  2332. /**
  2333. * ixgbevf_watchdog_link_is_up - update netif_carrier status and
  2334. * print link up message
  2335. * @adapter: pointer to the device adapter structure
  2336. **/
  2337. static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
  2338. {
  2339. struct net_device *netdev = adapter->netdev;
  2340. /* only continue if link was previously down */
  2341. if (netif_carrier_ok(netdev))
  2342. return;
  2343. dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
  2344. (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
  2345. "10 Gbps" :
  2346. (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
  2347. "1 Gbps" :
  2348. (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
  2349. "100 Mbps" :
  2350. "unknown speed");
  2351. netif_carrier_on(netdev);
  2352. }
  2353. /**
  2354. * ixgbevf_watchdog_link_is_down - update netif_carrier status and
  2355. * print link down message
  2356. * @adapter: pointer to the adapter structure
  2357. **/
  2358. static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
  2359. {
  2360. struct net_device *netdev = adapter->netdev;
  2361. adapter->link_speed = 0;
  2362. /* only continue if link was up previously */
  2363. if (!netif_carrier_ok(netdev))
  2364. return;
  2365. dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
  2366. netif_carrier_off(netdev);
  2367. }
  2368. /**
  2369. * ixgbevf_watchdog_subtask - worker thread to bring link up
  2370. * @work: pointer to work_struct containing our data
  2371. **/
  2372. static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
  2373. {
  2374. /* if interface is down do nothing */
  2375. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2376. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2377. return;
  2378. ixgbevf_watchdog_update_link(adapter);
  2379. if (adapter->link_up)
  2380. ixgbevf_watchdog_link_is_up(adapter);
  2381. else
  2382. ixgbevf_watchdog_link_is_down(adapter);
  2383. ixgbevf_update_stats(adapter);
  2384. }
  2385. /**
  2386. * ixgbevf_service_task - manages and runs subtasks
  2387. * @work: pointer to work_struct containing our data
  2388. **/
  2389. static void ixgbevf_service_task(struct work_struct *work)
  2390. {
  2391. struct ixgbevf_adapter *adapter = container_of(work,
  2392. struct ixgbevf_adapter,
  2393. service_task);
  2394. struct ixgbe_hw *hw = &adapter->hw;
  2395. if (IXGBE_REMOVED(hw->hw_addr)) {
  2396. if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  2397. rtnl_lock();
  2398. ixgbevf_down(adapter);
  2399. rtnl_unlock();
  2400. }
  2401. return;
  2402. }
  2403. ixgbevf_queue_reset_subtask(adapter);
  2404. ixgbevf_reset_subtask(adapter);
  2405. ixgbevf_watchdog_subtask(adapter);
  2406. ixgbevf_check_hang_subtask(adapter);
  2407. ixgbevf_service_event_complete(adapter);
  2408. }
  2409. /**
  2410. * ixgbevf_free_tx_resources - Free Tx Resources per Queue
  2411. * @tx_ring: Tx descriptor ring for a specific queue
  2412. *
  2413. * Free all transmit software resources
  2414. **/
  2415. void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
  2416. {
  2417. ixgbevf_clean_tx_ring(tx_ring);
  2418. vfree(tx_ring->tx_buffer_info);
  2419. tx_ring->tx_buffer_info = NULL;
  2420. /* if not set, then don't free */
  2421. if (!tx_ring->desc)
  2422. return;
  2423. dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
  2424. tx_ring->dma);
  2425. tx_ring->desc = NULL;
  2426. }
  2427. /**
  2428. * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
  2429. * @adapter: board private structure
  2430. *
  2431. * Free all transmit software resources
  2432. **/
  2433. static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
  2434. {
  2435. int i;
  2436. for (i = 0; i < adapter->num_tx_queues; i++)
  2437. if (adapter->tx_ring[i]->desc)
  2438. ixgbevf_free_tx_resources(adapter->tx_ring[i]);
  2439. }
  2440. /**
  2441. * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
  2442. * @tx_ring: Tx descriptor ring (for a specific queue) to setup
  2443. *
  2444. * Return 0 on success, negative on failure
  2445. **/
  2446. int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
  2447. {
  2448. int size;
  2449. size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
  2450. tx_ring->tx_buffer_info = vzalloc(size);
  2451. if (!tx_ring->tx_buffer_info)
  2452. goto err;
  2453. /* round up to nearest 4K */
  2454. tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
  2455. tx_ring->size = ALIGN(tx_ring->size, 4096);
  2456. tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
  2457. &tx_ring->dma, GFP_KERNEL);
  2458. if (!tx_ring->desc)
  2459. goto err;
  2460. return 0;
  2461. err:
  2462. vfree(tx_ring->tx_buffer_info);
  2463. tx_ring->tx_buffer_info = NULL;
  2464. hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
  2465. return -ENOMEM;
  2466. }
  2467. /**
  2468. * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
  2469. * @adapter: board private structure
  2470. *
  2471. * If this function returns with an error, then it's possible one or
  2472. * more of the rings is populated (while the rest are not). It is the
  2473. * callers duty to clean those orphaned rings.
  2474. *
  2475. * Return 0 on success, negative on failure
  2476. **/
  2477. static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
  2478. {
  2479. int i, err = 0;
  2480. for (i = 0; i < adapter->num_tx_queues; i++) {
  2481. err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
  2482. if (!err)
  2483. continue;
  2484. hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
  2485. break;
  2486. }
  2487. return err;
  2488. }
  2489. /**
  2490. * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
  2491. * @rx_ring: Rx descriptor ring (for a specific queue) to setup
  2492. *
  2493. * Returns 0 on success, negative on failure
  2494. **/
  2495. int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
  2496. {
  2497. int size;
  2498. size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
  2499. rx_ring->rx_buffer_info = vzalloc(size);
  2500. if (!rx_ring->rx_buffer_info)
  2501. goto err;
  2502. /* Round up to nearest 4K */
  2503. rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
  2504. rx_ring->size = ALIGN(rx_ring->size, 4096);
  2505. rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
  2506. &rx_ring->dma, GFP_KERNEL);
  2507. if (!rx_ring->desc)
  2508. goto err;
  2509. return 0;
  2510. err:
  2511. vfree(rx_ring->rx_buffer_info);
  2512. rx_ring->rx_buffer_info = NULL;
  2513. dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
  2514. return -ENOMEM;
  2515. }
  2516. /**
  2517. * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
  2518. * @adapter: board private structure
  2519. *
  2520. * If this function returns with an error, then it's possible one or
  2521. * more of the rings is populated (while the rest are not). It is the
  2522. * callers duty to clean those orphaned rings.
  2523. *
  2524. * Return 0 on success, negative on failure
  2525. **/
  2526. static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
  2527. {
  2528. int i, err = 0;
  2529. for (i = 0; i < adapter->num_rx_queues; i++) {
  2530. err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
  2531. if (!err)
  2532. continue;
  2533. hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
  2534. break;
  2535. }
  2536. return err;
  2537. }
  2538. /**
  2539. * ixgbevf_free_rx_resources - Free Rx Resources
  2540. * @rx_ring: ring to clean the resources from
  2541. *
  2542. * Free all receive software resources
  2543. **/
  2544. void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
  2545. {
  2546. ixgbevf_clean_rx_ring(rx_ring);
  2547. vfree(rx_ring->rx_buffer_info);
  2548. rx_ring->rx_buffer_info = NULL;
  2549. dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
  2550. rx_ring->dma);
  2551. rx_ring->desc = NULL;
  2552. }
  2553. /**
  2554. * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
  2555. * @adapter: board private structure
  2556. *
  2557. * Free all receive software resources
  2558. **/
  2559. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
  2560. {
  2561. int i;
  2562. for (i = 0; i < adapter->num_rx_queues; i++)
  2563. if (adapter->rx_ring[i]->desc)
  2564. ixgbevf_free_rx_resources(adapter->rx_ring[i]);
  2565. }
  2566. /**
  2567. * ixgbevf_open - Called when a network interface is made active
  2568. * @netdev: network interface device structure
  2569. *
  2570. * Returns 0 on success, negative value on failure
  2571. *
  2572. * The open entry point is called when a network interface is made
  2573. * active by the system (IFF_UP). At this point all resources needed
  2574. * for transmit and receive operations are allocated, the interrupt
  2575. * handler is registered with the OS, the watchdog timer is started,
  2576. * and the stack is notified that the interface is ready.
  2577. **/
  2578. int ixgbevf_open(struct net_device *netdev)
  2579. {
  2580. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2581. struct ixgbe_hw *hw = &adapter->hw;
  2582. int err;
  2583. /* A previous failure to open the device because of a lack of
  2584. * available MSIX vector resources may have reset the number
  2585. * of msix vectors variable to zero. The only way to recover
  2586. * is to unload/reload the driver and hope that the system has
  2587. * been able to recover some MSIX vector resources.
  2588. */
  2589. if (!adapter->num_msix_vectors)
  2590. return -ENOMEM;
  2591. if (hw->adapter_stopped) {
  2592. ixgbevf_reset(adapter);
  2593. /* if adapter is still stopped then PF isn't up and
  2594. * the VF can't start.
  2595. */
  2596. if (hw->adapter_stopped) {
  2597. err = IXGBE_ERR_MBX;
  2598. pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
  2599. goto err_setup_reset;
  2600. }
  2601. }
  2602. /* disallow open during test */
  2603. if (test_bit(__IXGBEVF_TESTING, &adapter->state))
  2604. return -EBUSY;
  2605. netif_carrier_off(netdev);
  2606. /* allocate transmit descriptors */
  2607. err = ixgbevf_setup_all_tx_resources(adapter);
  2608. if (err)
  2609. goto err_setup_tx;
  2610. /* allocate receive descriptors */
  2611. err = ixgbevf_setup_all_rx_resources(adapter);
  2612. if (err)
  2613. goto err_setup_rx;
  2614. ixgbevf_configure(adapter);
  2615. /* Map the Tx/Rx rings to the vectors we were allotted.
  2616. * if request_irq will be called in this function map_rings
  2617. * must be called *before* up_complete
  2618. */
  2619. ixgbevf_map_rings_to_vectors(adapter);
  2620. err = ixgbevf_request_irq(adapter);
  2621. if (err)
  2622. goto err_req_irq;
  2623. ixgbevf_up_complete(adapter);
  2624. return 0;
  2625. err_req_irq:
  2626. ixgbevf_down(adapter);
  2627. err_setup_rx:
  2628. ixgbevf_free_all_rx_resources(adapter);
  2629. err_setup_tx:
  2630. ixgbevf_free_all_tx_resources(adapter);
  2631. ixgbevf_reset(adapter);
  2632. err_setup_reset:
  2633. return err;
  2634. }
  2635. /**
  2636. * ixgbevf_close - Disables a network interface
  2637. * @netdev: network interface device structure
  2638. *
  2639. * Returns 0, this is not allowed to fail
  2640. *
  2641. * The close entry point is called when an interface is de-activated
  2642. * by the OS. The hardware is still under the drivers control, but
  2643. * needs to be disabled. A global MAC reset is issued to stop the
  2644. * hardware, and all transmit and receive resources are freed.
  2645. **/
  2646. int ixgbevf_close(struct net_device *netdev)
  2647. {
  2648. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2649. ixgbevf_down(adapter);
  2650. ixgbevf_free_irq(adapter);
  2651. ixgbevf_free_all_tx_resources(adapter);
  2652. ixgbevf_free_all_rx_resources(adapter);
  2653. return 0;
  2654. }
  2655. static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
  2656. {
  2657. struct net_device *dev = adapter->netdev;
  2658. if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
  2659. &adapter->state))
  2660. return;
  2661. /* if interface is down do nothing */
  2662. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2663. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2664. return;
  2665. /* Hardware has to reinitialize queues and interrupts to
  2666. * match packet buffer alignment. Unfortunately, the
  2667. * hardware is not flexible enough to do this dynamically.
  2668. */
  2669. if (netif_running(dev))
  2670. ixgbevf_close(dev);
  2671. ixgbevf_clear_interrupt_scheme(adapter);
  2672. ixgbevf_init_interrupt_scheme(adapter);
  2673. if (netif_running(dev))
  2674. ixgbevf_open(dev);
  2675. }
  2676. static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
  2677. u32 vlan_macip_lens, u32 type_tucmd,
  2678. u32 mss_l4len_idx)
  2679. {
  2680. struct ixgbe_adv_tx_context_desc *context_desc;
  2681. u16 i = tx_ring->next_to_use;
  2682. context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
  2683. i++;
  2684. tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
  2685. /* set bits to identify this as an advanced context descriptor */
  2686. type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
  2687. context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
  2688. context_desc->seqnum_seed = 0;
  2689. context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
  2690. context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
  2691. }
  2692. static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
  2693. struct ixgbevf_tx_buffer *first,
  2694. u8 *hdr_len)
  2695. {
  2696. struct sk_buff *skb = first->skb;
  2697. u32 vlan_macip_lens, type_tucmd;
  2698. u32 mss_l4len_idx, l4len;
  2699. int err;
  2700. if (skb->ip_summed != CHECKSUM_PARTIAL)
  2701. return 0;
  2702. if (!skb_is_gso(skb))
  2703. return 0;
  2704. err = skb_cow_head(skb, 0);
  2705. if (err < 0)
  2706. return err;
  2707. /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
  2708. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
  2709. if (first->protocol == htons(ETH_P_IP)) {
  2710. struct iphdr *iph = ip_hdr(skb);
  2711. iph->tot_len = 0;
  2712. iph->check = 0;
  2713. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  2714. iph->daddr, 0,
  2715. IPPROTO_TCP,
  2716. 0);
  2717. type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
  2718. first->tx_flags |= IXGBE_TX_FLAGS_TSO |
  2719. IXGBE_TX_FLAGS_CSUM |
  2720. IXGBE_TX_FLAGS_IPV4;
  2721. } else if (skb_is_gso_v6(skb)) {
  2722. ipv6_hdr(skb)->payload_len = 0;
  2723. tcp_hdr(skb)->check =
  2724. ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  2725. &ipv6_hdr(skb)->daddr,
  2726. 0, IPPROTO_TCP, 0);
  2727. first->tx_flags |= IXGBE_TX_FLAGS_TSO |
  2728. IXGBE_TX_FLAGS_CSUM;
  2729. }
  2730. /* compute header lengths */
  2731. l4len = tcp_hdrlen(skb);
  2732. *hdr_len += l4len;
  2733. *hdr_len = skb_transport_offset(skb) + l4len;
  2734. /* update GSO size and bytecount with header size */
  2735. first->gso_segs = skb_shinfo(skb)->gso_segs;
  2736. first->bytecount += (first->gso_segs - 1) * *hdr_len;
  2737. /* mss_l4len_id: use 1 as index for TSO */
  2738. mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
  2739. mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
  2740. mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
  2741. /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
  2742. vlan_macip_lens = skb_network_header_len(skb);
  2743. vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
  2744. vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  2745. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
  2746. type_tucmd, mss_l4len_idx);
  2747. return 1;
  2748. }
  2749. static inline bool ixgbevf_ipv6_csum_is_sctp(struct sk_buff *skb)
  2750. {
  2751. unsigned int offset = 0;
  2752. ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
  2753. return offset == skb_checksum_start_offset(skb);
  2754. }
  2755. static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
  2756. struct ixgbevf_tx_buffer *first)
  2757. {
  2758. struct sk_buff *skb = first->skb;
  2759. u32 vlan_macip_lens = 0;
  2760. u32 type_tucmd = 0;
  2761. if (skb->ip_summed != CHECKSUM_PARTIAL)
  2762. goto no_csum;
  2763. switch (skb->csum_offset) {
  2764. case offsetof(struct tcphdr, check):
  2765. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
  2766. /* fall through */
  2767. case offsetof(struct udphdr, check):
  2768. break;
  2769. case offsetof(struct sctphdr, checksum):
  2770. /* validate that this is actually an SCTP request */
  2771. if (((first->protocol == htons(ETH_P_IP)) &&
  2772. (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
  2773. ((first->protocol == htons(ETH_P_IPV6)) &&
  2774. ixgbevf_ipv6_csum_is_sctp(skb))) {
  2775. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
  2776. break;
  2777. }
  2778. /* fall through */
  2779. default:
  2780. skb_checksum_help(skb);
  2781. goto no_csum;
  2782. }
  2783. /* update TX checksum flag */
  2784. first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
  2785. vlan_macip_lens = skb_checksum_start_offset(skb) -
  2786. skb_network_offset(skb);
  2787. no_csum:
  2788. /* vlan_macip_lens: MACLEN, VLAN tag */
  2789. vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
  2790. vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  2791. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
  2792. }
  2793. static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
  2794. {
  2795. /* set type for advanced descriptor with frame checksum insertion */
  2796. __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
  2797. IXGBE_ADVTXD_DCMD_IFCS |
  2798. IXGBE_ADVTXD_DCMD_DEXT);
  2799. /* set HW VLAN bit if VLAN is present */
  2800. if (tx_flags & IXGBE_TX_FLAGS_VLAN)
  2801. cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
  2802. /* set segmentation enable bits for TSO/FSO */
  2803. if (tx_flags & IXGBE_TX_FLAGS_TSO)
  2804. cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
  2805. return cmd_type;
  2806. }
  2807. static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
  2808. u32 tx_flags, unsigned int paylen)
  2809. {
  2810. __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
  2811. /* enable L4 checksum for TSO and TX checksum offload */
  2812. if (tx_flags & IXGBE_TX_FLAGS_CSUM)
  2813. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
  2814. /* enble IPv4 checksum for TSO */
  2815. if (tx_flags & IXGBE_TX_FLAGS_IPV4)
  2816. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
  2817. /* use index 1 context for TSO/FSO/FCOE */
  2818. if (tx_flags & IXGBE_TX_FLAGS_TSO)
  2819. olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
  2820. /* Check Context must be set if Tx switch is enabled, which it
  2821. * always is for case where virtual functions are running
  2822. */
  2823. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
  2824. tx_desc->read.olinfo_status = olinfo_status;
  2825. }
  2826. static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
  2827. struct ixgbevf_tx_buffer *first,
  2828. const u8 hdr_len)
  2829. {
  2830. dma_addr_t dma;
  2831. struct sk_buff *skb = first->skb;
  2832. struct ixgbevf_tx_buffer *tx_buffer;
  2833. union ixgbe_adv_tx_desc *tx_desc;
  2834. struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
  2835. unsigned int data_len = skb->data_len;
  2836. unsigned int size = skb_headlen(skb);
  2837. unsigned int paylen = skb->len - hdr_len;
  2838. u32 tx_flags = first->tx_flags;
  2839. __le32 cmd_type;
  2840. u16 i = tx_ring->next_to_use;
  2841. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  2842. ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
  2843. cmd_type = ixgbevf_tx_cmd_type(tx_flags);
  2844. dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
  2845. if (dma_mapping_error(tx_ring->dev, dma))
  2846. goto dma_error;
  2847. /* record length, and DMA address */
  2848. dma_unmap_len_set(first, len, size);
  2849. dma_unmap_addr_set(first, dma, dma);
  2850. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  2851. for (;;) {
  2852. while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
  2853. tx_desc->read.cmd_type_len =
  2854. cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
  2855. i++;
  2856. tx_desc++;
  2857. if (i == tx_ring->count) {
  2858. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  2859. i = 0;
  2860. }
  2861. dma += IXGBE_MAX_DATA_PER_TXD;
  2862. size -= IXGBE_MAX_DATA_PER_TXD;
  2863. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  2864. tx_desc->read.olinfo_status = 0;
  2865. }
  2866. if (likely(!data_len))
  2867. break;
  2868. tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
  2869. i++;
  2870. tx_desc++;
  2871. if (i == tx_ring->count) {
  2872. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  2873. i = 0;
  2874. }
  2875. size = skb_frag_size(frag);
  2876. data_len -= size;
  2877. dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
  2878. DMA_TO_DEVICE);
  2879. if (dma_mapping_error(tx_ring->dev, dma))
  2880. goto dma_error;
  2881. tx_buffer = &tx_ring->tx_buffer_info[i];
  2882. dma_unmap_len_set(tx_buffer, len, size);
  2883. dma_unmap_addr_set(tx_buffer, dma, dma);
  2884. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  2885. tx_desc->read.olinfo_status = 0;
  2886. frag++;
  2887. }
  2888. /* write last descriptor with RS and EOP bits */
  2889. cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
  2890. tx_desc->read.cmd_type_len = cmd_type;
  2891. /* set the timestamp */
  2892. first->time_stamp = jiffies;
  2893. /* Force memory writes to complete before letting h/w know there
  2894. * are new descriptors to fetch. (Only applicable for weak-ordered
  2895. * memory model archs, such as IA-64).
  2896. *
  2897. * We also need this memory barrier (wmb) to make certain all of the
  2898. * status bits have been updated before next_to_watch is written.
  2899. */
  2900. wmb();
  2901. /* set next_to_watch value indicating a packet is present */
  2902. first->next_to_watch = tx_desc;
  2903. i++;
  2904. if (i == tx_ring->count)
  2905. i = 0;
  2906. tx_ring->next_to_use = i;
  2907. /* notify HW of packet */
  2908. ixgbevf_write_tail(tx_ring, i);
  2909. return;
  2910. dma_error:
  2911. dev_err(tx_ring->dev, "TX DMA map failed\n");
  2912. /* clear dma mappings for failed tx_buffer_info map */
  2913. for (;;) {
  2914. tx_buffer = &tx_ring->tx_buffer_info[i];
  2915. ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
  2916. if (tx_buffer == first)
  2917. break;
  2918. if (i == 0)
  2919. i = tx_ring->count;
  2920. i--;
  2921. }
  2922. tx_ring->next_to_use = i;
  2923. }
  2924. static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  2925. {
  2926. netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
  2927. /* Herbert's original patch had:
  2928. * smp_mb__after_netif_stop_queue();
  2929. * but since that doesn't exist yet, just open code it.
  2930. */
  2931. smp_mb();
  2932. /* We need to check again in a case another CPU has just
  2933. * made room available.
  2934. */
  2935. if (likely(ixgbevf_desc_unused(tx_ring) < size))
  2936. return -EBUSY;
  2937. /* A reprieve! - use start_queue because it doesn't call schedule */
  2938. netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
  2939. ++tx_ring->tx_stats.restart_queue;
  2940. return 0;
  2941. }
  2942. static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  2943. {
  2944. if (likely(ixgbevf_desc_unused(tx_ring) >= size))
  2945. return 0;
  2946. return __ixgbevf_maybe_stop_tx(tx_ring, size);
  2947. }
  2948. static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2949. {
  2950. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2951. struct ixgbevf_tx_buffer *first;
  2952. struct ixgbevf_ring *tx_ring;
  2953. int tso;
  2954. u32 tx_flags = 0;
  2955. u16 count = TXD_USE_COUNT(skb_headlen(skb));
  2956. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  2957. unsigned short f;
  2958. #endif
  2959. u8 hdr_len = 0;
  2960. u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
  2961. if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
  2962. dev_kfree_skb_any(skb);
  2963. return NETDEV_TX_OK;
  2964. }
  2965. tx_ring = adapter->tx_ring[skb->queue_mapping];
  2966. /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
  2967. * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
  2968. * + 2 desc gap to keep tail from touching head,
  2969. * + 1 desc for context descriptor,
  2970. * otherwise try next time
  2971. */
  2972. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  2973. for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
  2974. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
  2975. #else
  2976. count += skb_shinfo(skb)->nr_frags;
  2977. #endif
  2978. if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
  2979. tx_ring->tx_stats.tx_busy++;
  2980. return NETDEV_TX_BUSY;
  2981. }
  2982. /* record the location of the first descriptor for this packet */
  2983. first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
  2984. first->skb = skb;
  2985. first->bytecount = skb->len;
  2986. first->gso_segs = 1;
  2987. if (skb_vlan_tag_present(skb)) {
  2988. tx_flags |= skb_vlan_tag_get(skb);
  2989. tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
  2990. tx_flags |= IXGBE_TX_FLAGS_VLAN;
  2991. }
  2992. /* record initial flags and protocol */
  2993. first->tx_flags = tx_flags;
  2994. first->protocol = vlan_get_protocol(skb);
  2995. tso = ixgbevf_tso(tx_ring, first, &hdr_len);
  2996. if (tso < 0)
  2997. goto out_drop;
  2998. else if (!tso)
  2999. ixgbevf_tx_csum(tx_ring, first);
  3000. ixgbevf_tx_map(tx_ring, first, hdr_len);
  3001. ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
  3002. return NETDEV_TX_OK;
  3003. out_drop:
  3004. dev_kfree_skb_any(first->skb);
  3005. first->skb = NULL;
  3006. return NETDEV_TX_OK;
  3007. }
  3008. /**
  3009. * ixgbevf_set_mac - Change the Ethernet Address of the NIC
  3010. * @netdev: network interface device structure
  3011. * @p: pointer to an address structure
  3012. *
  3013. * Returns 0 on success, negative on failure
  3014. **/
  3015. static int ixgbevf_set_mac(struct net_device *netdev, void *p)
  3016. {
  3017. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3018. struct ixgbe_hw *hw = &adapter->hw;
  3019. struct sockaddr *addr = p;
  3020. int err;
  3021. if (!is_valid_ether_addr(addr->sa_data))
  3022. return -EADDRNOTAVAIL;
  3023. spin_lock_bh(&adapter->mbx_lock);
  3024. err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
  3025. spin_unlock_bh(&adapter->mbx_lock);
  3026. if (err)
  3027. return -EPERM;
  3028. ether_addr_copy(hw->mac.addr, addr->sa_data);
  3029. ether_addr_copy(netdev->dev_addr, addr->sa_data);
  3030. return 0;
  3031. }
  3032. /**
  3033. * ixgbevf_change_mtu - Change the Maximum Transfer Unit
  3034. * @netdev: network interface device structure
  3035. * @new_mtu: new value for maximum frame size
  3036. *
  3037. * Returns 0 on success, negative on failure
  3038. **/
  3039. static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
  3040. {
  3041. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3042. struct ixgbe_hw *hw = &adapter->hw;
  3043. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
  3044. int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
  3045. switch (adapter->hw.api_version) {
  3046. case ixgbe_mbox_api_11:
  3047. case ixgbe_mbox_api_12:
  3048. max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
  3049. break;
  3050. default:
  3051. if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
  3052. max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
  3053. break;
  3054. }
  3055. /* MTU < 68 is an error and causes problems on some kernels */
  3056. if ((new_mtu < 68) || (max_frame > max_possible_frame))
  3057. return -EINVAL;
  3058. hw_dbg(hw, "changing MTU from %d to %d\n",
  3059. netdev->mtu, new_mtu);
  3060. /* must set new MTU before calling down or up */
  3061. netdev->mtu = new_mtu;
  3062. /* notify the PF of our intent to use this size of frame */
  3063. ixgbevf_rlpml_set_vf(hw, max_frame);
  3064. return 0;
  3065. }
  3066. #ifdef CONFIG_NET_POLL_CONTROLLER
  3067. /* Polling 'interrupt' - used by things like netconsole to send skbs
  3068. * without having to re-enable interrupts. It's not called while
  3069. * the interrupt routine is executing.
  3070. */
  3071. static void ixgbevf_netpoll(struct net_device *netdev)
  3072. {
  3073. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3074. int i;
  3075. /* if interface is down do nothing */
  3076. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  3077. return;
  3078. for (i = 0; i < adapter->num_rx_queues; i++)
  3079. ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
  3080. }
  3081. #endif /* CONFIG_NET_POLL_CONTROLLER */
  3082. static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
  3083. {
  3084. struct net_device *netdev = pci_get_drvdata(pdev);
  3085. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3086. #ifdef CONFIG_PM
  3087. int retval = 0;
  3088. #endif
  3089. netif_device_detach(netdev);
  3090. if (netif_running(netdev)) {
  3091. rtnl_lock();
  3092. ixgbevf_down(adapter);
  3093. ixgbevf_free_irq(adapter);
  3094. ixgbevf_free_all_tx_resources(adapter);
  3095. ixgbevf_free_all_rx_resources(adapter);
  3096. rtnl_unlock();
  3097. }
  3098. ixgbevf_clear_interrupt_scheme(adapter);
  3099. #ifdef CONFIG_PM
  3100. retval = pci_save_state(pdev);
  3101. if (retval)
  3102. return retval;
  3103. #endif
  3104. if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
  3105. pci_disable_device(pdev);
  3106. return 0;
  3107. }
  3108. #ifdef CONFIG_PM
  3109. static int ixgbevf_resume(struct pci_dev *pdev)
  3110. {
  3111. struct net_device *netdev = pci_get_drvdata(pdev);
  3112. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3113. u32 err;
  3114. pci_restore_state(pdev);
  3115. /* pci_restore_state clears dev->state_saved so call
  3116. * pci_save_state to restore it.
  3117. */
  3118. pci_save_state(pdev);
  3119. err = pci_enable_device_mem(pdev);
  3120. if (err) {
  3121. dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
  3122. return err;
  3123. }
  3124. smp_mb__before_atomic();
  3125. clear_bit(__IXGBEVF_DISABLED, &adapter->state);
  3126. pci_set_master(pdev);
  3127. ixgbevf_reset(adapter);
  3128. rtnl_lock();
  3129. err = ixgbevf_init_interrupt_scheme(adapter);
  3130. rtnl_unlock();
  3131. if (err) {
  3132. dev_err(&pdev->dev, "Cannot initialize interrupts\n");
  3133. return err;
  3134. }
  3135. if (netif_running(netdev)) {
  3136. err = ixgbevf_open(netdev);
  3137. if (err)
  3138. return err;
  3139. }
  3140. netif_device_attach(netdev);
  3141. return err;
  3142. }
  3143. #endif /* CONFIG_PM */
  3144. static void ixgbevf_shutdown(struct pci_dev *pdev)
  3145. {
  3146. ixgbevf_suspend(pdev, PMSG_SUSPEND);
  3147. }
  3148. static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
  3149. struct rtnl_link_stats64 *stats)
  3150. {
  3151. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3152. unsigned int start;
  3153. u64 bytes, packets;
  3154. const struct ixgbevf_ring *ring;
  3155. int i;
  3156. ixgbevf_update_stats(adapter);
  3157. stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
  3158. for (i = 0; i < adapter->num_rx_queues; i++) {
  3159. ring = adapter->rx_ring[i];
  3160. do {
  3161. start = u64_stats_fetch_begin_irq(&ring->syncp);
  3162. bytes = ring->stats.bytes;
  3163. packets = ring->stats.packets;
  3164. } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
  3165. stats->rx_bytes += bytes;
  3166. stats->rx_packets += packets;
  3167. }
  3168. for (i = 0; i < adapter->num_tx_queues; i++) {
  3169. ring = adapter->tx_ring[i];
  3170. do {
  3171. start = u64_stats_fetch_begin_irq(&ring->syncp);
  3172. bytes = ring->stats.bytes;
  3173. packets = ring->stats.packets;
  3174. } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
  3175. stats->tx_bytes += bytes;
  3176. stats->tx_packets += packets;
  3177. }
  3178. return stats;
  3179. }
  3180. static const struct net_device_ops ixgbevf_netdev_ops = {
  3181. .ndo_open = ixgbevf_open,
  3182. .ndo_stop = ixgbevf_close,
  3183. .ndo_start_xmit = ixgbevf_xmit_frame,
  3184. .ndo_set_rx_mode = ixgbevf_set_rx_mode,
  3185. .ndo_get_stats64 = ixgbevf_get_stats,
  3186. .ndo_validate_addr = eth_validate_addr,
  3187. .ndo_set_mac_address = ixgbevf_set_mac,
  3188. .ndo_change_mtu = ixgbevf_change_mtu,
  3189. .ndo_tx_timeout = ixgbevf_tx_timeout,
  3190. .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
  3191. .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
  3192. #ifdef CONFIG_NET_RX_BUSY_POLL
  3193. .ndo_busy_poll = ixgbevf_busy_poll_recv,
  3194. #endif
  3195. #ifdef CONFIG_NET_POLL_CONTROLLER
  3196. .ndo_poll_controller = ixgbevf_netpoll,
  3197. #endif
  3198. .ndo_features_check = passthru_features_check,
  3199. };
  3200. static void ixgbevf_assign_netdev_ops(struct net_device *dev)
  3201. {
  3202. dev->netdev_ops = &ixgbevf_netdev_ops;
  3203. ixgbevf_set_ethtool_ops(dev);
  3204. dev->watchdog_timeo = 5 * HZ;
  3205. }
  3206. /**
  3207. * ixgbevf_probe - Device Initialization Routine
  3208. * @pdev: PCI device information struct
  3209. * @ent: entry in ixgbevf_pci_tbl
  3210. *
  3211. * Returns 0 on success, negative on failure
  3212. *
  3213. * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
  3214. * The OS initialization, configuring of the adapter private structure,
  3215. * and a hardware reset occur.
  3216. **/
  3217. static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3218. {
  3219. struct net_device *netdev;
  3220. struct ixgbevf_adapter *adapter = NULL;
  3221. struct ixgbe_hw *hw = NULL;
  3222. const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
  3223. int err, pci_using_dac;
  3224. bool disable_dev = false;
  3225. err = pci_enable_device(pdev);
  3226. if (err)
  3227. return err;
  3228. if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
  3229. pci_using_dac = 1;
  3230. } else {
  3231. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  3232. if (err) {
  3233. dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
  3234. goto err_dma;
  3235. }
  3236. pci_using_dac = 0;
  3237. }
  3238. err = pci_request_regions(pdev, ixgbevf_driver_name);
  3239. if (err) {
  3240. dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
  3241. goto err_pci_reg;
  3242. }
  3243. pci_set_master(pdev);
  3244. netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
  3245. MAX_TX_QUEUES);
  3246. if (!netdev) {
  3247. err = -ENOMEM;
  3248. goto err_alloc_etherdev;
  3249. }
  3250. SET_NETDEV_DEV(netdev, &pdev->dev);
  3251. adapter = netdev_priv(netdev);
  3252. adapter->netdev = netdev;
  3253. adapter->pdev = pdev;
  3254. hw = &adapter->hw;
  3255. hw->back = adapter;
  3256. adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  3257. /* call save state here in standalone driver because it relies on
  3258. * adapter struct to exist, and needs to call netdev_priv
  3259. */
  3260. pci_save_state(pdev);
  3261. hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
  3262. pci_resource_len(pdev, 0));
  3263. adapter->io_addr = hw->hw_addr;
  3264. if (!hw->hw_addr) {
  3265. err = -EIO;
  3266. goto err_ioremap;
  3267. }
  3268. ixgbevf_assign_netdev_ops(netdev);
  3269. /* Setup HW API */
  3270. memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
  3271. hw->mac.type = ii->mac;
  3272. memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
  3273. sizeof(struct ixgbe_mbx_operations));
  3274. /* setup the private structure */
  3275. err = ixgbevf_sw_init(adapter);
  3276. if (err)
  3277. goto err_sw_init;
  3278. /* The HW MAC address was set and/or determined in sw_init */
  3279. if (!is_valid_ether_addr(netdev->dev_addr)) {
  3280. pr_err("invalid MAC address\n");
  3281. err = -EIO;
  3282. goto err_sw_init;
  3283. }
  3284. netdev->hw_features = NETIF_F_SG |
  3285. NETIF_F_TSO |
  3286. NETIF_F_TSO6 |
  3287. NETIF_F_RXCSUM |
  3288. NETIF_F_HW_CSUM |
  3289. NETIF_F_SCTP_CRC;
  3290. netdev->features = netdev->hw_features |
  3291. NETIF_F_HW_VLAN_CTAG_TX |
  3292. NETIF_F_HW_VLAN_CTAG_RX |
  3293. NETIF_F_HW_VLAN_CTAG_FILTER;
  3294. netdev->vlan_features |= NETIF_F_SG |
  3295. NETIF_F_TSO |
  3296. NETIF_F_TSO6 |
  3297. NETIF_F_HW_CSUM |
  3298. NETIF_F_SCTP_CRC;
  3299. netdev->mpls_features |= NETIF_F_HW_CSUM;
  3300. netdev->hw_enc_features |= NETIF_F_HW_CSUM;
  3301. if (pci_using_dac)
  3302. netdev->features |= NETIF_F_HIGHDMA;
  3303. netdev->priv_flags |= IFF_UNICAST_FLT;
  3304. if (IXGBE_REMOVED(hw->hw_addr)) {
  3305. err = -EIO;
  3306. goto err_sw_init;
  3307. }
  3308. setup_timer(&adapter->service_timer, &ixgbevf_service_timer,
  3309. (unsigned long)adapter);
  3310. INIT_WORK(&adapter->service_task, ixgbevf_service_task);
  3311. set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
  3312. clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
  3313. err = ixgbevf_init_interrupt_scheme(adapter);
  3314. if (err)
  3315. goto err_sw_init;
  3316. strcpy(netdev->name, "eth%d");
  3317. err = register_netdev(netdev);
  3318. if (err)
  3319. goto err_register;
  3320. pci_set_drvdata(pdev, netdev);
  3321. netif_carrier_off(netdev);
  3322. ixgbevf_init_last_counter_stats(adapter);
  3323. /* print the VF info */
  3324. dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
  3325. dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
  3326. switch (hw->mac.type) {
  3327. case ixgbe_mac_X550_vf:
  3328. dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
  3329. break;
  3330. case ixgbe_mac_X540_vf:
  3331. dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
  3332. break;
  3333. case ixgbe_mac_82599_vf:
  3334. default:
  3335. dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
  3336. break;
  3337. }
  3338. return 0;
  3339. err_register:
  3340. ixgbevf_clear_interrupt_scheme(adapter);
  3341. err_sw_init:
  3342. ixgbevf_reset_interrupt_capability(adapter);
  3343. iounmap(adapter->io_addr);
  3344. err_ioremap:
  3345. disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
  3346. free_netdev(netdev);
  3347. err_alloc_etherdev:
  3348. pci_release_regions(pdev);
  3349. err_pci_reg:
  3350. err_dma:
  3351. if (!adapter || disable_dev)
  3352. pci_disable_device(pdev);
  3353. return err;
  3354. }
  3355. /**
  3356. * ixgbevf_remove - Device Removal Routine
  3357. * @pdev: PCI device information struct
  3358. *
  3359. * ixgbevf_remove is called by the PCI subsystem to alert the driver
  3360. * that it should release a PCI device. The could be caused by a
  3361. * Hot-Plug event, or because the driver is going to be removed from
  3362. * memory.
  3363. **/
  3364. static void ixgbevf_remove(struct pci_dev *pdev)
  3365. {
  3366. struct net_device *netdev = pci_get_drvdata(pdev);
  3367. struct ixgbevf_adapter *adapter;
  3368. bool disable_dev;
  3369. if (!netdev)
  3370. return;
  3371. adapter = netdev_priv(netdev);
  3372. set_bit(__IXGBEVF_REMOVING, &adapter->state);
  3373. cancel_work_sync(&adapter->service_task);
  3374. if (netdev->reg_state == NETREG_REGISTERED)
  3375. unregister_netdev(netdev);
  3376. ixgbevf_clear_interrupt_scheme(adapter);
  3377. ixgbevf_reset_interrupt_capability(adapter);
  3378. iounmap(adapter->io_addr);
  3379. pci_release_regions(pdev);
  3380. hw_dbg(&adapter->hw, "Remove complete\n");
  3381. disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
  3382. free_netdev(netdev);
  3383. if (disable_dev)
  3384. pci_disable_device(pdev);
  3385. }
  3386. /**
  3387. * ixgbevf_io_error_detected - called when PCI error is detected
  3388. * @pdev: Pointer to PCI device
  3389. * @state: The current pci connection state
  3390. *
  3391. * This function is called after a PCI bus error affecting
  3392. * this device has been detected.
  3393. **/
  3394. static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
  3395. pci_channel_state_t state)
  3396. {
  3397. struct net_device *netdev = pci_get_drvdata(pdev);
  3398. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3399. if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
  3400. return PCI_ERS_RESULT_DISCONNECT;
  3401. rtnl_lock();
  3402. netif_device_detach(netdev);
  3403. if (state == pci_channel_io_perm_failure) {
  3404. rtnl_unlock();
  3405. return PCI_ERS_RESULT_DISCONNECT;
  3406. }
  3407. if (netif_running(netdev))
  3408. ixgbevf_down(adapter);
  3409. if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
  3410. pci_disable_device(pdev);
  3411. rtnl_unlock();
  3412. /* Request a slot slot reset. */
  3413. return PCI_ERS_RESULT_NEED_RESET;
  3414. }
  3415. /**
  3416. * ixgbevf_io_slot_reset - called after the pci bus has been reset.
  3417. * @pdev: Pointer to PCI device
  3418. *
  3419. * Restart the card from scratch, as if from a cold-boot. Implementation
  3420. * resembles the first-half of the ixgbevf_resume routine.
  3421. **/
  3422. static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
  3423. {
  3424. struct net_device *netdev = pci_get_drvdata(pdev);
  3425. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3426. if (pci_enable_device_mem(pdev)) {
  3427. dev_err(&pdev->dev,
  3428. "Cannot re-enable PCI device after reset.\n");
  3429. return PCI_ERS_RESULT_DISCONNECT;
  3430. }
  3431. smp_mb__before_atomic();
  3432. clear_bit(__IXGBEVF_DISABLED, &adapter->state);
  3433. pci_set_master(pdev);
  3434. ixgbevf_reset(adapter);
  3435. return PCI_ERS_RESULT_RECOVERED;
  3436. }
  3437. /**
  3438. * ixgbevf_io_resume - called when traffic can start flowing again.
  3439. * @pdev: Pointer to PCI device
  3440. *
  3441. * This callback is called when the error recovery driver tells us that
  3442. * its OK to resume normal operation. Implementation resembles the
  3443. * second-half of the ixgbevf_resume routine.
  3444. **/
  3445. static void ixgbevf_io_resume(struct pci_dev *pdev)
  3446. {
  3447. struct net_device *netdev = pci_get_drvdata(pdev);
  3448. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3449. if (netif_running(netdev))
  3450. ixgbevf_up(adapter);
  3451. netif_device_attach(netdev);
  3452. }
  3453. /* PCI Error Recovery (ERS) */
  3454. static const struct pci_error_handlers ixgbevf_err_handler = {
  3455. .error_detected = ixgbevf_io_error_detected,
  3456. .slot_reset = ixgbevf_io_slot_reset,
  3457. .resume = ixgbevf_io_resume,
  3458. };
  3459. static struct pci_driver ixgbevf_driver = {
  3460. .name = ixgbevf_driver_name,
  3461. .id_table = ixgbevf_pci_tbl,
  3462. .probe = ixgbevf_probe,
  3463. .remove = ixgbevf_remove,
  3464. #ifdef CONFIG_PM
  3465. /* Power Management Hooks */
  3466. .suspend = ixgbevf_suspend,
  3467. .resume = ixgbevf_resume,
  3468. #endif
  3469. .shutdown = ixgbevf_shutdown,
  3470. .err_handler = &ixgbevf_err_handler
  3471. };
  3472. /**
  3473. * ixgbevf_init_module - Driver Registration Routine
  3474. *
  3475. * ixgbevf_init_module is the first routine called when the driver is
  3476. * loaded. All it does is register with the PCI subsystem.
  3477. **/
  3478. static int __init ixgbevf_init_module(void)
  3479. {
  3480. pr_info("%s - version %s\n", ixgbevf_driver_string,
  3481. ixgbevf_driver_version);
  3482. pr_info("%s\n", ixgbevf_copyright);
  3483. ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
  3484. if (!ixgbevf_wq) {
  3485. pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
  3486. return -ENOMEM;
  3487. }
  3488. return pci_register_driver(&ixgbevf_driver);
  3489. }
  3490. module_init(ixgbevf_init_module);
  3491. /**
  3492. * ixgbevf_exit_module - Driver Exit Cleanup Routine
  3493. *
  3494. * ixgbevf_exit_module is called just before the driver is removed
  3495. * from memory.
  3496. **/
  3497. static void __exit ixgbevf_exit_module(void)
  3498. {
  3499. pci_unregister_driver(&ixgbevf_driver);
  3500. if (ixgbevf_wq) {
  3501. destroy_workqueue(ixgbevf_wq);
  3502. ixgbevf_wq = NULL;
  3503. }
  3504. }
  3505. #ifdef DEBUG
  3506. /**
  3507. * ixgbevf_get_hw_dev_name - return device name string
  3508. * used by hardware layer to print debugging information
  3509. **/
  3510. char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
  3511. {
  3512. struct ixgbevf_adapter *adapter = hw->back;
  3513. return adapter->netdev->name;
  3514. }
  3515. #endif
  3516. module_exit(ixgbevf_exit_module);
  3517. /* ixgbevf_main.c */