intel_dp_mst.c 18 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config)
  33. {
  34. struct drm_device *dev = encoder->base.dev;
  35. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  36. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  37. struct intel_dp *intel_dp = &intel_dig_port->dp;
  38. struct drm_atomic_state *state;
  39. int bpp, i;
  40. int lane_count, slots;
  41. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  42. struct drm_connector *drm_connector;
  43. struct intel_connector *connector, *found = NULL;
  44. struct drm_connector_state *connector_state;
  45. int mst_pbn;
  46. pipe_config->dp_encoder_is_mst = true;
  47. pipe_config->has_pch_encoder = false;
  48. pipe_config->has_dp_encoder = true;
  49. bpp = 24;
  50. /*
  51. * for MST we always configure max link bw - the spec doesn't
  52. * seem to suggest we should do otherwise.
  53. */
  54. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  55. pipe_config->lane_count = lane_count;
  56. pipe_config->pipe_bpp = 24;
  57. pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  58. state = pipe_config->base.state;
  59. for_each_connector_in_state(state, drm_connector, connector_state, i) {
  60. connector = to_intel_connector(drm_connector);
  61. if (connector_state->best_encoder == &encoder->base) {
  62. found = connector;
  63. break;
  64. }
  65. }
  66. if (!found) {
  67. DRM_ERROR("can't find connector\n");
  68. return false;
  69. }
  70. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
  71. pipe_config->pbn = mst_pbn;
  72. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  73. intel_link_compute_m_n(bpp, lane_count,
  74. adjusted_mode->crtc_clock,
  75. pipe_config->port_clock,
  76. &pipe_config->dp_m_n);
  77. pipe_config->dp_m_n.tu = slots;
  78. if (IS_HASWELL(dev) || IS_BROADWELL(dev))
  79. hsw_dp_set_ddi_pll_sel(pipe_config);
  80. return true;
  81. }
  82. static void intel_mst_disable_dp(struct intel_encoder *encoder)
  83. {
  84. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  85. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  86. struct intel_dp *intel_dp = &intel_dig_port->dp;
  87. int ret;
  88. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  89. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
  90. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  91. if (ret) {
  92. DRM_ERROR("failed to update payload %d\n", ret);
  93. }
  94. }
  95. static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
  96. {
  97. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  98. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  99. struct intel_dp *intel_dp = &intel_dig_port->dp;
  100. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  101. /* this can fail */
  102. drm_dp_check_act_status(&intel_dp->mst_mgr);
  103. /* and this can also fail */
  104. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  105. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
  106. intel_dp->active_mst_links--;
  107. intel_mst->port = NULL;
  108. if (intel_dp->active_mst_links == 0) {
  109. intel_dig_port->base.post_disable(&intel_dig_port->base);
  110. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  111. }
  112. }
  113. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
  114. {
  115. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  116. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  117. struct intel_dp *intel_dp = &intel_dig_port->dp;
  118. struct drm_device *dev = encoder->base.dev;
  119. struct drm_i915_private *dev_priv = dev->dev_private;
  120. enum port port = intel_dig_port->port;
  121. int ret;
  122. uint32_t temp;
  123. struct intel_connector *found = NULL, *connector;
  124. int slots;
  125. struct drm_crtc *crtc = encoder->base.crtc;
  126. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  127. for_each_intel_connector(dev, connector) {
  128. if (connector->base.state->best_encoder == &encoder->base) {
  129. found = connector;
  130. break;
  131. }
  132. }
  133. if (!found) {
  134. DRM_ERROR("can't find connector\n");
  135. return;
  136. }
  137. /* MST encoders are bound to a crtc, not to a connector,
  138. * force the mapping here for get_hw_state.
  139. */
  140. found->encoder = encoder;
  141. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  142. intel_mst->port = found->port;
  143. if (intel_dp->active_mst_links == 0) {
  144. intel_ddi_clk_select(encoder, intel_crtc->config);
  145. intel_dp_set_link_params(intel_dp, intel_crtc->config);
  146. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  147. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  148. intel_dp_start_link_train(intel_dp);
  149. intel_dp_stop_link_train(intel_dp);
  150. }
  151. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  152. intel_mst->port,
  153. intel_crtc->config->pbn, &slots);
  154. if (ret == false) {
  155. DRM_ERROR("failed to allocate vcpi\n");
  156. return;
  157. }
  158. intel_dp->active_mst_links++;
  159. temp = I915_READ(DP_TP_STATUS(port));
  160. I915_WRITE(DP_TP_STATUS(port), temp);
  161. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  162. }
  163. static void intel_mst_enable_dp(struct intel_encoder *encoder)
  164. {
  165. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  166. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  167. struct intel_dp *intel_dp = &intel_dig_port->dp;
  168. struct drm_device *dev = intel_dig_port->base.base.dev;
  169. struct drm_i915_private *dev_priv = dev->dev_private;
  170. enum port port = intel_dig_port->port;
  171. int ret;
  172. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  173. if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
  174. 1))
  175. DRM_ERROR("Timed out waiting for ACT sent\n");
  176. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  177. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  178. }
  179. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  180. enum pipe *pipe)
  181. {
  182. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  183. *pipe = intel_mst->pipe;
  184. if (intel_mst->port)
  185. return true;
  186. return false;
  187. }
  188. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  189. struct intel_crtc_state *pipe_config)
  190. {
  191. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  192. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  193. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  194. struct drm_device *dev = encoder->base.dev;
  195. struct drm_i915_private *dev_priv = dev->dev_private;
  196. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  197. u32 temp, flags = 0;
  198. pipe_config->has_dp_encoder = true;
  199. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  200. if (temp & TRANS_DDI_PHSYNC)
  201. flags |= DRM_MODE_FLAG_PHSYNC;
  202. else
  203. flags |= DRM_MODE_FLAG_NHSYNC;
  204. if (temp & TRANS_DDI_PVSYNC)
  205. flags |= DRM_MODE_FLAG_PVSYNC;
  206. else
  207. flags |= DRM_MODE_FLAG_NVSYNC;
  208. switch (temp & TRANS_DDI_BPC_MASK) {
  209. case TRANS_DDI_BPC_6:
  210. pipe_config->pipe_bpp = 18;
  211. break;
  212. case TRANS_DDI_BPC_8:
  213. pipe_config->pipe_bpp = 24;
  214. break;
  215. case TRANS_DDI_BPC_10:
  216. pipe_config->pipe_bpp = 30;
  217. break;
  218. case TRANS_DDI_BPC_12:
  219. pipe_config->pipe_bpp = 36;
  220. break;
  221. default:
  222. break;
  223. }
  224. pipe_config->base.adjusted_mode.flags |= flags;
  225. pipe_config->lane_count =
  226. ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  227. intel_dp_get_m_n(crtc, pipe_config);
  228. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  229. }
  230. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  231. {
  232. struct intel_connector *intel_connector = to_intel_connector(connector);
  233. struct intel_dp *intel_dp = intel_connector->mst_port;
  234. struct edid *edid;
  235. int ret;
  236. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  237. if (!edid)
  238. return 0;
  239. ret = intel_connector_update_modes(connector, edid);
  240. kfree(edid);
  241. return ret;
  242. }
  243. static enum drm_connector_status
  244. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  245. {
  246. struct intel_connector *intel_connector = to_intel_connector(connector);
  247. struct intel_dp *intel_dp = intel_connector->mst_port;
  248. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  249. }
  250. static int
  251. intel_dp_mst_set_property(struct drm_connector *connector,
  252. struct drm_property *property,
  253. uint64_t val)
  254. {
  255. return 0;
  256. }
  257. static void
  258. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  259. {
  260. struct intel_connector *intel_connector = to_intel_connector(connector);
  261. if (!IS_ERR_OR_NULL(intel_connector->edid))
  262. kfree(intel_connector->edid);
  263. drm_connector_cleanup(connector);
  264. kfree(connector);
  265. }
  266. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  267. .dpms = drm_atomic_helper_connector_dpms,
  268. .detect = intel_dp_mst_detect,
  269. .fill_modes = drm_helper_probe_single_connector_modes,
  270. .set_property = intel_dp_mst_set_property,
  271. .atomic_get_property = intel_connector_atomic_get_property,
  272. .destroy = intel_dp_mst_connector_destroy,
  273. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  274. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  275. };
  276. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  277. {
  278. return intel_dp_mst_get_ddc_modes(connector);
  279. }
  280. static enum drm_mode_status
  281. intel_dp_mst_mode_valid(struct drm_connector *connector,
  282. struct drm_display_mode *mode)
  283. {
  284. /* TODO - validate mode against available PBN for link */
  285. if (mode->clock < 10000)
  286. return MODE_CLOCK_LOW;
  287. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  288. return MODE_H_ILLEGAL;
  289. return MODE_OK;
  290. }
  291. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  292. struct drm_connector_state *state)
  293. {
  294. struct intel_connector *intel_connector = to_intel_connector(connector);
  295. struct intel_dp *intel_dp = intel_connector->mst_port;
  296. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  297. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  298. }
  299. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  300. {
  301. struct intel_connector *intel_connector = to_intel_connector(connector);
  302. struct intel_dp *intel_dp = intel_connector->mst_port;
  303. return &intel_dp->mst_encoders[0]->base.base;
  304. }
  305. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  306. .get_modes = intel_dp_mst_get_modes,
  307. .mode_valid = intel_dp_mst_mode_valid,
  308. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  309. .best_encoder = intel_mst_best_encoder,
  310. };
  311. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  312. {
  313. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  314. drm_encoder_cleanup(encoder);
  315. kfree(intel_mst);
  316. }
  317. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  318. .destroy = intel_dp_mst_encoder_destroy,
  319. };
  320. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  321. {
  322. if (connector->encoder && connector->base.state->crtc) {
  323. enum pipe pipe;
  324. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  325. return false;
  326. return true;
  327. }
  328. return false;
  329. }
  330. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  331. {
  332. #ifdef CONFIG_DRM_FBDEV_EMULATION
  333. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  334. if (dev_priv->fbdev)
  335. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
  336. &connector->base);
  337. #endif
  338. }
  339. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  340. {
  341. #ifdef CONFIG_DRM_FBDEV_EMULATION
  342. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  343. if (dev_priv->fbdev)
  344. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
  345. &connector->base);
  346. #endif
  347. }
  348. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  349. {
  350. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  351. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  352. struct drm_device *dev = intel_dig_port->base.base.dev;
  353. struct intel_connector *intel_connector;
  354. struct drm_connector *connector;
  355. int i;
  356. intel_connector = intel_connector_alloc();
  357. if (!intel_connector)
  358. return NULL;
  359. connector = &intel_connector->base;
  360. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  361. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  362. intel_connector->unregister = intel_connector_unregister;
  363. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  364. intel_connector->mst_port = intel_dp;
  365. intel_connector->port = port;
  366. for (i = PIPE_A; i <= PIPE_C; i++) {
  367. drm_mode_connector_attach_encoder(&intel_connector->base,
  368. &intel_dp->mst_encoders[i]->base.base);
  369. }
  370. intel_dp_add_properties(intel_dp, connector);
  371. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  372. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  373. drm_mode_connector_set_path_property(connector, pathprop);
  374. return connector;
  375. }
  376. static void intel_dp_register_mst_connector(struct drm_connector *connector)
  377. {
  378. struct intel_connector *intel_connector = to_intel_connector(connector);
  379. struct drm_device *dev = connector->dev;
  380. drm_modeset_lock_all(dev);
  381. intel_connector_add_to_fbdev(intel_connector);
  382. drm_modeset_unlock_all(dev);
  383. drm_connector_register(&intel_connector->base);
  384. }
  385. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  386. struct drm_connector *connector)
  387. {
  388. struct intel_connector *intel_connector = to_intel_connector(connector);
  389. struct drm_device *dev = connector->dev;
  390. /* need to nuke the connector */
  391. drm_modeset_lock_all(dev);
  392. if (connector->state->crtc) {
  393. struct drm_mode_set set;
  394. int ret;
  395. memset(&set, 0, sizeof(set));
  396. set.crtc = connector->state->crtc,
  397. ret = drm_atomic_helper_set_config(&set);
  398. WARN(ret, "Disabling mst crtc failed with %i\n", ret);
  399. }
  400. drm_modeset_unlock_all(dev);
  401. intel_connector->unregister(intel_connector);
  402. drm_modeset_lock_all(dev);
  403. intel_connector_remove_from_fbdev(intel_connector);
  404. drm_connector_cleanup(connector);
  405. drm_modeset_unlock_all(dev);
  406. kfree(intel_connector);
  407. DRM_DEBUG_KMS("\n");
  408. }
  409. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  410. {
  411. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  412. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  413. struct drm_device *dev = intel_dig_port->base.base.dev;
  414. drm_kms_helper_hotplug_event(dev);
  415. }
  416. static struct drm_dp_mst_topology_cbs mst_cbs = {
  417. .add_connector = intel_dp_add_mst_connector,
  418. .register_connector = intel_dp_register_mst_connector,
  419. .destroy_connector = intel_dp_destroy_mst_connector,
  420. .hotplug = intel_dp_mst_hotplug,
  421. };
  422. static struct intel_dp_mst_encoder *
  423. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  424. {
  425. struct intel_dp_mst_encoder *intel_mst;
  426. struct intel_encoder *intel_encoder;
  427. struct drm_device *dev = intel_dig_port->base.base.dev;
  428. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  429. if (!intel_mst)
  430. return NULL;
  431. intel_mst->pipe = pipe;
  432. intel_encoder = &intel_mst->base;
  433. intel_mst->primary = intel_dig_port;
  434. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  435. DRM_MODE_ENCODER_DPMST, NULL);
  436. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  437. intel_encoder->crtc_mask = 0x7;
  438. intel_encoder->cloneable = 0;
  439. intel_encoder->compute_config = intel_dp_mst_compute_config;
  440. intel_encoder->disable = intel_mst_disable_dp;
  441. intel_encoder->post_disable = intel_mst_post_disable_dp;
  442. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  443. intel_encoder->enable = intel_mst_enable_dp;
  444. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  445. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  446. return intel_mst;
  447. }
  448. static bool
  449. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  450. {
  451. int i;
  452. struct intel_dp *intel_dp = &intel_dig_port->dp;
  453. for (i = PIPE_A; i <= PIPE_C; i++)
  454. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  455. return true;
  456. }
  457. int
  458. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  459. {
  460. struct intel_dp *intel_dp = &intel_dig_port->dp;
  461. struct drm_device *dev = intel_dig_port->base.base.dev;
  462. int ret;
  463. intel_dp->can_mst = true;
  464. intel_dp->mst_mgr.cbs = &mst_cbs;
  465. /* create encoders */
  466. intel_dp_create_fake_mst_encoders(intel_dig_port);
  467. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  468. if (ret) {
  469. intel_dp->can_mst = false;
  470. return ret;
  471. }
  472. return 0;
  473. }
  474. void
  475. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  476. {
  477. struct intel_dp *intel_dp = &intel_dig_port->dp;
  478. if (!intel_dp->can_mst)
  479. return;
  480. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  481. /* encoders will get killed by normal cleanup */
  482. }