mtk_drm_drv.c 14 KB

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  1. /*
  2. * Copyright (c) 2015 MediaTek Inc.
  3. * Author: YT SHEN <yt.shen@mediatek.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <drm/drmP.h>
  15. #include <drm/drm_atomic.h>
  16. #include <drm/drm_atomic_helper.h>
  17. #include <drm/drm_crtc_helper.h>
  18. #include <drm/drm_gem.h>
  19. #include <drm/drm_gem_cma_helper.h>
  20. #include <linux/component.h>
  21. #include <linux/iommu.h>
  22. #include <linux/of_address.h>
  23. #include <linux/of_platform.h>
  24. #include <linux/pm_runtime.h>
  25. #include "mtk_drm_crtc.h"
  26. #include "mtk_drm_ddp.h"
  27. #include "mtk_drm_ddp_comp.h"
  28. #include "mtk_drm_drv.h"
  29. #include "mtk_drm_fb.h"
  30. #include "mtk_drm_gem.h"
  31. #define DRIVER_NAME "mediatek"
  32. #define DRIVER_DESC "Mediatek SoC DRM"
  33. #define DRIVER_DATE "20150513"
  34. #define DRIVER_MAJOR 1
  35. #define DRIVER_MINOR 0
  36. static void mtk_atomic_schedule(struct mtk_drm_private *private,
  37. struct drm_atomic_state *state)
  38. {
  39. private->commit.state = state;
  40. schedule_work(&private->commit.work);
  41. }
  42. static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state)
  43. {
  44. struct drm_plane *plane;
  45. struct drm_plane_state *plane_state;
  46. int i;
  47. for_each_plane_in_state(state, plane, plane_state, i)
  48. mtk_fb_wait(plane->state->fb);
  49. }
  50. static void mtk_atomic_complete(struct mtk_drm_private *private,
  51. struct drm_atomic_state *state)
  52. {
  53. struct drm_device *drm = private->drm;
  54. mtk_atomic_wait_for_fences(state);
  55. drm_atomic_helper_commit_modeset_disables(drm, state);
  56. drm_atomic_helper_commit_planes(drm, state, false);
  57. drm_atomic_helper_commit_modeset_enables(drm, state);
  58. drm_atomic_helper_wait_for_vblanks(drm, state);
  59. drm_atomic_helper_cleanup_planes(drm, state);
  60. drm_atomic_state_free(state);
  61. }
  62. static void mtk_atomic_work(struct work_struct *work)
  63. {
  64. struct mtk_drm_private *private = container_of(work,
  65. struct mtk_drm_private, commit.work);
  66. mtk_atomic_complete(private, private->commit.state);
  67. }
  68. static int mtk_atomic_commit(struct drm_device *drm,
  69. struct drm_atomic_state *state,
  70. bool async)
  71. {
  72. struct mtk_drm_private *private = drm->dev_private;
  73. int ret;
  74. ret = drm_atomic_helper_prepare_planes(drm, state);
  75. if (ret)
  76. return ret;
  77. mutex_lock(&private->commit.lock);
  78. flush_work(&private->commit.work);
  79. drm_atomic_helper_swap_state(state, true);
  80. if (async)
  81. mtk_atomic_schedule(private, state);
  82. else
  83. mtk_atomic_complete(private, state);
  84. mutex_unlock(&private->commit.lock);
  85. return 0;
  86. }
  87. static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
  88. .fb_create = mtk_drm_mode_fb_create,
  89. .atomic_check = drm_atomic_helper_check,
  90. .atomic_commit = mtk_atomic_commit,
  91. };
  92. static const enum mtk_ddp_comp_id mtk_ddp_main[] = {
  93. DDP_COMPONENT_OVL0,
  94. DDP_COMPONENT_COLOR0,
  95. DDP_COMPONENT_AAL,
  96. DDP_COMPONENT_OD,
  97. DDP_COMPONENT_RDMA0,
  98. DDP_COMPONENT_UFOE,
  99. DDP_COMPONENT_DSI0,
  100. DDP_COMPONENT_PWM0,
  101. };
  102. static const enum mtk_ddp_comp_id mtk_ddp_ext[] = {
  103. DDP_COMPONENT_OVL1,
  104. DDP_COMPONENT_COLOR1,
  105. DDP_COMPONENT_GAMMA,
  106. DDP_COMPONENT_RDMA1,
  107. DDP_COMPONENT_DPI0,
  108. };
  109. static int mtk_drm_kms_init(struct drm_device *drm)
  110. {
  111. struct mtk_drm_private *private = drm->dev_private;
  112. struct platform_device *pdev;
  113. struct device_node *np;
  114. int ret;
  115. if (!iommu_present(&platform_bus_type))
  116. return -EPROBE_DEFER;
  117. pdev = of_find_device_by_node(private->mutex_node);
  118. if (!pdev) {
  119. dev_err(drm->dev, "Waiting for disp-mutex device %s\n",
  120. private->mutex_node->full_name);
  121. of_node_put(private->mutex_node);
  122. return -EPROBE_DEFER;
  123. }
  124. private->mutex_dev = &pdev->dev;
  125. drm_mode_config_init(drm);
  126. drm->mode_config.min_width = 64;
  127. drm->mode_config.min_height = 64;
  128. /*
  129. * set max width and height as default value(4096x4096).
  130. * this value would be used to check framebuffer size limitation
  131. * at drm_mode_addfb().
  132. */
  133. drm->mode_config.max_width = 4096;
  134. drm->mode_config.max_height = 4096;
  135. drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
  136. ret = component_bind_all(drm->dev, drm);
  137. if (ret)
  138. goto err_config_cleanup;
  139. /*
  140. * We currently support two fixed data streams, each optional,
  141. * and each statically assigned to a crtc:
  142. * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
  143. */
  144. ret = mtk_drm_crtc_create(drm, mtk_ddp_main, ARRAY_SIZE(mtk_ddp_main));
  145. if (ret < 0)
  146. goto err_component_unbind;
  147. /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
  148. ret = mtk_drm_crtc_create(drm, mtk_ddp_ext, ARRAY_SIZE(mtk_ddp_ext));
  149. if (ret < 0)
  150. goto err_component_unbind;
  151. /* Use OVL device for all DMA memory allocations */
  152. np = private->comp_node[mtk_ddp_main[0]] ?:
  153. private->comp_node[mtk_ddp_ext[0]];
  154. pdev = of_find_device_by_node(np);
  155. if (!pdev) {
  156. ret = -ENODEV;
  157. dev_err(drm->dev, "Need at least one OVL device\n");
  158. goto err_component_unbind;
  159. }
  160. private->dma_dev = &pdev->dev;
  161. /*
  162. * We don't use the drm_irq_install() helpers provided by the DRM
  163. * core, so we need to set this manually in order to allow the
  164. * DRM_IOCTL_WAIT_VBLANK to operate correctly.
  165. */
  166. drm->irq_enabled = true;
  167. ret = drm_vblank_init(drm, MAX_CRTC);
  168. if (ret < 0)
  169. goto err_component_unbind;
  170. drm_kms_helper_poll_init(drm);
  171. drm_mode_config_reset(drm);
  172. return 0;
  173. err_component_unbind:
  174. component_unbind_all(drm->dev, drm);
  175. err_config_cleanup:
  176. drm_mode_config_cleanup(drm);
  177. return ret;
  178. }
  179. static void mtk_drm_kms_deinit(struct drm_device *drm)
  180. {
  181. drm_kms_helper_poll_fini(drm);
  182. drm_vblank_cleanup(drm);
  183. component_unbind_all(drm->dev, drm);
  184. drm_mode_config_cleanup(drm);
  185. }
  186. static const struct file_operations mtk_drm_fops = {
  187. .owner = THIS_MODULE,
  188. .open = drm_open,
  189. .release = drm_release,
  190. .unlocked_ioctl = drm_ioctl,
  191. .mmap = mtk_drm_gem_mmap,
  192. .poll = drm_poll,
  193. .read = drm_read,
  194. #ifdef CONFIG_COMPAT
  195. .compat_ioctl = drm_compat_ioctl,
  196. #endif
  197. };
  198. static struct drm_driver mtk_drm_driver = {
  199. .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
  200. DRIVER_ATOMIC,
  201. .get_vblank_counter = drm_vblank_count,
  202. .enable_vblank = mtk_drm_crtc_enable_vblank,
  203. .disable_vblank = mtk_drm_crtc_disable_vblank,
  204. .gem_free_object_unlocked = mtk_drm_gem_free_object,
  205. .gem_vm_ops = &drm_gem_cma_vm_ops,
  206. .dumb_create = mtk_drm_gem_dumb_create,
  207. .dumb_map_offset = mtk_drm_gem_dumb_map_offset,
  208. .dumb_destroy = drm_gem_dumb_destroy,
  209. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  210. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  211. .gem_prime_export = drm_gem_prime_export,
  212. .gem_prime_import = drm_gem_prime_import,
  213. .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
  214. .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
  215. .gem_prime_mmap = mtk_drm_gem_mmap_buf,
  216. .fops = &mtk_drm_fops,
  217. .name = DRIVER_NAME,
  218. .desc = DRIVER_DESC,
  219. .date = DRIVER_DATE,
  220. .major = DRIVER_MAJOR,
  221. .minor = DRIVER_MINOR,
  222. };
  223. static int compare_of(struct device *dev, void *data)
  224. {
  225. return dev->of_node == data;
  226. }
  227. static int mtk_drm_bind(struct device *dev)
  228. {
  229. struct mtk_drm_private *private = dev_get_drvdata(dev);
  230. struct drm_device *drm;
  231. int ret;
  232. drm = drm_dev_alloc(&mtk_drm_driver, dev);
  233. if (!drm)
  234. return -ENOMEM;
  235. drm->dev_private = private;
  236. private->drm = drm;
  237. ret = mtk_drm_kms_init(drm);
  238. if (ret < 0)
  239. goto err_free;
  240. ret = drm_dev_register(drm, 0);
  241. if (ret < 0)
  242. goto err_deinit;
  243. return 0;
  244. err_deinit:
  245. mtk_drm_kms_deinit(drm);
  246. err_free:
  247. drm_dev_unref(drm);
  248. return ret;
  249. }
  250. static void mtk_drm_unbind(struct device *dev)
  251. {
  252. struct mtk_drm_private *private = dev_get_drvdata(dev);
  253. drm_put_dev(private->drm);
  254. private->drm = NULL;
  255. }
  256. static const struct component_master_ops mtk_drm_ops = {
  257. .bind = mtk_drm_bind,
  258. .unbind = mtk_drm_unbind,
  259. };
  260. static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
  261. { .compatible = "mediatek,mt8173-disp-ovl", .data = (void *)MTK_DISP_OVL },
  262. { .compatible = "mediatek,mt8173-disp-rdma", .data = (void *)MTK_DISP_RDMA },
  263. { .compatible = "mediatek,mt8173-disp-wdma", .data = (void *)MTK_DISP_WDMA },
  264. { .compatible = "mediatek,mt8173-disp-color", .data = (void *)MTK_DISP_COLOR },
  265. { .compatible = "mediatek,mt8173-disp-aal", .data = (void *)MTK_DISP_AAL},
  266. { .compatible = "mediatek,mt8173-disp-gamma", .data = (void *)MTK_DISP_GAMMA, },
  267. { .compatible = "mediatek,mt8173-disp-ufoe", .data = (void *)MTK_DISP_UFOE },
  268. { .compatible = "mediatek,mt8173-dsi", .data = (void *)MTK_DSI },
  269. { .compatible = "mediatek,mt8173-dpi", .data = (void *)MTK_DPI },
  270. { .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
  271. { .compatible = "mediatek,mt8173-disp-pwm", .data = (void *)MTK_DISP_PWM },
  272. { .compatible = "mediatek,mt8173-disp-od", .data = (void *)MTK_DISP_OD },
  273. { }
  274. };
  275. static int mtk_drm_probe(struct platform_device *pdev)
  276. {
  277. struct device *dev = &pdev->dev;
  278. struct mtk_drm_private *private;
  279. struct resource *mem;
  280. struct device_node *node;
  281. struct component_match *match = NULL;
  282. int ret;
  283. int i;
  284. private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
  285. if (!private)
  286. return -ENOMEM;
  287. mutex_init(&private->commit.lock);
  288. INIT_WORK(&private->commit.work, mtk_atomic_work);
  289. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  290. private->config_regs = devm_ioremap_resource(dev, mem);
  291. if (IS_ERR(private->config_regs)) {
  292. ret = PTR_ERR(private->config_regs);
  293. dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
  294. ret);
  295. return ret;
  296. }
  297. /* Iterate over sibling DISP function blocks */
  298. for_each_child_of_node(dev->of_node->parent, node) {
  299. const struct of_device_id *of_id;
  300. enum mtk_ddp_comp_type comp_type;
  301. int comp_id;
  302. of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
  303. if (!of_id)
  304. continue;
  305. if (!of_device_is_available(node)) {
  306. dev_dbg(dev, "Skipping disabled component %s\n",
  307. node->full_name);
  308. continue;
  309. }
  310. comp_type = (enum mtk_ddp_comp_type)of_id->data;
  311. if (comp_type == MTK_DISP_MUTEX) {
  312. private->mutex_node = of_node_get(node);
  313. continue;
  314. }
  315. comp_id = mtk_ddp_comp_get_id(node, comp_type);
  316. if (comp_id < 0) {
  317. dev_warn(dev, "Skipping unknown component %s\n",
  318. node->full_name);
  319. continue;
  320. }
  321. private->comp_node[comp_id] = of_node_get(node);
  322. /*
  323. * Currently only the OVL, RDMA, DSI, and DPI blocks have
  324. * separate component platform drivers and initialize their own
  325. * DDP component structure. The others are initialized here.
  326. */
  327. if (comp_type == MTK_DISP_OVL ||
  328. comp_type == MTK_DISP_RDMA ||
  329. comp_type == MTK_DSI ||
  330. comp_type == MTK_DPI) {
  331. dev_info(dev, "Adding component match for %s\n",
  332. node->full_name);
  333. component_match_add(dev, &match, compare_of, node);
  334. } else {
  335. struct mtk_ddp_comp *comp;
  336. comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
  337. if (!comp) {
  338. ret = -ENOMEM;
  339. goto err_node;
  340. }
  341. ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
  342. if (ret)
  343. goto err_node;
  344. private->ddp_comp[comp_id] = comp;
  345. }
  346. }
  347. if (!private->mutex_node) {
  348. dev_err(dev, "Failed to find disp-mutex node\n");
  349. ret = -ENODEV;
  350. goto err_node;
  351. }
  352. pm_runtime_enable(dev);
  353. platform_set_drvdata(pdev, private);
  354. ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
  355. if (ret)
  356. goto err_pm;
  357. return 0;
  358. err_pm:
  359. pm_runtime_disable(dev);
  360. err_node:
  361. of_node_put(private->mutex_node);
  362. for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
  363. of_node_put(private->comp_node[i]);
  364. return ret;
  365. }
  366. static int mtk_drm_remove(struct platform_device *pdev)
  367. {
  368. struct mtk_drm_private *private = platform_get_drvdata(pdev);
  369. struct drm_device *drm = private->drm;
  370. int i;
  371. drm_dev_unregister(drm);
  372. mtk_drm_kms_deinit(drm);
  373. drm_dev_unref(drm);
  374. component_master_del(&pdev->dev, &mtk_drm_ops);
  375. pm_runtime_disable(&pdev->dev);
  376. of_node_put(private->mutex_node);
  377. for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
  378. of_node_put(private->comp_node[i]);
  379. return 0;
  380. }
  381. #ifdef CONFIG_PM_SLEEP
  382. static int mtk_drm_sys_suspend(struct device *dev)
  383. {
  384. struct mtk_drm_private *private = dev_get_drvdata(dev);
  385. struct drm_device *drm = private->drm;
  386. drm_kms_helper_poll_disable(drm);
  387. private->suspend_state = drm_atomic_helper_suspend(drm);
  388. if (IS_ERR(private->suspend_state)) {
  389. drm_kms_helper_poll_enable(drm);
  390. return PTR_ERR(private->suspend_state);
  391. }
  392. DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
  393. return 0;
  394. }
  395. static int mtk_drm_sys_resume(struct device *dev)
  396. {
  397. struct mtk_drm_private *private = dev_get_drvdata(dev);
  398. struct drm_device *drm = private->drm;
  399. drm_atomic_helper_resume(drm, private->suspend_state);
  400. drm_kms_helper_poll_enable(drm);
  401. DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
  402. return 0;
  403. }
  404. #endif
  405. static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
  406. mtk_drm_sys_resume);
  407. static const struct of_device_id mtk_drm_of_ids[] = {
  408. { .compatible = "mediatek,mt8173-mmsys", },
  409. { }
  410. };
  411. static struct platform_driver mtk_drm_platform_driver = {
  412. .probe = mtk_drm_probe,
  413. .remove = mtk_drm_remove,
  414. .driver = {
  415. .name = "mediatek-drm",
  416. .of_match_table = mtk_drm_of_ids,
  417. .pm = &mtk_drm_pm_ops,
  418. },
  419. };
  420. static struct platform_driver * const mtk_drm_drivers[] = {
  421. &mtk_ddp_driver,
  422. &mtk_disp_ovl_driver,
  423. &mtk_disp_rdma_driver,
  424. &mtk_dpi_driver,
  425. &mtk_drm_platform_driver,
  426. &mtk_dsi_driver,
  427. &mtk_mipi_tx_driver,
  428. };
  429. static int __init mtk_drm_init(void)
  430. {
  431. int ret;
  432. int i;
  433. for (i = 0; i < ARRAY_SIZE(mtk_drm_drivers); i++) {
  434. ret = platform_driver_register(mtk_drm_drivers[i]);
  435. if (ret < 0) {
  436. pr_err("Failed to register %s driver: %d\n",
  437. mtk_drm_drivers[i]->driver.name, ret);
  438. goto err;
  439. }
  440. }
  441. return 0;
  442. err:
  443. while (--i >= 0)
  444. platform_driver_unregister(mtk_drm_drivers[i]);
  445. return ret;
  446. }
  447. static void __exit mtk_drm_exit(void)
  448. {
  449. int i;
  450. for (i = ARRAY_SIZE(mtk_drm_drivers) - 1; i >= 0; i--)
  451. platform_driver_unregister(mtk_drm_drivers[i]);
  452. }
  453. module_init(mtk_drm_init);
  454. module_exit(mtk_drm_exit);
  455. MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
  456. MODULE_DESCRIPTION("Mediatek SoC DRM driver");
  457. MODULE_LICENSE("GPL v2");