tegra_usb_phy.h 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2010 Google, Inc.
  4. *
  5. * This software is licensed under the terms of the GNU General Public
  6. * License version 2, as published by the Free Software Foundation, and
  7. * may be copied, distributed, and modified under those terms.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. */
  15. #ifndef __TEGRA_USB_PHY_H
  16. #define __TEGRA_USB_PHY_H
  17. #include <linux/clk.h>
  18. #include <linux/reset.h>
  19. #include <linux/usb/otg.h>
  20. /*
  21. * utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers
  22. * should be set up by clk-tegra, false if by the PHY code
  23. * has_hostpc: true if the USB controller has the HOSTPC extension, which
  24. * changes the location of the PHCD and PTS fields
  25. * requires_usbmode_setup: true if the USBMODE register needs to be set to
  26. * enter host mode
  27. * requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level
  28. * and hsdiscon_level should be set for adequate signal quality
  29. */
  30. struct tegra_phy_soc_config {
  31. bool utmi_pll_config_in_car_module;
  32. bool has_hostpc;
  33. bool requires_usbmode_setup;
  34. bool requires_extra_tuning_parameters;
  35. };
  36. struct tegra_utmip_config {
  37. u8 hssync_start_delay;
  38. u8 elastic_limit;
  39. u8 idle_wait_delay;
  40. u8 term_range_adj;
  41. bool xcvr_setup_use_fuses;
  42. u8 xcvr_setup;
  43. u8 xcvr_lsfslew;
  44. u8 xcvr_lsrslew;
  45. u8 xcvr_hsslew;
  46. u8 hssquelch_level;
  47. u8 hsdiscon_level;
  48. };
  49. enum tegra_usb_phy_port_speed {
  50. TEGRA_USB_PHY_PORT_SPEED_FULL = 0,
  51. TEGRA_USB_PHY_PORT_SPEED_LOW,
  52. TEGRA_USB_PHY_PORT_SPEED_HIGH,
  53. };
  54. struct tegra_xtal_freq;
  55. struct tegra_usb_phy {
  56. int instance;
  57. const struct tegra_xtal_freq *freq;
  58. void __iomem *regs;
  59. void __iomem *pad_regs;
  60. struct clk *clk;
  61. struct clk *pll_u;
  62. struct clk *pad_clk;
  63. struct regulator *vbus;
  64. enum usb_dr_mode mode;
  65. void *config;
  66. const struct tegra_phy_soc_config *soc_config;
  67. struct usb_phy *ulpi;
  68. struct usb_phy u_phy;
  69. bool is_legacy_phy;
  70. bool is_ulpi_phy;
  71. int reset_gpio;
  72. struct reset_control *pad_rst;
  73. };
  74. void tegra_usb_phy_preresume(struct usb_phy *phy);
  75. void tegra_usb_phy_postresume(struct usb_phy *phy);
  76. void tegra_ehci_phy_restore_start(struct usb_phy *phy,
  77. enum tegra_usb_phy_port_speed port_speed);
  78. void tegra_ehci_phy_restore_end(struct usb_phy *phy);
  79. #endif /* __TEGRA_USB_PHY_H */