patch_sigmatel.c 136 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/slab.h>
  29. #include <linux/pci.h>
  30. #include <linux/dmi.h>
  31. #include <linux/module.h>
  32. #include <sound/core.h>
  33. #include <sound/jack.h>
  34. #include <sound/tlv.h>
  35. #include "hda_codec.h"
  36. #include "hda_local.h"
  37. #include "hda_auto_parser.h"
  38. #include "hda_beep.h"
  39. #include "hda_jack.h"
  40. #include "hda_generic.h"
  41. enum {
  42. STAC_VREF_EVENT = 8,
  43. STAC_PWR_EVENT,
  44. };
  45. enum {
  46. STAC_REF,
  47. STAC_9200_OQO,
  48. STAC_9200_DELL_D21,
  49. STAC_9200_DELL_D22,
  50. STAC_9200_DELL_D23,
  51. STAC_9200_DELL_M21,
  52. STAC_9200_DELL_M22,
  53. STAC_9200_DELL_M23,
  54. STAC_9200_DELL_M24,
  55. STAC_9200_DELL_M25,
  56. STAC_9200_DELL_M26,
  57. STAC_9200_DELL_M27,
  58. STAC_9200_M4,
  59. STAC_9200_M4_2,
  60. STAC_9200_PANASONIC,
  61. STAC_9200_EAPD_INIT,
  62. STAC_9200_MODELS
  63. };
  64. enum {
  65. STAC_9205_REF,
  66. STAC_9205_DELL_M42,
  67. STAC_9205_DELL_M43,
  68. STAC_9205_DELL_M44,
  69. STAC_9205_EAPD,
  70. STAC_9205_MODELS
  71. };
  72. enum {
  73. STAC_92HD73XX_NO_JD, /* no jack-detection */
  74. STAC_92HD73XX_REF,
  75. STAC_92HD73XX_INTEL,
  76. STAC_DELL_M6_AMIC,
  77. STAC_DELL_M6_DMIC,
  78. STAC_DELL_M6_BOTH,
  79. STAC_DELL_EQ,
  80. STAC_ALIENWARE_M17X,
  81. STAC_92HD89XX_HP_FRONT_JACK,
  82. STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
  83. STAC_92HD73XX_MODELS
  84. };
  85. enum {
  86. STAC_92HD83XXX_REF,
  87. STAC_92HD83XXX_PWR_REF,
  88. STAC_DELL_S14,
  89. STAC_DELL_VOSTRO_3500,
  90. STAC_92HD83XXX_HP_cNB11_INTQUAD,
  91. STAC_HP_DV7_4000,
  92. STAC_HP_ZEPHYR,
  93. STAC_92HD83XXX_HP_LED,
  94. STAC_92HD83XXX_HP_INV_LED,
  95. STAC_92HD83XXX_HP_MIC_LED,
  96. STAC_HP_LED_GPIO10,
  97. STAC_92HD83XXX_HEADSET_JACK,
  98. STAC_92HD83XXX_HP,
  99. STAC_HP_ENVY_BASS,
  100. STAC_HP_BNB13_EQ,
  101. STAC_HP_ENVY_TS_BASS,
  102. STAC_92HD83XXX_MODELS
  103. };
  104. enum {
  105. STAC_92HD71BXX_REF,
  106. STAC_DELL_M4_1,
  107. STAC_DELL_M4_2,
  108. STAC_DELL_M4_3,
  109. STAC_HP_M4,
  110. STAC_HP_DV4,
  111. STAC_HP_DV5,
  112. STAC_HP_HDX,
  113. STAC_92HD71BXX_HP,
  114. STAC_92HD71BXX_NO_DMIC,
  115. STAC_92HD71BXX_NO_SMUX,
  116. STAC_92HD71BXX_MODELS
  117. };
  118. enum {
  119. STAC_92HD95_HP_LED,
  120. STAC_92HD95_HP_BASS,
  121. STAC_92HD95_MODELS
  122. };
  123. enum {
  124. STAC_925x_REF,
  125. STAC_M1,
  126. STAC_M1_2,
  127. STAC_M2,
  128. STAC_M2_2,
  129. STAC_M3,
  130. STAC_M5,
  131. STAC_M6,
  132. STAC_925x_MODELS
  133. };
  134. enum {
  135. STAC_D945_REF,
  136. STAC_D945GTP3,
  137. STAC_D945GTP5,
  138. STAC_INTEL_MAC_V1,
  139. STAC_INTEL_MAC_V2,
  140. STAC_INTEL_MAC_V3,
  141. STAC_INTEL_MAC_V4,
  142. STAC_INTEL_MAC_V5,
  143. STAC_INTEL_MAC_AUTO,
  144. STAC_ECS_202,
  145. STAC_922X_DELL_D81,
  146. STAC_922X_DELL_D82,
  147. STAC_922X_DELL_M81,
  148. STAC_922X_DELL_M82,
  149. STAC_922X_INTEL_MAC_GPIO,
  150. STAC_922X_MODELS
  151. };
  152. enum {
  153. STAC_D965_REF_NO_JD, /* no jack-detection */
  154. STAC_D965_REF,
  155. STAC_D965_3ST,
  156. STAC_D965_5ST,
  157. STAC_D965_5ST_NO_FP,
  158. STAC_D965_VERBS,
  159. STAC_DELL_3ST,
  160. STAC_DELL_BIOS,
  161. STAC_DELL_BIOS_AMIC,
  162. STAC_DELL_BIOS_SPDIF,
  163. STAC_927X_DELL_DMIC,
  164. STAC_927X_VOLKNOB,
  165. STAC_927X_MODELS
  166. };
  167. enum {
  168. STAC_9872_VAIO,
  169. STAC_9872_MODELS
  170. };
  171. struct sigmatel_spec {
  172. struct hda_gen_spec gen;
  173. unsigned int eapd_switch: 1;
  174. unsigned int linear_tone_beep:1;
  175. unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
  176. unsigned int volknob_init:1; /* special volume-knob initialization */
  177. unsigned int powerdown_adcs:1;
  178. unsigned int have_spdif_mux:1;
  179. /* gpio lines */
  180. unsigned int eapd_mask;
  181. unsigned int gpio_mask;
  182. unsigned int gpio_dir;
  183. unsigned int gpio_data;
  184. unsigned int gpio_mute;
  185. unsigned int gpio_led;
  186. unsigned int gpio_led_polarity;
  187. unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
  188. unsigned int vref_led;
  189. int default_polarity;
  190. unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
  191. unsigned int mic_enabled; /* current mic mute state (bitmask) */
  192. /* stream */
  193. unsigned int stream_delay;
  194. /* analog loopback */
  195. const struct snd_kcontrol_new *aloopback_ctl;
  196. unsigned int aloopback;
  197. unsigned char aloopback_mask;
  198. unsigned char aloopback_shift;
  199. /* power management */
  200. unsigned int power_map_bits;
  201. unsigned int num_pwrs;
  202. const hda_nid_t *pwr_nids;
  203. unsigned int active_adcs;
  204. /* beep widgets */
  205. hda_nid_t anabeep_nid;
  206. /* SPDIF-out mux */
  207. const char * const *spdif_labels;
  208. struct hda_input_mux spdif_mux;
  209. unsigned int cur_smux[2];
  210. };
  211. #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
  212. #define AC_VERB_IDT_GET_POWER_MAP 0xfec
  213. static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
  214. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  215. 0x0f, 0x10, 0x11
  216. };
  217. static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
  218. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  219. 0x0f, 0x10
  220. };
  221. static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
  222. 0x0a, 0x0d, 0x0f
  223. };
  224. /*
  225. * PCM hooks
  226. */
  227. static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
  228. struct hda_codec *codec,
  229. struct snd_pcm_substream *substream,
  230. int action)
  231. {
  232. struct sigmatel_spec *spec = codec->spec;
  233. if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
  234. msleep(spec->stream_delay);
  235. }
  236. static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
  237. struct hda_codec *codec,
  238. struct snd_pcm_substream *substream,
  239. int action)
  240. {
  241. struct sigmatel_spec *spec = codec->spec;
  242. int i, idx = 0;
  243. if (!spec->powerdown_adcs)
  244. return;
  245. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  246. if (spec->gen.all_adcs[i] == hinfo->nid) {
  247. idx = i;
  248. break;
  249. }
  250. }
  251. switch (action) {
  252. case HDA_GEN_PCM_ACT_OPEN:
  253. msleep(40);
  254. snd_hda_codec_write(codec, hinfo->nid, 0,
  255. AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  256. spec->active_adcs |= (1 << idx);
  257. break;
  258. case HDA_GEN_PCM_ACT_CLOSE:
  259. snd_hda_codec_write(codec, hinfo->nid, 0,
  260. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  261. spec->active_adcs &= ~(1 << idx);
  262. break;
  263. }
  264. }
  265. /*
  266. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  267. * funky external mute control using GPIO pins.
  268. */
  269. static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
  270. unsigned int dir_mask, unsigned int data)
  271. {
  272. unsigned int gpiostate, gpiomask, gpiodir;
  273. codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
  274. gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
  275. AC_VERB_GET_GPIO_DATA, 0);
  276. gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
  277. gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
  278. AC_VERB_GET_GPIO_MASK, 0);
  279. gpiomask |= mask;
  280. gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
  281. AC_VERB_GET_GPIO_DIRECTION, 0);
  282. gpiodir |= dir_mask;
  283. /* Configure GPIOx as CMOS */
  284. snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
  285. snd_hda_codec_write(codec, codec->afg, 0,
  286. AC_VERB_SET_GPIO_MASK, gpiomask);
  287. snd_hda_codec_read(codec, codec->afg, 0,
  288. AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
  289. msleep(1);
  290. snd_hda_codec_read(codec, codec->afg, 0,
  291. AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
  292. }
  293. /* hook for controlling mic-mute LED GPIO */
  294. static void stac_capture_led_hook(struct hda_codec *codec,
  295. struct snd_kcontrol *kcontrol,
  296. struct snd_ctl_elem_value *ucontrol)
  297. {
  298. struct sigmatel_spec *spec = codec->spec;
  299. unsigned int mask;
  300. bool cur_mute, prev_mute;
  301. if (!kcontrol || !ucontrol)
  302. return;
  303. mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  304. prev_mute = !spec->mic_enabled;
  305. if (ucontrol->value.integer.value[0] ||
  306. ucontrol->value.integer.value[1])
  307. spec->mic_enabled |= mask;
  308. else
  309. spec->mic_enabled &= ~mask;
  310. cur_mute = !spec->mic_enabled;
  311. if (cur_mute != prev_mute) {
  312. if (cur_mute)
  313. spec->gpio_data |= spec->mic_mute_led_gpio;
  314. else
  315. spec->gpio_data &= ~spec->mic_mute_led_gpio;
  316. stac_gpio_set(codec, spec->gpio_mask,
  317. spec->gpio_dir, spec->gpio_data);
  318. }
  319. }
  320. static int stac_vrefout_set(struct hda_codec *codec,
  321. hda_nid_t nid, unsigned int new_vref)
  322. {
  323. int error, pinctl;
  324. codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
  325. pinctl = snd_hda_codec_read(codec, nid, 0,
  326. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  327. if (pinctl < 0)
  328. return pinctl;
  329. pinctl &= 0xff;
  330. pinctl &= ~AC_PINCTL_VREFEN;
  331. pinctl |= (new_vref & AC_PINCTL_VREFEN);
  332. error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
  333. if (error < 0)
  334. return error;
  335. return 1;
  336. }
  337. /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
  338. /* this hook is set in stac_setup_gpio() */
  339. static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
  340. hda_nid_t nid,
  341. unsigned int power_state)
  342. {
  343. if (nid == codec->afg && power_state == AC_PWRST_D3)
  344. return AC_PWRST_D1;
  345. return snd_hda_gen_path_power_filter(codec, nid, power_state);
  346. }
  347. /* update mute-LED accoring to the master switch */
  348. static void stac_update_led_status(struct hda_codec *codec, int enabled)
  349. {
  350. struct sigmatel_spec *spec = codec->spec;
  351. int muted = !enabled;
  352. if (!spec->gpio_led)
  353. return;
  354. /* LED state is inverted on these systems */
  355. if (spec->gpio_led_polarity)
  356. muted = !muted;
  357. if (!spec->vref_mute_led_nid) {
  358. if (muted)
  359. spec->gpio_data |= spec->gpio_led;
  360. else
  361. spec->gpio_data &= ~spec->gpio_led;
  362. stac_gpio_set(codec, spec->gpio_mask,
  363. spec->gpio_dir, spec->gpio_data);
  364. } else {
  365. spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
  366. stac_vrefout_set(codec, spec->vref_mute_led_nid,
  367. spec->vref_led);
  368. }
  369. }
  370. /* vmaster hook to update mute LED */
  371. static void stac_vmaster_hook(void *private_data, int val)
  372. {
  373. stac_update_led_status(private_data, val);
  374. }
  375. /* automute hook to handle GPIO mute and EAPD updates */
  376. static void stac_update_outputs(struct hda_codec *codec)
  377. {
  378. struct sigmatel_spec *spec = codec->spec;
  379. if (spec->gpio_mute)
  380. spec->gen.master_mute =
  381. !(snd_hda_codec_read(codec, codec->afg, 0,
  382. AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
  383. snd_hda_gen_update_outputs(codec);
  384. if (spec->eapd_mask && spec->eapd_switch) {
  385. unsigned int val = spec->gpio_data;
  386. if (spec->gen.speaker_muted)
  387. val &= ~spec->eapd_mask;
  388. else
  389. val |= spec->eapd_mask;
  390. if (spec->gpio_data != val) {
  391. spec->gpio_data = val;
  392. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
  393. val);
  394. }
  395. }
  396. }
  397. static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
  398. bool enable, bool do_write)
  399. {
  400. struct sigmatel_spec *spec = codec->spec;
  401. unsigned int idx, val;
  402. for (idx = 0; idx < spec->num_pwrs; idx++) {
  403. if (spec->pwr_nids[idx] == nid)
  404. break;
  405. }
  406. if (idx >= spec->num_pwrs)
  407. return;
  408. idx = 1 << idx;
  409. val = spec->power_map_bits;
  410. if (enable)
  411. val &= ~idx;
  412. else
  413. val |= idx;
  414. /* power down unused output ports */
  415. if (val != spec->power_map_bits) {
  416. spec->power_map_bits = val;
  417. if (do_write)
  418. snd_hda_codec_write(codec, codec->afg, 0,
  419. AC_VERB_IDT_SET_POWER_MAP, val);
  420. }
  421. }
  422. /* update power bit per jack plug/unplug */
  423. static void jack_update_power(struct hda_codec *codec,
  424. struct hda_jack_tbl *jack)
  425. {
  426. struct sigmatel_spec *spec = codec->spec;
  427. int i;
  428. if (!spec->num_pwrs)
  429. return;
  430. if (jack && jack->nid) {
  431. stac_toggle_power_map(codec, jack->nid,
  432. snd_hda_jack_detect(codec, jack->nid),
  433. true);
  434. return;
  435. }
  436. /* update all jacks */
  437. for (i = 0; i < spec->num_pwrs; i++) {
  438. hda_nid_t nid = spec->pwr_nids[i];
  439. jack = snd_hda_jack_tbl_get(codec, nid);
  440. if (!jack || !jack->action)
  441. continue;
  442. if (jack->action == STAC_PWR_EVENT ||
  443. jack->action <= HDA_GEN_LAST_EVENT)
  444. stac_toggle_power_map(codec, nid,
  445. snd_hda_jack_detect(codec, nid),
  446. false);
  447. }
  448. snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
  449. spec->power_map_bits);
  450. }
  451. static void stac_hp_automute(struct hda_codec *codec,
  452. struct hda_jack_tbl *jack)
  453. {
  454. snd_hda_gen_hp_automute(codec, jack);
  455. jack_update_power(codec, jack);
  456. }
  457. static void stac_line_automute(struct hda_codec *codec,
  458. struct hda_jack_tbl *jack)
  459. {
  460. snd_hda_gen_line_automute(codec, jack);
  461. jack_update_power(codec, jack);
  462. }
  463. static void stac_mic_autoswitch(struct hda_codec *codec,
  464. struct hda_jack_tbl *jack)
  465. {
  466. snd_hda_gen_mic_autoswitch(codec, jack);
  467. jack_update_power(codec, jack);
  468. }
  469. static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
  470. {
  471. unsigned int data;
  472. data = snd_hda_codec_read(codec, codec->afg, 0,
  473. AC_VERB_GET_GPIO_DATA, 0);
  474. /* toggle VREF state based on GPIOx status */
  475. snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
  476. !!(data & (1 << event->private_data)));
  477. }
  478. /* initialize the power map and enable the power event to jacks that
  479. * haven't been assigned to automute
  480. */
  481. static void stac_init_power_map(struct hda_codec *codec)
  482. {
  483. struct sigmatel_spec *spec = codec->spec;
  484. int i;
  485. for (i = 0; i < spec->num_pwrs; i++) {
  486. hda_nid_t nid = spec->pwr_nids[i];
  487. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
  488. def_conf = get_defcfg_connect(def_conf);
  489. if (snd_hda_jack_tbl_get(codec, nid))
  490. continue;
  491. if (def_conf == AC_JACK_PORT_COMPLEX &&
  492. !(spec->vref_mute_led_nid == nid ||
  493. is_jack_detectable(codec, nid))) {
  494. snd_hda_jack_detect_enable_callback(codec, nid,
  495. STAC_PWR_EVENT,
  496. jack_update_power);
  497. } else {
  498. if (def_conf == AC_JACK_PORT_NONE)
  499. stac_toggle_power_map(codec, nid, false, false);
  500. else
  501. stac_toggle_power_map(codec, nid, true, false);
  502. }
  503. }
  504. }
  505. /*
  506. */
  507. static inline bool get_int_hint(struct hda_codec *codec, const char *key,
  508. int *valp)
  509. {
  510. return !snd_hda_get_int_hint(codec, key, valp);
  511. }
  512. /* override some hints from the hwdep entry */
  513. static void stac_store_hints(struct hda_codec *codec)
  514. {
  515. struct sigmatel_spec *spec = codec->spec;
  516. int val;
  517. if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
  518. spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
  519. spec->gpio_mask;
  520. }
  521. if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
  522. spec->gpio_mask &= spec->gpio_mask;
  523. if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
  524. spec->gpio_dir &= spec->gpio_mask;
  525. if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
  526. spec->eapd_mask &= spec->gpio_mask;
  527. if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
  528. spec->gpio_mute &= spec->gpio_mask;
  529. val = snd_hda_get_bool_hint(codec, "eapd_switch");
  530. if (val >= 0)
  531. spec->eapd_switch = val;
  532. }
  533. /*
  534. * loopback controls
  535. */
  536. #define stac_aloopback_info snd_ctl_boolean_mono_info
  537. static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
  538. struct snd_ctl_elem_value *ucontrol)
  539. {
  540. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  541. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  542. struct sigmatel_spec *spec = codec->spec;
  543. ucontrol->value.integer.value[0] = !!(spec->aloopback &
  544. (spec->aloopback_mask << idx));
  545. return 0;
  546. }
  547. static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
  548. struct snd_ctl_elem_value *ucontrol)
  549. {
  550. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  551. struct sigmatel_spec *spec = codec->spec;
  552. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  553. unsigned int dac_mode;
  554. unsigned int val, idx_val;
  555. idx_val = spec->aloopback_mask << idx;
  556. if (ucontrol->value.integer.value[0])
  557. val = spec->aloopback | idx_val;
  558. else
  559. val = spec->aloopback & ~idx_val;
  560. if (spec->aloopback == val)
  561. return 0;
  562. spec->aloopback = val;
  563. /* Only return the bits defined by the shift value of the
  564. * first two bytes of the mask
  565. */
  566. dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
  567. kcontrol->private_value & 0xFFFF, 0x0);
  568. dac_mode >>= spec->aloopback_shift;
  569. if (spec->aloopback & idx_val) {
  570. snd_hda_power_up(codec);
  571. dac_mode |= idx_val;
  572. } else {
  573. snd_hda_power_down(codec);
  574. dac_mode &= ~idx_val;
  575. }
  576. snd_hda_codec_write_cache(codec, codec->afg, 0,
  577. kcontrol->private_value >> 16, dac_mode);
  578. return 1;
  579. }
  580. #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
  581. { \
  582. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  583. .name = "Analog Loopback", \
  584. .count = cnt, \
  585. .info = stac_aloopback_info, \
  586. .get = stac_aloopback_get, \
  587. .put = stac_aloopback_put, \
  588. .private_value = verb_read | (verb_write << 16), \
  589. }
  590. /*
  591. * Mute LED handling on HP laptops
  592. */
  593. /* check whether it's a HP laptop with a docking port */
  594. static bool hp_bnb2011_with_dock(struct hda_codec *codec)
  595. {
  596. if (codec->vendor_id != 0x111d7605 &&
  597. codec->vendor_id != 0x111d76d1)
  598. return false;
  599. switch (codec->subsystem_id) {
  600. case 0x103c1618:
  601. case 0x103c1619:
  602. case 0x103c161a:
  603. case 0x103c161b:
  604. case 0x103c161c:
  605. case 0x103c161d:
  606. case 0x103c161e:
  607. case 0x103c161f:
  608. case 0x103c162a:
  609. case 0x103c162b:
  610. case 0x103c1630:
  611. case 0x103c1631:
  612. case 0x103c1633:
  613. case 0x103c1634:
  614. case 0x103c1635:
  615. case 0x103c3587:
  616. case 0x103c3588:
  617. case 0x103c3589:
  618. case 0x103c358a:
  619. case 0x103c3667:
  620. case 0x103c3668:
  621. case 0x103c3669:
  622. return true;
  623. }
  624. return false;
  625. }
  626. static bool hp_blike_system(u32 subsystem_id)
  627. {
  628. switch (subsystem_id) {
  629. case 0x103c1520:
  630. case 0x103c1521:
  631. case 0x103c1523:
  632. case 0x103c1524:
  633. case 0x103c1525:
  634. case 0x103c1722:
  635. case 0x103c1723:
  636. case 0x103c1724:
  637. case 0x103c1725:
  638. case 0x103c1726:
  639. case 0x103c1727:
  640. case 0x103c1728:
  641. case 0x103c1729:
  642. case 0x103c172a:
  643. case 0x103c172b:
  644. case 0x103c307e:
  645. case 0x103c307f:
  646. case 0x103c3080:
  647. case 0x103c3081:
  648. case 0x103c7007:
  649. case 0x103c7008:
  650. return true;
  651. }
  652. return false;
  653. }
  654. static void set_hp_led_gpio(struct hda_codec *codec)
  655. {
  656. struct sigmatel_spec *spec = codec->spec;
  657. unsigned int gpio;
  658. if (spec->gpio_led)
  659. return;
  660. gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
  661. gpio &= AC_GPIO_IO_COUNT;
  662. if (gpio > 3)
  663. spec->gpio_led = 0x08; /* GPIO 3 */
  664. else
  665. spec->gpio_led = 0x01; /* GPIO 0 */
  666. }
  667. /*
  668. * This method searches for the mute LED GPIO configuration
  669. * provided as OEM string in SMBIOS. The format of that string
  670. * is HP_Mute_LED_P_G or HP_Mute_LED_P
  671. * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
  672. * that corresponds to the NOT muted state of the master volume
  673. * and G is the index of the GPIO to use as the mute LED control (0..9)
  674. * If _G portion is missing it is assigned based on the codec ID
  675. *
  676. * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
  677. * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
  678. *
  679. *
  680. * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
  681. * SMBIOS - at least the ones I have seen do not have them - which include
  682. * my own system (HP Pavilion dv6-1110ax) and my cousin's
  683. * HP Pavilion dv9500t CTO.
  684. * Need more information on whether it is true across the entire series.
  685. * -- kunal
  686. */
  687. static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
  688. {
  689. struct sigmatel_spec *spec = codec->spec;
  690. const struct dmi_device *dev = NULL;
  691. if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
  692. get_int_hint(codec, "gpio_led_polarity",
  693. &spec->gpio_led_polarity);
  694. return 1;
  695. }
  696. while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
  697. if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
  698. &spec->gpio_led_polarity,
  699. &spec->gpio_led) == 2) {
  700. unsigned int max_gpio;
  701. max_gpio = snd_hda_param_read(codec, codec->afg,
  702. AC_PAR_GPIO_CAP);
  703. max_gpio &= AC_GPIO_IO_COUNT;
  704. if (spec->gpio_led < max_gpio)
  705. spec->gpio_led = 1 << spec->gpio_led;
  706. else
  707. spec->vref_mute_led_nid = spec->gpio_led;
  708. return 1;
  709. }
  710. if (sscanf(dev->name, "HP_Mute_LED_%u",
  711. &spec->gpio_led_polarity) == 1) {
  712. set_hp_led_gpio(codec);
  713. return 1;
  714. }
  715. /* BIOS bug: unfilled OEM string */
  716. if (strstr(dev->name, "HP_Mute_LED_P_G")) {
  717. set_hp_led_gpio(codec);
  718. if (default_polarity >= 0)
  719. spec->gpio_led_polarity = default_polarity;
  720. else
  721. spec->gpio_led_polarity = 1;
  722. return 1;
  723. }
  724. }
  725. /*
  726. * Fallback case - if we don't find the DMI strings,
  727. * we statically set the GPIO - if not a B-series system
  728. * and default polarity is provided
  729. */
  730. if (!hp_blike_system(codec->subsystem_id) &&
  731. (default_polarity == 0 || default_polarity == 1)) {
  732. set_hp_led_gpio(codec);
  733. spec->gpio_led_polarity = default_polarity;
  734. return 1;
  735. }
  736. return 0;
  737. }
  738. /* check whether a built-in speaker is included in parsed pins */
  739. static bool has_builtin_speaker(struct hda_codec *codec)
  740. {
  741. struct sigmatel_spec *spec = codec->spec;
  742. hda_nid_t *nid_pin;
  743. int nids, i;
  744. if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
  745. nid_pin = spec->gen.autocfg.line_out_pins;
  746. nids = spec->gen.autocfg.line_outs;
  747. } else {
  748. nid_pin = spec->gen.autocfg.speaker_pins;
  749. nids = spec->gen.autocfg.speaker_outs;
  750. }
  751. for (i = 0; i < nids; i++) {
  752. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
  753. if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
  754. return true;
  755. }
  756. return false;
  757. }
  758. /*
  759. * PC beep controls
  760. */
  761. /* create PC beep volume controls */
  762. static int stac_auto_create_beep_ctls(struct hda_codec *codec,
  763. hda_nid_t nid)
  764. {
  765. struct sigmatel_spec *spec = codec->spec;
  766. u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  767. struct snd_kcontrol_new *knew;
  768. static struct snd_kcontrol_new abeep_mute_ctl =
  769. HDA_CODEC_MUTE(NULL, 0, 0, 0);
  770. static struct snd_kcontrol_new dbeep_mute_ctl =
  771. HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
  772. static struct snd_kcontrol_new beep_vol_ctl =
  773. HDA_CODEC_VOLUME(NULL, 0, 0, 0);
  774. /* check for mute support for the the amp */
  775. if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
  776. const struct snd_kcontrol_new *temp;
  777. if (spec->anabeep_nid == nid)
  778. temp = &abeep_mute_ctl;
  779. else
  780. temp = &dbeep_mute_ctl;
  781. knew = snd_hda_gen_add_kctl(&spec->gen,
  782. "Beep Playback Switch", temp);
  783. if (!knew)
  784. return -ENOMEM;
  785. knew->private_value =
  786. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  787. }
  788. /* check to see if there is volume support for the amp */
  789. if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
  790. knew = snd_hda_gen_add_kctl(&spec->gen,
  791. "Beep Playback Volume",
  792. &beep_vol_ctl);
  793. if (!knew)
  794. return -ENOMEM;
  795. knew->private_value =
  796. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  797. }
  798. return 0;
  799. }
  800. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  801. #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
  802. static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
  803. struct snd_ctl_elem_value *ucontrol)
  804. {
  805. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  806. ucontrol->value.integer.value[0] = codec->beep->enabled;
  807. return 0;
  808. }
  809. static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
  810. struct snd_ctl_elem_value *ucontrol)
  811. {
  812. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  813. return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
  814. }
  815. static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
  816. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  817. .name = "Beep Playback Switch",
  818. .info = stac_dig_beep_switch_info,
  819. .get = stac_dig_beep_switch_get,
  820. .put = stac_dig_beep_switch_put,
  821. };
  822. static int stac_beep_switch_ctl(struct hda_codec *codec)
  823. {
  824. struct sigmatel_spec *spec = codec->spec;
  825. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
  826. return -ENOMEM;
  827. return 0;
  828. }
  829. #endif
  830. /*
  831. * SPDIF-out mux controls
  832. */
  833. static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
  834. struct snd_ctl_elem_info *uinfo)
  835. {
  836. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  837. struct sigmatel_spec *spec = codec->spec;
  838. return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
  839. }
  840. static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
  841. struct snd_ctl_elem_value *ucontrol)
  842. {
  843. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  844. struct sigmatel_spec *spec = codec->spec;
  845. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  846. ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
  847. return 0;
  848. }
  849. static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
  850. struct snd_ctl_elem_value *ucontrol)
  851. {
  852. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  853. struct sigmatel_spec *spec = codec->spec;
  854. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  855. return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
  856. spec->gen.autocfg.dig_out_pins[smux_idx],
  857. &spec->cur_smux[smux_idx]);
  858. }
  859. static struct snd_kcontrol_new stac_smux_mixer = {
  860. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  861. .name = "IEC958 Playback Source",
  862. /* count set later */
  863. .info = stac_smux_enum_info,
  864. .get = stac_smux_enum_get,
  865. .put = stac_smux_enum_put,
  866. };
  867. static const char * const stac_spdif_labels[] = {
  868. "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
  869. };
  870. static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
  871. {
  872. struct sigmatel_spec *spec = codec->spec;
  873. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  874. const char * const *labels = spec->spdif_labels;
  875. struct snd_kcontrol_new *kctl;
  876. int i, num_cons;
  877. if (cfg->dig_outs < 1)
  878. return 0;
  879. num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
  880. if (num_cons <= 1)
  881. return 0;
  882. if (!labels)
  883. labels = stac_spdif_labels;
  884. for (i = 0; i < num_cons; i++) {
  885. if (snd_BUG_ON(!labels[i]))
  886. return -EINVAL;
  887. snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
  888. }
  889. kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
  890. if (!kctl)
  891. return -ENOMEM;
  892. kctl->count = cfg->dig_outs;
  893. return 0;
  894. }
  895. /*
  896. */
  897. static const struct hda_verb stac9200_core_init[] = {
  898. /* set dac0mux for dac converter */
  899. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  900. {}
  901. };
  902. static const struct hda_verb stac9200_eapd_init[] = {
  903. /* set dac0mux for dac converter */
  904. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  905. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  906. {}
  907. };
  908. static const struct hda_verb dell_eq_core_init[] = {
  909. /* set master volume to max value without distortion
  910. * and direct control */
  911. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
  912. {}
  913. };
  914. static const struct hda_verb stac92hd73xx_core_init[] = {
  915. /* set master volume and direct control */
  916. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  917. {}
  918. };
  919. static const struct hda_verb stac92hd83xxx_core_init[] = {
  920. /* power state controls amps */
  921. { 0x01, AC_VERB_SET_EAPD, 1 << 2},
  922. {}
  923. };
  924. static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
  925. { 0x22, 0x785, 0x43 },
  926. { 0x22, 0x782, 0xe0 },
  927. { 0x22, 0x795, 0x00 },
  928. {}
  929. };
  930. static const struct hda_verb stac92hd71bxx_core_init[] = {
  931. /* set master volume and direct control */
  932. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  933. {}
  934. };
  935. static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
  936. /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
  937. { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  938. { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  939. { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  940. {}
  941. };
  942. static const struct hda_verb stac925x_core_init[] = {
  943. /* set dac0mux for dac converter */
  944. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  945. /* mute the master volume */
  946. { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
  947. {}
  948. };
  949. static const struct hda_verb stac922x_core_init[] = {
  950. /* set master volume and direct control */
  951. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  952. {}
  953. };
  954. static const struct hda_verb d965_core_init[] = {
  955. /* unmute node 0x1b */
  956. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  957. /* select node 0x03 as DAC */
  958. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  959. {}
  960. };
  961. static const struct hda_verb dell_3st_core_init[] = {
  962. /* don't set delta bit */
  963. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  964. /* unmute node 0x1b */
  965. {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  966. /* select node 0x03 as DAC */
  967. {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  968. {}
  969. };
  970. static const struct hda_verb stac927x_core_init[] = {
  971. /* set master volume and direct control */
  972. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  973. /* enable analog pc beep path */
  974. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  975. {}
  976. };
  977. static const struct hda_verb stac927x_volknob_core_init[] = {
  978. /* don't set delta bit */
  979. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  980. /* enable analog pc beep path */
  981. {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  982. {}
  983. };
  984. static const struct hda_verb stac9205_core_init[] = {
  985. /* set master volume and direct control */
  986. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  987. /* enable analog pc beep path */
  988. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  989. {}
  990. };
  991. static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
  992. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
  993. static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
  994. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
  995. static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
  996. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
  997. static const struct snd_kcontrol_new stac92hd71bxx_loopback =
  998. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
  999. static const struct snd_kcontrol_new stac9205_loopback =
  1000. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
  1001. static const struct snd_kcontrol_new stac927x_loopback =
  1002. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
  1003. static const struct hda_pintbl ref9200_pin_configs[] = {
  1004. { 0x08, 0x01c47010 },
  1005. { 0x09, 0x01447010 },
  1006. { 0x0d, 0x0221401f },
  1007. { 0x0e, 0x01114010 },
  1008. { 0x0f, 0x02a19020 },
  1009. { 0x10, 0x01a19021 },
  1010. { 0x11, 0x90100140 },
  1011. { 0x12, 0x01813122 },
  1012. {}
  1013. };
  1014. static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
  1015. { 0x08, 0x400000fe },
  1016. { 0x09, 0x404500f4 },
  1017. { 0x0d, 0x400100f0 },
  1018. { 0x0e, 0x90110010 },
  1019. { 0x0f, 0x400100f1 },
  1020. { 0x10, 0x02a1902e },
  1021. { 0x11, 0x500000f2 },
  1022. { 0x12, 0x500000f3 },
  1023. {}
  1024. };
  1025. static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
  1026. { 0x08, 0x400000fe },
  1027. { 0x09, 0x404500f4 },
  1028. { 0x0d, 0x400100f0 },
  1029. { 0x0e, 0x90110010 },
  1030. { 0x0f, 0x400100f1 },
  1031. { 0x10, 0x02a1902e },
  1032. { 0x11, 0x500000f2 },
  1033. { 0x12, 0x500000f3 },
  1034. {}
  1035. };
  1036. /*
  1037. STAC 9200 pin configs for
  1038. 102801A8
  1039. 102801DE
  1040. 102801E8
  1041. */
  1042. static const struct hda_pintbl dell9200_d21_pin_configs[] = {
  1043. { 0x08, 0x400001f0 },
  1044. { 0x09, 0x400001f1 },
  1045. { 0x0d, 0x02214030 },
  1046. { 0x0e, 0x01014010 },
  1047. { 0x0f, 0x02a19020 },
  1048. { 0x10, 0x01a19021 },
  1049. { 0x11, 0x90100140 },
  1050. { 0x12, 0x01813122 },
  1051. {}
  1052. };
  1053. /*
  1054. STAC 9200 pin configs for
  1055. 102801C0
  1056. 102801C1
  1057. */
  1058. static const struct hda_pintbl dell9200_d22_pin_configs[] = {
  1059. { 0x08, 0x400001f0 },
  1060. { 0x09, 0x400001f1 },
  1061. { 0x0d, 0x0221401f },
  1062. { 0x0e, 0x01014010 },
  1063. { 0x0f, 0x01813020 },
  1064. { 0x10, 0x02a19021 },
  1065. { 0x11, 0x90100140 },
  1066. { 0x12, 0x400001f2 },
  1067. {}
  1068. };
  1069. /*
  1070. STAC 9200 pin configs for
  1071. 102801C4 (Dell Dimension E310)
  1072. 102801C5
  1073. 102801C7
  1074. 102801D9
  1075. 102801DA
  1076. 102801E3
  1077. */
  1078. static const struct hda_pintbl dell9200_d23_pin_configs[] = {
  1079. { 0x08, 0x400001f0 },
  1080. { 0x09, 0x400001f1 },
  1081. { 0x0d, 0x0221401f },
  1082. { 0x0e, 0x01014010 },
  1083. { 0x0f, 0x01813020 },
  1084. { 0x10, 0x01a19021 },
  1085. { 0x11, 0x90100140 },
  1086. { 0x12, 0x400001f2 },
  1087. {}
  1088. };
  1089. /*
  1090. STAC 9200-32 pin configs for
  1091. 102801B5 (Dell Inspiron 630m)
  1092. 102801D8 (Dell Inspiron 640m)
  1093. */
  1094. static const struct hda_pintbl dell9200_m21_pin_configs[] = {
  1095. { 0x08, 0x40c003fa },
  1096. { 0x09, 0x03441340 },
  1097. { 0x0d, 0x0321121f },
  1098. { 0x0e, 0x90170310 },
  1099. { 0x0f, 0x408003fb },
  1100. { 0x10, 0x03a11020 },
  1101. { 0x11, 0x401003fc },
  1102. { 0x12, 0x403003fd },
  1103. {}
  1104. };
  1105. /*
  1106. STAC 9200-32 pin configs for
  1107. 102801C2 (Dell Latitude D620)
  1108. 102801C8
  1109. 102801CC (Dell Latitude D820)
  1110. 102801D4
  1111. 102801D6
  1112. */
  1113. static const struct hda_pintbl dell9200_m22_pin_configs[] = {
  1114. { 0x08, 0x40c003fa },
  1115. { 0x09, 0x0144131f },
  1116. { 0x0d, 0x0321121f },
  1117. { 0x0e, 0x90170310 },
  1118. { 0x0f, 0x90a70321 },
  1119. { 0x10, 0x03a11020 },
  1120. { 0x11, 0x401003fb },
  1121. { 0x12, 0x40f000fc },
  1122. {}
  1123. };
  1124. /*
  1125. STAC 9200-32 pin configs for
  1126. 102801CE (Dell XPS M1710)
  1127. 102801CF (Dell Precision M90)
  1128. */
  1129. static const struct hda_pintbl dell9200_m23_pin_configs[] = {
  1130. { 0x08, 0x40c003fa },
  1131. { 0x09, 0x01441340 },
  1132. { 0x0d, 0x0421421f },
  1133. { 0x0e, 0x90170310 },
  1134. { 0x0f, 0x408003fb },
  1135. { 0x10, 0x04a1102e },
  1136. { 0x11, 0x90170311 },
  1137. { 0x12, 0x403003fc },
  1138. {}
  1139. };
  1140. /*
  1141. STAC 9200-32 pin configs for
  1142. 102801C9
  1143. 102801CA
  1144. 102801CB (Dell Latitude 120L)
  1145. 102801D3
  1146. */
  1147. static const struct hda_pintbl dell9200_m24_pin_configs[] = {
  1148. { 0x08, 0x40c003fa },
  1149. { 0x09, 0x404003fb },
  1150. { 0x0d, 0x0321121f },
  1151. { 0x0e, 0x90170310 },
  1152. { 0x0f, 0x408003fc },
  1153. { 0x10, 0x03a11020 },
  1154. { 0x11, 0x401003fd },
  1155. { 0x12, 0x403003fe },
  1156. {}
  1157. };
  1158. /*
  1159. STAC 9200-32 pin configs for
  1160. 102801BD (Dell Inspiron E1505n)
  1161. 102801EE
  1162. 102801EF
  1163. */
  1164. static const struct hda_pintbl dell9200_m25_pin_configs[] = {
  1165. { 0x08, 0x40c003fa },
  1166. { 0x09, 0x01441340 },
  1167. { 0x0d, 0x0421121f },
  1168. { 0x0e, 0x90170310 },
  1169. { 0x0f, 0x408003fb },
  1170. { 0x10, 0x04a11020 },
  1171. { 0x11, 0x401003fc },
  1172. { 0x12, 0x403003fd },
  1173. {}
  1174. };
  1175. /*
  1176. STAC 9200-32 pin configs for
  1177. 102801F5 (Dell Inspiron 1501)
  1178. 102801F6
  1179. */
  1180. static const struct hda_pintbl dell9200_m26_pin_configs[] = {
  1181. { 0x08, 0x40c003fa },
  1182. { 0x09, 0x404003fb },
  1183. { 0x0d, 0x0421121f },
  1184. { 0x0e, 0x90170310 },
  1185. { 0x0f, 0x408003fc },
  1186. { 0x10, 0x04a11020 },
  1187. { 0x11, 0x401003fd },
  1188. { 0x12, 0x403003fe },
  1189. {}
  1190. };
  1191. /*
  1192. STAC 9200-32
  1193. 102801CD (Dell Inspiron E1705/9400)
  1194. */
  1195. static const struct hda_pintbl dell9200_m27_pin_configs[] = {
  1196. { 0x08, 0x40c003fa },
  1197. { 0x09, 0x01441340 },
  1198. { 0x0d, 0x0421121f },
  1199. { 0x0e, 0x90170310 },
  1200. { 0x0f, 0x90170310 },
  1201. { 0x10, 0x04a11020 },
  1202. { 0x11, 0x90170310 },
  1203. { 0x12, 0x40f003fc },
  1204. {}
  1205. };
  1206. static const struct hda_pintbl oqo9200_pin_configs[] = {
  1207. { 0x08, 0x40c000f0 },
  1208. { 0x09, 0x404000f1 },
  1209. { 0x0d, 0x0221121f },
  1210. { 0x0e, 0x02211210 },
  1211. { 0x0f, 0x90170111 },
  1212. { 0x10, 0x90a70120 },
  1213. { 0x11, 0x400000f2 },
  1214. { 0x12, 0x400000f3 },
  1215. {}
  1216. };
  1217. static void stac9200_fixup_panasonic(struct hda_codec *codec,
  1218. const struct hda_fixup *fix, int action)
  1219. {
  1220. struct sigmatel_spec *spec = codec->spec;
  1221. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1222. spec->gpio_mask = spec->gpio_dir = 0x09;
  1223. spec->gpio_data = 0x00;
  1224. /* CF-74 has no headphone detection, and the driver should *NOT*
  1225. * do detection and HP/speaker toggle because the hardware does it.
  1226. */
  1227. spec->gen.suppress_auto_mute = 1;
  1228. }
  1229. }
  1230. static const struct hda_fixup stac9200_fixups[] = {
  1231. [STAC_REF] = {
  1232. .type = HDA_FIXUP_PINS,
  1233. .v.pins = ref9200_pin_configs,
  1234. },
  1235. [STAC_9200_OQO] = {
  1236. .type = HDA_FIXUP_PINS,
  1237. .v.pins = oqo9200_pin_configs,
  1238. .chained = true,
  1239. .chain_id = STAC_9200_EAPD_INIT,
  1240. },
  1241. [STAC_9200_DELL_D21] = {
  1242. .type = HDA_FIXUP_PINS,
  1243. .v.pins = dell9200_d21_pin_configs,
  1244. },
  1245. [STAC_9200_DELL_D22] = {
  1246. .type = HDA_FIXUP_PINS,
  1247. .v.pins = dell9200_d22_pin_configs,
  1248. },
  1249. [STAC_9200_DELL_D23] = {
  1250. .type = HDA_FIXUP_PINS,
  1251. .v.pins = dell9200_d23_pin_configs,
  1252. },
  1253. [STAC_9200_DELL_M21] = {
  1254. .type = HDA_FIXUP_PINS,
  1255. .v.pins = dell9200_m21_pin_configs,
  1256. },
  1257. [STAC_9200_DELL_M22] = {
  1258. .type = HDA_FIXUP_PINS,
  1259. .v.pins = dell9200_m22_pin_configs,
  1260. },
  1261. [STAC_9200_DELL_M23] = {
  1262. .type = HDA_FIXUP_PINS,
  1263. .v.pins = dell9200_m23_pin_configs,
  1264. },
  1265. [STAC_9200_DELL_M24] = {
  1266. .type = HDA_FIXUP_PINS,
  1267. .v.pins = dell9200_m24_pin_configs,
  1268. },
  1269. [STAC_9200_DELL_M25] = {
  1270. .type = HDA_FIXUP_PINS,
  1271. .v.pins = dell9200_m25_pin_configs,
  1272. },
  1273. [STAC_9200_DELL_M26] = {
  1274. .type = HDA_FIXUP_PINS,
  1275. .v.pins = dell9200_m26_pin_configs,
  1276. },
  1277. [STAC_9200_DELL_M27] = {
  1278. .type = HDA_FIXUP_PINS,
  1279. .v.pins = dell9200_m27_pin_configs,
  1280. },
  1281. [STAC_9200_M4] = {
  1282. .type = HDA_FIXUP_PINS,
  1283. .v.pins = gateway9200_m4_pin_configs,
  1284. .chained = true,
  1285. .chain_id = STAC_9200_EAPD_INIT,
  1286. },
  1287. [STAC_9200_M4_2] = {
  1288. .type = HDA_FIXUP_PINS,
  1289. .v.pins = gateway9200_m4_2_pin_configs,
  1290. .chained = true,
  1291. .chain_id = STAC_9200_EAPD_INIT,
  1292. },
  1293. [STAC_9200_PANASONIC] = {
  1294. .type = HDA_FIXUP_FUNC,
  1295. .v.func = stac9200_fixup_panasonic,
  1296. },
  1297. [STAC_9200_EAPD_INIT] = {
  1298. .type = HDA_FIXUP_VERBS,
  1299. .v.verbs = (const struct hda_verb[]) {
  1300. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  1301. {}
  1302. },
  1303. },
  1304. };
  1305. static const struct hda_model_fixup stac9200_models[] = {
  1306. { .id = STAC_REF, .name = "ref" },
  1307. { .id = STAC_9200_OQO, .name = "oqo" },
  1308. { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
  1309. { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
  1310. { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
  1311. { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
  1312. { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
  1313. { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
  1314. { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
  1315. { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
  1316. { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
  1317. { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
  1318. { .id = STAC_9200_M4, .name = "gateway-m4" },
  1319. { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
  1320. { .id = STAC_9200_PANASONIC, .name = "panasonic" },
  1321. {}
  1322. };
  1323. static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
  1324. /* SigmaTel reference board */
  1325. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1326. "DFI LanParty", STAC_REF),
  1327. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1328. "DFI LanParty", STAC_REF),
  1329. /* Dell laptops have BIOS problem */
  1330. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  1331. "unknown Dell", STAC_9200_DELL_D21),
  1332. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  1333. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  1334. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  1335. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  1336. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  1337. "unknown Dell", STAC_9200_DELL_D22),
  1338. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  1339. "unknown Dell", STAC_9200_DELL_D22),
  1340. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  1341. "Dell Latitude D620", STAC_9200_DELL_M22),
  1342. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  1343. "unknown Dell", STAC_9200_DELL_D23),
  1344. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  1345. "unknown Dell", STAC_9200_DELL_D23),
  1346. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  1347. "unknown Dell", STAC_9200_DELL_M22),
  1348. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  1349. "unknown Dell", STAC_9200_DELL_M24),
  1350. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  1351. "unknown Dell", STAC_9200_DELL_M24),
  1352. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  1353. "Dell Latitude 120L", STAC_9200_DELL_M24),
  1354. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  1355. "Dell Latitude D820", STAC_9200_DELL_M22),
  1356. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  1357. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  1358. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  1359. "Dell XPS M1710", STAC_9200_DELL_M23),
  1360. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  1361. "Dell Precision M90", STAC_9200_DELL_M23),
  1362. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  1363. "unknown Dell", STAC_9200_DELL_M22),
  1364. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  1365. "unknown Dell", STAC_9200_DELL_M22),
  1366. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  1367. "unknown Dell", STAC_9200_DELL_M22),
  1368. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  1369. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  1370. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  1371. "unknown Dell", STAC_9200_DELL_D23),
  1372. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  1373. "unknown Dell", STAC_9200_DELL_D23),
  1374. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  1375. "unknown Dell", STAC_9200_DELL_D21),
  1376. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  1377. "unknown Dell", STAC_9200_DELL_D23),
  1378. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  1379. "unknown Dell", STAC_9200_DELL_D21),
  1380. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  1381. "unknown Dell", STAC_9200_DELL_M25),
  1382. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  1383. "unknown Dell", STAC_9200_DELL_M25),
  1384. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  1385. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  1386. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  1387. "unknown Dell", STAC_9200_DELL_M26),
  1388. /* Panasonic */
  1389. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
  1390. /* Gateway machines needs EAPD to be set on resume */
  1391. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
  1392. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
  1393. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
  1394. /* OQO Mobile */
  1395. SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
  1396. {} /* terminator */
  1397. };
  1398. static const struct hda_pintbl ref925x_pin_configs[] = {
  1399. { 0x07, 0x40c003f0 },
  1400. { 0x08, 0x424503f2 },
  1401. { 0x0a, 0x01813022 },
  1402. { 0x0b, 0x02a19021 },
  1403. { 0x0c, 0x90a70320 },
  1404. { 0x0d, 0x02214210 },
  1405. { 0x10, 0x01019020 },
  1406. { 0x11, 0x9033032e },
  1407. {}
  1408. };
  1409. static const struct hda_pintbl stac925xM1_pin_configs[] = {
  1410. { 0x07, 0x40c003f4 },
  1411. { 0x08, 0x424503f2 },
  1412. { 0x0a, 0x400000f3 },
  1413. { 0x0b, 0x02a19020 },
  1414. { 0x0c, 0x40a000f0 },
  1415. { 0x0d, 0x90100210 },
  1416. { 0x10, 0x400003f1 },
  1417. { 0x11, 0x9033032e },
  1418. {}
  1419. };
  1420. static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
  1421. { 0x07, 0x40c003f4 },
  1422. { 0x08, 0x424503f2 },
  1423. { 0x0a, 0x400000f3 },
  1424. { 0x0b, 0x02a19020 },
  1425. { 0x0c, 0x40a000f0 },
  1426. { 0x0d, 0x90100210 },
  1427. { 0x10, 0x400003f1 },
  1428. { 0x11, 0x9033032e },
  1429. {}
  1430. };
  1431. static const struct hda_pintbl stac925xM2_pin_configs[] = {
  1432. { 0x07, 0x40c003f4 },
  1433. { 0x08, 0x424503f2 },
  1434. { 0x0a, 0x400000f3 },
  1435. { 0x0b, 0x02a19020 },
  1436. { 0x0c, 0x40a000f0 },
  1437. { 0x0d, 0x90100210 },
  1438. { 0x10, 0x400003f1 },
  1439. { 0x11, 0x9033032e },
  1440. {}
  1441. };
  1442. static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
  1443. { 0x07, 0x40c003f4 },
  1444. { 0x08, 0x424503f2 },
  1445. { 0x0a, 0x400000f3 },
  1446. { 0x0b, 0x02a19020 },
  1447. { 0x0c, 0x40a000f0 },
  1448. { 0x0d, 0x90100210 },
  1449. { 0x10, 0x400003f1 },
  1450. { 0x11, 0x9033032e },
  1451. {}
  1452. };
  1453. static const struct hda_pintbl stac925xM3_pin_configs[] = {
  1454. { 0x07, 0x40c003f4 },
  1455. { 0x08, 0x424503f2 },
  1456. { 0x0a, 0x400000f3 },
  1457. { 0x0b, 0x02a19020 },
  1458. { 0x0c, 0x40a000f0 },
  1459. { 0x0d, 0x90100210 },
  1460. { 0x10, 0x400003f1 },
  1461. { 0x11, 0x503303f3 },
  1462. {}
  1463. };
  1464. static const struct hda_pintbl stac925xM5_pin_configs[] = {
  1465. { 0x07, 0x40c003f4 },
  1466. { 0x08, 0x424503f2 },
  1467. { 0x0a, 0x400000f3 },
  1468. { 0x0b, 0x02a19020 },
  1469. { 0x0c, 0x40a000f0 },
  1470. { 0x0d, 0x90100210 },
  1471. { 0x10, 0x400003f1 },
  1472. { 0x11, 0x9033032e },
  1473. {}
  1474. };
  1475. static const struct hda_pintbl stac925xM6_pin_configs[] = {
  1476. { 0x07, 0x40c003f4 },
  1477. { 0x08, 0x424503f2 },
  1478. { 0x0a, 0x400000f3 },
  1479. { 0x0b, 0x02a19020 },
  1480. { 0x0c, 0x40a000f0 },
  1481. { 0x0d, 0x90100210 },
  1482. { 0x10, 0x400003f1 },
  1483. { 0x11, 0x90330320 },
  1484. {}
  1485. };
  1486. static const struct hda_fixup stac925x_fixups[] = {
  1487. [STAC_REF] = {
  1488. .type = HDA_FIXUP_PINS,
  1489. .v.pins = ref925x_pin_configs,
  1490. },
  1491. [STAC_M1] = {
  1492. .type = HDA_FIXUP_PINS,
  1493. .v.pins = stac925xM1_pin_configs,
  1494. },
  1495. [STAC_M1_2] = {
  1496. .type = HDA_FIXUP_PINS,
  1497. .v.pins = stac925xM1_2_pin_configs,
  1498. },
  1499. [STAC_M2] = {
  1500. .type = HDA_FIXUP_PINS,
  1501. .v.pins = stac925xM2_pin_configs,
  1502. },
  1503. [STAC_M2_2] = {
  1504. .type = HDA_FIXUP_PINS,
  1505. .v.pins = stac925xM2_2_pin_configs,
  1506. },
  1507. [STAC_M3] = {
  1508. .type = HDA_FIXUP_PINS,
  1509. .v.pins = stac925xM3_pin_configs,
  1510. },
  1511. [STAC_M5] = {
  1512. .type = HDA_FIXUP_PINS,
  1513. .v.pins = stac925xM5_pin_configs,
  1514. },
  1515. [STAC_M6] = {
  1516. .type = HDA_FIXUP_PINS,
  1517. .v.pins = stac925xM6_pin_configs,
  1518. },
  1519. };
  1520. static const struct hda_model_fixup stac925x_models[] = {
  1521. { .id = STAC_REF, .name = "ref" },
  1522. { .id = STAC_M1, .name = "m1" },
  1523. { .id = STAC_M1_2, .name = "m1-2" },
  1524. { .id = STAC_M2, .name = "m2" },
  1525. { .id = STAC_M2_2, .name = "m2-2" },
  1526. { .id = STAC_M3, .name = "m3" },
  1527. { .id = STAC_M5, .name = "m5" },
  1528. { .id = STAC_M6, .name = "m6" },
  1529. {}
  1530. };
  1531. static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
  1532. /* SigmaTel reference board */
  1533. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  1534. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
  1535. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  1536. /* Default table for unknown ID */
  1537. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
  1538. /* gateway machines are checked via codec ssid */
  1539. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
  1540. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
  1541. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
  1542. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
  1543. SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
  1544. /* Not sure about the brand name for those */
  1545. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
  1546. SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
  1547. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
  1548. SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
  1549. {} /* terminator */
  1550. };
  1551. static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
  1552. { 0x0a, 0x02214030 },
  1553. { 0x0b, 0x02a19040 },
  1554. { 0x0c, 0x01a19020 },
  1555. { 0x0d, 0x02214030 },
  1556. { 0x0e, 0x0181302e },
  1557. { 0x0f, 0x01014010 },
  1558. { 0x10, 0x01014020 },
  1559. { 0x11, 0x01014030 },
  1560. { 0x12, 0x02319040 },
  1561. { 0x13, 0x90a000f0 },
  1562. { 0x14, 0x90a000f0 },
  1563. { 0x22, 0x01452050 },
  1564. { 0x23, 0x01452050 },
  1565. {}
  1566. };
  1567. static const struct hda_pintbl dell_m6_pin_configs[] = {
  1568. { 0x0a, 0x0321101f },
  1569. { 0x0b, 0x4f00000f },
  1570. { 0x0c, 0x4f0000f0 },
  1571. { 0x0d, 0x90170110 },
  1572. { 0x0e, 0x03a11020 },
  1573. { 0x0f, 0x0321101f },
  1574. { 0x10, 0x4f0000f0 },
  1575. { 0x11, 0x4f0000f0 },
  1576. { 0x12, 0x4f0000f0 },
  1577. { 0x13, 0x90a60160 },
  1578. { 0x14, 0x4f0000f0 },
  1579. { 0x22, 0x4f0000f0 },
  1580. { 0x23, 0x4f0000f0 },
  1581. {}
  1582. };
  1583. static const struct hda_pintbl alienware_m17x_pin_configs[] = {
  1584. { 0x0a, 0x0321101f },
  1585. { 0x0b, 0x0321101f },
  1586. { 0x0c, 0x03a11020 },
  1587. { 0x0d, 0x03014020 },
  1588. { 0x0e, 0x90170110 },
  1589. { 0x0f, 0x4f0000f0 },
  1590. { 0x10, 0x4f0000f0 },
  1591. { 0x11, 0x4f0000f0 },
  1592. { 0x12, 0x4f0000f0 },
  1593. { 0x13, 0x90a60160 },
  1594. { 0x14, 0x4f0000f0 },
  1595. { 0x22, 0x4f0000f0 },
  1596. { 0x23, 0x904601b0 },
  1597. {}
  1598. };
  1599. static const struct hda_pintbl intel_dg45id_pin_configs[] = {
  1600. { 0x0a, 0x02214230 },
  1601. { 0x0b, 0x02A19240 },
  1602. { 0x0c, 0x01013214 },
  1603. { 0x0d, 0x01014210 },
  1604. { 0x0e, 0x01A19250 },
  1605. { 0x0f, 0x01011212 },
  1606. { 0x10, 0x01016211 },
  1607. {}
  1608. };
  1609. static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
  1610. { 0x0a, 0x02214030 },
  1611. { 0x0b, 0x02A19010 },
  1612. {}
  1613. };
  1614. static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
  1615. { 0x0e, 0x400000f0 },
  1616. {}
  1617. };
  1618. static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
  1619. const struct hda_fixup *fix, int action)
  1620. {
  1621. struct sigmatel_spec *spec = codec->spec;
  1622. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1623. return;
  1624. snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
  1625. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  1626. }
  1627. static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
  1628. {
  1629. struct sigmatel_spec *spec = codec->spec;
  1630. snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
  1631. spec->eapd_switch = 0;
  1632. }
  1633. static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
  1634. const struct hda_fixup *fix, int action)
  1635. {
  1636. struct sigmatel_spec *spec = codec->spec;
  1637. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1638. return;
  1639. stac92hd73xx_fixup_dell(codec);
  1640. snd_hda_add_verbs(codec, dell_eq_core_init);
  1641. spec->volknob_init = 1;
  1642. }
  1643. /* Analog Mics */
  1644. static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
  1645. const struct hda_fixup *fix, int action)
  1646. {
  1647. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1648. return;
  1649. stac92hd73xx_fixup_dell(codec);
  1650. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1651. }
  1652. /* Digital Mics */
  1653. static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
  1654. const struct hda_fixup *fix, int action)
  1655. {
  1656. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1657. return;
  1658. stac92hd73xx_fixup_dell(codec);
  1659. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1660. }
  1661. /* Both */
  1662. static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
  1663. const struct hda_fixup *fix, int action)
  1664. {
  1665. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1666. return;
  1667. stac92hd73xx_fixup_dell(codec);
  1668. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1669. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1670. }
  1671. static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
  1672. const struct hda_fixup *fix, int action)
  1673. {
  1674. struct sigmatel_spec *spec = codec->spec;
  1675. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1676. return;
  1677. snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
  1678. spec->eapd_switch = 0;
  1679. }
  1680. static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
  1681. const struct hda_fixup *fix, int action)
  1682. {
  1683. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1684. codec->no_jack_detect = 1;
  1685. }
  1686. static const struct hda_fixup stac92hd73xx_fixups[] = {
  1687. [STAC_92HD73XX_REF] = {
  1688. .type = HDA_FIXUP_FUNC,
  1689. .v.func = stac92hd73xx_fixup_ref,
  1690. },
  1691. [STAC_DELL_M6_AMIC] = {
  1692. .type = HDA_FIXUP_FUNC,
  1693. .v.func = stac92hd73xx_fixup_dell_m6_amic,
  1694. },
  1695. [STAC_DELL_M6_DMIC] = {
  1696. .type = HDA_FIXUP_FUNC,
  1697. .v.func = stac92hd73xx_fixup_dell_m6_dmic,
  1698. },
  1699. [STAC_DELL_M6_BOTH] = {
  1700. .type = HDA_FIXUP_FUNC,
  1701. .v.func = stac92hd73xx_fixup_dell_m6_both,
  1702. },
  1703. [STAC_DELL_EQ] = {
  1704. .type = HDA_FIXUP_FUNC,
  1705. .v.func = stac92hd73xx_fixup_dell_eq,
  1706. },
  1707. [STAC_ALIENWARE_M17X] = {
  1708. .type = HDA_FIXUP_FUNC,
  1709. .v.func = stac92hd73xx_fixup_alienware_m17x,
  1710. },
  1711. [STAC_92HD73XX_INTEL] = {
  1712. .type = HDA_FIXUP_PINS,
  1713. .v.pins = intel_dg45id_pin_configs,
  1714. },
  1715. [STAC_92HD73XX_NO_JD] = {
  1716. .type = HDA_FIXUP_FUNC,
  1717. .v.func = stac92hd73xx_fixup_no_jd,
  1718. },
  1719. [STAC_92HD89XX_HP_FRONT_JACK] = {
  1720. .type = HDA_FIXUP_PINS,
  1721. .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
  1722. },
  1723. [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
  1724. .type = HDA_FIXUP_PINS,
  1725. .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
  1726. }
  1727. };
  1728. static const struct hda_model_fixup stac92hd73xx_models[] = {
  1729. { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
  1730. { .id = STAC_92HD73XX_REF, .name = "ref" },
  1731. { .id = STAC_92HD73XX_INTEL, .name = "intel" },
  1732. { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
  1733. { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
  1734. { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
  1735. { .id = STAC_DELL_EQ, .name = "dell-eq" },
  1736. { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
  1737. {}
  1738. };
  1739. static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
  1740. /* SigmaTel reference board */
  1741. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1742. "DFI LanParty", STAC_92HD73XX_REF),
  1743. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1744. "DFI LanParty", STAC_92HD73XX_REF),
  1745. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
  1746. "Intel DG45ID", STAC_92HD73XX_INTEL),
  1747. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
  1748. "Intel DG45FC", STAC_92HD73XX_INTEL),
  1749. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
  1750. "Dell Studio 1535", STAC_DELL_M6_DMIC),
  1751. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
  1752. "unknown Dell", STAC_DELL_M6_DMIC),
  1753. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
  1754. "unknown Dell", STAC_DELL_M6_BOTH),
  1755. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
  1756. "unknown Dell", STAC_DELL_M6_BOTH),
  1757. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
  1758. "unknown Dell", STAC_DELL_M6_AMIC),
  1759. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
  1760. "unknown Dell", STAC_DELL_M6_AMIC),
  1761. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
  1762. "unknown Dell", STAC_DELL_M6_DMIC),
  1763. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
  1764. "unknown Dell", STAC_DELL_M6_DMIC),
  1765. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
  1766. "Dell Studio 1537", STAC_DELL_M6_DMIC),
  1767. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
  1768. "Dell Studio 17", STAC_DELL_M6_DMIC),
  1769. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
  1770. "Dell Studio 1555", STAC_DELL_M6_DMIC),
  1771. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
  1772. "Dell Studio 1557", STAC_DELL_M6_DMIC),
  1773. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
  1774. "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
  1775. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
  1776. "Dell Studio 1558", STAC_DELL_M6_DMIC),
  1777. /* codec SSID matching */
  1778. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
  1779. "Alienware M17x", STAC_ALIENWARE_M17X),
  1780. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
  1781. "Alienware M17x", STAC_ALIENWARE_M17X),
  1782. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
  1783. "Alienware M17x R3", STAC_DELL_EQ),
  1784. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
  1785. "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
  1786. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
  1787. "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
  1788. {} /* terminator */
  1789. };
  1790. static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
  1791. { 0x0a, 0x02214030 },
  1792. { 0x0b, 0x02211010 },
  1793. { 0x0c, 0x02a19020 },
  1794. { 0x0d, 0x02170130 },
  1795. { 0x0e, 0x01014050 },
  1796. { 0x0f, 0x01819040 },
  1797. { 0x10, 0x01014020 },
  1798. { 0x11, 0x90a3014e },
  1799. { 0x1f, 0x01451160 },
  1800. { 0x20, 0x98560170 },
  1801. {}
  1802. };
  1803. static const struct hda_pintbl dell_s14_pin_configs[] = {
  1804. { 0x0a, 0x0221403f },
  1805. { 0x0b, 0x0221101f },
  1806. { 0x0c, 0x02a19020 },
  1807. { 0x0d, 0x90170110 },
  1808. { 0x0e, 0x40f000f0 },
  1809. { 0x0f, 0x40f000f0 },
  1810. { 0x10, 0x40f000f0 },
  1811. { 0x11, 0x90a60160 },
  1812. { 0x1f, 0x40f000f0 },
  1813. { 0x20, 0x40f000f0 },
  1814. {}
  1815. };
  1816. static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
  1817. { 0x0a, 0x02a11020 },
  1818. { 0x0b, 0x0221101f },
  1819. { 0x0c, 0x400000f0 },
  1820. { 0x0d, 0x90170110 },
  1821. { 0x0e, 0x400000f1 },
  1822. { 0x0f, 0x400000f2 },
  1823. { 0x10, 0x400000f3 },
  1824. { 0x11, 0x90a60160 },
  1825. { 0x1f, 0x400000f4 },
  1826. { 0x20, 0x400000f5 },
  1827. {}
  1828. };
  1829. static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
  1830. { 0x0a, 0x03a12050 },
  1831. { 0x0b, 0x0321201f },
  1832. { 0x0c, 0x40f000f0 },
  1833. { 0x0d, 0x90170110 },
  1834. { 0x0e, 0x40f000f0 },
  1835. { 0x0f, 0x40f000f0 },
  1836. { 0x10, 0x90170110 },
  1837. { 0x11, 0xd5a30140 },
  1838. { 0x1f, 0x40f000f0 },
  1839. { 0x20, 0x40f000f0 },
  1840. {}
  1841. };
  1842. static const struct hda_pintbl hp_zephyr_pin_configs[] = {
  1843. { 0x0a, 0x01813050 },
  1844. { 0x0b, 0x0421201f },
  1845. { 0x0c, 0x04a1205e },
  1846. { 0x0d, 0x96130310 },
  1847. { 0x0e, 0x96130310 },
  1848. { 0x0f, 0x0101401f },
  1849. { 0x10, 0x1111611f },
  1850. { 0x11, 0xd5a30130 },
  1851. {}
  1852. };
  1853. static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
  1854. { 0x0a, 0x40f000f0 },
  1855. { 0x0b, 0x0221101f },
  1856. { 0x0c, 0x02a11020 },
  1857. { 0x0d, 0x92170110 },
  1858. { 0x0e, 0x40f000f0 },
  1859. { 0x0f, 0x92170110 },
  1860. { 0x10, 0x40f000f0 },
  1861. { 0x11, 0xd5a30130 },
  1862. { 0x1f, 0x40f000f0 },
  1863. { 0x20, 0x40f000f0 },
  1864. {}
  1865. };
  1866. static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
  1867. const struct hda_fixup *fix, int action)
  1868. {
  1869. struct sigmatel_spec *spec = codec->spec;
  1870. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1871. return;
  1872. if (hp_bnb2011_with_dock(codec)) {
  1873. snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
  1874. snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
  1875. }
  1876. if (find_mute_led_cfg(codec, spec->default_polarity))
  1877. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  1878. spec->gpio_led,
  1879. spec->gpio_led_polarity);
  1880. /* allow auto-switching of dock line-in */
  1881. spec->gen.line_in_auto_switch = true;
  1882. }
  1883. static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
  1884. const struct hda_fixup *fix, int action)
  1885. {
  1886. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1887. return;
  1888. snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
  1889. snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
  1890. }
  1891. static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
  1892. const struct hda_fixup *fix, int action)
  1893. {
  1894. struct sigmatel_spec *spec = codec->spec;
  1895. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1896. spec->default_polarity = 0;
  1897. }
  1898. static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
  1899. const struct hda_fixup *fix, int action)
  1900. {
  1901. struct sigmatel_spec *spec = codec->spec;
  1902. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1903. spec->default_polarity = 1;
  1904. }
  1905. static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
  1906. const struct hda_fixup *fix, int action)
  1907. {
  1908. struct sigmatel_spec *spec = codec->spec;
  1909. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1910. spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
  1911. /* resetting controller clears GPIO, so we need to keep on */
  1912. codec->bus->power_keep_link_on = 1;
  1913. }
  1914. }
  1915. static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
  1916. const struct hda_fixup *fix, int action)
  1917. {
  1918. struct sigmatel_spec *spec = codec->spec;
  1919. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1920. spec->gpio_led = 0x10; /* GPIO4 */
  1921. spec->default_polarity = 0;
  1922. }
  1923. }
  1924. static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
  1925. const struct hda_fixup *fix, int action)
  1926. {
  1927. struct sigmatel_spec *spec = codec->spec;
  1928. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1929. spec->headset_jack = 1;
  1930. }
  1931. static const struct hda_verb hp_bnb13_eq_verbs[] = {
  1932. /* 44.1KHz base */
  1933. { 0x22, 0x7A6, 0x3E },
  1934. { 0x22, 0x7A7, 0x68 },
  1935. { 0x22, 0x7A8, 0x17 },
  1936. { 0x22, 0x7A9, 0x3E },
  1937. { 0x22, 0x7AA, 0x68 },
  1938. { 0x22, 0x7AB, 0x17 },
  1939. { 0x22, 0x7AC, 0x00 },
  1940. { 0x22, 0x7AD, 0x80 },
  1941. { 0x22, 0x7A6, 0x83 },
  1942. { 0x22, 0x7A7, 0x2F },
  1943. { 0x22, 0x7A8, 0xD1 },
  1944. { 0x22, 0x7A9, 0x83 },
  1945. { 0x22, 0x7AA, 0x2F },
  1946. { 0x22, 0x7AB, 0xD1 },
  1947. { 0x22, 0x7AC, 0x01 },
  1948. { 0x22, 0x7AD, 0x80 },
  1949. { 0x22, 0x7A6, 0x3E },
  1950. { 0x22, 0x7A7, 0x68 },
  1951. { 0x22, 0x7A8, 0x17 },
  1952. { 0x22, 0x7A9, 0x3E },
  1953. { 0x22, 0x7AA, 0x68 },
  1954. { 0x22, 0x7AB, 0x17 },
  1955. { 0x22, 0x7AC, 0x02 },
  1956. { 0x22, 0x7AD, 0x80 },
  1957. { 0x22, 0x7A6, 0x7C },
  1958. { 0x22, 0x7A7, 0xC6 },
  1959. { 0x22, 0x7A8, 0x0C },
  1960. { 0x22, 0x7A9, 0x7C },
  1961. { 0x22, 0x7AA, 0xC6 },
  1962. { 0x22, 0x7AB, 0x0C },
  1963. { 0x22, 0x7AC, 0x03 },
  1964. { 0x22, 0x7AD, 0x80 },
  1965. { 0x22, 0x7A6, 0xC3 },
  1966. { 0x22, 0x7A7, 0x25 },
  1967. { 0x22, 0x7A8, 0xAF },
  1968. { 0x22, 0x7A9, 0xC3 },
  1969. { 0x22, 0x7AA, 0x25 },
  1970. { 0x22, 0x7AB, 0xAF },
  1971. { 0x22, 0x7AC, 0x04 },
  1972. { 0x22, 0x7AD, 0x80 },
  1973. { 0x22, 0x7A6, 0x3E },
  1974. { 0x22, 0x7A7, 0x85 },
  1975. { 0x22, 0x7A8, 0x73 },
  1976. { 0x22, 0x7A9, 0x3E },
  1977. { 0x22, 0x7AA, 0x85 },
  1978. { 0x22, 0x7AB, 0x73 },
  1979. { 0x22, 0x7AC, 0x05 },
  1980. { 0x22, 0x7AD, 0x80 },
  1981. { 0x22, 0x7A6, 0x85 },
  1982. { 0x22, 0x7A7, 0x39 },
  1983. { 0x22, 0x7A8, 0xC7 },
  1984. { 0x22, 0x7A9, 0x85 },
  1985. { 0x22, 0x7AA, 0x39 },
  1986. { 0x22, 0x7AB, 0xC7 },
  1987. { 0x22, 0x7AC, 0x06 },
  1988. { 0x22, 0x7AD, 0x80 },
  1989. { 0x22, 0x7A6, 0x3C },
  1990. { 0x22, 0x7A7, 0x90 },
  1991. { 0x22, 0x7A8, 0xB0 },
  1992. { 0x22, 0x7A9, 0x3C },
  1993. { 0x22, 0x7AA, 0x90 },
  1994. { 0x22, 0x7AB, 0xB0 },
  1995. { 0x22, 0x7AC, 0x07 },
  1996. { 0x22, 0x7AD, 0x80 },
  1997. { 0x22, 0x7A6, 0x7A },
  1998. { 0x22, 0x7A7, 0xC6 },
  1999. { 0x22, 0x7A8, 0x39 },
  2000. { 0x22, 0x7A9, 0x7A },
  2001. { 0x22, 0x7AA, 0xC6 },
  2002. { 0x22, 0x7AB, 0x39 },
  2003. { 0x22, 0x7AC, 0x08 },
  2004. { 0x22, 0x7AD, 0x80 },
  2005. { 0x22, 0x7A6, 0xC4 },
  2006. { 0x22, 0x7A7, 0xE9 },
  2007. { 0x22, 0x7A8, 0xDC },
  2008. { 0x22, 0x7A9, 0xC4 },
  2009. { 0x22, 0x7AA, 0xE9 },
  2010. { 0x22, 0x7AB, 0xDC },
  2011. { 0x22, 0x7AC, 0x09 },
  2012. { 0x22, 0x7AD, 0x80 },
  2013. { 0x22, 0x7A6, 0x3D },
  2014. { 0x22, 0x7A7, 0xE1 },
  2015. { 0x22, 0x7A8, 0x0D },
  2016. { 0x22, 0x7A9, 0x3D },
  2017. { 0x22, 0x7AA, 0xE1 },
  2018. { 0x22, 0x7AB, 0x0D },
  2019. { 0x22, 0x7AC, 0x0A },
  2020. { 0x22, 0x7AD, 0x80 },
  2021. { 0x22, 0x7A6, 0x89 },
  2022. { 0x22, 0x7A7, 0xB6 },
  2023. { 0x22, 0x7A8, 0xEB },
  2024. { 0x22, 0x7A9, 0x89 },
  2025. { 0x22, 0x7AA, 0xB6 },
  2026. { 0x22, 0x7AB, 0xEB },
  2027. { 0x22, 0x7AC, 0x0B },
  2028. { 0x22, 0x7AD, 0x80 },
  2029. { 0x22, 0x7A6, 0x39 },
  2030. { 0x22, 0x7A7, 0x9D },
  2031. { 0x22, 0x7A8, 0xFE },
  2032. { 0x22, 0x7A9, 0x39 },
  2033. { 0x22, 0x7AA, 0x9D },
  2034. { 0x22, 0x7AB, 0xFE },
  2035. { 0x22, 0x7AC, 0x0C },
  2036. { 0x22, 0x7AD, 0x80 },
  2037. { 0x22, 0x7A6, 0x76 },
  2038. { 0x22, 0x7A7, 0x49 },
  2039. { 0x22, 0x7A8, 0x15 },
  2040. { 0x22, 0x7A9, 0x76 },
  2041. { 0x22, 0x7AA, 0x49 },
  2042. { 0x22, 0x7AB, 0x15 },
  2043. { 0x22, 0x7AC, 0x0D },
  2044. { 0x22, 0x7AD, 0x80 },
  2045. { 0x22, 0x7A6, 0xC8 },
  2046. { 0x22, 0x7A7, 0x80 },
  2047. { 0x22, 0x7A8, 0xF5 },
  2048. { 0x22, 0x7A9, 0xC8 },
  2049. { 0x22, 0x7AA, 0x80 },
  2050. { 0x22, 0x7AB, 0xF5 },
  2051. { 0x22, 0x7AC, 0x0E },
  2052. { 0x22, 0x7AD, 0x80 },
  2053. { 0x22, 0x7A6, 0x40 },
  2054. { 0x22, 0x7A7, 0x00 },
  2055. { 0x22, 0x7A8, 0x00 },
  2056. { 0x22, 0x7A9, 0x40 },
  2057. { 0x22, 0x7AA, 0x00 },
  2058. { 0x22, 0x7AB, 0x00 },
  2059. { 0x22, 0x7AC, 0x0F },
  2060. { 0x22, 0x7AD, 0x80 },
  2061. { 0x22, 0x7A6, 0x90 },
  2062. { 0x22, 0x7A7, 0x68 },
  2063. { 0x22, 0x7A8, 0xF1 },
  2064. { 0x22, 0x7A9, 0x90 },
  2065. { 0x22, 0x7AA, 0x68 },
  2066. { 0x22, 0x7AB, 0xF1 },
  2067. { 0x22, 0x7AC, 0x10 },
  2068. { 0x22, 0x7AD, 0x80 },
  2069. { 0x22, 0x7A6, 0x34 },
  2070. { 0x22, 0x7A7, 0x47 },
  2071. { 0x22, 0x7A8, 0x6C },
  2072. { 0x22, 0x7A9, 0x34 },
  2073. { 0x22, 0x7AA, 0x47 },
  2074. { 0x22, 0x7AB, 0x6C },
  2075. { 0x22, 0x7AC, 0x11 },
  2076. { 0x22, 0x7AD, 0x80 },
  2077. { 0x22, 0x7A6, 0x6F },
  2078. { 0x22, 0x7A7, 0x97 },
  2079. { 0x22, 0x7A8, 0x0F },
  2080. { 0x22, 0x7A9, 0x6F },
  2081. { 0x22, 0x7AA, 0x97 },
  2082. { 0x22, 0x7AB, 0x0F },
  2083. { 0x22, 0x7AC, 0x12 },
  2084. { 0x22, 0x7AD, 0x80 },
  2085. { 0x22, 0x7A6, 0xCB },
  2086. { 0x22, 0x7A7, 0xB8 },
  2087. { 0x22, 0x7A8, 0x94 },
  2088. { 0x22, 0x7A9, 0xCB },
  2089. { 0x22, 0x7AA, 0xB8 },
  2090. { 0x22, 0x7AB, 0x94 },
  2091. { 0x22, 0x7AC, 0x13 },
  2092. { 0x22, 0x7AD, 0x80 },
  2093. { 0x22, 0x7A6, 0x40 },
  2094. { 0x22, 0x7A7, 0x00 },
  2095. { 0x22, 0x7A8, 0x00 },
  2096. { 0x22, 0x7A9, 0x40 },
  2097. { 0x22, 0x7AA, 0x00 },
  2098. { 0x22, 0x7AB, 0x00 },
  2099. { 0x22, 0x7AC, 0x14 },
  2100. { 0x22, 0x7AD, 0x80 },
  2101. { 0x22, 0x7A6, 0x95 },
  2102. { 0x22, 0x7A7, 0x76 },
  2103. { 0x22, 0x7A8, 0x5B },
  2104. { 0x22, 0x7A9, 0x95 },
  2105. { 0x22, 0x7AA, 0x76 },
  2106. { 0x22, 0x7AB, 0x5B },
  2107. { 0x22, 0x7AC, 0x15 },
  2108. { 0x22, 0x7AD, 0x80 },
  2109. { 0x22, 0x7A6, 0x31 },
  2110. { 0x22, 0x7A7, 0xAC },
  2111. { 0x22, 0x7A8, 0x31 },
  2112. { 0x22, 0x7A9, 0x31 },
  2113. { 0x22, 0x7AA, 0xAC },
  2114. { 0x22, 0x7AB, 0x31 },
  2115. { 0x22, 0x7AC, 0x16 },
  2116. { 0x22, 0x7AD, 0x80 },
  2117. { 0x22, 0x7A6, 0x6A },
  2118. { 0x22, 0x7A7, 0x89 },
  2119. { 0x22, 0x7A8, 0xA5 },
  2120. { 0x22, 0x7A9, 0x6A },
  2121. { 0x22, 0x7AA, 0x89 },
  2122. { 0x22, 0x7AB, 0xA5 },
  2123. { 0x22, 0x7AC, 0x17 },
  2124. { 0x22, 0x7AD, 0x80 },
  2125. { 0x22, 0x7A6, 0xCE },
  2126. { 0x22, 0x7A7, 0x53 },
  2127. { 0x22, 0x7A8, 0xCF },
  2128. { 0x22, 0x7A9, 0xCE },
  2129. { 0x22, 0x7AA, 0x53 },
  2130. { 0x22, 0x7AB, 0xCF },
  2131. { 0x22, 0x7AC, 0x18 },
  2132. { 0x22, 0x7AD, 0x80 },
  2133. { 0x22, 0x7A6, 0x40 },
  2134. { 0x22, 0x7A7, 0x00 },
  2135. { 0x22, 0x7A8, 0x00 },
  2136. { 0x22, 0x7A9, 0x40 },
  2137. { 0x22, 0x7AA, 0x00 },
  2138. { 0x22, 0x7AB, 0x00 },
  2139. { 0x22, 0x7AC, 0x19 },
  2140. { 0x22, 0x7AD, 0x80 },
  2141. /* 48KHz base */
  2142. { 0x22, 0x7A6, 0x3E },
  2143. { 0x22, 0x7A7, 0x88 },
  2144. { 0x22, 0x7A8, 0xDC },
  2145. { 0x22, 0x7A9, 0x3E },
  2146. { 0x22, 0x7AA, 0x88 },
  2147. { 0x22, 0x7AB, 0xDC },
  2148. { 0x22, 0x7AC, 0x1A },
  2149. { 0x22, 0x7AD, 0x80 },
  2150. { 0x22, 0x7A6, 0x82 },
  2151. { 0x22, 0x7A7, 0xEE },
  2152. { 0x22, 0x7A8, 0x46 },
  2153. { 0x22, 0x7A9, 0x82 },
  2154. { 0x22, 0x7AA, 0xEE },
  2155. { 0x22, 0x7AB, 0x46 },
  2156. { 0x22, 0x7AC, 0x1B },
  2157. { 0x22, 0x7AD, 0x80 },
  2158. { 0x22, 0x7A6, 0x3E },
  2159. { 0x22, 0x7A7, 0x88 },
  2160. { 0x22, 0x7A8, 0xDC },
  2161. { 0x22, 0x7A9, 0x3E },
  2162. { 0x22, 0x7AA, 0x88 },
  2163. { 0x22, 0x7AB, 0xDC },
  2164. { 0x22, 0x7AC, 0x1C },
  2165. { 0x22, 0x7AD, 0x80 },
  2166. { 0x22, 0x7A6, 0x7D },
  2167. { 0x22, 0x7A7, 0x09 },
  2168. { 0x22, 0x7A8, 0x28 },
  2169. { 0x22, 0x7A9, 0x7D },
  2170. { 0x22, 0x7AA, 0x09 },
  2171. { 0x22, 0x7AB, 0x28 },
  2172. { 0x22, 0x7AC, 0x1D },
  2173. { 0x22, 0x7AD, 0x80 },
  2174. { 0x22, 0x7A6, 0xC2 },
  2175. { 0x22, 0x7A7, 0xE5 },
  2176. { 0x22, 0x7A8, 0xB4 },
  2177. { 0x22, 0x7A9, 0xC2 },
  2178. { 0x22, 0x7AA, 0xE5 },
  2179. { 0x22, 0x7AB, 0xB4 },
  2180. { 0x22, 0x7AC, 0x1E },
  2181. { 0x22, 0x7AD, 0x80 },
  2182. { 0x22, 0x7A6, 0x3E },
  2183. { 0x22, 0x7A7, 0xA3 },
  2184. { 0x22, 0x7A8, 0x1F },
  2185. { 0x22, 0x7A9, 0x3E },
  2186. { 0x22, 0x7AA, 0xA3 },
  2187. { 0x22, 0x7AB, 0x1F },
  2188. { 0x22, 0x7AC, 0x1F },
  2189. { 0x22, 0x7AD, 0x80 },
  2190. { 0x22, 0x7A6, 0x84 },
  2191. { 0x22, 0x7A7, 0xCA },
  2192. { 0x22, 0x7A8, 0xF1 },
  2193. { 0x22, 0x7A9, 0x84 },
  2194. { 0x22, 0x7AA, 0xCA },
  2195. { 0x22, 0x7AB, 0xF1 },
  2196. { 0x22, 0x7AC, 0x20 },
  2197. { 0x22, 0x7AD, 0x80 },
  2198. { 0x22, 0x7A6, 0x3C },
  2199. { 0x22, 0x7A7, 0xD5 },
  2200. { 0x22, 0x7A8, 0x9C },
  2201. { 0x22, 0x7A9, 0x3C },
  2202. { 0x22, 0x7AA, 0xD5 },
  2203. { 0x22, 0x7AB, 0x9C },
  2204. { 0x22, 0x7AC, 0x21 },
  2205. { 0x22, 0x7AD, 0x80 },
  2206. { 0x22, 0x7A6, 0x7B },
  2207. { 0x22, 0x7A7, 0x35 },
  2208. { 0x22, 0x7A8, 0x0F },
  2209. { 0x22, 0x7A9, 0x7B },
  2210. { 0x22, 0x7AA, 0x35 },
  2211. { 0x22, 0x7AB, 0x0F },
  2212. { 0x22, 0x7AC, 0x22 },
  2213. { 0x22, 0x7AD, 0x80 },
  2214. { 0x22, 0x7A6, 0xC4 },
  2215. { 0x22, 0x7A7, 0x87 },
  2216. { 0x22, 0x7A8, 0x45 },
  2217. { 0x22, 0x7A9, 0xC4 },
  2218. { 0x22, 0x7AA, 0x87 },
  2219. { 0x22, 0x7AB, 0x45 },
  2220. { 0x22, 0x7AC, 0x23 },
  2221. { 0x22, 0x7AD, 0x80 },
  2222. { 0x22, 0x7A6, 0x3E },
  2223. { 0x22, 0x7A7, 0x0A },
  2224. { 0x22, 0x7A8, 0x78 },
  2225. { 0x22, 0x7A9, 0x3E },
  2226. { 0x22, 0x7AA, 0x0A },
  2227. { 0x22, 0x7AB, 0x78 },
  2228. { 0x22, 0x7AC, 0x24 },
  2229. { 0x22, 0x7AD, 0x80 },
  2230. { 0x22, 0x7A6, 0x88 },
  2231. { 0x22, 0x7A7, 0xE2 },
  2232. { 0x22, 0x7A8, 0x05 },
  2233. { 0x22, 0x7A9, 0x88 },
  2234. { 0x22, 0x7AA, 0xE2 },
  2235. { 0x22, 0x7AB, 0x05 },
  2236. { 0x22, 0x7AC, 0x25 },
  2237. { 0x22, 0x7AD, 0x80 },
  2238. { 0x22, 0x7A6, 0x3A },
  2239. { 0x22, 0x7A7, 0x1A },
  2240. { 0x22, 0x7A8, 0xA3 },
  2241. { 0x22, 0x7A9, 0x3A },
  2242. { 0x22, 0x7AA, 0x1A },
  2243. { 0x22, 0x7AB, 0xA3 },
  2244. { 0x22, 0x7AC, 0x26 },
  2245. { 0x22, 0x7AD, 0x80 },
  2246. { 0x22, 0x7A6, 0x77 },
  2247. { 0x22, 0x7A7, 0x1D },
  2248. { 0x22, 0x7A8, 0xFB },
  2249. { 0x22, 0x7A9, 0x77 },
  2250. { 0x22, 0x7AA, 0x1D },
  2251. { 0x22, 0x7AB, 0xFB },
  2252. { 0x22, 0x7AC, 0x27 },
  2253. { 0x22, 0x7AD, 0x80 },
  2254. { 0x22, 0x7A6, 0xC7 },
  2255. { 0x22, 0x7A7, 0xDA },
  2256. { 0x22, 0x7A8, 0xE5 },
  2257. { 0x22, 0x7A9, 0xC7 },
  2258. { 0x22, 0x7AA, 0xDA },
  2259. { 0x22, 0x7AB, 0xE5 },
  2260. { 0x22, 0x7AC, 0x28 },
  2261. { 0x22, 0x7AD, 0x80 },
  2262. { 0x22, 0x7A6, 0x40 },
  2263. { 0x22, 0x7A7, 0x00 },
  2264. { 0x22, 0x7A8, 0x00 },
  2265. { 0x22, 0x7A9, 0x40 },
  2266. { 0x22, 0x7AA, 0x00 },
  2267. { 0x22, 0x7AB, 0x00 },
  2268. { 0x22, 0x7AC, 0x29 },
  2269. { 0x22, 0x7AD, 0x80 },
  2270. { 0x22, 0x7A6, 0x8E },
  2271. { 0x22, 0x7A7, 0xD7 },
  2272. { 0x22, 0x7A8, 0x22 },
  2273. { 0x22, 0x7A9, 0x8E },
  2274. { 0x22, 0x7AA, 0xD7 },
  2275. { 0x22, 0x7AB, 0x22 },
  2276. { 0x22, 0x7AC, 0x2A },
  2277. { 0x22, 0x7AD, 0x80 },
  2278. { 0x22, 0x7A6, 0x35 },
  2279. { 0x22, 0x7A7, 0x26 },
  2280. { 0x22, 0x7A8, 0xC6 },
  2281. { 0x22, 0x7A9, 0x35 },
  2282. { 0x22, 0x7AA, 0x26 },
  2283. { 0x22, 0x7AB, 0xC6 },
  2284. { 0x22, 0x7AC, 0x2B },
  2285. { 0x22, 0x7AD, 0x80 },
  2286. { 0x22, 0x7A6, 0x71 },
  2287. { 0x22, 0x7A7, 0x28 },
  2288. { 0x22, 0x7A8, 0xDE },
  2289. { 0x22, 0x7A9, 0x71 },
  2290. { 0x22, 0x7AA, 0x28 },
  2291. { 0x22, 0x7AB, 0xDE },
  2292. { 0x22, 0x7AC, 0x2C },
  2293. { 0x22, 0x7AD, 0x80 },
  2294. { 0x22, 0x7A6, 0xCA },
  2295. { 0x22, 0x7A7, 0xD9 },
  2296. { 0x22, 0x7A8, 0x3A },
  2297. { 0x22, 0x7A9, 0xCA },
  2298. { 0x22, 0x7AA, 0xD9 },
  2299. { 0x22, 0x7AB, 0x3A },
  2300. { 0x22, 0x7AC, 0x2D },
  2301. { 0x22, 0x7AD, 0x80 },
  2302. { 0x22, 0x7A6, 0x40 },
  2303. { 0x22, 0x7A7, 0x00 },
  2304. { 0x22, 0x7A8, 0x00 },
  2305. { 0x22, 0x7A9, 0x40 },
  2306. { 0x22, 0x7AA, 0x00 },
  2307. { 0x22, 0x7AB, 0x00 },
  2308. { 0x22, 0x7AC, 0x2E },
  2309. { 0x22, 0x7AD, 0x80 },
  2310. { 0x22, 0x7A6, 0x93 },
  2311. { 0x22, 0x7A7, 0x5E },
  2312. { 0x22, 0x7A8, 0xD8 },
  2313. { 0x22, 0x7A9, 0x93 },
  2314. { 0x22, 0x7AA, 0x5E },
  2315. { 0x22, 0x7AB, 0xD8 },
  2316. { 0x22, 0x7AC, 0x2F },
  2317. { 0x22, 0x7AD, 0x80 },
  2318. { 0x22, 0x7A6, 0x32 },
  2319. { 0x22, 0x7A7, 0xB7 },
  2320. { 0x22, 0x7A8, 0xB1 },
  2321. { 0x22, 0x7A9, 0x32 },
  2322. { 0x22, 0x7AA, 0xB7 },
  2323. { 0x22, 0x7AB, 0xB1 },
  2324. { 0x22, 0x7AC, 0x30 },
  2325. { 0x22, 0x7AD, 0x80 },
  2326. { 0x22, 0x7A6, 0x6C },
  2327. { 0x22, 0x7A7, 0xA1 },
  2328. { 0x22, 0x7A8, 0x28 },
  2329. { 0x22, 0x7A9, 0x6C },
  2330. { 0x22, 0x7AA, 0xA1 },
  2331. { 0x22, 0x7AB, 0x28 },
  2332. { 0x22, 0x7AC, 0x31 },
  2333. { 0x22, 0x7AD, 0x80 },
  2334. { 0x22, 0x7A6, 0xCD },
  2335. { 0x22, 0x7A7, 0x48 },
  2336. { 0x22, 0x7A8, 0x4F },
  2337. { 0x22, 0x7A9, 0xCD },
  2338. { 0x22, 0x7AA, 0x48 },
  2339. { 0x22, 0x7AB, 0x4F },
  2340. { 0x22, 0x7AC, 0x32 },
  2341. { 0x22, 0x7AD, 0x80 },
  2342. { 0x22, 0x7A6, 0x40 },
  2343. { 0x22, 0x7A7, 0x00 },
  2344. { 0x22, 0x7A8, 0x00 },
  2345. { 0x22, 0x7A9, 0x40 },
  2346. { 0x22, 0x7AA, 0x00 },
  2347. { 0x22, 0x7AB, 0x00 },
  2348. { 0x22, 0x7AC, 0x33 },
  2349. { 0x22, 0x7AD, 0x80 },
  2350. /* common */
  2351. { 0x22, 0x782, 0xC1 },
  2352. { 0x22, 0x771, 0x2C },
  2353. { 0x22, 0x772, 0x2C },
  2354. { 0x22, 0x788, 0x04 },
  2355. { 0x01, 0x7B0, 0x08 },
  2356. {}
  2357. };
  2358. static const struct hda_fixup stac92hd83xxx_fixups[] = {
  2359. [STAC_92HD83XXX_REF] = {
  2360. .type = HDA_FIXUP_PINS,
  2361. .v.pins = ref92hd83xxx_pin_configs,
  2362. },
  2363. [STAC_92HD83XXX_PWR_REF] = {
  2364. .type = HDA_FIXUP_PINS,
  2365. .v.pins = ref92hd83xxx_pin_configs,
  2366. },
  2367. [STAC_DELL_S14] = {
  2368. .type = HDA_FIXUP_PINS,
  2369. .v.pins = dell_s14_pin_configs,
  2370. },
  2371. [STAC_DELL_VOSTRO_3500] = {
  2372. .type = HDA_FIXUP_PINS,
  2373. .v.pins = dell_vostro_3500_pin_configs,
  2374. },
  2375. [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
  2376. .type = HDA_FIXUP_PINS,
  2377. .v.pins = hp_cNB11_intquad_pin_configs,
  2378. .chained = true,
  2379. .chain_id = STAC_92HD83XXX_HP,
  2380. },
  2381. [STAC_92HD83XXX_HP] = {
  2382. .type = HDA_FIXUP_FUNC,
  2383. .v.func = stac92hd83xxx_fixup_hp,
  2384. },
  2385. [STAC_HP_DV7_4000] = {
  2386. .type = HDA_FIXUP_PINS,
  2387. .v.pins = hp_dv7_4000_pin_configs,
  2388. .chained = true,
  2389. .chain_id = STAC_92HD83XXX_HP,
  2390. },
  2391. [STAC_HP_ZEPHYR] = {
  2392. .type = HDA_FIXUP_FUNC,
  2393. .v.func = stac92hd83xxx_fixup_hp_zephyr,
  2394. .chained = true,
  2395. .chain_id = STAC_92HD83XXX_HP,
  2396. },
  2397. [STAC_92HD83XXX_HP_LED] = {
  2398. .type = HDA_FIXUP_FUNC,
  2399. .v.func = stac92hd83xxx_fixup_hp_led,
  2400. .chained = true,
  2401. .chain_id = STAC_92HD83XXX_HP,
  2402. },
  2403. [STAC_92HD83XXX_HP_INV_LED] = {
  2404. .type = HDA_FIXUP_FUNC,
  2405. .v.func = stac92hd83xxx_fixup_hp_inv_led,
  2406. .chained = true,
  2407. .chain_id = STAC_92HD83XXX_HP,
  2408. },
  2409. [STAC_92HD83XXX_HP_MIC_LED] = {
  2410. .type = HDA_FIXUP_FUNC,
  2411. .v.func = stac92hd83xxx_fixup_hp_mic_led,
  2412. .chained = true,
  2413. .chain_id = STAC_92HD83XXX_HP,
  2414. },
  2415. [STAC_HP_LED_GPIO10] = {
  2416. .type = HDA_FIXUP_FUNC,
  2417. .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
  2418. .chained = true,
  2419. .chain_id = STAC_92HD83XXX_HP,
  2420. },
  2421. [STAC_92HD83XXX_HEADSET_JACK] = {
  2422. .type = HDA_FIXUP_FUNC,
  2423. .v.func = stac92hd83xxx_fixup_headset_jack,
  2424. },
  2425. [STAC_HP_ENVY_BASS] = {
  2426. .type = HDA_FIXUP_PINS,
  2427. .v.pins = (const struct hda_pintbl[]) {
  2428. { 0x0f, 0x90170111 },
  2429. {}
  2430. },
  2431. },
  2432. [STAC_HP_BNB13_EQ] = {
  2433. .type = HDA_FIXUP_VERBS,
  2434. .v.verbs = hp_bnb13_eq_verbs,
  2435. .chained = true,
  2436. .chain_id = STAC_92HD83XXX_HP_MIC_LED,
  2437. },
  2438. [STAC_HP_ENVY_TS_BASS] = {
  2439. .type = HDA_FIXUP_PINS,
  2440. .v.pins = (const struct hda_pintbl[]) {
  2441. { 0x10, 0x92170111 },
  2442. {}
  2443. },
  2444. },
  2445. };
  2446. static const struct hda_model_fixup stac92hd83xxx_models[] = {
  2447. { .id = STAC_92HD83XXX_REF, .name = "ref" },
  2448. { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
  2449. { .id = STAC_DELL_S14, .name = "dell-s14" },
  2450. { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
  2451. { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
  2452. { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
  2453. { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
  2454. { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
  2455. { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
  2456. { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
  2457. { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
  2458. { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
  2459. { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
  2460. { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
  2461. {}
  2462. };
  2463. static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
  2464. /* SigmaTel reference board */
  2465. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2466. "DFI LanParty", STAC_92HD83XXX_REF),
  2467. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2468. "DFI LanParty", STAC_92HD83XXX_REF),
  2469. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
  2470. "unknown Dell", STAC_DELL_S14),
  2471. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
  2472. "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
  2473. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
  2474. "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
  2475. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
  2476. "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
  2477. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
  2478. "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
  2479. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
  2480. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  2481. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
  2482. "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
  2483. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
  2484. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  2485. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
  2486. "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
  2487. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
  2488. "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
  2489. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
  2490. "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
  2491. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
  2492. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2493. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
  2494. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2495. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
  2496. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2497. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
  2498. "HP Pavilion dv7", STAC_HP_DV7_4000),
  2499. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
  2500. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2501. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
  2502. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2503. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
  2504. "HP Envy Spectre", STAC_HP_ENVY_BASS),
  2505. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
  2506. "HP Folio 13", STAC_HP_LED_GPIO10),
  2507. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
  2508. "HP Folio", STAC_HP_BNB13_EQ),
  2509. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
  2510. "HP bNB13", STAC_HP_BNB13_EQ),
  2511. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
  2512. "HP bNB13", STAC_HP_BNB13_EQ),
  2513. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
  2514. "HP bNB13", STAC_HP_BNB13_EQ),
  2515. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
  2516. "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
  2517. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
  2518. "HP bNB13", STAC_HP_BNB13_EQ),
  2519. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
  2520. "HP bNB13", STAC_HP_BNB13_EQ),
  2521. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
  2522. "HP bNB13", STAC_HP_BNB13_EQ),
  2523. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
  2524. "HP bNB13", STAC_HP_BNB13_EQ),
  2525. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
  2526. "HP bNB13", STAC_HP_BNB13_EQ),
  2527. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
  2528. "HP bNB13", STAC_HP_BNB13_EQ),
  2529. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
  2530. "HP bNB13", STAC_HP_BNB13_EQ),
  2531. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
  2532. "HP bNB13", STAC_HP_BNB13_EQ),
  2533. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
  2534. "HP bNB13", STAC_HP_BNB13_EQ),
  2535. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
  2536. "HP bNB13", STAC_HP_BNB13_EQ),
  2537. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
  2538. "HP bNB13", STAC_HP_BNB13_EQ),
  2539. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
  2540. "HP bNB13", STAC_HP_BNB13_EQ),
  2541. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
  2542. "HP bNB13", STAC_HP_BNB13_EQ),
  2543. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
  2544. "HP bNB13", STAC_HP_BNB13_EQ),
  2545. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
  2546. "HP bNB13", STAC_HP_BNB13_EQ),
  2547. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
  2548. "HP bNB13", STAC_HP_BNB13_EQ),
  2549. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
  2550. "HP bNB13", STAC_HP_BNB13_EQ),
  2551. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
  2552. "HP bNB13", STAC_HP_BNB13_EQ),
  2553. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
  2554. "HP bNB13", STAC_HP_BNB13_EQ),
  2555. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
  2556. "HP bNB13", STAC_HP_BNB13_EQ),
  2557. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
  2558. "HP bNB13", STAC_HP_BNB13_EQ),
  2559. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
  2560. "HP bNB13", STAC_HP_BNB13_EQ),
  2561. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
  2562. "HP bNB13", STAC_HP_BNB13_EQ),
  2563. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
  2564. "HP bNB13", STAC_HP_BNB13_EQ),
  2565. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
  2566. "HP bNB13", STAC_HP_BNB13_EQ),
  2567. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
  2568. "HP bNB13", STAC_HP_BNB13_EQ),
  2569. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
  2570. "HP bNB13", STAC_HP_BNB13_EQ),
  2571. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
  2572. "HP bNB13", STAC_HP_BNB13_EQ),
  2573. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
  2574. "HP bNB13", STAC_HP_BNB13_EQ),
  2575. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
  2576. "HP bNB13", STAC_HP_BNB13_EQ),
  2577. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
  2578. "HP bNB13", STAC_HP_BNB13_EQ),
  2579. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
  2580. "HP bNB13", STAC_HP_BNB13_EQ),
  2581. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
  2582. "HP bNB13", STAC_HP_BNB13_EQ),
  2583. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
  2584. "HP bNB13", STAC_HP_BNB13_EQ),
  2585. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
  2586. "HP bNB13", STAC_HP_BNB13_EQ),
  2587. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
  2588. "HP bNB13", STAC_HP_BNB13_EQ),
  2589. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
  2590. "HP bNB13", STAC_HP_BNB13_EQ),
  2591. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
  2592. "HP bNB13", STAC_HP_BNB13_EQ),
  2593. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
  2594. "HP bNB13", STAC_HP_BNB13_EQ),
  2595. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
  2596. "HP bNB13", STAC_HP_BNB13_EQ),
  2597. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
  2598. "HP bNB13", STAC_HP_BNB13_EQ),
  2599. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
  2600. "HP bNB13", STAC_HP_BNB13_EQ),
  2601. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
  2602. "HP bNB13", STAC_HP_BNB13_EQ),
  2603. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
  2604. "HP bNB13", STAC_HP_BNB13_EQ),
  2605. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
  2606. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2607. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
  2608. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2609. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
  2610. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2611. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
  2612. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2613. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
  2614. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2615. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
  2616. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2617. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
  2618. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2619. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
  2620. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2621. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
  2622. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2623. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
  2624. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2625. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
  2626. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2627. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
  2628. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2629. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
  2630. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2631. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
  2632. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2633. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
  2634. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2635. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
  2636. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2637. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
  2638. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2639. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
  2640. "HP", STAC_HP_ZEPHYR),
  2641. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
  2642. "HP Mini", STAC_92HD83XXX_HP_LED),
  2643. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
  2644. "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
  2645. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
  2646. "HP Mini", STAC_92HD83XXX_HP_LED),
  2647. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
  2648. {} /* terminator */
  2649. };
  2650. /* HP dv7 bass switch - GPIO5 */
  2651. #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
  2652. static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
  2653. struct snd_ctl_elem_value *ucontrol)
  2654. {
  2655. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2656. struct sigmatel_spec *spec = codec->spec;
  2657. ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
  2658. return 0;
  2659. }
  2660. static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
  2661. struct snd_ctl_elem_value *ucontrol)
  2662. {
  2663. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2664. struct sigmatel_spec *spec = codec->spec;
  2665. unsigned int gpio_data;
  2666. gpio_data = (spec->gpio_data & ~0x20) |
  2667. (ucontrol->value.integer.value[0] ? 0x20 : 0);
  2668. if (gpio_data == spec->gpio_data)
  2669. return 0;
  2670. spec->gpio_data = gpio_data;
  2671. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  2672. return 1;
  2673. }
  2674. static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
  2675. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2676. .info = stac_hp_bass_gpio_info,
  2677. .get = stac_hp_bass_gpio_get,
  2678. .put = stac_hp_bass_gpio_put,
  2679. };
  2680. static int stac_add_hp_bass_switch(struct hda_codec *codec)
  2681. {
  2682. struct sigmatel_spec *spec = codec->spec;
  2683. if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
  2684. &stac_hp_bass_sw_ctrl))
  2685. return -ENOMEM;
  2686. spec->gpio_mask |= 0x20;
  2687. spec->gpio_dir |= 0x20;
  2688. spec->gpio_data |= 0x20;
  2689. return 0;
  2690. }
  2691. static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
  2692. { 0x0a, 0x02214030 },
  2693. { 0x0b, 0x02a19040 },
  2694. { 0x0c, 0x01a19020 },
  2695. { 0x0d, 0x01014010 },
  2696. { 0x0e, 0x0181302e },
  2697. { 0x0f, 0x01014010 },
  2698. { 0x14, 0x01019020 },
  2699. { 0x18, 0x90a000f0 },
  2700. { 0x19, 0x90a000f0 },
  2701. { 0x1e, 0x01452050 },
  2702. { 0x1f, 0x01452050 },
  2703. {}
  2704. };
  2705. static const struct hda_pintbl dell_m4_1_pin_configs[] = {
  2706. { 0x0a, 0x0421101f },
  2707. { 0x0b, 0x04a11221 },
  2708. { 0x0c, 0x40f000f0 },
  2709. { 0x0d, 0x90170110 },
  2710. { 0x0e, 0x23a1902e },
  2711. { 0x0f, 0x23014250 },
  2712. { 0x14, 0x40f000f0 },
  2713. { 0x18, 0x90a000f0 },
  2714. { 0x19, 0x40f000f0 },
  2715. { 0x1e, 0x4f0000f0 },
  2716. { 0x1f, 0x4f0000f0 },
  2717. {}
  2718. };
  2719. static const struct hda_pintbl dell_m4_2_pin_configs[] = {
  2720. { 0x0a, 0x0421101f },
  2721. { 0x0b, 0x04a11221 },
  2722. { 0x0c, 0x90a70330 },
  2723. { 0x0d, 0x90170110 },
  2724. { 0x0e, 0x23a1902e },
  2725. { 0x0f, 0x23014250 },
  2726. { 0x14, 0x40f000f0 },
  2727. { 0x18, 0x40f000f0 },
  2728. { 0x19, 0x40f000f0 },
  2729. { 0x1e, 0x044413b0 },
  2730. { 0x1f, 0x044413b0 },
  2731. {}
  2732. };
  2733. static const struct hda_pintbl dell_m4_3_pin_configs[] = {
  2734. { 0x0a, 0x0421101f },
  2735. { 0x0b, 0x04a11221 },
  2736. { 0x0c, 0x90a70330 },
  2737. { 0x0d, 0x90170110 },
  2738. { 0x0e, 0x40f000f0 },
  2739. { 0x0f, 0x40f000f0 },
  2740. { 0x14, 0x40f000f0 },
  2741. { 0x18, 0x90a000f0 },
  2742. { 0x19, 0x40f000f0 },
  2743. { 0x1e, 0x044413b0 },
  2744. { 0x1f, 0x044413b0 },
  2745. {}
  2746. };
  2747. static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
  2748. const struct hda_fixup *fix, int action)
  2749. {
  2750. struct sigmatel_spec *spec = codec->spec;
  2751. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2752. return;
  2753. snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
  2754. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  2755. }
  2756. static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
  2757. const struct hda_fixup *fix, int action)
  2758. {
  2759. struct sigmatel_spec *spec = codec->spec;
  2760. struct hda_jack_tbl *jack;
  2761. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2762. return;
  2763. /* Enable VREF power saving on GPIO1 detect */
  2764. snd_hda_codec_write_cache(codec, codec->afg, 0,
  2765. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
  2766. snd_hda_jack_detect_enable_callback(codec, codec->afg,
  2767. STAC_VREF_EVENT,
  2768. stac_vref_event);
  2769. jack = snd_hda_jack_tbl_get(codec, codec->afg);
  2770. if (jack)
  2771. jack->private_data = 0x02;
  2772. spec->gpio_mask |= 0x02;
  2773. /* enable internal microphone */
  2774. snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
  2775. }
  2776. static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
  2777. const struct hda_fixup *fix, int action)
  2778. {
  2779. struct sigmatel_spec *spec = codec->spec;
  2780. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2781. return;
  2782. spec->gpio_led = 0x01;
  2783. }
  2784. static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
  2785. const struct hda_fixup *fix, int action)
  2786. {
  2787. unsigned int cap;
  2788. switch (action) {
  2789. case HDA_FIXUP_ACT_PRE_PROBE:
  2790. snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
  2791. break;
  2792. case HDA_FIXUP_ACT_PROBE:
  2793. /* enable bass on HP dv7 */
  2794. cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
  2795. cap &= AC_GPIO_IO_COUNT;
  2796. if (cap >= 6)
  2797. stac_add_hp_bass_switch(codec);
  2798. break;
  2799. }
  2800. }
  2801. static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
  2802. const struct hda_fixup *fix, int action)
  2803. {
  2804. struct sigmatel_spec *spec = codec->spec;
  2805. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2806. return;
  2807. spec->gpio_led = 0x08;
  2808. }
  2809. static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
  2810. const struct hda_fixup *fix, int action)
  2811. {
  2812. struct sigmatel_spec *spec = codec->spec;
  2813. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2814. return;
  2815. if (hp_blike_system(codec->subsystem_id)) {
  2816. unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
  2817. if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
  2818. get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
  2819. get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
  2820. /* It was changed in the BIOS to just satisfy MS DTM.
  2821. * Lets turn it back into slaved HP
  2822. */
  2823. pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
  2824. | (AC_JACK_HP_OUT <<
  2825. AC_DEFCFG_DEVICE_SHIFT);
  2826. pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
  2827. | AC_DEFCFG_SEQUENCE)))
  2828. | 0x1f;
  2829. snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
  2830. }
  2831. }
  2832. if (find_mute_led_cfg(codec, 1))
  2833. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  2834. spec->gpio_led,
  2835. spec->gpio_led_polarity);
  2836. }
  2837. static const struct hda_fixup stac92hd71bxx_fixups[] = {
  2838. [STAC_92HD71BXX_REF] = {
  2839. .type = HDA_FIXUP_FUNC,
  2840. .v.func = stac92hd71bxx_fixup_ref,
  2841. },
  2842. [STAC_DELL_M4_1] = {
  2843. .type = HDA_FIXUP_PINS,
  2844. .v.pins = dell_m4_1_pin_configs,
  2845. },
  2846. [STAC_DELL_M4_2] = {
  2847. .type = HDA_FIXUP_PINS,
  2848. .v.pins = dell_m4_2_pin_configs,
  2849. },
  2850. [STAC_DELL_M4_3] = {
  2851. .type = HDA_FIXUP_PINS,
  2852. .v.pins = dell_m4_3_pin_configs,
  2853. },
  2854. [STAC_HP_M4] = {
  2855. .type = HDA_FIXUP_FUNC,
  2856. .v.func = stac92hd71bxx_fixup_hp_m4,
  2857. .chained = true,
  2858. .chain_id = STAC_92HD71BXX_HP,
  2859. },
  2860. [STAC_HP_DV4] = {
  2861. .type = HDA_FIXUP_FUNC,
  2862. .v.func = stac92hd71bxx_fixup_hp_dv4,
  2863. .chained = true,
  2864. .chain_id = STAC_HP_DV5,
  2865. },
  2866. [STAC_HP_DV5] = {
  2867. .type = HDA_FIXUP_FUNC,
  2868. .v.func = stac92hd71bxx_fixup_hp_dv5,
  2869. .chained = true,
  2870. .chain_id = STAC_92HD71BXX_HP,
  2871. },
  2872. [STAC_HP_HDX] = {
  2873. .type = HDA_FIXUP_FUNC,
  2874. .v.func = stac92hd71bxx_fixup_hp_hdx,
  2875. .chained = true,
  2876. .chain_id = STAC_92HD71BXX_HP,
  2877. },
  2878. [STAC_92HD71BXX_HP] = {
  2879. .type = HDA_FIXUP_FUNC,
  2880. .v.func = stac92hd71bxx_fixup_hp,
  2881. },
  2882. };
  2883. static const struct hda_model_fixup stac92hd71bxx_models[] = {
  2884. { .id = STAC_92HD71BXX_REF, .name = "ref" },
  2885. { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
  2886. { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
  2887. { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
  2888. { .id = STAC_HP_M4, .name = "hp-m4" },
  2889. { .id = STAC_HP_DV4, .name = "hp-dv4" },
  2890. { .id = STAC_HP_DV5, .name = "hp-dv5" },
  2891. { .id = STAC_HP_HDX, .name = "hp-hdx" },
  2892. { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
  2893. {}
  2894. };
  2895. static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
  2896. /* SigmaTel reference board */
  2897. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2898. "DFI LanParty", STAC_92HD71BXX_REF),
  2899. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2900. "DFI LanParty", STAC_92HD71BXX_REF),
  2901. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
  2902. "HP", STAC_HP_DV5),
  2903. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
  2904. "HP", STAC_HP_DV5),
  2905. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
  2906. "HP dv4-7", STAC_HP_DV4),
  2907. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
  2908. "HP dv4-7", STAC_HP_DV5),
  2909. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
  2910. "HP HDX", STAC_HP_HDX), /* HDX18 */
  2911. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
  2912. "HP mini 1000", STAC_HP_M4),
  2913. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
  2914. "HP HDX", STAC_HP_HDX), /* HDX16 */
  2915. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
  2916. "HP dv6", STAC_HP_DV5),
  2917. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
  2918. "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
  2919. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
  2920. "HP DV6", STAC_HP_DV5),
  2921. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
  2922. "HP", STAC_HP_DV5),
  2923. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
  2924. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
  2925. "unknown Dell", STAC_DELL_M4_1),
  2926. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
  2927. "unknown Dell", STAC_DELL_M4_1),
  2928. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
  2929. "unknown Dell", STAC_DELL_M4_1),
  2930. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
  2931. "unknown Dell", STAC_DELL_M4_1),
  2932. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
  2933. "unknown Dell", STAC_DELL_M4_1),
  2934. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
  2935. "unknown Dell", STAC_DELL_M4_1),
  2936. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
  2937. "unknown Dell", STAC_DELL_M4_1),
  2938. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
  2939. "unknown Dell", STAC_DELL_M4_2),
  2940. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
  2941. "unknown Dell", STAC_DELL_M4_2),
  2942. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
  2943. "unknown Dell", STAC_DELL_M4_2),
  2944. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
  2945. "unknown Dell", STAC_DELL_M4_2),
  2946. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
  2947. "unknown Dell", STAC_DELL_M4_3),
  2948. {} /* terminator */
  2949. };
  2950. static const struct hda_pintbl ref922x_pin_configs[] = {
  2951. { 0x0a, 0x01014010 },
  2952. { 0x0b, 0x01016011 },
  2953. { 0x0c, 0x01012012 },
  2954. { 0x0d, 0x0221401f },
  2955. { 0x0e, 0x01813122 },
  2956. { 0x0f, 0x01011014 },
  2957. { 0x10, 0x01441030 },
  2958. { 0x11, 0x01c41030 },
  2959. { 0x15, 0x40000100 },
  2960. { 0x1b, 0x40000100 },
  2961. {}
  2962. };
  2963. /*
  2964. STAC 922X pin configs for
  2965. 102801A7
  2966. 102801AB
  2967. 102801A9
  2968. 102801D1
  2969. 102801D2
  2970. */
  2971. static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
  2972. { 0x0a, 0x02214030 },
  2973. { 0x0b, 0x01a19021 },
  2974. { 0x0c, 0x01111012 },
  2975. { 0x0d, 0x01114010 },
  2976. { 0x0e, 0x02a19020 },
  2977. { 0x0f, 0x01117011 },
  2978. { 0x10, 0x400001f0 },
  2979. { 0x11, 0x400001f1 },
  2980. { 0x15, 0x01813122 },
  2981. { 0x1b, 0x400001f2 },
  2982. {}
  2983. };
  2984. /*
  2985. STAC 922X pin configs for
  2986. 102801AC
  2987. 102801D0
  2988. */
  2989. static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
  2990. { 0x0a, 0x02214030 },
  2991. { 0x0b, 0x01a19021 },
  2992. { 0x0c, 0x01111012 },
  2993. { 0x0d, 0x01114010 },
  2994. { 0x0e, 0x02a19020 },
  2995. { 0x0f, 0x01117011 },
  2996. { 0x10, 0x01451140 },
  2997. { 0x11, 0x400001f0 },
  2998. { 0x15, 0x01813122 },
  2999. { 0x1b, 0x400001f1 },
  3000. {}
  3001. };
  3002. /*
  3003. STAC 922X pin configs for
  3004. 102801BF
  3005. */
  3006. static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
  3007. { 0x0a, 0x0321101f },
  3008. { 0x0b, 0x01112024 },
  3009. { 0x0c, 0x01111222 },
  3010. { 0x0d, 0x91174220 },
  3011. { 0x0e, 0x03a11050 },
  3012. { 0x0f, 0x01116221 },
  3013. { 0x10, 0x90a70330 },
  3014. { 0x11, 0x01452340 },
  3015. { 0x15, 0x40C003f1 },
  3016. { 0x1b, 0x405003f0 },
  3017. {}
  3018. };
  3019. /*
  3020. STAC 9221 A1 pin configs for
  3021. 102801D7 (Dell XPS M1210)
  3022. */
  3023. static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
  3024. { 0x0a, 0x02211211 },
  3025. { 0x0b, 0x408103ff },
  3026. { 0x0c, 0x02a1123e },
  3027. { 0x0d, 0x90100310 },
  3028. { 0x0e, 0x408003f1 },
  3029. { 0x0f, 0x0221121f },
  3030. { 0x10, 0x03451340 },
  3031. { 0x11, 0x40c003f2 },
  3032. { 0x15, 0x508003f3 },
  3033. { 0x1b, 0x405003f4 },
  3034. {}
  3035. };
  3036. static const struct hda_pintbl d945gtp3_pin_configs[] = {
  3037. { 0x0a, 0x0221401f },
  3038. { 0x0b, 0x01a19022 },
  3039. { 0x0c, 0x01813021 },
  3040. { 0x0d, 0x01014010 },
  3041. { 0x0e, 0x40000100 },
  3042. { 0x0f, 0x40000100 },
  3043. { 0x10, 0x40000100 },
  3044. { 0x11, 0x40000100 },
  3045. { 0x15, 0x02a19120 },
  3046. { 0x1b, 0x40000100 },
  3047. {}
  3048. };
  3049. static const struct hda_pintbl d945gtp5_pin_configs[] = {
  3050. { 0x0a, 0x0221401f },
  3051. { 0x0b, 0x01011012 },
  3052. { 0x0c, 0x01813024 },
  3053. { 0x0d, 0x01014010 },
  3054. { 0x0e, 0x01a19021 },
  3055. { 0x0f, 0x01016011 },
  3056. { 0x10, 0x01452130 },
  3057. { 0x11, 0x40000100 },
  3058. { 0x15, 0x02a19320 },
  3059. { 0x1b, 0x40000100 },
  3060. {}
  3061. };
  3062. static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
  3063. { 0x0a, 0x0121e21f },
  3064. { 0x0b, 0x400000ff },
  3065. { 0x0c, 0x9017e110 },
  3066. { 0x0d, 0x400000fd },
  3067. { 0x0e, 0x400000fe },
  3068. { 0x0f, 0x0181e020 },
  3069. { 0x10, 0x1145e030 },
  3070. { 0x11, 0x11c5e240 },
  3071. { 0x15, 0x400000fc },
  3072. { 0x1b, 0x400000fb },
  3073. {}
  3074. };
  3075. static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
  3076. { 0x0a, 0x0121e21f },
  3077. { 0x0b, 0x90a7012e },
  3078. { 0x0c, 0x9017e110 },
  3079. { 0x0d, 0x400000fd },
  3080. { 0x0e, 0x400000fe },
  3081. { 0x0f, 0x0181e020 },
  3082. { 0x10, 0x1145e230 },
  3083. { 0x11, 0x500000fa },
  3084. { 0x15, 0x400000fc },
  3085. { 0x1b, 0x400000fb },
  3086. {}
  3087. };
  3088. static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
  3089. { 0x0a, 0x0121e21f },
  3090. { 0x0b, 0x90a7012e },
  3091. { 0x0c, 0x9017e110 },
  3092. { 0x0d, 0x400000fd },
  3093. { 0x0e, 0x400000fe },
  3094. { 0x0f, 0x0181e020 },
  3095. { 0x10, 0x1145e230 },
  3096. { 0x11, 0x11c5e240 },
  3097. { 0x15, 0x400000fc },
  3098. { 0x1b, 0x400000fb },
  3099. {}
  3100. };
  3101. static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
  3102. { 0x0a, 0x0321e21f },
  3103. { 0x0b, 0x03a1e02e },
  3104. { 0x0c, 0x9017e110 },
  3105. { 0x0d, 0x9017e11f },
  3106. { 0x0e, 0x400000fe },
  3107. { 0x0f, 0x0381e020 },
  3108. { 0x10, 0x1345e230 },
  3109. { 0x11, 0x13c5e240 },
  3110. { 0x15, 0x400000fc },
  3111. { 0x1b, 0x400000fb },
  3112. {}
  3113. };
  3114. static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
  3115. { 0x0a, 0x0321e21f },
  3116. { 0x0b, 0x03a1e02e },
  3117. { 0x0c, 0x9017e110 },
  3118. { 0x0d, 0x9017e11f },
  3119. { 0x0e, 0x400000fe },
  3120. { 0x0f, 0x0381e020 },
  3121. { 0x10, 0x1345e230 },
  3122. { 0x11, 0x13c5e240 },
  3123. { 0x15, 0x400000fc },
  3124. { 0x1b, 0x400000fb },
  3125. {}
  3126. };
  3127. static const struct hda_pintbl ecs202_pin_configs[] = {
  3128. { 0x0a, 0x0221401f },
  3129. { 0x0b, 0x02a19020 },
  3130. { 0x0c, 0x01a19020 },
  3131. { 0x0d, 0x01114010 },
  3132. { 0x0e, 0x408000f0 },
  3133. { 0x0f, 0x01813022 },
  3134. { 0x10, 0x074510a0 },
  3135. { 0x11, 0x40c400f1 },
  3136. { 0x15, 0x9037012e },
  3137. { 0x1b, 0x40e000f2 },
  3138. {}
  3139. };
  3140. /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
  3141. static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
  3142. SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
  3143. SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
  3144. SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
  3145. SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
  3146. SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
  3147. SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
  3148. SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
  3149. SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
  3150. SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
  3151. SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
  3152. SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
  3153. SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
  3154. SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
  3155. {}
  3156. };
  3157. static const struct hda_fixup stac922x_fixups[];
  3158. /* remap the fixup from codec SSID and apply it */
  3159. static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
  3160. const struct hda_fixup *fix,
  3161. int action)
  3162. {
  3163. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3164. return;
  3165. codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
  3166. snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
  3167. stac922x_fixups);
  3168. if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
  3169. snd_hda_apply_fixup(codec, action);
  3170. }
  3171. static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
  3172. const struct hda_fixup *fix,
  3173. int action)
  3174. {
  3175. struct sigmatel_spec *spec = codec->spec;
  3176. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3177. spec->gpio_mask = spec->gpio_dir = 0x03;
  3178. spec->gpio_data = 0x03;
  3179. }
  3180. }
  3181. static const struct hda_fixup stac922x_fixups[] = {
  3182. [STAC_D945_REF] = {
  3183. .type = HDA_FIXUP_PINS,
  3184. .v.pins = ref922x_pin_configs,
  3185. },
  3186. [STAC_D945GTP3] = {
  3187. .type = HDA_FIXUP_PINS,
  3188. .v.pins = d945gtp3_pin_configs,
  3189. },
  3190. [STAC_D945GTP5] = {
  3191. .type = HDA_FIXUP_PINS,
  3192. .v.pins = d945gtp5_pin_configs,
  3193. },
  3194. [STAC_INTEL_MAC_AUTO] = {
  3195. .type = HDA_FIXUP_FUNC,
  3196. .v.func = stac922x_fixup_intel_mac_auto,
  3197. },
  3198. [STAC_INTEL_MAC_V1] = {
  3199. .type = HDA_FIXUP_PINS,
  3200. .v.pins = intel_mac_v1_pin_configs,
  3201. .chained = true,
  3202. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3203. },
  3204. [STAC_INTEL_MAC_V2] = {
  3205. .type = HDA_FIXUP_PINS,
  3206. .v.pins = intel_mac_v2_pin_configs,
  3207. .chained = true,
  3208. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3209. },
  3210. [STAC_INTEL_MAC_V3] = {
  3211. .type = HDA_FIXUP_PINS,
  3212. .v.pins = intel_mac_v3_pin_configs,
  3213. .chained = true,
  3214. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3215. },
  3216. [STAC_INTEL_MAC_V4] = {
  3217. .type = HDA_FIXUP_PINS,
  3218. .v.pins = intel_mac_v4_pin_configs,
  3219. .chained = true,
  3220. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3221. },
  3222. [STAC_INTEL_MAC_V5] = {
  3223. .type = HDA_FIXUP_PINS,
  3224. .v.pins = intel_mac_v5_pin_configs,
  3225. .chained = true,
  3226. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3227. },
  3228. [STAC_922X_INTEL_MAC_GPIO] = {
  3229. .type = HDA_FIXUP_FUNC,
  3230. .v.func = stac922x_fixup_intel_mac_gpio,
  3231. },
  3232. [STAC_ECS_202] = {
  3233. .type = HDA_FIXUP_PINS,
  3234. .v.pins = ecs202_pin_configs,
  3235. },
  3236. [STAC_922X_DELL_D81] = {
  3237. .type = HDA_FIXUP_PINS,
  3238. .v.pins = dell_922x_d81_pin_configs,
  3239. },
  3240. [STAC_922X_DELL_D82] = {
  3241. .type = HDA_FIXUP_PINS,
  3242. .v.pins = dell_922x_d82_pin_configs,
  3243. },
  3244. [STAC_922X_DELL_M81] = {
  3245. .type = HDA_FIXUP_PINS,
  3246. .v.pins = dell_922x_m81_pin_configs,
  3247. },
  3248. [STAC_922X_DELL_M82] = {
  3249. .type = HDA_FIXUP_PINS,
  3250. .v.pins = dell_922x_m82_pin_configs,
  3251. },
  3252. };
  3253. static const struct hda_model_fixup stac922x_models[] = {
  3254. { .id = STAC_D945_REF, .name = "ref" },
  3255. { .id = STAC_D945GTP5, .name = "5stack" },
  3256. { .id = STAC_D945GTP3, .name = "3stack" },
  3257. { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
  3258. { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
  3259. { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
  3260. { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
  3261. { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
  3262. { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
  3263. { .id = STAC_ECS_202, .name = "ecs202" },
  3264. { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
  3265. { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
  3266. { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
  3267. { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
  3268. /* for backward compatibility */
  3269. { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
  3270. { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
  3271. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
  3272. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
  3273. { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
  3274. { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
  3275. {}
  3276. };
  3277. static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
  3278. /* SigmaTel reference board */
  3279. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3280. "DFI LanParty", STAC_D945_REF),
  3281. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3282. "DFI LanParty", STAC_D945_REF),
  3283. /* Intel 945G based systems */
  3284. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  3285. "Intel D945G", STAC_D945GTP3),
  3286. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  3287. "Intel D945G", STAC_D945GTP3),
  3288. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  3289. "Intel D945G", STAC_D945GTP3),
  3290. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  3291. "Intel D945G", STAC_D945GTP3),
  3292. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  3293. "Intel D945G", STAC_D945GTP3),
  3294. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  3295. "Intel D945G", STAC_D945GTP3),
  3296. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  3297. "Intel D945G", STAC_D945GTP3),
  3298. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  3299. "Intel D945G", STAC_D945GTP3),
  3300. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  3301. "Intel D945G", STAC_D945GTP3),
  3302. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  3303. "Intel D945G", STAC_D945GTP3),
  3304. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  3305. "Intel D945G", STAC_D945GTP3),
  3306. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  3307. "Intel D945G", STAC_D945GTP3),
  3308. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  3309. "Intel D945G", STAC_D945GTP3),
  3310. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  3311. "Intel D945G", STAC_D945GTP3),
  3312. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  3313. "Intel D945G", STAC_D945GTP3),
  3314. /* Intel D945G 5-stack systems */
  3315. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  3316. "Intel D945G", STAC_D945GTP5),
  3317. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  3318. "Intel D945G", STAC_D945GTP5),
  3319. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  3320. "Intel D945G", STAC_D945GTP5),
  3321. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  3322. "Intel D945G", STAC_D945GTP5),
  3323. /* Intel 945P based systems */
  3324. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  3325. "Intel D945P", STAC_D945GTP3),
  3326. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  3327. "Intel D945P", STAC_D945GTP3),
  3328. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  3329. "Intel D945P", STAC_D945GTP3),
  3330. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  3331. "Intel D945P", STAC_D945GTP3),
  3332. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  3333. "Intel D945P", STAC_D945GTP3),
  3334. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  3335. "Intel D945P", STAC_D945GTP5),
  3336. /* other intel */
  3337. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
  3338. "Intel D945", STAC_D945_REF),
  3339. /* other systems */
  3340. /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
  3341. SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
  3342. /* Dell systems */
  3343. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  3344. "unknown Dell", STAC_922X_DELL_D81),
  3345. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  3346. "unknown Dell", STAC_922X_DELL_D81),
  3347. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  3348. "unknown Dell", STAC_922X_DELL_D81),
  3349. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  3350. "unknown Dell", STAC_922X_DELL_D82),
  3351. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  3352. "unknown Dell", STAC_922X_DELL_M81),
  3353. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  3354. "unknown Dell", STAC_922X_DELL_D82),
  3355. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  3356. "unknown Dell", STAC_922X_DELL_D81),
  3357. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  3358. "unknown Dell", STAC_922X_DELL_D81),
  3359. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  3360. "Dell XPS M1210", STAC_922X_DELL_M82),
  3361. /* ECS/PC Chips boards */
  3362. SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
  3363. "ECS/PC chips", STAC_ECS_202),
  3364. {} /* terminator */
  3365. };
  3366. static const struct hda_pintbl ref927x_pin_configs[] = {
  3367. { 0x0a, 0x02214020 },
  3368. { 0x0b, 0x02a19080 },
  3369. { 0x0c, 0x0181304e },
  3370. { 0x0d, 0x01014010 },
  3371. { 0x0e, 0x01a19040 },
  3372. { 0x0f, 0x01011012 },
  3373. { 0x10, 0x01016011 },
  3374. { 0x11, 0x0101201f },
  3375. { 0x12, 0x183301f0 },
  3376. { 0x13, 0x18a001f0 },
  3377. { 0x14, 0x18a001f0 },
  3378. { 0x21, 0x01442070 },
  3379. { 0x22, 0x01c42190 },
  3380. { 0x23, 0x40000100 },
  3381. {}
  3382. };
  3383. static const struct hda_pintbl d965_3st_pin_configs[] = {
  3384. { 0x0a, 0x0221401f },
  3385. { 0x0b, 0x02a19120 },
  3386. { 0x0c, 0x40000100 },
  3387. { 0x0d, 0x01014011 },
  3388. { 0x0e, 0x01a19021 },
  3389. { 0x0f, 0x01813024 },
  3390. { 0x10, 0x40000100 },
  3391. { 0x11, 0x40000100 },
  3392. { 0x12, 0x40000100 },
  3393. { 0x13, 0x40000100 },
  3394. { 0x14, 0x40000100 },
  3395. { 0x21, 0x40000100 },
  3396. { 0x22, 0x40000100 },
  3397. { 0x23, 0x40000100 },
  3398. {}
  3399. };
  3400. static const struct hda_pintbl d965_5st_pin_configs[] = {
  3401. { 0x0a, 0x02214020 },
  3402. { 0x0b, 0x02a19080 },
  3403. { 0x0c, 0x0181304e },
  3404. { 0x0d, 0x01014010 },
  3405. { 0x0e, 0x01a19040 },
  3406. { 0x0f, 0x01011012 },
  3407. { 0x10, 0x01016011 },
  3408. { 0x11, 0x40000100 },
  3409. { 0x12, 0x40000100 },
  3410. { 0x13, 0x40000100 },
  3411. { 0x14, 0x40000100 },
  3412. { 0x21, 0x01442070 },
  3413. { 0x22, 0x40000100 },
  3414. { 0x23, 0x40000100 },
  3415. {}
  3416. };
  3417. static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
  3418. { 0x0a, 0x40000100 },
  3419. { 0x0b, 0x40000100 },
  3420. { 0x0c, 0x0181304e },
  3421. { 0x0d, 0x01014010 },
  3422. { 0x0e, 0x01a19040 },
  3423. { 0x0f, 0x01011012 },
  3424. { 0x10, 0x01016011 },
  3425. { 0x11, 0x40000100 },
  3426. { 0x12, 0x40000100 },
  3427. { 0x13, 0x40000100 },
  3428. { 0x14, 0x40000100 },
  3429. { 0x21, 0x01442070 },
  3430. { 0x22, 0x40000100 },
  3431. { 0x23, 0x40000100 },
  3432. {}
  3433. };
  3434. static const struct hda_pintbl dell_3st_pin_configs[] = {
  3435. { 0x0a, 0x02211230 },
  3436. { 0x0b, 0x02a11220 },
  3437. { 0x0c, 0x01a19040 },
  3438. { 0x0d, 0x01114210 },
  3439. { 0x0e, 0x01111212 },
  3440. { 0x0f, 0x01116211 },
  3441. { 0x10, 0x01813050 },
  3442. { 0x11, 0x01112214 },
  3443. { 0x12, 0x403003fa },
  3444. { 0x13, 0x90a60040 },
  3445. { 0x14, 0x90a60040 },
  3446. { 0x21, 0x404003fb },
  3447. { 0x22, 0x40c003fc },
  3448. { 0x23, 0x40000100 },
  3449. {}
  3450. };
  3451. static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
  3452. const struct hda_fixup *fix, int action)
  3453. {
  3454. /* no jack detecion for ref-no-jd model */
  3455. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3456. codec->no_jack_detect = 1;
  3457. }
  3458. static void stac927x_fixup_ref(struct hda_codec *codec,
  3459. const struct hda_fixup *fix, int action)
  3460. {
  3461. struct sigmatel_spec *spec = codec->spec;
  3462. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3463. snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
  3464. spec->eapd_mask = spec->gpio_mask = 0;
  3465. spec->gpio_dir = spec->gpio_data = 0;
  3466. }
  3467. }
  3468. static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
  3469. const struct hda_fixup *fix, int action)
  3470. {
  3471. struct sigmatel_spec *spec = codec->spec;
  3472. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3473. return;
  3474. if (codec->subsystem_id != 0x1028022f) {
  3475. /* GPIO2 High = Enable EAPD */
  3476. spec->eapd_mask = spec->gpio_mask = 0x04;
  3477. spec->gpio_dir = spec->gpio_data = 0x04;
  3478. }
  3479. snd_hda_add_verbs(codec, dell_3st_core_init);
  3480. spec->volknob_init = 1;
  3481. }
  3482. static void stac927x_fixup_volknob(struct hda_codec *codec,
  3483. const struct hda_fixup *fix, int action)
  3484. {
  3485. struct sigmatel_spec *spec = codec->spec;
  3486. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3487. snd_hda_add_verbs(codec, stac927x_volknob_core_init);
  3488. spec->volknob_init = 1;
  3489. }
  3490. }
  3491. static const struct hda_fixup stac927x_fixups[] = {
  3492. [STAC_D965_REF_NO_JD] = {
  3493. .type = HDA_FIXUP_FUNC,
  3494. .v.func = stac927x_fixup_ref_no_jd,
  3495. .chained = true,
  3496. .chain_id = STAC_D965_REF,
  3497. },
  3498. [STAC_D965_REF] = {
  3499. .type = HDA_FIXUP_FUNC,
  3500. .v.func = stac927x_fixup_ref,
  3501. },
  3502. [STAC_D965_3ST] = {
  3503. .type = HDA_FIXUP_PINS,
  3504. .v.pins = d965_3st_pin_configs,
  3505. .chained = true,
  3506. .chain_id = STAC_D965_VERBS,
  3507. },
  3508. [STAC_D965_5ST] = {
  3509. .type = HDA_FIXUP_PINS,
  3510. .v.pins = d965_5st_pin_configs,
  3511. .chained = true,
  3512. .chain_id = STAC_D965_VERBS,
  3513. },
  3514. [STAC_D965_VERBS] = {
  3515. .type = HDA_FIXUP_VERBS,
  3516. .v.verbs = d965_core_init,
  3517. },
  3518. [STAC_D965_5ST_NO_FP] = {
  3519. .type = HDA_FIXUP_PINS,
  3520. .v.pins = d965_5st_no_fp_pin_configs,
  3521. },
  3522. [STAC_DELL_3ST] = {
  3523. .type = HDA_FIXUP_PINS,
  3524. .v.pins = dell_3st_pin_configs,
  3525. .chained = true,
  3526. .chain_id = STAC_927X_DELL_DMIC,
  3527. },
  3528. [STAC_DELL_BIOS] = {
  3529. .type = HDA_FIXUP_PINS,
  3530. .v.pins = (const struct hda_pintbl[]) {
  3531. /* correct the front output jack as a hp out */
  3532. { 0x0f, 0x0221101f },
  3533. /* correct the front input jack as a mic */
  3534. { 0x0e, 0x02a79130 },
  3535. {}
  3536. },
  3537. .chained = true,
  3538. .chain_id = STAC_927X_DELL_DMIC,
  3539. },
  3540. [STAC_DELL_BIOS_AMIC] = {
  3541. .type = HDA_FIXUP_PINS,
  3542. .v.pins = (const struct hda_pintbl[]) {
  3543. /* configure the analog microphone on some laptops */
  3544. { 0x0c, 0x90a79130 },
  3545. {}
  3546. },
  3547. .chained = true,
  3548. .chain_id = STAC_DELL_BIOS,
  3549. },
  3550. [STAC_DELL_BIOS_SPDIF] = {
  3551. .type = HDA_FIXUP_PINS,
  3552. .v.pins = (const struct hda_pintbl[]) {
  3553. /* correct the device field to SPDIF out */
  3554. { 0x21, 0x01442070 },
  3555. {}
  3556. },
  3557. .chained = true,
  3558. .chain_id = STAC_DELL_BIOS,
  3559. },
  3560. [STAC_927X_DELL_DMIC] = {
  3561. .type = HDA_FIXUP_FUNC,
  3562. .v.func = stac927x_fixup_dell_dmic,
  3563. },
  3564. [STAC_927X_VOLKNOB] = {
  3565. .type = HDA_FIXUP_FUNC,
  3566. .v.func = stac927x_fixup_volknob,
  3567. },
  3568. };
  3569. static const struct hda_model_fixup stac927x_models[] = {
  3570. { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
  3571. { .id = STAC_D965_REF, .name = "ref" },
  3572. { .id = STAC_D965_3ST, .name = "3stack" },
  3573. { .id = STAC_D965_5ST, .name = "5stack" },
  3574. { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
  3575. { .id = STAC_DELL_3ST, .name = "dell-3stack" },
  3576. { .id = STAC_DELL_BIOS, .name = "dell-bios" },
  3577. { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
  3578. { .id = STAC_927X_VOLKNOB, .name = "volknob" },
  3579. {}
  3580. };
  3581. static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
  3582. /* SigmaTel reference board */
  3583. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3584. "DFI LanParty", STAC_D965_REF),
  3585. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3586. "DFI LanParty", STAC_D965_REF),
  3587. /* Intel 946 based systems */
  3588. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  3589. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  3590. /* 965 based 3 stack systems */
  3591. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
  3592. "Intel D965", STAC_D965_3ST),
  3593. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
  3594. "Intel D965", STAC_D965_3ST),
  3595. /* Dell 3 stack systems */
  3596. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  3597. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  3598. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  3599. /* Dell 3 stack systems with verb table in BIOS */
  3600. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
  3601. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
  3602. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
  3603. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
  3604. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
  3605. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
  3606. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
  3607. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
  3608. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
  3609. /* 965 based 5 stack systems */
  3610. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
  3611. "Intel D965", STAC_D965_5ST),
  3612. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
  3613. "Intel D965", STAC_D965_5ST),
  3614. /* volume-knob fixes */
  3615. SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
  3616. {} /* terminator */
  3617. };
  3618. static const struct hda_pintbl ref9205_pin_configs[] = {
  3619. { 0x0a, 0x40000100 },
  3620. { 0x0b, 0x40000100 },
  3621. { 0x0c, 0x01016011 },
  3622. { 0x0d, 0x01014010 },
  3623. { 0x0e, 0x01813122 },
  3624. { 0x0f, 0x01a19021 },
  3625. { 0x14, 0x01019020 },
  3626. { 0x16, 0x40000100 },
  3627. { 0x17, 0x90a000f0 },
  3628. { 0x18, 0x90a000f0 },
  3629. { 0x21, 0x01441030 },
  3630. { 0x22, 0x01c41030 },
  3631. {}
  3632. };
  3633. /*
  3634. STAC 9205 pin configs for
  3635. 102801F1
  3636. 102801F2
  3637. 102801FC
  3638. 102801FD
  3639. 10280204
  3640. 1028021F
  3641. 10280228 (Dell Vostro 1500)
  3642. 10280229 (Dell Vostro 1700)
  3643. */
  3644. static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
  3645. { 0x0a, 0x0321101F },
  3646. { 0x0b, 0x03A11020 },
  3647. { 0x0c, 0x400003FA },
  3648. { 0x0d, 0x90170310 },
  3649. { 0x0e, 0x400003FB },
  3650. { 0x0f, 0x400003FC },
  3651. { 0x14, 0x400003FD },
  3652. { 0x16, 0x40F000F9 },
  3653. { 0x17, 0x90A60330 },
  3654. { 0x18, 0x400003FF },
  3655. { 0x21, 0x0144131F },
  3656. { 0x22, 0x40C003FE },
  3657. {}
  3658. };
  3659. /*
  3660. STAC 9205 pin configs for
  3661. 102801F9
  3662. 102801FA
  3663. 102801FE
  3664. 102801FF (Dell Precision M4300)
  3665. 10280206
  3666. 10280200
  3667. 10280201
  3668. */
  3669. static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
  3670. { 0x0a, 0x0321101f },
  3671. { 0x0b, 0x03a11020 },
  3672. { 0x0c, 0x90a70330 },
  3673. { 0x0d, 0x90170310 },
  3674. { 0x0e, 0x400000fe },
  3675. { 0x0f, 0x400000ff },
  3676. { 0x14, 0x400000fd },
  3677. { 0x16, 0x40f000f9 },
  3678. { 0x17, 0x400000fa },
  3679. { 0x18, 0x400000fc },
  3680. { 0x21, 0x0144131f },
  3681. { 0x22, 0x40c003f8 },
  3682. /* Enable SPDIF in/out */
  3683. { 0x1f, 0x01441030 },
  3684. { 0x20, 0x1c410030 },
  3685. {}
  3686. };
  3687. static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
  3688. { 0x0a, 0x0421101f },
  3689. { 0x0b, 0x04a11020 },
  3690. { 0x0c, 0x400003fa },
  3691. { 0x0d, 0x90170310 },
  3692. { 0x0e, 0x400003fb },
  3693. { 0x0f, 0x400003fc },
  3694. { 0x14, 0x400003fd },
  3695. { 0x16, 0x400003f9 },
  3696. { 0x17, 0x90a60330 },
  3697. { 0x18, 0x400003ff },
  3698. { 0x21, 0x01441340 },
  3699. { 0x22, 0x40c003fe },
  3700. {}
  3701. };
  3702. static void stac9205_fixup_ref(struct hda_codec *codec,
  3703. const struct hda_fixup *fix, int action)
  3704. {
  3705. struct sigmatel_spec *spec = codec->spec;
  3706. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3707. snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
  3708. /* SPDIF-In enabled */
  3709. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
  3710. }
  3711. }
  3712. static void stac9205_fixup_dell_m43(struct hda_codec *codec,
  3713. const struct hda_fixup *fix, int action)
  3714. {
  3715. struct sigmatel_spec *spec = codec->spec;
  3716. struct hda_jack_tbl *jack;
  3717. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3718. snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
  3719. /* Enable unsol response for GPIO4/Dock HP connection */
  3720. snd_hda_codec_write_cache(codec, codec->afg, 0,
  3721. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
  3722. snd_hda_jack_detect_enable_callback(codec, codec->afg,
  3723. STAC_VREF_EVENT,
  3724. stac_vref_event);
  3725. jack = snd_hda_jack_tbl_get(codec, codec->afg);
  3726. if (jack)
  3727. jack->private_data = 0x01;
  3728. spec->gpio_dir = 0x0b;
  3729. spec->eapd_mask = 0x01;
  3730. spec->gpio_mask = 0x1b;
  3731. spec->gpio_mute = 0x10;
  3732. /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
  3733. * GPIO3 Low = DRM
  3734. */
  3735. spec->gpio_data = 0x01;
  3736. }
  3737. }
  3738. static void stac9205_fixup_eapd(struct hda_codec *codec,
  3739. const struct hda_fixup *fix, int action)
  3740. {
  3741. struct sigmatel_spec *spec = codec->spec;
  3742. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3743. spec->eapd_switch = 0;
  3744. }
  3745. static const struct hda_fixup stac9205_fixups[] = {
  3746. [STAC_9205_REF] = {
  3747. .type = HDA_FIXUP_FUNC,
  3748. .v.func = stac9205_fixup_ref,
  3749. },
  3750. [STAC_9205_DELL_M42] = {
  3751. .type = HDA_FIXUP_PINS,
  3752. .v.pins = dell_9205_m42_pin_configs,
  3753. },
  3754. [STAC_9205_DELL_M43] = {
  3755. .type = HDA_FIXUP_FUNC,
  3756. .v.func = stac9205_fixup_dell_m43,
  3757. },
  3758. [STAC_9205_DELL_M44] = {
  3759. .type = HDA_FIXUP_PINS,
  3760. .v.pins = dell_9205_m44_pin_configs,
  3761. },
  3762. [STAC_9205_EAPD] = {
  3763. .type = HDA_FIXUP_FUNC,
  3764. .v.func = stac9205_fixup_eapd,
  3765. },
  3766. {}
  3767. };
  3768. static const struct hda_model_fixup stac9205_models[] = {
  3769. { .id = STAC_9205_REF, .name = "ref" },
  3770. { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
  3771. { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
  3772. { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
  3773. { .id = STAC_9205_EAPD, .name = "eapd" },
  3774. {}
  3775. };
  3776. static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
  3777. /* SigmaTel reference board */
  3778. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3779. "DFI LanParty", STAC_9205_REF),
  3780. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
  3781. "SigmaTel", STAC_9205_REF),
  3782. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3783. "DFI LanParty", STAC_9205_REF),
  3784. /* Dell */
  3785. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  3786. "unknown Dell", STAC_9205_DELL_M42),
  3787. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  3788. "unknown Dell", STAC_9205_DELL_M42),
  3789. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  3790. "Dell Precision", STAC_9205_DELL_M43),
  3791. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  3792. "Dell Precision", STAC_9205_DELL_M43),
  3793. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  3794. "Dell Precision", STAC_9205_DELL_M43),
  3795. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  3796. "unknown Dell", STAC_9205_DELL_M42),
  3797. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  3798. "unknown Dell", STAC_9205_DELL_M42),
  3799. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  3800. "Dell Precision", STAC_9205_DELL_M43),
  3801. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  3802. "Dell Precision M4300", STAC_9205_DELL_M43),
  3803. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  3804. "unknown Dell", STAC_9205_DELL_M42),
  3805. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  3806. "Dell Precision", STAC_9205_DELL_M43),
  3807. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  3808. "Dell Precision", STAC_9205_DELL_M43),
  3809. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  3810. "Dell Precision", STAC_9205_DELL_M43),
  3811. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  3812. "Dell Inspiron", STAC_9205_DELL_M44),
  3813. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
  3814. "Dell Vostro 1500", STAC_9205_DELL_M42),
  3815. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
  3816. "Dell Vostro 1700", STAC_9205_DELL_M42),
  3817. /* Gateway */
  3818. SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
  3819. SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
  3820. {} /* terminator */
  3821. };
  3822. static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
  3823. const struct hda_fixup *fix, int action)
  3824. {
  3825. struct sigmatel_spec *spec = codec->spec;
  3826. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3827. return;
  3828. if (find_mute_led_cfg(codec, spec->default_polarity))
  3829. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  3830. spec->gpio_led,
  3831. spec->gpio_led_polarity);
  3832. }
  3833. static const struct hda_fixup stac92hd95_fixups[] = {
  3834. [STAC_92HD95_HP_LED] = {
  3835. .type = HDA_FIXUP_FUNC,
  3836. .v.func = stac92hd95_fixup_hp_led,
  3837. },
  3838. [STAC_92HD95_HP_BASS] = {
  3839. .type = HDA_FIXUP_VERBS,
  3840. .v.verbs = (const struct hda_verb[]) {
  3841. {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
  3842. {}
  3843. },
  3844. .chained = true,
  3845. .chain_id = STAC_92HD95_HP_LED,
  3846. },
  3847. };
  3848. static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
  3849. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
  3850. {} /* terminator */
  3851. };
  3852. static const struct hda_model_fixup stac92hd95_models[] = {
  3853. { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
  3854. { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
  3855. {}
  3856. };
  3857. static int stac_parse_auto_config(struct hda_codec *codec)
  3858. {
  3859. struct sigmatel_spec *spec = codec->spec;
  3860. int err;
  3861. int flags = 0;
  3862. if (spec->headset_jack)
  3863. flags |= HDA_PINCFG_HEADSET_MIC;
  3864. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
  3865. if (err < 0)
  3866. return err;
  3867. /* add hooks */
  3868. spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
  3869. spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
  3870. spec->gen.automute_hook = stac_update_outputs;
  3871. spec->gen.hp_automute_hook = stac_hp_automute;
  3872. spec->gen.line_automute_hook = stac_line_automute;
  3873. spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
  3874. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  3875. if (err < 0)
  3876. return err;
  3877. /* minimum value is actually mute */
  3878. spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
  3879. /* setup analog beep controls */
  3880. if (spec->anabeep_nid > 0) {
  3881. err = stac_auto_create_beep_ctls(codec,
  3882. spec->anabeep_nid);
  3883. if (err < 0)
  3884. return err;
  3885. }
  3886. /* setup digital beep controls and input device */
  3887. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  3888. if (spec->gen.beep_nid) {
  3889. hda_nid_t nid = spec->gen.beep_nid;
  3890. unsigned int caps;
  3891. err = stac_auto_create_beep_ctls(codec, nid);
  3892. if (err < 0)
  3893. return err;
  3894. if (codec->beep) {
  3895. /* IDT/STAC codecs have linear beep tone parameter */
  3896. codec->beep->linear_tone = spec->linear_tone_beep;
  3897. /* if no beep switch is available, make its own one */
  3898. caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  3899. if (!(caps & AC_AMPCAP_MUTE)) {
  3900. err = stac_beep_switch_ctl(codec);
  3901. if (err < 0)
  3902. return err;
  3903. }
  3904. }
  3905. }
  3906. #endif
  3907. if (spec->gpio_led)
  3908. spec->gen.vmaster_mute.hook = stac_vmaster_hook;
  3909. if (spec->aloopback_ctl &&
  3910. snd_hda_get_bool_hint(codec, "loopback") == 1) {
  3911. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
  3912. return -ENOMEM;
  3913. }
  3914. if (spec->have_spdif_mux) {
  3915. err = stac_create_spdif_mux_ctls(codec);
  3916. if (err < 0)
  3917. return err;
  3918. }
  3919. stac_init_power_map(codec);
  3920. return 0;
  3921. }
  3922. static int stac_init(struct hda_codec *codec)
  3923. {
  3924. struct sigmatel_spec *spec = codec->spec;
  3925. int i;
  3926. /* override some hints */
  3927. stac_store_hints(codec);
  3928. /* set up GPIO */
  3929. /* turn on EAPD statically when spec->eapd_switch isn't set.
  3930. * otherwise, unsol event will turn it on/off dynamically
  3931. */
  3932. if (!spec->eapd_switch)
  3933. spec->gpio_data |= spec->eapd_mask;
  3934. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  3935. snd_hda_gen_init(codec);
  3936. /* sync the power-map */
  3937. if (spec->num_pwrs)
  3938. snd_hda_codec_write(codec, codec->afg, 0,
  3939. AC_VERB_IDT_SET_POWER_MAP,
  3940. spec->power_map_bits);
  3941. /* power down inactive ADCs */
  3942. if (spec->powerdown_adcs) {
  3943. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  3944. if (spec->active_adcs & (1 << i))
  3945. continue;
  3946. snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
  3947. AC_VERB_SET_POWER_STATE,
  3948. AC_PWRST_D3);
  3949. }
  3950. }
  3951. return 0;
  3952. }
  3953. static void stac_shutup(struct hda_codec *codec)
  3954. {
  3955. struct sigmatel_spec *spec = codec->spec;
  3956. snd_hda_shutup_pins(codec);
  3957. if (spec->eapd_mask)
  3958. stac_gpio_set(codec, spec->gpio_mask,
  3959. spec->gpio_dir, spec->gpio_data &
  3960. ~spec->eapd_mask);
  3961. }
  3962. #define stac_free snd_hda_gen_free
  3963. #ifdef CONFIG_PROC_FS
  3964. static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
  3965. struct hda_codec *codec, hda_nid_t nid)
  3966. {
  3967. if (nid == codec->afg)
  3968. snd_iprintf(buffer, "Power-Map: 0x%02x\n",
  3969. snd_hda_codec_read(codec, nid, 0,
  3970. AC_VERB_IDT_GET_POWER_MAP, 0));
  3971. }
  3972. static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
  3973. struct hda_codec *codec,
  3974. unsigned int verb)
  3975. {
  3976. snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
  3977. snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
  3978. }
  3979. /* stac92hd71bxx, stac92hd73xx */
  3980. static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
  3981. struct hda_codec *codec, hda_nid_t nid)
  3982. {
  3983. stac92hd_proc_hook(buffer, codec, nid);
  3984. if (nid == codec->afg)
  3985. analog_loop_proc_hook(buffer, codec, 0xfa0);
  3986. }
  3987. static void stac9205_proc_hook(struct snd_info_buffer *buffer,
  3988. struct hda_codec *codec, hda_nid_t nid)
  3989. {
  3990. if (nid == codec->afg)
  3991. analog_loop_proc_hook(buffer, codec, 0xfe0);
  3992. }
  3993. static void stac927x_proc_hook(struct snd_info_buffer *buffer,
  3994. struct hda_codec *codec, hda_nid_t nid)
  3995. {
  3996. if (nid == codec->afg)
  3997. analog_loop_proc_hook(buffer, codec, 0xfeb);
  3998. }
  3999. #else
  4000. #define stac92hd_proc_hook NULL
  4001. #define stac92hd7x_proc_hook NULL
  4002. #define stac9205_proc_hook NULL
  4003. #define stac927x_proc_hook NULL
  4004. #endif
  4005. #ifdef CONFIG_PM
  4006. static int stac_suspend(struct hda_codec *codec)
  4007. {
  4008. stac_shutup(codec);
  4009. return 0;
  4010. }
  4011. #else
  4012. #define stac_suspend NULL
  4013. #endif /* CONFIG_PM */
  4014. static const struct hda_codec_ops stac_patch_ops = {
  4015. .build_controls = snd_hda_gen_build_controls,
  4016. .build_pcms = snd_hda_gen_build_pcms,
  4017. .init = stac_init,
  4018. .free = stac_free,
  4019. .unsol_event = snd_hda_jack_unsol_event,
  4020. #ifdef CONFIG_PM
  4021. .suspend = stac_suspend,
  4022. #endif
  4023. .reboot_notify = stac_shutup,
  4024. };
  4025. static int alloc_stac_spec(struct hda_codec *codec)
  4026. {
  4027. struct sigmatel_spec *spec;
  4028. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  4029. if (!spec)
  4030. return -ENOMEM;
  4031. snd_hda_gen_spec_init(&spec->gen);
  4032. codec->spec = spec;
  4033. codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
  4034. return 0;
  4035. }
  4036. static int patch_stac9200(struct hda_codec *codec)
  4037. {
  4038. struct sigmatel_spec *spec;
  4039. int err;
  4040. err = alloc_stac_spec(codec);
  4041. if (err < 0)
  4042. return err;
  4043. spec = codec->spec;
  4044. spec->linear_tone_beep = 1;
  4045. spec->gen.own_eapd_ctl = 1;
  4046. codec->patch_ops = stac_patch_ops;
  4047. codec->power_filter = snd_hda_codec_eapd_power_filter;
  4048. snd_hda_add_verbs(codec, stac9200_eapd_init);
  4049. snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
  4050. stac9200_fixups);
  4051. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4052. err = stac_parse_auto_config(codec);
  4053. if (err < 0) {
  4054. stac_free(codec);
  4055. return err;
  4056. }
  4057. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4058. return 0;
  4059. }
  4060. static int patch_stac925x(struct hda_codec *codec)
  4061. {
  4062. struct sigmatel_spec *spec;
  4063. int err;
  4064. err = alloc_stac_spec(codec);
  4065. if (err < 0)
  4066. return err;
  4067. spec = codec->spec;
  4068. spec->linear_tone_beep = 1;
  4069. spec->gen.own_eapd_ctl = 1;
  4070. codec->patch_ops = stac_patch_ops;
  4071. snd_hda_add_verbs(codec, stac925x_core_init);
  4072. snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
  4073. stac925x_fixups);
  4074. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4075. err = stac_parse_auto_config(codec);
  4076. if (err < 0) {
  4077. stac_free(codec);
  4078. return err;
  4079. }
  4080. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4081. return 0;
  4082. }
  4083. static int patch_stac92hd73xx(struct hda_codec *codec)
  4084. {
  4085. struct sigmatel_spec *spec;
  4086. int err;
  4087. int num_dacs;
  4088. err = alloc_stac_spec(codec);
  4089. if (err < 0)
  4090. return err;
  4091. spec = codec->spec;
  4092. spec->linear_tone_beep = 0;
  4093. spec->gen.mixer_nid = 0x1d;
  4094. spec->have_spdif_mux = 1;
  4095. num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
  4096. if (num_dacs < 3 || num_dacs > 5) {
  4097. codec_warn(codec,
  4098. "Could not determine number of channels defaulting to DAC count\n");
  4099. num_dacs = 5;
  4100. }
  4101. switch (num_dacs) {
  4102. case 0x3: /* 6 Channel */
  4103. spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
  4104. break;
  4105. case 0x4: /* 8 Channel */
  4106. spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
  4107. break;
  4108. case 0x5: /* 10 Channel */
  4109. spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
  4110. break;
  4111. }
  4112. spec->aloopback_mask = 0x01;
  4113. spec->aloopback_shift = 8;
  4114. spec->gen.beep_nid = 0x1c; /* digital beep */
  4115. /* GPIO0 High = Enable EAPD */
  4116. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  4117. spec->gpio_data = 0x01;
  4118. spec->eapd_switch = 1;
  4119. spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
  4120. spec->pwr_nids = stac92hd73xx_pwr_nids;
  4121. spec->gen.own_eapd_ctl = 1;
  4122. spec->gen.power_down_unused = 1;
  4123. codec->patch_ops = stac_patch_ops;
  4124. snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
  4125. stac92hd73xx_fixups);
  4126. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4127. if (!spec->volknob_init)
  4128. snd_hda_add_verbs(codec, stac92hd73xx_core_init);
  4129. err = stac_parse_auto_config(codec);
  4130. if (err < 0) {
  4131. stac_free(codec);
  4132. return err;
  4133. }
  4134. /* Don't GPIO-mute speakers if there are no internal speakers, because
  4135. * the GPIO might be necessary for Headphone
  4136. */
  4137. if (spec->eapd_switch && !has_builtin_speaker(codec))
  4138. spec->eapd_switch = 0;
  4139. codec->proc_widget_hook = stac92hd7x_proc_hook;
  4140. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4141. return 0;
  4142. }
  4143. static void stac_setup_gpio(struct hda_codec *codec)
  4144. {
  4145. struct sigmatel_spec *spec = codec->spec;
  4146. spec->gpio_mask |= spec->eapd_mask;
  4147. if (spec->gpio_led) {
  4148. if (!spec->vref_mute_led_nid) {
  4149. spec->gpio_mask |= spec->gpio_led;
  4150. spec->gpio_dir |= spec->gpio_led;
  4151. spec->gpio_data |= spec->gpio_led;
  4152. } else {
  4153. codec->power_filter = stac_vref_led_power_filter;
  4154. }
  4155. }
  4156. if (spec->mic_mute_led_gpio) {
  4157. spec->gpio_mask |= spec->mic_mute_led_gpio;
  4158. spec->gpio_dir |= spec->mic_mute_led_gpio;
  4159. spec->mic_enabled = 0;
  4160. spec->gpio_data |= spec->mic_mute_led_gpio;
  4161. spec->gen.cap_sync_hook = stac_capture_led_hook;
  4162. }
  4163. }
  4164. static int patch_stac92hd83xxx(struct hda_codec *codec)
  4165. {
  4166. struct sigmatel_spec *spec;
  4167. int err;
  4168. err = alloc_stac_spec(codec);
  4169. if (err < 0)
  4170. return err;
  4171. codec->epss = 0; /* longer delay needed for D3 */
  4172. spec = codec->spec;
  4173. spec->linear_tone_beep = 0;
  4174. spec->gen.own_eapd_ctl = 1;
  4175. spec->gen.power_down_unused = 1;
  4176. spec->gen.mixer_nid = 0x1b;
  4177. spec->gen.beep_nid = 0x21; /* digital beep */
  4178. spec->pwr_nids = stac92hd83xxx_pwr_nids;
  4179. spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
  4180. spec->default_polarity = -1; /* no default cfg */
  4181. codec->patch_ops = stac_patch_ops;
  4182. snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
  4183. snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
  4184. stac92hd83xxx_fixups);
  4185. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4186. stac_setup_gpio(codec);
  4187. err = stac_parse_auto_config(codec);
  4188. if (err < 0) {
  4189. stac_free(codec);
  4190. return err;
  4191. }
  4192. codec->proc_widget_hook = stac92hd_proc_hook;
  4193. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4194. return 0;
  4195. }
  4196. static const hda_nid_t stac92hd95_pwr_nids[] = {
  4197. 0x0a, 0x0b, 0x0c, 0x0d
  4198. };
  4199. static int patch_stac92hd95(struct hda_codec *codec)
  4200. {
  4201. struct sigmatel_spec *spec;
  4202. int err;
  4203. err = alloc_stac_spec(codec);
  4204. if (err < 0)
  4205. return err;
  4206. codec->epss = 0; /* longer delay needed for D3 */
  4207. spec = codec->spec;
  4208. spec->linear_tone_beep = 0;
  4209. spec->gen.own_eapd_ctl = 1;
  4210. spec->gen.power_down_unused = 1;
  4211. spec->gen.beep_nid = 0x19; /* digital beep */
  4212. spec->pwr_nids = stac92hd95_pwr_nids;
  4213. spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
  4214. spec->default_polarity = 0;
  4215. codec->patch_ops = stac_patch_ops;
  4216. snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
  4217. stac92hd95_fixups);
  4218. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4219. stac_setup_gpio(codec);
  4220. err = stac_parse_auto_config(codec);
  4221. if (err < 0) {
  4222. stac_free(codec);
  4223. return err;
  4224. }
  4225. codec->proc_widget_hook = stac92hd_proc_hook;
  4226. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4227. return 0;
  4228. }
  4229. static int patch_stac92hd71bxx(struct hda_codec *codec)
  4230. {
  4231. struct sigmatel_spec *spec;
  4232. const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
  4233. int err;
  4234. err = alloc_stac_spec(codec);
  4235. if (err < 0)
  4236. return err;
  4237. spec = codec->spec;
  4238. spec->linear_tone_beep = 0;
  4239. spec->gen.own_eapd_ctl = 1;
  4240. spec->gen.power_down_unused = 1;
  4241. spec->gen.mixer_nid = 0x17;
  4242. spec->have_spdif_mux = 1;
  4243. codec->patch_ops = stac_patch_ops;
  4244. /* GPIO0 = EAPD */
  4245. spec->gpio_mask = 0x01;
  4246. spec->gpio_dir = 0x01;
  4247. spec->gpio_data = 0x01;
  4248. switch (codec->vendor_id) {
  4249. case 0x111d76b6: /* 4 Port without Analog Mixer */
  4250. case 0x111d76b7:
  4251. unmute_init++;
  4252. break;
  4253. case 0x111d7608: /* 5 Port with Analog Mixer */
  4254. if ((codec->revision_id & 0xf) == 0 ||
  4255. (codec->revision_id & 0xf) == 1)
  4256. spec->stream_delay = 40; /* 40 milliseconds */
  4257. /* disable VSW */
  4258. unmute_init++;
  4259. snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
  4260. snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
  4261. break;
  4262. case 0x111d7603: /* 6 Port with Analog Mixer */
  4263. if ((codec->revision_id & 0xf) == 1)
  4264. spec->stream_delay = 40; /* 40 milliseconds */
  4265. break;
  4266. }
  4267. if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
  4268. snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
  4269. if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
  4270. snd_hda_sequence_write_cache(codec, unmute_init);
  4271. spec->aloopback_ctl = &stac92hd71bxx_loopback;
  4272. spec->aloopback_mask = 0x50;
  4273. spec->aloopback_shift = 0;
  4274. spec->powerdown_adcs = 1;
  4275. spec->gen.beep_nid = 0x26; /* digital beep */
  4276. spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
  4277. spec->pwr_nids = stac92hd71bxx_pwr_nids;
  4278. snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
  4279. stac92hd71bxx_fixups);
  4280. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4281. stac_setup_gpio(codec);
  4282. err = stac_parse_auto_config(codec);
  4283. if (err < 0) {
  4284. stac_free(codec);
  4285. return err;
  4286. }
  4287. codec->proc_widget_hook = stac92hd7x_proc_hook;
  4288. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4289. return 0;
  4290. }
  4291. static int patch_stac922x(struct hda_codec *codec)
  4292. {
  4293. struct sigmatel_spec *spec;
  4294. int err;
  4295. err = alloc_stac_spec(codec);
  4296. if (err < 0)
  4297. return err;
  4298. spec = codec->spec;
  4299. spec->linear_tone_beep = 1;
  4300. spec->gen.own_eapd_ctl = 1;
  4301. codec->patch_ops = stac_patch_ops;
  4302. snd_hda_add_verbs(codec, stac922x_core_init);
  4303. /* Fix Mux capture level; max to 2 */
  4304. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  4305. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  4306. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  4307. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  4308. (0 << AC_AMPCAP_MUTE_SHIFT));
  4309. snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
  4310. stac922x_fixups);
  4311. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4312. err = stac_parse_auto_config(codec);
  4313. if (err < 0) {
  4314. stac_free(codec);
  4315. return err;
  4316. }
  4317. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4318. return 0;
  4319. }
  4320. static const char * const stac927x_spdif_labels[] = {
  4321. "Digital Playback", "ADAT", "Analog Mux 1",
  4322. "Analog Mux 2", "Analog Mux 3", NULL
  4323. };
  4324. static int patch_stac927x(struct hda_codec *codec)
  4325. {
  4326. struct sigmatel_spec *spec;
  4327. int err;
  4328. err = alloc_stac_spec(codec);
  4329. if (err < 0)
  4330. return err;
  4331. spec = codec->spec;
  4332. spec->linear_tone_beep = 1;
  4333. spec->gen.own_eapd_ctl = 1;
  4334. spec->have_spdif_mux = 1;
  4335. spec->spdif_labels = stac927x_spdif_labels;
  4336. spec->gen.beep_nid = 0x23; /* digital beep */
  4337. /* GPIO0 High = Enable EAPD */
  4338. spec->eapd_mask = spec->gpio_mask = 0x01;
  4339. spec->gpio_dir = spec->gpio_data = 0x01;
  4340. spec->aloopback_ctl = &stac927x_loopback;
  4341. spec->aloopback_mask = 0x40;
  4342. spec->aloopback_shift = 0;
  4343. spec->eapd_switch = 1;
  4344. codec->patch_ops = stac_patch_ops;
  4345. snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
  4346. stac927x_fixups);
  4347. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4348. if (!spec->volknob_init)
  4349. snd_hda_add_verbs(codec, stac927x_core_init);
  4350. err = stac_parse_auto_config(codec);
  4351. if (err < 0) {
  4352. stac_free(codec);
  4353. return err;
  4354. }
  4355. codec->proc_widget_hook = stac927x_proc_hook;
  4356. /*
  4357. * !!FIXME!!
  4358. * The STAC927x seem to require fairly long delays for certain
  4359. * command sequences. With too short delays (even if the answer
  4360. * is set to RIRB properly), it results in the silence output
  4361. * on some hardwares like Dell.
  4362. *
  4363. * The below flag enables the longer delay (see get_response
  4364. * in hda_intel.c).
  4365. */
  4366. codec->bus->needs_damn_long_delay = 1;
  4367. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4368. return 0;
  4369. }
  4370. static int patch_stac9205(struct hda_codec *codec)
  4371. {
  4372. struct sigmatel_spec *spec;
  4373. int err;
  4374. err = alloc_stac_spec(codec);
  4375. if (err < 0)
  4376. return err;
  4377. spec = codec->spec;
  4378. spec->linear_tone_beep = 1;
  4379. spec->gen.own_eapd_ctl = 1;
  4380. spec->have_spdif_mux = 1;
  4381. spec->gen.beep_nid = 0x23; /* digital beep */
  4382. snd_hda_add_verbs(codec, stac9205_core_init);
  4383. spec->aloopback_ctl = &stac9205_loopback;
  4384. spec->aloopback_mask = 0x40;
  4385. spec->aloopback_shift = 0;
  4386. /* GPIO0 High = EAPD */
  4387. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  4388. spec->gpio_data = 0x01;
  4389. /* Turn on/off EAPD per HP plugging */
  4390. spec->eapd_switch = 1;
  4391. codec->patch_ops = stac_patch_ops;
  4392. snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
  4393. stac9205_fixups);
  4394. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4395. err = stac_parse_auto_config(codec);
  4396. if (err < 0) {
  4397. stac_free(codec);
  4398. return err;
  4399. }
  4400. codec->proc_widget_hook = stac9205_proc_hook;
  4401. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4402. return 0;
  4403. }
  4404. /*
  4405. * STAC9872 hack
  4406. */
  4407. static const struct hda_verb stac9872_core_init[] = {
  4408. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  4409. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  4410. {}
  4411. };
  4412. static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
  4413. { 0x0a, 0x03211020 },
  4414. { 0x0b, 0x411111f0 },
  4415. { 0x0c, 0x411111f0 },
  4416. { 0x0d, 0x03a15030 },
  4417. { 0x0e, 0x411111f0 },
  4418. { 0x0f, 0x90170110 },
  4419. { 0x11, 0x411111f0 },
  4420. { 0x13, 0x411111f0 },
  4421. { 0x14, 0x90a7013e },
  4422. {}
  4423. };
  4424. static const struct hda_model_fixup stac9872_models[] = {
  4425. { .id = STAC_9872_VAIO, .name = "vaio" },
  4426. {}
  4427. };
  4428. static const struct hda_fixup stac9872_fixups[] = {
  4429. [STAC_9872_VAIO] = {
  4430. .type = HDA_FIXUP_PINS,
  4431. .v.pins = stac9872_vaio_pin_configs,
  4432. },
  4433. };
  4434. static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
  4435. SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
  4436. "Sony VAIO F/S", STAC_9872_VAIO),
  4437. {} /* terminator */
  4438. };
  4439. static int patch_stac9872(struct hda_codec *codec)
  4440. {
  4441. struct sigmatel_spec *spec;
  4442. int err;
  4443. err = alloc_stac_spec(codec);
  4444. if (err < 0)
  4445. return err;
  4446. spec = codec->spec;
  4447. spec->linear_tone_beep = 1;
  4448. spec->gen.own_eapd_ctl = 1;
  4449. codec->patch_ops = stac_patch_ops;
  4450. snd_hda_add_verbs(codec, stac9872_core_init);
  4451. snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
  4452. stac9872_fixups);
  4453. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4454. err = stac_parse_auto_config(codec);
  4455. if (err < 0) {
  4456. stac_free(codec);
  4457. return -EINVAL;
  4458. }
  4459. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4460. return 0;
  4461. }
  4462. /*
  4463. * patch entries
  4464. */
  4465. static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
  4466. { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
  4467. { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
  4468. { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
  4469. { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
  4470. { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
  4471. { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
  4472. { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
  4473. { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
  4474. { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
  4475. { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
  4476. { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
  4477. { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
  4478. { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
  4479. { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
  4480. { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
  4481. { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
  4482. { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
  4483. { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
  4484. { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
  4485. { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
  4486. { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
  4487. { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
  4488. { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
  4489. { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
  4490. { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
  4491. { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
  4492. { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
  4493. { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
  4494. { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
  4495. { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
  4496. { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
  4497. /* The following does not take into account .id=0x83847661 when subsys =
  4498. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  4499. * currently not fully supported.
  4500. */
  4501. { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
  4502. { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
  4503. { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
  4504. { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
  4505. { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
  4506. { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
  4507. { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
  4508. { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
  4509. { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
  4510. { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
  4511. { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
  4512. { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
  4513. { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
  4514. { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
  4515. { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
  4516. { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
  4517. { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
  4518. { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
  4519. { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
  4520. { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
  4521. { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
  4522. { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
  4523. { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
  4524. { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
  4525. { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
  4526. { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
  4527. { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
  4528. { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
  4529. { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  4530. { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  4531. { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  4532. { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  4533. { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  4534. { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  4535. { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  4536. { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  4537. { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
  4538. { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
  4539. { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
  4540. { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
  4541. { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
  4542. { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
  4543. { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
  4544. { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
  4545. { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
  4546. { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
  4547. { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
  4548. { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
  4549. { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
  4550. { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
  4551. { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
  4552. { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
  4553. { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
  4554. { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
  4555. { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
  4556. { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
  4557. { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
  4558. { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
  4559. { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
  4560. { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
  4561. { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
  4562. { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
  4563. { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
  4564. { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
  4565. { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
  4566. { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
  4567. { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
  4568. { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
  4569. {} /* terminator */
  4570. };
  4571. MODULE_ALIAS("snd-hda-codec-id:8384*");
  4572. MODULE_ALIAS("snd-hda-codec-id:111d*");
  4573. MODULE_LICENSE("GPL");
  4574. MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
  4575. static struct hda_codec_preset_list sigmatel_list = {
  4576. .preset = snd_hda_preset_sigmatel,
  4577. .owner = THIS_MODULE,
  4578. };
  4579. static int __init patch_sigmatel_init(void)
  4580. {
  4581. return snd_hda_add_codec_preset(&sigmatel_list);
  4582. }
  4583. static void __exit patch_sigmatel_exit(void)
  4584. {
  4585. snd_hda_delete_codec_preset(&sigmatel_list);
  4586. }
  4587. module_init(patch_sigmatel_init)
  4588. module_exit(patch_sigmatel_exit)