imx2_wdt.c 8.8 KB

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  1. /*
  2. * Watchdog driver for IMX2 and later processors
  3. *
  4. * Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
  5. * Copyright (C) 2014 Freescale Semiconductor, Inc.
  6. *
  7. * some parts adapted by similar drivers from Darius Augulis and Vladimir
  8. * Zapolskiy, additional improvements by Wim Van Sebroeck.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License version 2 as published by
  12. * the Free Software Foundation.
  13. *
  14. * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
  15. *
  16. * MX1: MX2+:
  17. * ---- -----
  18. * Registers: 32-bit 16-bit
  19. * Stopable timer: Yes No
  20. * Need to enable clk: No Yes
  21. * Halt on suspend: Manual Can be automatic
  22. */
  23. #include <linux/clk.h>
  24. #include <linux/init.h>
  25. #include <linux/io.h>
  26. #include <linux/jiffies.h>
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/moduleparam.h>
  30. #include <linux/of_address.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/regmap.h>
  33. #include <linux/timer.h>
  34. #include <linux/watchdog.h>
  35. #define DRIVER_NAME "imx2-wdt"
  36. #define IMX2_WDT_WCR 0x00 /* Control Register */
  37. #define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
  38. #define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
  39. #define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
  40. #define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
  41. #define IMX2_WDT_WSR 0x02 /* Service Register */
  42. #define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
  43. #define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */
  44. #define IMX2_WDT_WRSR 0x04 /* Reset Status Register */
  45. #define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */
  46. #define IMX2_WDT_MAX_TIME 128
  47. #define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */
  48. #define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8)
  49. struct imx2_wdt_device {
  50. struct clk *clk;
  51. struct regmap *regmap;
  52. struct timer_list timer; /* Pings the watchdog when closed */
  53. struct watchdog_device wdog;
  54. };
  55. static bool nowayout = WATCHDOG_NOWAYOUT;
  56. module_param(nowayout, bool, 0);
  57. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  58. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  59. static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
  60. module_param(timeout, uint, 0);
  61. MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
  62. __MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
  63. static const struct watchdog_info imx2_wdt_info = {
  64. .identity = "imx2+ watchdog",
  65. .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
  66. };
  67. static inline void imx2_wdt_setup(struct watchdog_device *wdog)
  68. {
  69. struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
  70. u32 val;
  71. regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
  72. /* Suspend timer in low power mode, write once-only */
  73. val |= IMX2_WDT_WCR_WDZST;
  74. /* Strip the old watchdog Time-Out value */
  75. val &= ~IMX2_WDT_WCR_WT;
  76. /* Generate reset if WDOG times out */
  77. val &= ~IMX2_WDT_WCR_WRE;
  78. /* Keep Watchdog Disabled */
  79. val &= ~IMX2_WDT_WCR_WDE;
  80. /* Set the watchdog's Time-Out value */
  81. val |= WDOG_SEC_TO_COUNT(wdog->timeout);
  82. regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
  83. /* enable the watchdog */
  84. val |= IMX2_WDT_WCR_WDE;
  85. regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
  86. }
  87. static inline bool imx2_wdt_is_running(struct imx2_wdt_device *wdev)
  88. {
  89. u32 val;
  90. regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
  91. return val & IMX2_WDT_WCR_WDE;
  92. }
  93. static int imx2_wdt_ping(struct watchdog_device *wdog)
  94. {
  95. struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
  96. regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1);
  97. regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2);
  98. return 0;
  99. }
  100. static void imx2_wdt_timer_ping(unsigned long arg)
  101. {
  102. struct watchdog_device *wdog = (struct watchdog_device *)arg;
  103. struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
  104. /* ping it every wdog->timeout / 2 seconds to prevent reboot */
  105. imx2_wdt_ping(wdog);
  106. mod_timer(&wdev->timer, jiffies + wdog->timeout * HZ / 2);
  107. }
  108. static int imx2_wdt_set_timeout(struct watchdog_device *wdog,
  109. unsigned int new_timeout)
  110. {
  111. struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
  112. regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT,
  113. WDOG_SEC_TO_COUNT(new_timeout));
  114. return 0;
  115. }
  116. static int imx2_wdt_start(struct watchdog_device *wdog)
  117. {
  118. struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
  119. if (imx2_wdt_is_running(wdev)) {
  120. /* delete the timer that pings the watchdog after close */
  121. del_timer_sync(&wdev->timer);
  122. imx2_wdt_set_timeout(wdog, wdog->timeout);
  123. } else
  124. imx2_wdt_setup(wdog);
  125. return imx2_wdt_ping(wdog);
  126. }
  127. static int imx2_wdt_stop(struct watchdog_device *wdog)
  128. {
  129. /*
  130. * We don't need a clk_disable, it cannot be disabled once started.
  131. * We use a timer to ping the watchdog while /dev/watchdog is closed
  132. */
  133. imx2_wdt_timer_ping((unsigned long)wdog);
  134. return 0;
  135. }
  136. static inline void imx2_wdt_ping_if_active(struct watchdog_device *wdog)
  137. {
  138. struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
  139. if (imx2_wdt_is_running(wdev)) {
  140. imx2_wdt_set_timeout(wdog, wdog->timeout);
  141. imx2_wdt_timer_ping((unsigned long)wdog);
  142. }
  143. }
  144. static struct watchdog_ops imx2_wdt_ops = {
  145. .owner = THIS_MODULE,
  146. .start = imx2_wdt_start,
  147. .stop = imx2_wdt_stop,
  148. .ping = imx2_wdt_ping,
  149. .set_timeout = imx2_wdt_set_timeout,
  150. };
  151. static struct regmap_config imx2_wdt_regmap_config = {
  152. .reg_bits = 16,
  153. .reg_stride = 2,
  154. .val_bits = 16,
  155. .max_register = 0x8,
  156. };
  157. static int __init imx2_wdt_probe(struct platform_device *pdev)
  158. {
  159. struct device_node *np = pdev->dev.of_node;
  160. struct imx2_wdt_device *wdev;
  161. struct watchdog_device *wdog;
  162. struct resource *res;
  163. void __iomem *base;
  164. bool big_endian;
  165. int ret;
  166. u32 val;
  167. wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
  168. if (!wdev)
  169. return -ENOMEM;
  170. big_endian = of_property_read_bool(np, "big-endian");
  171. if (big_endian)
  172. imx2_wdt_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
  173. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  174. base = devm_ioremap_resource(&pdev->dev, res);
  175. if (IS_ERR(base))
  176. return PTR_ERR(base);
  177. wdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
  178. &imx2_wdt_regmap_config);
  179. if (IS_ERR(wdev->regmap)) {
  180. dev_err(&pdev->dev, "regmap init failed\n");
  181. return PTR_ERR(wdev->regmap);
  182. }
  183. wdev->clk = devm_clk_get(&pdev->dev, NULL);
  184. if (IS_ERR(wdev->clk)) {
  185. dev_err(&pdev->dev, "can't get Watchdog clock\n");
  186. return PTR_ERR(wdev->clk);
  187. }
  188. wdog = &wdev->wdog;
  189. wdog->info = &imx2_wdt_info;
  190. wdog->ops = &imx2_wdt_ops;
  191. wdog->min_timeout = 1;
  192. wdog->max_timeout = IMX2_WDT_MAX_TIME;
  193. clk_prepare_enable(wdev->clk);
  194. regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
  195. wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
  196. wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
  197. if (wdog->timeout != timeout)
  198. dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
  199. timeout, wdog->timeout);
  200. platform_set_drvdata(pdev, wdog);
  201. watchdog_set_drvdata(wdog, wdev);
  202. watchdog_set_nowayout(wdog, nowayout);
  203. watchdog_init_timeout(wdog, timeout, &pdev->dev);
  204. setup_timer(&wdev->timer, imx2_wdt_timer_ping, (unsigned long)wdog);
  205. imx2_wdt_ping_if_active(wdog);
  206. ret = watchdog_register_device(wdog);
  207. if (ret) {
  208. dev_err(&pdev->dev, "cannot register watchdog device\n");
  209. return ret;
  210. }
  211. dev_info(&pdev->dev, "timeout %d sec (nowayout=%d)\n",
  212. wdog->timeout, nowayout);
  213. return 0;
  214. }
  215. static int __exit imx2_wdt_remove(struct platform_device *pdev)
  216. {
  217. struct watchdog_device *wdog = platform_get_drvdata(pdev);
  218. struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
  219. watchdog_unregister_device(wdog);
  220. if (imx2_wdt_is_running(wdev)) {
  221. del_timer_sync(&wdev->timer);
  222. imx2_wdt_ping(wdog);
  223. dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
  224. }
  225. return 0;
  226. }
  227. static void imx2_wdt_shutdown(struct platform_device *pdev)
  228. {
  229. struct watchdog_device *wdog = platform_get_drvdata(pdev);
  230. struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
  231. if (imx2_wdt_is_running(wdev)) {
  232. /*
  233. * We are running, we need to delete the timer but will
  234. * give max timeout before reboot will take place
  235. */
  236. del_timer_sync(&wdev->timer);
  237. imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
  238. imx2_wdt_ping(wdog);
  239. dev_crit(&pdev->dev, "Device shutdown: Expect reboot!\n");
  240. }
  241. }
  242. static const struct of_device_id imx2_wdt_dt_ids[] = {
  243. { .compatible = "fsl,imx21-wdt", },
  244. { /* sentinel */ }
  245. };
  246. MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
  247. static struct platform_driver imx2_wdt_driver = {
  248. .remove = __exit_p(imx2_wdt_remove),
  249. .shutdown = imx2_wdt_shutdown,
  250. .driver = {
  251. .name = DRIVER_NAME,
  252. .owner = THIS_MODULE,
  253. .of_match_table = imx2_wdt_dt_ids,
  254. },
  255. };
  256. module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe);
  257. MODULE_AUTHOR("Wolfram Sang");
  258. MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
  259. MODULE_LICENSE("GPL v2");
  260. MODULE_ALIAS("platform:" DRIVER_NAME);