musb_dsps.c 24 KB

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  1. /*
  2. * Texas Instruments DSPS platforms "glue layer"
  3. *
  4. * Copyright (C) 2012, by Texas Instruments
  5. *
  6. * Based on the am35x "glue layer" code.
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. * musb_dsps.c will be a common file for all the TI DSPS platforms
  27. * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
  28. * For now only ti81x is using this and in future davinci.c, am35x.c
  29. * da8xx.c would be merged to this file after testing.
  30. */
  31. #include <linux/io.h>
  32. #include <linux/err.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/pm_runtime.h>
  36. #include <linux/module.h>
  37. #include <linux/usb/usb_phy_generic.h>
  38. #include <linux/platform_data/usb-omap.h>
  39. #include <linux/sizes.h>
  40. #include <linux/of.h>
  41. #include <linux/of_device.h>
  42. #include <linux/of_address.h>
  43. #include <linux/of_irq.h>
  44. #include <linux/usb/of.h>
  45. #include <linux/debugfs.h>
  46. #include "musb_core.h"
  47. static const struct of_device_id musb_dsps_of_match[];
  48. /**
  49. * avoid using musb_readx()/musb_writex() as glue layer should not be
  50. * dependent on musb core layer symbols.
  51. */
  52. static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
  53. {
  54. return __raw_readb(addr + offset);
  55. }
  56. static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
  57. {
  58. return __raw_readl(addr + offset);
  59. }
  60. static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
  61. {
  62. __raw_writeb(data, addr + offset);
  63. }
  64. static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
  65. {
  66. __raw_writel(data, addr + offset);
  67. }
  68. /**
  69. * DSPS musb wrapper register offset.
  70. * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
  71. * musb ips.
  72. */
  73. struct dsps_musb_wrapper {
  74. u16 revision;
  75. u16 control;
  76. u16 status;
  77. u16 epintr_set;
  78. u16 epintr_clear;
  79. u16 epintr_status;
  80. u16 coreintr_set;
  81. u16 coreintr_clear;
  82. u16 coreintr_status;
  83. u16 phy_utmi;
  84. u16 mode;
  85. u16 tx_mode;
  86. u16 rx_mode;
  87. /* bit positions for control */
  88. unsigned reset:5;
  89. /* bit positions for interrupt */
  90. unsigned usb_shift:5;
  91. u32 usb_mask;
  92. u32 usb_bitmap;
  93. unsigned drvvbus:5;
  94. unsigned txep_shift:5;
  95. u32 txep_mask;
  96. u32 txep_bitmap;
  97. unsigned rxep_shift:5;
  98. u32 rxep_mask;
  99. u32 rxep_bitmap;
  100. /* bit positions for phy_utmi */
  101. unsigned otg_disable:5;
  102. /* bit positions for mode */
  103. unsigned iddig:5;
  104. unsigned iddig_mux:5;
  105. /* miscellaneous stuff */
  106. u8 poll_seconds;
  107. };
  108. /*
  109. * register shadow for suspend
  110. */
  111. struct dsps_context {
  112. u32 control;
  113. u32 epintr;
  114. u32 coreintr;
  115. u32 phy_utmi;
  116. u32 mode;
  117. u32 tx_mode;
  118. u32 rx_mode;
  119. };
  120. /**
  121. * DSPS glue structure.
  122. */
  123. struct dsps_glue {
  124. struct device *dev;
  125. struct platform_device *musb; /* child musb pdev */
  126. const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
  127. struct timer_list timer; /* otg_workaround timer */
  128. unsigned long last_timer; /* last timer data for each instance */
  129. bool sw_babble_enabled;
  130. struct dsps_context context;
  131. struct debugfs_regset32 regset;
  132. struct dentry *dbgfs_root;
  133. };
  134. static const struct debugfs_reg32 dsps_musb_regs[] = {
  135. { "revision", 0x00 },
  136. { "control", 0x14 },
  137. { "status", 0x18 },
  138. { "eoi", 0x24 },
  139. { "intr0_stat", 0x30 },
  140. { "intr1_stat", 0x34 },
  141. { "intr0_set", 0x38 },
  142. { "intr1_set", 0x3c },
  143. { "txmode", 0x70 },
  144. { "rxmode", 0x74 },
  145. { "autoreq", 0xd0 },
  146. { "srpfixtime", 0xd4 },
  147. { "tdown", 0xd8 },
  148. { "phy_utmi", 0xe0 },
  149. { "mode", 0xe8 },
  150. };
  151. static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
  152. {
  153. struct device *dev = musb->controller;
  154. struct dsps_glue *glue = dev_get_drvdata(dev->parent);
  155. if (timeout == 0)
  156. timeout = jiffies + msecs_to_jiffies(3);
  157. /* Never idle if active, or when VBUS timeout is not set as host */
  158. if (musb->is_active || (musb->a_wait_bcon == 0 &&
  159. musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
  160. dev_dbg(musb->controller, "%s active, deleting timer\n",
  161. usb_otg_state_string(musb->xceiv->state));
  162. del_timer(&glue->timer);
  163. glue->last_timer = jiffies;
  164. return;
  165. }
  166. if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE)
  167. return;
  168. if (!musb->g.dev.driver)
  169. return;
  170. if (time_after(glue->last_timer, timeout) &&
  171. timer_pending(&glue->timer)) {
  172. dev_dbg(musb->controller,
  173. "Longer idle timer already pending, ignoring...\n");
  174. return;
  175. }
  176. glue->last_timer = timeout;
  177. dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
  178. usb_otg_state_string(musb->xceiv->state),
  179. jiffies_to_msecs(timeout - jiffies));
  180. mod_timer(&glue->timer, timeout);
  181. }
  182. /**
  183. * dsps_musb_enable - enable interrupts
  184. */
  185. static void dsps_musb_enable(struct musb *musb)
  186. {
  187. struct device *dev = musb->controller;
  188. struct platform_device *pdev = to_platform_device(dev->parent);
  189. struct dsps_glue *glue = platform_get_drvdata(pdev);
  190. const struct dsps_musb_wrapper *wrp = glue->wrp;
  191. void __iomem *reg_base = musb->ctrl_base;
  192. u32 epmask, coremask;
  193. /* Workaround: setup IRQs through both register sets. */
  194. epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
  195. ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
  196. coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
  197. dsps_writel(reg_base, wrp->epintr_set, epmask);
  198. dsps_writel(reg_base, wrp->coreintr_set, coremask);
  199. /* Force the DRVVBUS IRQ so we can start polling for ID change. */
  200. dsps_writel(reg_base, wrp->coreintr_set,
  201. (1 << wrp->drvvbus) << wrp->usb_shift);
  202. dsps_musb_try_idle(musb, 0);
  203. }
  204. /**
  205. * dsps_musb_disable - disable HDRC and flush interrupts
  206. */
  207. static void dsps_musb_disable(struct musb *musb)
  208. {
  209. struct device *dev = musb->controller;
  210. struct platform_device *pdev = to_platform_device(dev->parent);
  211. struct dsps_glue *glue = platform_get_drvdata(pdev);
  212. const struct dsps_musb_wrapper *wrp = glue->wrp;
  213. void __iomem *reg_base = musb->ctrl_base;
  214. dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
  215. dsps_writel(reg_base, wrp->epintr_clear,
  216. wrp->txep_bitmap | wrp->rxep_bitmap);
  217. dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
  218. }
  219. static void otg_timer(unsigned long _musb)
  220. {
  221. struct musb *musb = (void *)_musb;
  222. void __iomem *mregs = musb->mregs;
  223. struct device *dev = musb->controller;
  224. struct dsps_glue *glue = dev_get_drvdata(dev->parent);
  225. const struct dsps_musb_wrapper *wrp = glue->wrp;
  226. u8 devctl;
  227. unsigned long flags;
  228. int skip_session = 0;
  229. /*
  230. * We poll because DSPS IP's won't expose several OTG-critical
  231. * status change events (from the transceiver) otherwise.
  232. */
  233. devctl = dsps_readb(mregs, MUSB_DEVCTL);
  234. dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
  235. usb_otg_state_string(musb->xceiv->state));
  236. spin_lock_irqsave(&musb->lock, flags);
  237. switch (musb->xceiv->state) {
  238. case OTG_STATE_A_WAIT_BCON:
  239. dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
  240. skip_session = 1;
  241. /* fall */
  242. case OTG_STATE_A_IDLE:
  243. case OTG_STATE_B_IDLE:
  244. if (devctl & MUSB_DEVCTL_BDEVICE) {
  245. musb->xceiv->state = OTG_STATE_B_IDLE;
  246. MUSB_DEV_MODE(musb);
  247. } else {
  248. musb->xceiv->state = OTG_STATE_A_IDLE;
  249. MUSB_HST_MODE(musb);
  250. }
  251. if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
  252. dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
  253. mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
  254. break;
  255. case OTG_STATE_A_WAIT_VFALL:
  256. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  257. dsps_writel(musb->ctrl_base, wrp->coreintr_set,
  258. MUSB_INTR_VBUSERROR << wrp->usb_shift);
  259. break;
  260. default:
  261. break;
  262. }
  263. spin_unlock_irqrestore(&musb->lock, flags);
  264. }
  265. static irqreturn_t dsps_interrupt(int irq, void *hci)
  266. {
  267. struct musb *musb = hci;
  268. void __iomem *reg_base = musb->ctrl_base;
  269. struct device *dev = musb->controller;
  270. struct dsps_glue *glue = dev_get_drvdata(dev->parent);
  271. const struct dsps_musb_wrapper *wrp = glue->wrp;
  272. unsigned long flags;
  273. irqreturn_t ret = IRQ_NONE;
  274. u32 epintr, usbintr;
  275. spin_lock_irqsave(&musb->lock, flags);
  276. /* Get endpoint interrupts */
  277. epintr = dsps_readl(reg_base, wrp->epintr_status);
  278. musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
  279. musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
  280. if (epintr)
  281. dsps_writel(reg_base, wrp->epintr_status, epintr);
  282. /* Get usb core interrupts */
  283. usbintr = dsps_readl(reg_base, wrp->coreintr_status);
  284. if (!usbintr && !epintr)
  285. goto out;
  286. musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
  287. if (usbintr)
  288. dsps_writel(reg_base, wrp->coreintr_status, usbintr);
  289. dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
  290. usbintr, epintr);
  291. /*
  292. * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
  293. * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
  294. * switch appropriately between halves of the OTG state machine.
  295. * Managing DEVCTL.SESSION per Mentor docs requires that we know its
  296. * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
  297. * Also, DRVVBUS pulses for SRP (but not at 5V) ...
  298. */
  299. if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) {
  300. pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
  301. /*
  302. * When a babble condition occurs, the musb controller removes
  303. * the session and is no longer in host mode. Hence, all
  304. * devices connected to its root hub get disconnected.
  305. *
  306. * Hand this error down to the musb core isr, so it can
  307. * recover.
  308. */
  309. musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT;
  310. musb->int_tx = musb->int_rx = 0;
  311. }
  312. if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
  313. int drvvbus = dsps_readl(reg_base, wrp->status);
  314. void __iomem *mregs = musb->mregs;
  315. u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
  316. int err;
  317. err = musb->int_usb & MUSB_INTR_VBUSERROR;
  318. if (err) {
  319. /*
  320. * The Mentor core doesn't debounce VBUS as needed
  321. * to cope with device connect current spikes. This
  322. * means it's not uncommon for bus-powered devices
  323. * to get VBUS errors during enumeration.
  324. *
  325. * This is a workaround, but newer RTL from Mentor
  326. * seems to allow a better one: "re"-starting sessions
  327. * without waiting for VBUS to stop registering in
  328. * devctl.
  329. */
  330. musb->int_usb &= ~MUSB_INTR_VBUSERROR;
  331. musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
  332. mod_timer(&glue->timer,
  333. jiffies + wrp->poll_seconds * HZ);
  334. WARNING("VBUS error workaround (delay coming)\n");
  335. } else if (drvvbus) {
  336. MUSB_HST_MODE(musb);
  337. musb->xceiv->otg->default_a = 1;
  338. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  339. del_timer(&glue->timer);
  340. } else {
  341. musb->is_active = 0;
  342. MUSB_DEV_MODE(musb);
  343. musb->xceiv->otg->default_a = 0;
  344. musb->xceiv->state = OTG_STATE_B_IDLE;
  345. }
  346. /* NOTE: this must complete power-on within 100 ms. */
  347. dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
  348. drvvbus ? "on" : "off",
  349. usb_otg_state_string(musb->xceiv->state),
  350. err ? " ERROR" : "",
  351. devctl);
  352. ret = IRQ_HANDLED;
  353. }
  354. if (musb->int_tx || musb->int_rx || musb->int_usb)
  355. ret |= musb_interrupt(musb);
  356. /* Poll for ID change in OTG port mode */
  357. if (musb->xceiv->state == OTG_STATE_B_IDLE &&
  358. musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
  359. mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
  360. out:
  361. spin_unlock_irqrestore(&musb->lock, flags);
  362. return ret;
  363. }
  364. static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
  365. {
  366. struct dentry *root;
  367. struct dentry *file;
  368. char buf[128];
  369. sprintf(buf, "%s.dsps", dev_name(musb->controller));
  370. root = debugfs_create_dir(buf, NULL);
  371. if (!root)
  372. return -ENOMEM;
  373. glue->dbgfs_root = root;
  374. glue->regset.regs = dsps_musb_regs;
  375. glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
  376. glue->regset.base = musb->ctrl_base;
  377. file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
  378. if (!file) {
  379. debugfs_remove_recursive(root);
  380. return -ENOMEM;
  381. }
  382. return 0;
  383. }
  384. static int dsps_musb_init(struct musb *musb)
  385. {
  386. struct device *dev = musb->controller;
  387. struct dsps_glue *glue = dev_get_drvdata(dev->parent);
  388. struct platform_device *parent = to_platform_device(dev->parent);
  389. const struct dsps_musb_wrapper *wrp = glue->wrp;
  390. void __iomem *reg_base;
  391. struct resource *r;
  392. u32 rev, val;
  393. int ret;
  394. r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
  395. if (!r)
  396. return -EINVAL;
  397. reg_base = devm_ioremap_resource(dev, r);
  398. if (IS_ERR(reg_base))
  399. return PTR_ERR(reg_base);
  400. musb->ctrl_base = reg_base;
  401. /* NOP driver needs change if supporting dual instance */
  402. musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
  403. if (IS_ERR(musb->xceiv))
  404. return PTR_ERR(musb->xceiv);
  405. /* Returns zero if e.g. not clocked */
  406. rev = dsps_readl(reg_base, wrp->revision);
  407. if (!rev)
  408. return -ENODEV;
  409. usb_phy_init(musb->xceiv);
  410. setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
  411. /* Reset the musb */
  412. dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
  413. musb->isr = dsps_interrupt;
  414. /* reset the otgdisable bit, needed for host mode to work */
  415. val = dsps_readl(reg_base, wrp->phy_utmi);
  416. val &= ~(1 << wrp->otg_disable);
  417. dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
  418. /*
  419. * Check whether the dsps version has babble control enabled.
  420. * In latest silicon revision the babble control logic is enabled.
  421. * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
  422. * logic enabled.
  423. */
  424. val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
  425. if (val == MUSB_BABBLE_RCV_DISABLE) {
  426. glue->sw_babble_enabled = true;
  427. val |= MUSB_BABBLE_SW_SESSION_CTRL;
  428. dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
  429. }
  430. ret = dsps_musb_dbg_init(musb, glue);
  431. if (ret)
  432. return ret;
  433. return 0;
  434. }
  435. static int dsps_musb_exit(struct musb *musb)
  436. {
  437. struct device *dev = musb->controller;
  438. struct dsps_glue *glue = dev_get_drvdata(dev->parent);
  439. del_timer_sync(&glue->timer);
  440. usb_phy_shutdown(musb->xceiv);
  441. debugfs_remove_recursive(glue->dbgfs_root);
  442. return 0;
  443. }
  444. static int dsps_musb_set_mode(struct musb *musb, u8 mode)
  445. {
  446. struct device *dev = musb->controller;
  447. struct dsps_glue *glue = dev_get_drvdata(dev->parent);
  448. const struct dsps_musb_wrapper *wrp = glue->wrp;
  449. void __iomem *ctrl_base = musb->ctrl_base;
  450. u32 reg;
  451. reg = dsps_readl(ctrl_base, wrp->mode);
  452. switch (mode) {
  453. case MUSB_HOST:
  454. reg &= ~(1 << wrp->iddig);
  455. /*
  456. * if we're setting mode to host-only or device-only, we're
  457. * going to ignore whatever the PHY sends us and just force
  458. * ID pin status by SW
  459. */
  460. reg |= (1 << wrp->iddig_mux);
  461. dsps_writel(ctrl_base, wrp->mode, reg);
  462. dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
  463. break;
  464. case MUSB_PERIPHERAL:
  465. reg |= (1 << wrp->iddig);
  466. /*
  467. * if we're setting mode to host-only or device-only, we're
  468. * going to ignore whatever the PHY sends us and just force
  469. * ID pin status by SW
  470. */
  471. reg |= (1 << wrp->iddig_mux);
  472. dsps_writel(ctrl_base, wrp->mode, reg);
  473. break;
  474. case MUSB_OTG:
  475. dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
  476. break;
  477. default:
  478. dev_err(glue->dev, "unsupported mode %d\n", mode);
  479. return -EINVAL;
  480. }
  481. return 0;
  482. }
  483. static bool sw_babble_control(struct musb *musb)
  484. {
  485. u8 babble_ctl;
  486. bool session_restart = false;
  487. babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
  488. dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
  489. babble_ctl);
  490. /*
  491. * check line monitor flag to check whether babble is
  492. * due to noise
  493. */
  494. dev_dbg(musb->controller, "STUCK_J is %s\n",
  495. babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
  496. if (babble_ctl & MUSB_BABBLE_STUCK_J) {
  497. int timeout = 10;
  498. /*
  499. * babble is due to noise, then set transmit idle (d7 bit)
  500. * to resume normal operation
  501. */
  502. babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
  503. babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
  504. dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
  505. /* wait till line monitor flag cleared */
  506. dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
  507. do {
  508. babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
  509. udelay(1);
  510. } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
  511. /* check whether stuck_at_j bit cleared */
  512. if (babble_ctl & MUSB_BABBLE_STUCK_J) {
  513. /*
  514. * real babble condition has occurred
  515. * restart the controller to start the
  516. * session again
  517. */
  518. dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
  519. babble_ctl);
  520. session_restart = true;
  521. }
  522. } else {
  523. session_restart = true;
  524. }
  525. return session_restart;
  526. }
  527. static int dsps_musb_reset(struct musb *musb)
  528. {
  529. struct device *dev = musb->controller;
  530. struct dsps_glue *glue = dev_get_drvdata(dev->parent);
  531. const struct dsps_musb_wrapper *wrp = glue->wrp;
  532. int session_restart = 0;
  533. if (glue->sw_babble_enabled)
  534. session_restart = sw_babble_control(musb);
  535. /*
  536. * In case of new silicon version babble condition can be recovered
  537. * without resetting the MUSB. But for older silicon versions, MUSB
  538. * reset is needed
  539. */
  540. if (session_restart || !glue->sw_babble_enabled) {
  541. dev_info(musb->controller, "Restarting MUSB to recover from Babble\n");
  542. dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
  543. usleep_range(100, 200);
  544. usb_phy_shutdown(musb->xceiv);
  545. usleep_range(100, 200);
  546. usb_phy_init(musb->xceiv);
  547. session_restart = 1;
  548. }
  549. return !session_restart;
  550. }
  551. static struct musb_platform_ops dsps_ops = {
  552. .init = dsps_musb_init,
  553. .exit = dsps_musb_exit,
  554. .enable = dsps_musb_enable,
  555. .disable = dsps_musb_disable,
  556. .try_idle = dsps_musb_try_idle,
  557. .set_mode = dsps_musb_set_mode,
  558. .reset = dsps_musb_reset,
  559. };
  560. static u64 musb_dmamask = DMA_BIT_MASK(32);
  561. static int get_int_prop(struct device_node *dn, const char *s)
  562. {
  563. int ret;
  564. u32 val;
  565. ret = of_property_read_u32(dn, s, &val);
  566. if (ret)
  567. return 0;
  568. return val;
  569. }
  570. static int get_musb_port_mode(struct device *dev)
  571. {
  572. enum usb_dr_mode mode;
  573. mode = of_usb_get_dr_mode(dev->of_node);
  574. switch (mode) {
  575. case USB_DR_MODE_HOST:
  576. return MUSB_PORT_MODE_HOST;
  577. case USB_DR_MODE_PERIPHERAL:
  578. return MUSB_PORT_MODE_GADGET;
  579. case USB_DR_MODE_UNKNOWN:
  580. case USB_DR_MODE_OTG:
  581. default:
  582. return MUSB_PORT_MODE_DUAL_ROLE;
  583. }
  584. }
  585. static int dsps_create_musb_pdev(struct dsps_glue *glue,
  586. struct platform_device *parent)
  587. {
  588. struct musb_hdrc_platform_data pdata;
  589. struct resource resources[2];
  590. struct resource *res;
  591. struct device *dev = &parent->dev;
  592. struct musb_hdrc_config *config;
  593. struct platform_device *musb;
  594. struct device_node *dn = parent->dev.of_node;
  595. int ret;
  596. memset(resources, 0, sizeof(resources));
  597. res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
  598. if (!res) {
  599. dev_err(dev, "failed to get memory.\n");
  600. return -EINVAL;
  601. }
  602. resources[0] = *res;
  603. res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
  604. if (!res) {
  605. dev_err(dev, "failed to get irq.\n");
  606. return -EINVAL;
  607. }
  608. resources[1] = *res;
  609. /* allocate the child platform device */
  610. musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
  611. if (!musb) {
  612. dev_err(dev, "failed to allocate musb device\n");
  613. return -ENOMEM;
  614. }
  615. musb->dev.parent = dev;
  616. musb->dev.dma_mask = &musb_dmamask;
  617. musb->dev.coherent_dma_mask = musb_dmamask;
  618. musb->dev.of_node = of_node_get(dn);
  619. glue->musb = musb;
  620. ret = platform_device_add_resources(musb, resources,
  621. ARRAY_SIZE(resources));
  622. if (ret) {
  623. dev_err(dev, "failed to add resources\n");
  624. goto err;
  625. }
  626. config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
  627. if (!config) {
  628. dev_err(dev, "failed to allocate musb hdrc config\n");
  629. ret = -ENOMEM;
  630. goto err;
  631. }
  632. pdata.config = config;
  633. pdata.platform_ops = &dsps_ops;
  634. config->num_eps = get_int_prop(dn, "mentor,num-eps");
  635. config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
  636. config->host_port_deassert_reset_at_resume = 1;
  637. pdata.mode = get_musb_port_mode(dev);
  638. /* DT keeps this entry in mA, musb expects it as per USB spec */
  639. pdata.power = get_int_prop(dn, "mentor,power") / 2;
  640. config->multipoint = of_property_read_bool(dn, "mentor,multipoint");
  641. ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
  642. if (ret) {
  643. dev_err(dev, "failed to add platform_data\n");
  644. goto err;
  645. }
  646. ret = platform_device_add(musb);
  647. if (ret) {
  648. dev_err(dev, "failed to register musb device\n");
  649. goto err;
  650. }
  651. return 0;
  652. err:
  653. platform_device_put(musb);
  654. return ret;
  655. }
  656. static int dsps_probe(struct platform_device *pdev)
  657. {
  658. const struct of_device_id *match;
  659. const struct dsps_musb_wrapper *wrp;
  660. struct dsps_glue *glue;
  661. int ret;
  662. if (!strcmp(pdev->name, "musb-hdrc"))
  663. return -ENODEV;
  664. match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
  665. if (!match) {
  666. dev_err(&pdev->dev, "fail to get matching of_match struct\n");
  667. return -EINVAL;
  668. }
  669. wrp = match->data;
  670. /* allocate glue */
  671. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  672. if (!glue) {
  673. dev_err(&pdev->dev, "unable to allocate glue memory\n");
  674. return -ENOMEM;
  675. }
  676. glue->dev = &pdev->dev;
  677. glue->wrp = wrp;
  678. platform_set_drvdata(pdev, glue);
  679. pm_runtime_enable(&pdev->dev);
  680. ret = pm_runtime_get_sync(&pdev->dev);
  681. if (ret < 0) {
  682. dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
  683. goto err2;
  684. }
  685. ret = dsps_create_musb_pdev(glue, pdev);
  686. if (ret)
  687. goto err3;
  688. return 0;
  689. err3:
  690. pm_runtime_put(&pdev->dev);
  691. err2:
  692. pm_runtime_disable(&pdev->dev);
  693. return ret;
  694. }
  695. static int dsps_remove(struct platform_device *pdev)
  696. {
  697. struct dsps_glue *glue = platform_get_drvdata(pdev);
  698. platform_device_unregister(glue->musb);
  699. /* disable usbss clocks */
  700. pm_runtime_put(&pdev->dev);
  701. pm_runtime_disable(&pdev->dev);
  702. return 0;
  703. }
  704. static const struct dsps_musb_wrapper am33xx_driver_data = {
  705. .revision = 0x00,
  706. .control = 0x14,
  707. .status = 0x18,
  708. .epintr_set = 0x38,
  709. .epintr_clear = 0x40,
  710. .epintr_status = 0x30,
  711. .coreintr_set = 0x3c,
  712. .coreintr_clear = 0x44,
  713. .coreintr_status = 0x34,
  714. .phy_utmi = 0xe0,
  715. .mode = 0xe8,
  716. .tx_mode = 0x70,
  717. .rx_mode = 0x74,
  718. .reset = 0,
  719. .otg_disable = 21,
  720. .iddig = 8,
  721. .iddig_mux = 7,
  722. .usb_shift = 0,
  723. .usb_mask = 0x1ff,
  724. .usb_bitmap = (0x1ff << 0),
  725. .drvvbus = 8,
  726. .txep_shift = 0,
  727. .txep_mask = 0xffff,
  728. .txep_bitmap = (0xffff << 0),
  729. .rxep_shift = 16,
  730. .rxep_mask = 0xfffe,
  731. .rxep_bitmap = (0xfffe << 16),
  732. .poll_seconds = 2,
  733. };
  734. static const struct of_device_id musb_dsps_of_match[] = {
  735. { .compatible = "ti,musb-am33xx",
  736. .data = (void *) &am33xx_driver_data, },
  737. { },
  738. };
  739. MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
  740. #ifdef CONFIG_PM_SLEEP
  741. static int dsps_suspend(struct device *dev)
  742. {
  743. struct dsps_glue *glue = dev_get_drvdata(dev);
  744. const struct dsps_musb_wrapper *wrp = glue->wrp;
  745. struct musb *musb = platform_get_drvdata(glue->musb);
  746. void __iomem *mbase = musb->ctrl_base;
  747. glue->context.control = dsps_readl(mbase, wrp->control);
  748. glue->context.epintr = dsps_readl(mbase, wrp->epintr_set);
  749. glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set);
  750. glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi);
  751. glue->context.mode = dsps_readl(mbase, wrp->mode);
  752. glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode);
  753. glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode);
  754. return 0;
  755. }
  756. static int dsps_resume(struct device *dev)
  757. {
  758. struct dsps_glue *glue = dev_get_drvdata(dev);
  759. const struct dsps_musb_wrapper *wrp = glue->wrp;
  760. struct musb *musb = platform_get_drvdata(glue->musb);
  761. void __iomem *mbase = musb->ctrl_base;
  762. dsps_writel(mbase, wrp->control, glue->context.control);
  763. dsps_writel(mbase, wrp->epintr_set, glue->context.epintr);
  764. dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
  765. dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
  766. dsps_writel(mbase, wrp->mode, glue->context.mode);
  767. dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
  768. dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
  769. return 0;
  770. }
  771. #endif
  772. static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
  773. static struct platform_driver dsps_usbss_driver = {
  774. .probe = dsps_probe,
  775. .remove = dsps_remove,
  776. .driver = {
  777. .name = "musb-dsps",
  778. .pm = &dsps_pm_ops,
  779. .of_match_table = musb_dsps_of_match,
  780. },
  781. };
  782. MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
  783. MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
  784. MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
  785. MODULE_LICENSE("GPL v2");
  786. module_platform_driver(dsps_usbss_driver);