jsm_tty.c 20 KB

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  1. /************************************************************************
  2. * Copyright 2003 Digi International (www.digi.com)
  3. *
  4. * Copyright (C) 2004 IBM Corporation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
  13. * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
  14. * PURPOSE. See the GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 * Temple Place - Suite 330, Boston,
  19. * MA 02111-1307, USA.
  20. *
  21. * Contact Information:
  22. * Scott H Kilau <Scott_Kilau@digi.com>
  23. * Ananda Venkatarman <mansarov@us.ibm.com>
  24. * Modifications:
  25. * 01/19/06: changed jsm_input routine to use the dynamically allocated
  26. * tty_buffer changes. Contributors: Scott Kilau and Ananda V.
  27. ***********************************************************************/
  28. #include <linux/tty.h>
  29. #include <linux/tty_flip.h>
  30. #include <linux/serial_reg.h>
  31. #include <linux/delay.h> /* For udelay */
  32. #include <linux/pci.h>
  33. #include <linux/slab.h>
  34. #include "jsm.h"
  35. static DECLARE_BITMAP(linemap, MAXLINES);
  36. static void jsm_carrier(struct jsm_channel *ch);
  37. static inline int jsm_get_mstat(struct jsm_channel *ch)
  38. {
  39. unsigned char mstat;
  40. unsigned result;
  41. jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "start\n");
  42. mstat = (ch->ch_mostat | ch->ch_mistat);
  43. result = 0;
  44. if (mstat & UART_MCR_DTR)
  45. result |= TIOCM_DTR;
  46. if (mstat & UART_MCR_RTS)
  47. result |= TIOCM_RTS;
  48. if (mstat & UART_MSR_CTS)
  49. result |= TIOCM_CTS;
  50. if (mstat & UART_MSR_DSR)
  51. result |= TIOCM_DSR;
  52. if (mstat & UART_MSR_RI)
  53. result |= TIOCM_RI;
  54. if (mstat & UART_MSR_DCD)
  55. result |= TIOCM_CD;
  56. jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n");
  57. return result;
  58. }
  59. static unsigned int jsm_tty_tx_empty(struct uart_port *port)
  60. {
  61. return TIOCSER_TEMT;
  62. }
  63. /*
  64. * Return modem signals to ld.
  65. */
  66. static unsigned int jsm_tty_get_mctrl(struct uart_port *port)
  67. {
  68. int result;
  69. struct jsm_channel *channel = (struct jsm_channel *)port;
  70. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
  71. result = jsm_get_mstat(channel);
  72. if (result < 0)
  73. return -ENXIO;
  74. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
  75. return result;
  76. }
  77. /*
  78. * jsm_set_modem_info()
  79. *
  80. * Set modem signals, called by ld.
  81. */
  82. static void jsm_tty_set_mctrl(struct uart_port *port, unsigned int mctrl)
  83. {
  84. struct jsm_channel *channel = (struct jsm_channel *)port;
  85. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
  86. if (mctrl & TIOCM_RTS)
  87. channel->ch_mostat |= UART_MCR_RTS;
  88. else
  89. channel->ch_mostat &= ~UART_MCR_RTS;
  90. if (mctrl & TIOCM_DTR)
  91. channel->ch_mostat |= UART_MCR_DTR;
  92. else
  93. channel->ch_mostat &= ~UART_MCR_DTR;
  94. channel->ch_bd->bd_ops->assert_modem_signals(channel);
  95. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
  96. udelay(10);
  97. }
  98. /*
  99. * jsm_tty_write()
  100. *
  101. * Take data from the user or kernel and send it out to the FEP.
  102. * In here exists all the Transparent Print magic as well.
  103. */
  104. static void jsm_tty_write(struct uart_port *port)
  105. {
  106. struct jsm_channel *channel;
  107. channel = container_of(port, struct jsm_channel, uart_port);
  108. channel->ch_bd->bd_ops->copy_data_from_queue_to_uart(channel);
  109. }
  110. static void jsm_tty_start_tx(struct uart_port *port)
  111. {
  112. struct jsm_channel *channel = (struct jsm_channel *)port;
  113. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
  114. channel->ch_flags &= ~(CH_STOP);
  115. jsm_tty_write(port);
  116. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
  117. }
  118. static void jsm_tty_stop_tx(struct uart_port *port)
  119. {
  120. struct jsm_channel *channel = (struct jsm_channel *)port;
  121. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
  122. channel->ch_flags |= (CH_STOP);
  123. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
  124. }
  125. static void jsm_tty_send_xchar(struct uart_port *port, char ch)
  126. {
  127. unsigned long lock_flags;
  128. struct jsm_channel *channel = (struct jsm_channel *)port;
  129. struct ktermios *termios;
  130. spin_lock_irqsave(&port->lock, lock_flags);
  131. termios = &port->state->port.tty->termios;
  132. if (ch == termios->c_cc[VSTART])
  133. channel->ch_bd->bd_ops->send_start_character(channel);
  134. if (ch == termios->c_cc[VSTOP])
  135. channel->ch_bd->bd_ops->send_stop_character(channel);
  136. spin_unlock_irqrestore(&port->lock, lock_flags);
  137. }
  138. static void jsm_tty_stop_rx(struct uart_port *port)
  139. {
  140. struct jsm_channel *channel = (struct jsm_channel *)port;
  141. channel->ch_bd->bd_ops->disable_receiver(channel);
  142. }
  143. static void jsm_tty_break(struct uart_port *port, int break_state)
  144. {
  145. unsigned long lock_flags;
  146. struct jsm_channel *channel = (struct jsm_channel *)port;
  147. spin_lock_irqsave(&port->lock, lock_flags);
  148. if (break_state == -1)
  149. channel->ch_bd->bd_ops->send_break(channel);
  150. else
  151. channel->ch_bd->bd_ops->clear_break(channel, 0);
  152. spin_unlock_irqrestore(&port->lock, lock_flags);
  153. }
  154. static int jsm_tty_open(struct uart_port *port)
  155. {
  156. struct jsm_board *brd;
  157. struct jsm_channel *channel = (struct jsm_channel *)port;
  158. struct ktermios *termios;
  159. /* Get board pointer from our array of majors we have allocated */
  160. brd = channel->ch_bd;
  161. /*
  162. * Allocate channel buffers for read/write/error.
  163. * Set flag, so we don't get trounced on.
  164. */
  165. channel->ch_flags |= (CH_OPENING);
  166. /* Drop locks, as malloc with GFP_KERNEL can sleep */
  167. if (!channel->ch_rqueue) {
  168. channel->ch_rqueue = kzalloc(RQUEUESIZE, GFP_KERNEL);
  169. if (!channel->ch_rqueue) {
  170. jsm_dbg(INIT, &channel->ch_bd->pci_dev,
  171. "unable to allocate read queue buf\n");
  172. return -ENOMEM;
  173. }
  174. }
  175. if (!channel->ch_equeue) {
  176. channel->ch_equeue = kzalloc(EQUEUESIZE, GFP_KERNEL);
  177. if (!channel->ch_equeue) {
  178. jsm_dbg(INIT, &channel->ch_bd->pci_dev,
  179. "unable to allocate error queue buf\n");
  180. return -ENOMEM;
  181. }
  182. }
  183. channel->ch_flags &= ~(CH_OPENING);
  184. /*
  185. * Initialize if neither terminal is open.
  186. */
  187. jsm_dbg(OPEN, &channel->ch_bd->pci_dev,
  188. "jsm_open: initializing channel in open...\n");
  189. /*
  190. * Flush input queues.
  191. */
  192. channel->ch_r_head = channel->ch_r_tail = 0;
  193. channel->ch_e_head = channel->ch_e_tail = 0;
  194. brd->bd_ops->flush_uart_write(channel);
  195. brd->bd_ops->flush_uart_read(channel);
  196. channel->ch_flags = 0;
  197. channel->ch_cached_lsr = 0;
  198. channel->ch_stops_sent = 0;
  199. termios = &port->state->port.tty->termios;
  200. channel->ch_c_cflag = termios->c_cflag;
  201. channel->ch_c_iflag = termios->c_iflag;
  202. channel->ch_c_oflag = termios->c_oflag;
  203. channel->ch_c_lflag = termios->c_lflag;
  204. channel->ch_startc = termios->c_cc[VSTART];
  205. channel->ch_stopc = termios->c_cc[VSTOP];
  206. /* Tell UART to init itself */
  207. brd->bd_ops->uart_init(channel);
  208. /*
  209. * Run param in case we changed anything
  210. */
  211. brd->bd_ops->param(channel);
  212. jsm_carrier(channel);
  213. channel->ch_open_count++;
  214. jsm_dbg(OPEN, &channel->ch_bd->pci_dev, "finish\n");
  215. return 0;
  216. }
  217. static void jsm_tty_close(struct uart_port *port)
  218. {
  219. struct jsm_board *bd;
  220. struct ktermios *ts;
  221. struct jsm_channel *channel = (struct jsm_channel *)port;
  222. jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "start\n");
  223. bd = channel->ch_bd;
  224. ts = &port->state->port.tty->termios;
  225. channel->ch_flags &= ~(CH_STOPI);
  226. channel->ch_open_count--;
  227. /*
  228. * If we have HUPCL set, lower DTR and RTS
  229. */
  230. if (channel->ch_c_cflag & HUPCL) {
  231. jsm_dbg(CLOSE, &channel->ch_bd->pci_dev,
  232. "Close. HUPCL set, dropping DTR/RTS\n");
  233. /* Drop RTS/DTR */
  234. channel->ch_mostat &= ~(UART_MCR_DTR | UART_MCR_RTS);
  235. bd->bd_ops->assert_modem_signals(channel);
  236. }
  237. /* Turn off UART interrupts for this port */
  238. channel->ch_bd->bd_ops->uart_off(channel);
  239. jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "finish\n");
  240. }
  241. static void jsm_tty_set_termios(struct uart_port *port,
  242. struct ktermios *termios,
  243. struct ktermios *old_termios)
  244. {
  245. unsigned long lock_flags;
  246. struct jsm_channel *channel = (struct jsm_channel *)port;
  247. spin_lock_irqsave(&port->lock, lock_flags);
  248. channel->ch_c_cflag = termios->c_cflag;
  249. channel->ch_c_iflag = termios->c_iflag;
  250. channel->ch_c_oflag = termios->c_oflag;
  251. channel->ch_c_lflag = termios->c_lflag;
  252. channel->ch_startc = termios->c_cc[VSTART];
  253. channel->ch_stopc = termios->c_cc[VSTOP];
  254. channel->ch_bd->bd_ops->param(channel);
  255. jsm_carrier(channel);
  256. spin_unlock_irqrestore(&port->lock, lock_flags);
  257. }
  258. static const char *jsm_tty_type(struct uart_port *port)
  259. {
  260. return "jsm";
  261. }
  262. static void jsm_tty_release_port(struct uart_port *port)
  263. {
  264. }
  265. static int jsm_tty_request_port(struct uart_port *port)
  266. {
  267. return 0;
  268. }
  269. static void jsm_config_port(struct uart_port *port, int flags)
  270. {
  271. port->type = PORT_JSM;
  272. }
  273. static struct uart_ops jsm_ops = {
  274. .tx_empty = jsm_tty_tx_empty,
  275. .set_mctrl = jsm_tty_set_mctrl,
  276. .get_mctrl = jsm_tty_get_mctrl,
  277. .stop_tx = jsm_tty_stop_tx,
  278. .start_tx = jsm_tty_start_tx,
  279. .send_xchar = jsm_tty_send_xchar,
  280. .stop_rx = jsm_tty_stop_rx,
  281. .break_ctl = jsm_tty_break,
  282. .startup = jsm_tty_open,
  283. .shutdown = jsm_tty_close,
  284. .set_termios = jsm_tty_set_termios,
  285. .type = jsm_tty_type,
  286. .release_port = jsm_tty_release_port,
  287. .request_port = jsm_tty_request_port,
  288. .config_port = jsm_config_port,
  289. };
  290. /*
  291. * jsm_tty_init()
  292. *
  293. * Init the tty subsystem. Called once per board after board has been
  294. * downloaded and init'ed.
  295. */
  296. int jsm_tty_init(struct jsm_board *brd)
  297. {
  298. int i;
  299. void __iomem *vaddr;
  300. struct jsm_channel *ch;
  301. if (!brd)
  302. return -ENXIO;
  303. jsm_dbg(INIT, &brd->pci_dev, "start\n");
  304. /*
  305. * Initialize board structure elements.
  306. */
  307. brd->nasync = brd->maxports;
  308. /*
  309. * Allocate channel memory that might not have been allocated
  310. * when the driver was first loaded.
  311. */
  312. for (i = 0; i < brd->nasync; i++) {
  313. if (!brd->channels[i]) {
  314. /*
  315. * Okay to malloc with GFP_KERNEL, we are not at
  316. * interrupt context, and there are no locks held.
  317. */
  318. brd->channels[i] = kzalloc(sizeof(struct jsm_channel), GFP_KERNEL);
  319. if (!brd->channels[i]) {
  320. jsm_dbg(CORE, &brd->pci_dev,
  321. "%s:%d Unable to allocate memory for channel struct\n",
  322. __FILE__, __LINE__);
  323. }
  324. }
  325. }
  326. ch = brd->channels[0];
  327. vaddr = brd->re_map_membase;
  328. /* Set up channel variables */
  329. for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) {
  330. if (!brd->channels[i])
  331. continue;
  332. spin_lock_init(&ch->ch_lock);
  333. if (brd->bd_uart_offset == 0x200)
  334. ch->ch_neo_uart = vaddr + (brd->bd_uart_offset * i);
  335. ch->ch_bd = brd;
  336. ch->ch_portnum = i;
  337. /* .25 second delay */
  338. ch->ch_close_delay = 250;
  339. init_waitqueue_head(&ch->ch_flags_wait);
  340. }
  341. jsm_dbg(INIT, &brd->pci_dev, "finish\n");
  342. return 0;
  343. }
  344. int jsm_uart_port_init(struct jsm_board *brd)
  345. {
  346. int i, rc;
  347. unsigned int line;
  348. struct jsm_channel *ch;
  349. if (!brd)
  350. return -ENXIO;
  351. jsm_dbg(INIT, &brd->pci_dev, "start\n");
  352. /*
  353. * Initialize board structure elements.
  354. */
  355. brd->nasync = brd->maxports;
  356. /* Set up channel variables */
  357. for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) {
  358. if (!brd->channels[i])
  359. continue;
  360. brd->channels[i]->uart_port.irq = brd->irq;
  361. brd->channels[i]->uart_port.uartclk = 14745600;
  362. brd->channels[i]->uart_port.type = PORT_JSM;
  363. brd->channels[i]->uart_port.iotype = UPIO_MEM;
  364. brd->channels[i]->uart_port.membase = brd->re_map_membase;
  365. brd->channels[i]->uart_port.fifosize = 16;
  366. brd->channels[i]->uart_port.ops = &jsm_ops;
  367. line = find_first_zero_bit(linemap, MAXLINES);
  368. if (line >= MAXLINES) {
  369. printk(KERN_INFO "jsm: linemap is full, added device failed\n");
  370. continue;
  371. } else
  372. set_bit(line, linemap);
  373. brd->channels[i]->uart_port.line = line;
  374. rc = uart_add_one_port (&jsm_uart_driver, &brd->channels[i]->uart_port);
  375. if (rc){
  376. printk(KERN_INFO "jsm: Port %d failed. Aborting...\n", i);
  377. return rc;
  378. }
  379. else
  380. printk(KERN_INFO "jsm: Port %d added\n", i);
  381. }
  382. jsm_dbg(INIT, &brd->pci_dev, "finish\n");
  383. return 0;
  384. }
  385. int jsm_remove_uart_port(struct jsm_board *brd)
  386. {
  387. int i;
  388. struct jsm_channel *ch;
  389. if (!brd)
  390. return -ENXIO;
  391. jsm_dbg(INIT, &brd->pci_dev, "start\n");
  392. /*
  393. * Initialize board structure elements.
  394. */
  395. brd->nasync = brd->maxports;
  396. /* Set up channel variables */
  397. for (i = 0; i < brd->nasync; i++) {
  398. if (!brd->channels[i])
  399. continue;
  400. ch = brd->channels[i];
  401. clear_bit(ch->uart_port.line, linemap);
  402. uart_remove_one_port(&jsm_uart_driver, &brd->channels[i]->uart_port);
  403. }
  404. jsm_dbg(INIT, &brd->pci_dev, "finish\n");
  405. return 0;
  406. }
  407. void jsm_input(struct jsm_channel *ch)
  408. {
  409. struct jsm_board *bd;
  410. struct tty_struct *tp;
  411. struct tty_port *port;
  412. u32 rmask;
  413. u16 head;
  414. u16 tail;
  415. int data_len;
  416. unsigned long lock_flags;
  417. int len = 0;
  418. int n = 0;
  419. int s = 0;
  420. int i = 0;
  421. jsm_dbg(READ, &ch->ch_bd->pci_dev, "start\n");
  422. if (!ch)
  423. return;
  424. port = &ch->uart_port.state->port;
  425. tp = port->tty;
  426. bd = ch->ch_bd;
  427. if(!bd)
  428. return;
  429. spin_lock_irqsave(&ch->ch_lock, lock_flags);
  430. /*
  431. *Figure the number of characters in the buffer.
  432. *Exit immediately if none.
  433. */
  434. rmask = RQUEUEMASK;
  435. head = ch->ch_r_head & rmask;
  436. tail = ch->ch_r_tail & rmask;
  437. data_len = (head - tail) & rmask;
  438. if (data_len == 0) {
  439. spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
  440. return;
  441. }
  442. jsm_dbg(READ, &ch->ch_bd->pci_dev, "start\n");
  443. /*
  444. *If the device is not open, or CREAD is off, flush
  445. *input data and return immediately.
  446. */
  447. if (!tp ||
  448. !(tp->termios.c_cflag & CREAD) ) {
  449. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  450. "input. dropping %d bytes on port %d...\n",
  451. data_len, ch->ch_portnum);
  452. ch->ch_r_head = tail;
  453. /* Force queue flow control to be released, if needed */
  454. jsm_check_queue_flow_control(ch);
  455. spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
  456. return;
  457. }
  458. /*
  459. * If we are throttled, simply don't read any data.
  460. */
  461. if (ch->ch_flags & CH_STOPI) {
  462. spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
  463. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  464. "Port %d throttled, not reading any data. head: %x tail: %x\n",
  465. ch->ch_portnum, head, tail);
  466. return;
  467. }
  468. jsm_dbg(READ, &ch->ch_bd->pci_dev, "start 2\n");
  469. len = tty_buffer_request_room(port, data_len);
  470. n = len;
  471. /*
  472. * n now contains the most amount of data we can copy,
  473. * bounded either by the flip buffer size or the amount
  474. * of data the card actually has pending...
  475. */
  476. while (n) {
  477. s = ((head >= tail) ? head : RQUEUESIZE) - tail;
  478. s = min(s, n);
  479. if (s <= 0)
  480. break;
  481. /*
  482. * If conditions are such that ld needs to see all
  483. * UART errors, we will have to walk each character
  484. * and error byte and send them to the buffer one at
  485. * a time.
  486. */
  487. if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) {
  488. for (i = 0; i < s; i++) {
  489. /*
  490. * Give the Linux ld the flags in the
  491. * format it likes.
  492. */
  493. if (*(ch->ch_equeue +tail +i) & UART_LSR_BI)
  494. tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_BREAK);
  495. else if (*(ch->ch_equeue +tail +i) & UART_LSR_PE)
  496. tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_PARITY);
  497. else if (*(ch->ch_equeue +tail +i) & UART_LSR_FE)
  498. tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_FRAME);
  499. else
  500. tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_NORMAL);
  501. }
  502. } else {
  503. tty_insert_flip_string(port, ch->ch_rqueue + tail, s);
  504. }
  505. tail += s;
  506. n -= s;
  507. /* Flip queue if needed */
  508. tail &= rmask;
  509. }
  510. ch->ch_r_tail = tail & rmask;
  511. ch->ch_e_tail = tail & rmask;
  512. jsm_check_queue_flow_control(ch);
  513. spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
  514. /* Tell the tty layer its okay to "eat" the data now */
  515. tty_flip_buffer_push(port);
  516. jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n");
  517. }
  518. static void jsm_carrier(struct jsm_channel *ch)
  519. {
  520. struct jsm_board *bd;
  521. int virt_carrier = 0;
  522. int phys_carrier = 0;
  523. jsm_dbg(CARR, &ch->ch_bd->pci_dev, "start\n");
  524. if (!ch)
  525. return;
  526. bd = ch->ch_bd;
  527. if (!bd)
  528. return;
  529. if (ch->ch_mistat & UART_MSR_DCD) {
  530. jsm_dbg(CARR, &ch->ch_bd->pci_dev, "mistat: %x D_CD: %x\n",
  531. ch->ch_mistat, ch->ch_mistat & UART_MSR_DCD);
  532. phys_carrier = 1;
  533. }
  534. if (ch->ch_c_cflag & CLOCAL)
  535. virt_carrier = 1;
  536. jsm_dbg(CARR, &ch->ch_bd->pci_dev, "DCD: physical: %d virt: %d\n",
  537. phys_carrier, virt_carrier);
  538. /*
  539. * Test for a VIRTUAL carrier transition to HIGH.
  540. */
  541. if (((ch->ch_flags & CH_FCAR) == 0) && (virt_carrier == 1)) {
  542. /*
  543. * When carrier rises, wake any threads waiting
  544. * for carrier in the open routine.
  545. */
  546. jsm_dbg(CARR, &ch->ch_bd->pci_dev, "carrier: virt DCD rose\n");
  547. if (waitqueue_active(&(ch->ch_flags_wait)))
  548. wake_up_interruptible(&ch->ch_flags_wait);
  549. }
  550. /*
  551. * Test for a PHYSICAL carrier transition to HIGH.
  552. */
  553. if (((ch->ch_flags & CH_CD) == 0) && (phys_carrier == 1)) {
  554. /*
  555. * When carrier rises, wake any threads waiting
  556. * for carrier in the open routine.
  557. */
  558. jsm_dbg(CARR, &ch->ch_bd->pci_dev,
  559. "carrier: physical DCD rose\n");
  560. if (waitqueue_active(&(ch->ch_flags_wait)))
  561. wake_up_interruptible(&ch->ch_flags_wait);
  562. }
  563. /*
  564. * Test for a PHYSICAL transition to low, so long as we aren't
  565. * currently ignoring physical transitions (which is what "virtual
  566. * carrier" indicates).
  567. *
  568. * The transition of the virtual carrier to low really doesn't
  569. * matter... it really only means "ignore carrier state", not
  570. * "make pretend that carrier is there".
  571. */
  572. if ((virt_carrier == 0) && ((ch->ch_flags & CH_CD) != 0)
  573. && (phys_carrier == 0)) {
  574. /*
  575. * When carrier drops:
  576. *
  577. * Drop carrier on all open units.
  578. *
  579. * Flush queues, waking up any task waiting in the
  580. * line discipline.
  581. *
  582. * Send a hangup to the control terminal.
  583. *
  584. * Enable all select calls.
  585. */
  586. if (waitqueue_active(&(ch->ch_flags_wait)))
  587. wake_up_interruptible(&ch->ch_flags_wait);
  588. }
  589. /*
  590. * Make sure that our cached values reflect the current reality.
  591. */
  592. if (virt_carrier == 1)
  593. ch->ch_flags |= CH_FCAR;
  594. else
  595. ch->ch_flags &= ~CH_FCAR;
  596. if (phys_carrier == 1)
  597. ch->ch_flags |= CH_CD;
  598. else
  599. ch->ch_flags &= ~CH_CD;
  600. }
  601. void jsm_check_queue_flow_control(struct jsm_channel *ch)
  602. {
  603. struct board_ops *bd_ops = ch->ch_bd->bd_ops;
  604. int qleft;
  605. /* Store how much space we have left in the queue */
  606. if ((qleft = ch->ch_r_tail - ch->ch_r_head - 1) < 0)
  607. qleft += RQUEUEMASK + 1;
  608. /*
  609. * Check to see if we should enforce flow control on our queue because
  610. * the ld (or user) isn't reading data out of our queue fast enuf.
  611. *
  612. * NOTE: This is done based on what the current flow control of the
  613. * port is set for.
  614. *
  615. * 1) HWFLOW (RTS) - Turn off the UART's Receive interrupt.
  616. * This will cause the UART's FIFO to back up, and force
  617. * the RTS signal to be dropped.
  618. * 2) SWFLOW (IXOFF) - Keep trying to send a stop character to
  619. * the other side, in hopes it will stop sending data to us.
  620. * 3) NONE - Nothing we can do. We will simply drop any extra data
  621. * that gets sent into us when the queue fills up.
  622. */
  623. if (qleft < 256) {
  624. /* HWFLOW */
  625. if (ch->ch_c_cflag & CRTSCTS) {
  626. if(!(ch->ch_flags & CH_RECEIVER_OFF)) {
  627. bd_ops->disable_receiver(ch);
  628. ch->ch_flags |= (CH_RECEIVER_OFF);
  629. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  630. "Internal queue hit hilevel mark (%d)! Turning off interrupts\n",
  631. qleft);
  632. }
  633. }
  634. /* SWFLOW */
  635. else if (ch->ch_c_iflag & IXOFF) {
  636. if (ch->ch_stops_sent <= MAX_STOPS_SENT) {
  637. bd_ops->send_stop_character(ch);
  638. ch->ch_stops_sent++;
  639. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  640. "Sending stop char! Times sent: %x\n",
  641. ch->ch_stops_sent);
  642. }
  643. }
  644. }
  645. /*
  646. * Check to see if we should unenforce flow control because
  647. * ld (or user) finally read enuf data out of our queue.
  648. *
  649. * NOTE: This is done based on what the current flow control of the
  650. * port is set for.
  651. *
  652. * 1) HWFLOW (RTS) - Turn back on the UART's Receive interrupt.
  653. * This will cause the UART's FIFO to raise RTS back up,
  654. * which will allow the other side to start sending data again.
  655. * 2) SWFLOW (IXOFF) - Send a start character to
  656. * the other side, so it will start sending data to us again.
  657. * 3) NONE - Do nothing. Since we didn't do anything to turn off the
  658. * other side, we don't need to do anything now.
  659. */
  660. if (qleft > (RQUEUESIZE / 2)) {
  661. /* HWFLOW */
  662. if (ch->ch_c_cflag & CRTSCTS) {
  663. if (ch->ch_flags & CH_RECEIVER_OFF) {
  664. bd_ops->enable_receiver(ch);
  665. ch->ch_flags &= ~(CH_RECEIVER_OFF);
  666. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  667. "Internal queue hit lowlevel mark (%d)! Turning on interrupts\n",
  668. qleft);
  669. }
  670. }
  671. /* SWFLOW */
  672. else if (ch->ch_c_iflag & IXOFF && ch->ch_stops_sent) {
  673. ch->ch_stops_sent = 0;
  674. bd_ops->send_start_character(ch);
  675. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  676. "Sending start char!\n");
  677. }
  678. }
  679. }