ar933x_uart.c 18 KB

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  1. /*
  2. * Atheros AR933X SoC built-in UART driver
  3. *
  4. * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published
  10. * by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/ioport.h>
  14. #include <linux/init.h>
  15. #include <linux/console.h>
  16. #include <linux/sysrq.h>
  17. #include <linux/delay.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/of.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/serial.h>
  25. #include <linux/slab.h>
  26. #include <linux/io.h>
  27. #include <linux/irq.h>
  28. #include <linux/clk.h>
  29. #include <asm/div64.h>
  30. #include <asm/mach-ath79/ar933x_uart.h>
  31. #define DRIVER_NAME "ar933x-uart"
  32. #define AR933X_UART_MAX_SCALE 0xff
  33. #define AR933X_UART_MAX_STEP 0xffff
  34. #define AR933X_UART_MIN_BAUD 300
  35. #define AR933X_UART_MAX_BAUD 3000000
  36. #define AR933X_DUMMY_STATUS_RD 0x01
  37. static struct uart_driver ar933x_uart_driver;
  38. struct ar933x_uart_port {
  39. struct uart_port port;
  40. unsigned int ier; /* shadow Interrupt Enable Register */
  41. unsigned int min_baud;
  42. unsigned int max_baud;
  43. struct clk *clk;
  44. };
  45. static inline bool ar933x_uart_console_enabled(void)
  46. {
  47. return config_enabled(CONFIG_SERIAL_AR933X_CONSOLE);
  48. }
  49. static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
  50. int offset)
  51. {
  52. return readl(up->port.membase + offset);
  53. }
  54. static inline void ar933x_uart_write(struct ar933x_uart_port *up,
  55. int offset, unsigned int value)
  56. {
  57. writel(value, up->port.membase + offset);
  58. }
  59. static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
  60. unsigned int offset,
  61. unsigned int mask,
  62. unsigned int val)
  63. {
  64. unsigned int t;
  65. t = ar933x_uart_read(up, offset);
  66. t &= ~mask;
  67. t |= val;
  68. ar933x_uart_write(up, offset, t);
  69. }
  70. static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
  71. unsigned int offset,
  72. unsigned int val)
  73. {
  74. ar933x_uart_rmw(up, offset, 0, val);
  75. }
  76. static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
  77. unsigned int offset,
  78. unsigned int val)
  79. {
  80. ar933x_uart_rmw(up, offset, val, 0);
  81. }
  82. static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
  83. {
  84. up->ier |= AR933X_UART_INT_TX_EMPTY;
  85. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  86. }
  87. static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
  88. {
  89. up->ier &= ~AR933X_UART_INT_TX_EMPTY;
  90. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  91. }
  92. static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
  93. {
  94. unsigned int rdata;
  95. rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
  96. rdata |= AR933X_UART_DATA_TX_CSR;
  97. ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
  98. }
  99. static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
  100. {
  101. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  102. unsigned long flags;
  103. unsigned int rdata;
  104. spin_lock_irqsave(&up->port.lock, flags);
  105. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  106. spin_unlock_irqrestore(&up->port.lock, flags);
  107. return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
  108. }
  109. static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
  110. {
  111. return TIOCM_CAR;
  112. }
  113. static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  114. {
  115. }
  116. static void ar933x_uart_start_tx(struct uart_port *port)
  117. {
  118. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  119. ar933x_uart_start_tx_interrupt(up);
  120. }
  121. static void ar933x_uart_stop_tx(struct uart_port *port)
  122. {
  123. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  124. ar933x_uart_stop_tx_interrupt(up);
  125. }
  126. static void ar933x_uart_stop_rx(struct uart_port *port)
  127. {
  128. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  129. up->ier &= ~AR933X_UART_INT_RX_VALID;
  130. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  131. }
  132. static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
  133. {
  134. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  135. unsigned long flags;
  136. spin_lock_irqsave(&up->port.lock, flags);
  137. if (break_state == -1)
  138. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  139. AR933X_UART_CS_TX_BREAK);
  140. else
  141. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  142. AR933X_UART_CS_TX_BREAK);
  143. spin_unlock_irqrestore(&up->port.lock, flags);
  144. }
  145. /*
  146. * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
  147. */
  148. static unsigned long ar933x_uart_get_baud(unsigned int clk,
  149. unsigned int scale,
  150. unsigned int step)
  151. {
  152. u64 t;
  153. u32 div;
  154. div = (2 << 16) * (scale + 1);
  155. t = clk;
  156. t *= step;
  157. t += (div / 2);
  158. do_div(t, div);
  159. return t;
  160. }
  161. static void ar933x_uart_get_scale_step(unsigned int clk,
  162. unsigned int baud,
  163. unsigned int *scale,
  164. unsigned int *step)
  165. {
  166. unsigned int tscale;
  167. long min_diff;
  168. *scale = 0;
  169. *step = 0;
  170. min_diff = baud;
  171. for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
  172. u64 tstep;
  173. int diff;
  174. tstep = baud * (tscale + 1);
  175. tstep *= (2 << 16);
  176. do_div(tstep, clk);
  177. if (tstep > AR933X_UART_MAX_STEP)
  178. break;
  179. diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
  180. if (diff < min_diff) {
  181. min_diff = diff;
  182. *scale = tscale;
  183. *step = tstep;
  184. }
  185. }
  186. }
  187. static void ar933x_uart_set_termios(struct uart_port *port,
  188. struct ktermios *new,
  189. struct ktermios *old)
  190. {
  191. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  192. unsigned int cs;
  193. unsigned long flags;
  194. unsigned int baud, scale, step;
  195. /* Only CS8 is supported */
  196. new->c_cflag &= ~CSIZE;
  197. new->c_cflag |= CS8;
  198. /* Only one stop bit is supported */
  199. new->c_cflag &= ~CSTOPB;
  200. cs = 0;
  201. if (new->c_cflag & PARENB) {
  202. if (!(new->c_cflag & PARODD))
  203. cs |= AR933X_UART_CS_PARITY_EVEN;
  204. else
  205. cs |= AR933X_UART_CS_PARITY_ODD;
  206. } else {
  207. cs |= AR933X_UART_CS_PARITY_NONE;
  208. }
  209. /* Mark/space parity is not supported */
  210. new->c_cflag &= ~CMSPAR;
  211. baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
  212. ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
  213. /*
  214. * Ok, we're now changing the port state. Do it with
  215. * interrupts disabled.
  216. */
  217. spin_lock_irqsave(&up->port.lock, flags);
  218. /* disable the UART */
  219. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  220. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
  221. /* Update the per-port timeout. */
  222. uart_update_timeout(port, new->c_cflag, baud);
  223. up->port.ignore_status_mask = 0;
  224. /* ignore all characters if CREAD is not set */
  225. if ((new->c_cflag & CREAD) == 0)
  226. up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
  227. ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
  228. scale << AR933X_UART_CLOCK_SCALE_S | step);
  229. /* setup configuration register */
  230. ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
  231. /* enable host interrupt */
  232. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  233. AR933X_UART_CS_HOST_INT_EN);
  234. /* reenable the UART */
  235. ar933x_uart_rmw(up, AR933X_UART_CS_REG,
  236. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
  237. AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
  238. spin_unlock_irqrestore(&up->port.lock, flags);
  239. if (tty_termios_baud_rate(new))
  240. tty_termios_encode_baud_rate(new, baud, baud);
  241. }
  242. static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
  243. {
  244. struct tty_port *port = &up->port.state->port;
  245. int max_count = 256;
  246. do {
  247. unsigned int rdata;
  248. unsigned char ch;
  249. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  250. if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
  251. break;
  252. /* remove the character from the FIFO */
  253. ar933x_uart_write(up, AR933X_UART_DATA_REG,
  254. AR933X_UART_DATA_RX_CSR);
  255. up->port.icount.rx++;
  256. ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
  257. if (uart_handle_sysrq_char(&up->port, ch))
  258. continue;
  259. if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
  260. tty_insert_flip_char(port, ch, TTY_NORMAL);
  261. } while (max_count-- > 0);
  262. spin_unlock(&up->port.lock);
  263. tty_flip_buffer_push(port);
  264. spin_lock(&up->port.lock);
  265. }
  266. static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
  267. {
  268. struct circ_buf *xmit = &up->port.state->xmit;
  269. int count;
  270. if (uart_tx_stopped(&up->port))
  271. return;
  272. count = up->port.fifosize;
  273. do {
  274. unsigned int rdata;
  275. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  276. if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
  277. break;
  278. if (up->port.x_char) {
  279. ar933x_uart_putc(up, up->port.x_char);
  280. up->port.icount.tx++;
  281. up->port.x_char = 0;
  282. continue;
  283. }
  284. if (uart_circ_empty(xmit))
  285. break;
  286. ar933x_uart_putc(up, xmit->buf[xmit->tail]);
  287. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  288. up->port.icount.tx++;
  289. } while (--count > 0);
  290. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  291. uart_write_wakeup(&up->port);
  292. if (!uart_circ_empty(xmit))
  293. ar933x_uart_start_tx_interrupt(up);
  294. }
  295. static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
  296. {
  297. struct ar933x_uart_port *up = dev_id;
  298. unsigned int status;
  299. status = ar933x_uart_read(up, AR933X_UART_CS_REG);
  300. if ((status & AR933X_UART_CS_HOST_INT) == 0)
  301. return IRQ_NONE;
  302. spin_lock(&up->port.lock);
  303. status = ar933x_uart_read(up, AR933X_UART_INT_REG);
  304. status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  305. if (status & AR933X_UART_INT_RX_VALID) {
  306. ar933x_uart_write(up, AR933X_UART_INT_REG,
  307. AR933X_UART_INT_RX_VALID);
  308. ar933x_uart_rx_chars(up);
  309. }
  310. if (status & AR933X_UART_INT_TX_EMPTY) {
  311. ar933x_uart_write(up, AR933X_UART_INT_REG,
  312. AR933X_UART_INT_TX_EMPTY);
  313. ar933x_uart_stop_tx_interrupt(up);
  314. ar933x_uart_tx_chars(up);
  315. }
  316. spin_unlock(&up->port.lock);
  317. return IRQ_HANDLED;
  318. }
  319. static int ar933x_uart_startup(struct uart_port *port)
  320. {
  321. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  322. unsigned long flags;
  323. int ret;
  324. ret = request_irq(up->port.irq, ar933x_uart_interrupt,
  325. up->port.irqflags, dev_name(up->port.dev), up);
  326. if (ret)
  327. return ret;
  328. spin_lock_irqsave(&up->port.lock, flags);
  329. /* Enable HOST interrupts */
  330. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  331. AR933X_UART_CS_HOST_INT_EN);
  332. /* Enable RX interrupts */
  333. up->ier = AR933X_UART_INT_RX_VALID;
  334. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  335. spin_unlock_irqrestore(&up->port.lock, flags);
  336. return 0;
  337. }
  338. static void ar933x_uart_shutdown(struct uart_port *port)
  339. {
  340. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  341. /* Disable all interrupts */
  342. up->ier = 0;
  343. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  344. /* Disable break condition */
  345. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  346. AR933X_UART_CS_TX_BREAK);
  347. free_irq(up->port.irq, up);
  348. }
  349. static const char *ar933x_uart_type(struct uart_port *port)
  350. {
  351. return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
  352. }
  353. static void ar933x_uart_release_port(struct uart_port *port)
  354. {
  355. /* Nothing to release ... */
  356. }
  357. static int ar933x_uart_request_port(struct uart_port *port)
  358. {
  359. /* UARTs always present */
  360. return 0;
  361. }
  362. static void ar933x_uart_config_port(struct uart_port *port, int flags)
  363. {
  364. if (flags & UART_CONFIG_TYPE)
  365. port->type = PORT_AR933X;
  366. }
  367. static int ar933x_uart_verify_port(struct uart_port *port,
  368. struct serial_struct *ser)
  369. {
  370. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  371. if (ser->type != PORT_UNKNOWN &&
  372. ser->type != PORT_AR933X)
  373. return -EINVAL;
  374. if (ser->irq < 0 || ser->irq >= NR_IRQS)
  375. return -EINVAL;
  376. if (ser->baud_base < up->min_baud ||
  377. ser->baud_base > up->max_baud)
  378. return -EINVAL;
  379. return 0;
  380. }
  381. static struct uart_ops ar933x_uart_ops = {
  382. .tx_empty = ar933x_uart_tx_empty,
  383. .set_mctrl = ar933x_uart_set_mctrl,
  384. .get_mctrl = ar933x_uart_get_mctrl,
  385. .stop_tx = ar933x_uart_stop_tx,
  386. .start_tx = ar933x_uart_start_tx,
  387. .stop_rx = ar933x_uart_stop_rx,
  388. .break_ctl = ar933x_uart_break_ctl,
  389. .startup = ar933x_uart_startup,
  390. .shutdown = ar933x_uart_shutdown,
  391. .set_termios = ar933x_uart_set_termios,
  392. .type = ar933x_uart_type,
  393. .release_port = ar933x_uart_release_port,
  394. .request_port = ar933x_uart_request_port,
  395. .config_port = ar933x_uart_config_port,
  396. .verify_port = ar933x_uart_verify_port,
  397. };
  398. static struct ar933x_uart_port *
  399. ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
  400. static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
  401. {
  402. unsigned int status;
  403. unsigned int timeout = 60000;
  404. /* Wait up to 60ms for the character(s) to be sent. */
  405. do {
  406. status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  407. if (--timeout == 0)
  408. break;
  409. udelay(1);
  410. } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
  411. }
  412. static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
  413. {
  414. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  415. ar933x_uart_wait_xmitr(up);
  416. ar933x_uart_putc(up, ch);
  417. }
  418. static void ar933x_uart_console_write(struct console *co, const char *s,
  419. unsigned int count)
  420. {
  421. struct ar933x_uart_port *up = ar933x_console_ports[co->index];
  422. unsigned long flags;
  423. unsigned int int_en;
  424. int locked = 1;
  425. local_irq_save(flags);
  426. if (up->port.sysrq)
  427. locked = 0;
  428. else if (oops_in_progress)
  429. locked = spin_trylock(&up->port.lock);
  430. else
  431. spin_lock(&up->port.lock);
  432. /*
  433. * First save the IER then disable the interrupts
  434. */
  435. int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  436. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
  437. uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
  438. /*
  439. * Finally, wait for transmitter to become empty
  440. * and restore the IER
  441. */
  442. ar933x_uart_wait_xmitr(up);
  443. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
  444. ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
  445. if (locked)
  446. spin_unlock(&up->port.lock);
  447. local_irq_restore(flags);
  448. }
  449. static int ar933x_uart_console_setup(struct console *co, char *options)
  450. {
  451. struct ar933x_uart_port *up;
  452. int baud = 115200;
  453. int bits = 8;
  454. int parity = 'n';
  455. int flow = 'n';
  456. if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
  457. return -EINVAL;
  458. up = ar933x_console_ports[co->index];
  459. if (!up)
  460. return -ENODEV;
  461. if (options)
  462. uart_parse_options(options, &baud, &parity, &bits, &flow);
  463. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  464. }
  465. static struct console ar933x_uart_console = {
  466. .name = "ttyATH",
  467. .write = ar933x_uart_console_write,
  468. .device = uart_console_device,
  469. .setup = ar933x_uart_console_setup,
  470. .flags = CON_PRINTBUFFER,
  471. .index = -1,
  472. .data = &ar933x_uart_driver,
  473. };
  474. static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
  475. {
  476. if (!ar933x_uart_console_enabled())
  477. return;
  478. ar933x_console_ports[up->port.line] = up;
  479. }
  480. static struct uart_driver ar933x_uart_driver = {
  481. .owner = THIS_MODULE,
  482. .driver_name = DRIVER_NAME,
  483. .dev_name = "ttyATH",
  484. .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
  485. .cons = NULL, /* filled in runtime */
  486. };
  487. static int ar933x_uart_probe(struct platform_device *pdev)
  488. {
  489. struct ar933x_uart_port *up;
  490. struct uart_port *port;
  491. struct resource *mem_res;
  492. struct resource *irq_res;
  493. struct device_node *np;
  494. unsigned int baud;
  495. int id;
  496. int ret;
  497. np = pdev->dev.of_node;
  498. if (config_enabled(CONFIG_OF) && np) {
  499. id = of_alias_get_id(np, "serial");
  500. if (id < 0) {
  501. dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
  502. id);
  503. return id;
  504. }
  505. } else {
  506. id = pdev->id;
  507. if (id == -1)
  508. id = 0;
  509. }
  510. if (id > CONFIG_SERIAL_AR933X_NR_UARTS)
  511. return -EINVAL;
  512. irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  513. if (!irq_res) {
  514. dev_err(&pdev->dev, "no IRQ resource\n");
  515. return -EINVAL;
  516. }
  517. up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
  518. GFP_KERNEL);
  519. if (!up)
  520. return -ENOMEM;
  521. up->clk = devm_clk_get(&pdev->dev, "uart");
  522. if (IS_ERR(up->clk)) {
  523. dev_err(&pdev->dev, "unable to get UART clock\n");
  524. return PTR_ERR(up->clk);
  525. }
  526. port = &up->port;
  527. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  528. port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
  529. if (IS_ERR(port->membase))
  530. return PTR_ERR(port->membase);
  531. ret = clk_prepare_enable(up->clk);
  532. if (ret)
  533. return ret;
  534. port->uartclk = clk_get_rate(up->clk);
  535. if (!port->uartclk) {
  536. ret = -EINVAL;
  537. goto err_disable_clk;
  538. }
  539. port->mapbase = mem_res->start;
  540. port->line = id;
  541. port->irq = irq_res->start;
  542. port->dev = &pdev->dev;
  543. port->type = PORT_AR933X;
  544. port->iotype = UPIO_MEM32;
  545. port->regshift = 2;
  546. port->fifosize = AR933X_UART_FIFO_SIZE;
  547. port->ops = &ar933x_uart_ops;
  548. baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
  549. up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
  550. baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
  551. up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
  552. ar933x_uart_add_console_port(up);
  553. ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
  554. if (ret)
  555. goto err_disable_clk;
  556. platform_set_drvdata(pdev, up);
  557. return 0;
  558. err_disable_clk:
  559. clk_disable_unprepare(up->clk);
  560. return ret;
  561. }
  562. static int ar933x_uart_remove(struct platform_device *pdev)
  563. {
  564. struct ar933x_uart_port *up;
  565. up = platform_get_drvdata(pdev);
  566. if (up) {
  567. uart_remove_one_port(&ar933x_uart_driver, &up->port);
  568. clk_disable_unprepare(up->clk);
  569. }
  570. return 0;
  571. }
  572. #ifdef CONFIG_OF
  573. static const struct of_device_id ar933x_uart_of_ids[] = {
  574. { .compatible = "qca,ar9330-uart" },
  575. {},
  576. };
  577. MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
  578. #endif
  579. static struct platform_driver ar933x_uart_platform_driver = {
  580. .probe = ar933x_uart_probe,
  581. .remove = ar933x_uart_remove,
  582. .driver = {
  583. .name = DRIVER_NAME,
  584. .owner = THIS_MODULE,
  585. .of_match_table = of_match_ptr(ar933x_uart_of_ids),
  586. },
  587. };
  588. static int __init ar933x_uart_init(void)
  589. {
  590. int ret;
  591. if (ar933x_uart_console_enabled())
  592. ar933x_uart_driver.cons = &ar933x_uart_console;
  593. ret = uart_register_driver(&ar933x_uart_driver);
  594. if (ret)
  595. goto err_out;
  596. ret = platform_driver_register(&ar933x_uart_platform_driver);
  597. if (ret)
  598. goto err_unregister_uart_driver;
  599. return 0;
  600. err_unregister_uart_driver:
  601. uart_unregister_driver(&ar933x_uart_driver);
  602. err_out:
  603. return ret;
  604. }
  605. static void __exit ar933x_uart_exit(void)
  606. {
  607. platform_driver_unregister(&ar933x_uart_platform_driver);
  608. uart_unregister_driver(&ar933x_uart_driver);
  609. }
  610. module_init(ar933x_uart_init);
  611. module_exit(ar933x_uart_exit);
  612. MODULE_DESCRIPTION("Atheros AR933X UART driver");
  613. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
  614. MODULE_LICENSE("GPL v2");
  615. MODULE_ALIAS("platform:" DRIVER_NAME);