main.c 69 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586
  1. /*
  2. * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/init.h>
  35. #include <linux/slab.h>
  36. #include <linux/errno.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/inetdevice.h>
  39. #include <linux/rtnetlink.h>
  40. #include <linux/if_vlan.h>
  41. #include <net/ipv6.h>
  42. #include <net/addrconf.h>
  43. #include <rdma/ib_smi.h>
  44. #include <rdma/ib_user_verbs.h>
  45. #include <rdma/ib_addr.h>
  46. #include <linux/mlx4/driver.h>
  47. #include <linux/mlx4/cmd.h>
  48. #include <linux/mlx4/qp.h>
  49. #include "mlx4_ib.h"
  50. #include "user.h"
  51. #define DRV_NAME MLX4_IB_DRV_NAME
  52. #define DRV_VERSION "2.2-1"
  53. #define DRV_RELDATE "Feb 2014"
  54. #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
  55. #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
  56. MODULE_AUTHOR("Roland Dreier");
  57. MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
  58. MODULE_LICENSE("Dual BSD/GPL");
  59. MODULE_VERSION(DRV_VERSION);
  60. int mlx4_ib_sm_guid_assign = 1;
  61. module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
  62. MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 1)");
  63. static const char mlx4_ib_version[] =
  64. DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
  65. DRV_VERSION " (" DRV_RELDATE ")\n";
  66. struct update_gid_work {
  67. struct work_struct work;
  68. union ib_gid gids[128];
  69. struct mlx4_ib_dev *dev;
  70. int port;
  71. };
  72. static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
  73. static struct workqueue_struct *wq;
  74. static void init_query_mad(struct ib_smp *mad)
  75. {
  76. mad->base_version = 1;
  77. mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  78. mad->class_version = 1;
  79. mad->method = IB_MGMT_METHOD_GET;
  80. }
  81. static union ib_gid zgid;
  82. static int check_flow_steering_support(struct mlx4_dev *dev)
  83. {
  84. int eth_num_ports = 0;
  85. int ib_num_ports = 0;
  86. int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
  87. if (dmfs) {
  88. int i;
  89. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
  90. eth_num_ports++;
  91. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  92. ib_num_ports++;
  93. dmfs &= (!ib_num_ports ||
  94. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
  95. (!eth_num_ports ||
  96. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
  97. if (ib_num_ports && mlx4_is_mfunc(dev)) {
  98. pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
  99. dmfs = 0;
  100. }
  101. }
  102. return dmfs;
  103. }
  104. static int mlx4_ib_query_device(struct ib_device *ibdev,
  105. struct ib_device_attr *props)
  106. {
  107. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  108. struct ib_smp *in_mad = NULL;
  109. struct ib_smp *out_mad = NULL;
  110. int err = -ENOMEM;
  111. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  112. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  113. if (!in_mad || !out_mad)
  114. goto out;
  115. init_query_mad(in_mad);
  116. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  117. err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
  118. 1, NULL, NULL, in_mad, out_mad);
  119. if (err)
  120. goto out;
  121. memset(props, 0, sizeof *props);
  122. props->fw_ver = dev->dev->caps.fw_ver;
  123. props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  124. IB_DEVICE_PORT_ACTIVE_EVENT |
  125. IB_DEVICE_SYS_IMAGE_GUID |
  126. IB_DEVICE_RC_RNR_NAK_GEN |
  127. IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
  128. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
  129. props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  130. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
  131. props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  132. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM)
  133. props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  134. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
  135. props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
  136. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
  137. props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
  138. if (dev->dev->caps.max_gso_sz && dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)
  139. props->device_cap_flags |= IB_DEVICE_UD_TSO;
  140. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
  141. props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
  142. if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
  143. (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
  144. (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
  145. props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
  146. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
  147. props->device_cap_flags |= IB_DEVICE_XRC;
  148. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
  149. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
  150. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
  151. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
  152. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
  153. else
  154. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
  155. if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
  156. props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
  157. }
  158. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  159. 0xffffff;
  160. props->vendor_part_id = dev->dev->pdev->device;
  161. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  162. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  163. props->max_mr_size = ~0ull;
  164. props->page_size_cap = dev->dev->caps.page_size_cap;
  165. props->max_qp = dev->dev->quotas.qp;
  166. props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
  167. props->max_sge = min(dev->dev->caps.max_sq_sg,
  168. dev->dev->caps.max_rq_sg);
  169. props->max_cq = dev->dev->quotas.cq;
  170. props->max_cqe = dev->dev->caps.max_cqes;
  171. props->max_mr = dev->dev->quotas.mpt;
  172. props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
  173. props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
  174. props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
  175. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  176. props->max_srq = dev->dev->quotas.srq;
  177. props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
  178. props->max_srq_sge = dev->dev->caps.max_srq_sge;
  179. props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
  180. props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
  181. props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
  182. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  183. props->masked_atomic_cap = props->atomic_cap;
  184. props->max_pkeys = dev->dev->caps.pkey_table_len[1];
  185. props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
  186. props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
  187. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  188. props->max_mcast_grp;
  189. props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
  190. out:
  191. kfree(in_mad);
  192. kfree(out_mad);
  193. return err;
  194. }
  195. static enum rdma_link_layer
  196. mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
  197. {
  198. struct mlx4_dev *dev = to_mdev(device)->dev;
  199. return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
  200. IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
  201. }
  202. static int ib_link_query_port(struct ib_device *ibdev, u8 port,
  203. struct ib_port_attr *props, int netw_view)
  204. {
  205. struct ib_smp *in_mad = NULL;
  206. struct ib_smp *out_mad = NULL;
  207. int ext_active_speed;
  208. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  209. int err = -ENOMEM;
  210. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  211. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  212. if (!in_mad || !out_mad)
  213. goto out;
  214. init_query_mad(in_mad);
  215. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  216. in_mad->attr_mod = cpu_to_be32(port);
  217. if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
  218. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  219. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
  220. in_mad, out_mad);
  221. if (err)
  222. goto out;
  223. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  224. props->lmc = out_mad->data[34] & 0x7;
  225. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  226. props->sm_sl = out_mad->data[36] & 0xf;
  227. props->state = out_mad->data[32] & 0xf;
  228. props->phys_state = out_mad->data[33] >> 4;
  229. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  230. if (netw_view)
  231. props->gid_tbl_len = out_mad->data[50];
  232. else
  233. props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
  234. props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
  235. props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
  236. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  237. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  238. props->active_width = out_mad->data[31] & 0xf;
  239. props->active_speed = out_mad->data[35] >> 4;
  240. props->max_mtu = out_mad->data[41] & 0xf;
  241. props->active_mtu = out_mad->data[36] >> 4;
  242. props->subnet_timeout = out_mad->data[51] & 0x1f;
  243. props->max_vl_num = out_mad->data[37] >> 4;
  244. props->init_type_reply = out_mad->data[41] >> 4;
  245. /* Check if extended speeds (EDR/FDR/...) are supported */
  246. if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
  247. ext_active_speed = out_mad->data[62] >> 4;
  248. switch (ext_active_speed) {
  249. case 1:
  250. props->active_speed = IB_SPEED_FDR;
  251. break;
  252. case 2:
  253. props->active_speed = IB_SPEED_EDR;
  254. break;
  255. }
  256. }
  257. /* If reported active speed is QDR, check if is FDR-10 */
  258. if (props->active_speed == IB_SPEED_QDR) {
  259. init_query_mad(in_mad);
  260. in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
  261. in_mad->attr_mod = cpu_to_be32(port);
  262. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
  263. NULL, NULL, in_mad, out_mad);
  264. if (err)
  265. goto out;
  266. /* Checking LinkSpeedActive for FDR-10 */
  267. if (out_mad->data[15] & 0x1)
  268. props->active_speed = IB_SPEED_FDR10;
  269. }
  270. /* Avoid wrong speed value returned by FW if the IB link is down. */
  271. if (props->state == IB_PORT_DOWN)
  272. props->active_speed = IB_SPEED_SDR;
  273. out:
  274. kfree(in_mad);
  275. kfree(out_mad);
  276. return err;
  277. }
  278. static u8 state_to_phys_state(enum ib_port_state state)
  279. {
  280. return state == IB_PORT_ACTIVE ? 5 : 3;
  281. }
  282. static int eth_link_query_port(struct ib_device *ibdev, u8 port,
  283. struct ib_port_attr *props, int netw_view)
  284. {
  285. struct mlx4_ib_dev *mdev = to_mdev(ibdev);
  286. struct mlx4_ib_iboe *iboe = &mdev->iboe;
  287. struct net_device *ndev;
  288. enum ib_mtu tmp;
  289. struct mlx4_cmd_mailbox *mailbox;
  290. int err = 0;
  291. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  292. if (IS_ERR(mailbox))
  293. return PTR_ERR(mailbox);
  294. err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
  295. MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
  296. MLX4_CMD_WRAPPED);
  297. if (err)
  298. goto out;
  299. props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
  300. IB_WIDTH_4X : IB_WIDTH_1X;
  301. props->active_speed = IB_SPEED_QDR;
  302. props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
  303. props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
  304. props->max_msg_sz = mdev->dev->caps.max_msg_sz;
  305. props->pkey_tbl_len = 1;
  306. props->max_mtu = IB_MTU_4096;
  307. props->max_vl_num = 2;
  308. props->state = IB_PORT_DOWN;
  309. props->phys_state = state_to_phys_state(props->state);
  310. props->active_mtu = IB_MTU_256;
  311. spin_lock(&iboe->lock);
  312. ndev = iboe->netdevs[port - 1];
  313. if (!ndev)
  314. goto out_unlock;
  315. tmp = iboe_get_mtu(ndev->mtu);
  316. props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
  317. props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
  318. IB_PORT_ACTIVE : IB_PORT_DOWN;
  319. props->phys_state = state_to_phys_state(props->state);
  320. out_unlock:
  321. spin_unlock(&iboe->lock);
  322. out:
  323. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  324. return err;
  325. }
  326. int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  327. struct ib_port_attr *props, int netw_view)
  328. {
  329. int err;
  330. memset(props, 0, sizeof *props);
  331. err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
  332. ib_link_query_port(ibdev, port, props, netw_view) :
  333. eth_link_query_port(ibdev, port, props, netw_view);
  334. return err;
  335. }
  336. static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  337. struct ib_port_attr *props)
  338. {
  339. /* returns host view */
  340. return __mlx4_ib_query_port(ibdev, port, props, 0);
  341. }
  342. int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  343. union ib_gid *gid, int netw_view)
  344. {
  345. struct ib_smp *in_mad = NULL;
  346. struct ib_smp *out_mad = NULL;
  347. int err = -ENOMEM;
  348. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  349. int clear = 0;
  350. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  351. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  352. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  353. if (!in_mad || !out_mad)
  354. goto out;
  355. init_query_mad(in_mad);
  356. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  357. in_mad->attr_mod = cpu_to_be32(port);
  358. if (mlx4_is_mfunc(dev->dev) && netw_view)
  359. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  360. err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
  361. if (err)
  362. goto out;
  363. memcpy(gid->raw, out_mad->data + 8, 8);
  364. if (mlx4_is_mfunc(dev->dev) && !netw_view) {
  365. if (index) {
  366. /* For any index > 0, return the null guid */
  367. err = 0;
  368. clear = 1;
  369. goto out;
  370. }
  371. }
  372. init_query_mad(in_mad);
  373. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  374. in_mad->attr_mod = cpu_to_be32(index / 8);
  375. err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
  376. NULL, NULL, in_mad, out_mad);
  377. if (err)
  378. goto out;
  379. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  380. out:
  381. if (clear)
  382. memset(gid->raw + 8, 0, 8);
  383. kfree(in_mad);
  384. kfree(out_mad);
  385. return err;
  386. }
  387. static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
  388. union ib_gid *gid)
  389. {
  390. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  391. *gid = dev->iboe.gid_table[port - 1][index];
  392. return 0;
  393. }
  394. static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  395. union ib_gid *gid)
  396. {
  397. if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
  398. return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
  399. else
  400. return iboe_query_gid(ibdev, port, index, gid);
  401. }
  402. int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  403. u16 *pkey, int netw_view)
  404. {
  405. struct ib_smp *in_mad = NULL;
  406. struct ib_smp *out_mad = NULL;
  407. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  408. int err = -ENOMEM;
  409. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  410. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  411. if (!in_mad || !out_mad)
  412. goto out;
  413. init_query_mad(in_mad);
  414. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  415. in_mad->attr_mod = cpu_to_be32(index / 32);
  416. if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
  417. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  418. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
  419. in_mad, out_mad);
  420. if (err)
  421. goto out;
  422. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  423. out:
  424. kfree(in_mad);
  425. kfree(out_mad);
  426. return err;
  427. }
  428. static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
  429. {
  430. return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
  431. }
  432. static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
  433. struct ib_device_modify *props)
  434. {
  435. struct mlx4_cmd_mailbox *mailbox;
  436. unsigned long flags;
  437. if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
  438. return -EOPNOTSUPP;
  439. if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
  440. return 0;
  441. if (mlx4_is_slave(to_mdev(ibdev)->dev))
  442. return -EOPNOTSUPP;
  443. spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
  444. memcpy(ibdev->node_desc, props->node_desc, 64);
  445. spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
  446. /*
  447. * If possible, pass node desc to FW, so it can generate
  448. * a 144 trap. If cmd fails, just ignore.
  449. */
  450. mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
  451. if (IS_ERR(mailbox))
  452. return 0;
  453. memcpy(mailbox->buf, props->node_desc, 64);
  454. mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
  455. MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
  456. mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
  457. return 0;
  458. }
  459. static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
  460. u32 cap_mask)
  461. {
  462. struct mlx4_cmd_mailbox *mailbox;
  463. int err;
  464. mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
  465. if (IS_ERR(mailbox))
  466. return PTR_ERR(mailbox);
  467. if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
  468. *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
  469. ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
  470. } else {
  471. ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
  472. ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
  473. }
  474. err = mlx4_cmd(dev->dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
  475. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
  476. mlx4_free_cmd_mailbox(dev->dev, mailbox);
  477. return err;
  478. }
  479. static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
  480. struct ib_port_modify *props)
  481. {
  482. struct mlx4_ib_dev *mdev = to_mdev(ibdev);
  483. u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
  484. struct ib_port_attr attr;
  485. u32 cap_mask;
  486. int err;
  487. /* return OK if this is RoCE. CM calls ib_modify_port() regardless
  488. * of whether port link layer is ETH or IB. For ETH ports, qkey
  489. * violations and port capabilities are not meaningful.
  490. */
  491. if (is_eth)
  492. return 0;
  493. mutex_lock(&mdev->cap_mask_mutex);
  494. err = mlx4_ib_query_port(ibdev, port, &attr);
  495. if (err)
  496. goto out;
  497. cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  498. ~props->clr_port_cap_mask;
  499. err = mlx4_ib_SET_PORT(mdev, port,
  500. !!(mask & IB_PORT_RESET_QKEY_CNTR),
  501. cap_mask);
  502. out:
  503. mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
  504. return err;
  505. }
  506. static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
  507. struct ib_udata *udata)
  508. {
  509. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  510. struct mlx4_ib_ucontext *context;
  511. struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
  512. struct mlx4_ib_alloc_ucontext_resp resp;
  513. int err;
  514. if (!dev->ib_active)
  515. return ERR_PTR(-EAGAIN);
  516. if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
  517. resp_v3.qp_tab_size = dev->dev->caps.num_qps;
  518. resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
  519. resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
  520. } else {
  521. resp.dev_caps = dev->dev->caps.userspace_caps;
  522. resp.qp_tab_size = dev->dev->caps.num_qps;
  523. resp.bf_reg_size = dev->dev->caps.bf_reg_size;
  524. resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
  525. resp.cqe_size = dev->dev->caps.cqe_size;
  526. }
  527. context = kmalloc(sizeof *context, GFP_KERNEL);
  528. if (!context)
  529. return ERR_PTR(-ENOMEM);
  530. err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
  531. if (err) {
  532. kfree(context);
  533. return ERR_PTR(err);
  534. }
  535. INIT_LIST_HEAD(&context->db_page_list);
  536. mutex_init(&context->db_page_mutex);
  537. if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
  538. err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
  539. else
  540. err = ib_copy_to_udata(udata, &resp, sizeof(resp));
  541. if (err) {
  542. mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
  543. kfree(context);
  544. return ERR_PTR(-EFAULT);
  545. }
  546. return &context->ibucontext;
  547. }
  548. static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
  549. {
  550. struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
  551. mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
  552. kfree(context);
  553. return 0;
  554. }
  555. static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  556. {
  557. struct mlx4_ib_dev *dev = to_mdev(context->device);
  558. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  559. return -EINVAL;
  560. if (vma->vm_pgoff == 0) {
  561. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  562. if (io_remap_pfn_range(vma, vma->vm_start,
  563. to_mucontext(context)->uar.pfn,
  564. PAGE_SIZE, vma->vm_page_prot))
  565. return -EAGAIN;
  566. } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
  567. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  568. if (io_remap_pfn_range(vma, vma->vm_start,
  569. to_mucontext(context)->uar.pfn +
  570. dev->dev->caps.num_uars,
  571. PAGE_SIZE, vma->vm_page_prot))
  572. return -EAGAIN;
  573. } else
  574. return -EINVAL;
  575. return 0;
  576. }
  577. static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
  578. struct ib_ucontext *context,
  579. struct ib_udata *udata)
  580. {
  581. struct mlx4_ib_pd *pd;
  582. int err;
  583. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  584. if (!pd)
  585. return ERR_PTR(-ENOMEM);
  586. err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
  587. if (err) {
  588. kfree(pd);
  589. return ERR_PTR(err);
  590. }
  591. if (context)
  592. if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
  593. mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
  594. kfree(pd);
  595. return ERR_PTR(-EFAULT);
  596. }
  597. return &pd->ibpd;
  598. }
  599. static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
  600. {
  601. mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
  602. kfree(pd);
  603. return 0;
  604. }
  605. static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
  606. struct ib_ucontext *context,
  607. struct ib_udata *udata)
  608. {
  609. struct mlx4_ib_xrcd *xrcd;
  610. int err;
  611. if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
  612. return ERR_PTR(-ENOSYS);
  613. xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
  614. if (!xrcd)
  615. return ERR_PTR(-ENOMEM);
  616. err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
  617. if (err)
  618. goto err1;
  619. xrcd->pd = ib_alloc_pd(ibdev);
  620. if (IS_ERR(xrcd->pd)) {
  621. err = PTR_ERR(xrcd->pd);
  622. goto err2;
  623. }
  624. xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
  625. if (IS_ERR(xrcd->cq)) {
  626. err = PTR_ERR(xrcd->cq);
  627. goto err3;
  628. }
  629. return &xrcd->ibxrcd;
  630. err3:
  631. ib_dealloc_pd(xrcd->pd);
  632. err2:
  633. mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
  634. err1:
  635. kfree(xrcd);
  636. return ERR_PTR(err);
  637. }
  638. static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
  639. {
  640. ib_destroy_cq(to_mxrcd(xrcd)->cq);
  641. ib_dealloc_pd(to_mxrcd(xrcd)->pd);
  642. mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
  643. kfree(xrcd);
  644. return 0;
  645. }
  646. static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
  647. {
  648. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  649. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  650. struct mlx4_ib_gid_entry *ge;
  651. ge = kzalloc(sizeof *ge, GFP_KERNEL);
  652. if (!ge)
  653. return -ENOMEM;
  654. ge->gid = *gid;
  655. if (mlx4_ib_add_mc(mdev, mqp, gid)) {
  656. ge->port = mqp->port;
  657. ge->added = 1;
  658. }
  659. mutex_lock(&mqp->mutex);
  660. list_add_tail(&ge->list, &mqp->gid_list);
  661. mutex_unlock(&mqp->mutex);
  662. return 0;
  663. }
  664. int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  665. union ib_gid *gid)
  666. {
  667. struct net_device *ndev;
  668. int ret = 0;
  669. if (!mqp->port)
  670. return 0;
  671. spin_lock(&mdev->iboe.lock);
  672. ndev = mdev->iboe.netdevs[mqp->port - 1];
  673. if (ndev)
  674. dev_hold(ndev);
  675. spin_unlock(&mdev->iboe.lock);
  676. if (ndev) {
  677. ret = 1;
  678. dev_put(ndev);
  679. }
  680. return ret;
  681. }
  682. struct mlx4_ib_steering {
  683. struct list_head list;
  684. u64 reg_id;
  685. union ib_gid gid;
  686. };
  687. static int parse_flow_attr(struct mlx4_dev *dev,
  688. u32 qp_num,
  689. union ib_flow_spec *ib_spec,
  690. struct _rule_hw *mlx4_spec)
  691. {
  692. enum mlx4_net_trans_rule_id type;
  693. switch (ib_spec->type) {
  694. case IB_FLOW_SPEC_ETH:
  695. type = MLX4_NET_TRANS_RULE_ID_ETH;
  696. memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
  697. ETH_ALEN);
  698. memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
  699. ETH_ALEN);
  700. mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
  701. mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
  702. break;
  703. case IB_FLOW_SPEC_IB:
  704. type = MLX4_NET_TRANS_RULE_ID_IB;
  705. mlx4_spec->ib.l3_qpn =
  706. cpu_to_be32(qp_num);
  707. mlx4_spec->ib.qpn_mask =
  708. cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
  709. break;
  710. case IB_FLOW_SPEC_IPV4:
  711. type = MLX4_NET_TRANS_RULE_ID_IPV4;
  712. mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
  713. mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
  714. mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
  715. mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
  716. break;
  717. case IB_FLOW_SPEC_TCP:
  718. case IB_FLOW_SPEC_UDP:
  719. type = ib_spec->type == IB_FLOW_SPEC_TCP ?
  720. MLX4_NET_TRANS_RULE_ID_TCP :
  721. MLX4_NET_TRANS_RULE_ID_UDP;
  722. mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
  723. mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
  724. mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
  725. mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
  726. break;
  727. default:
  728. return -EINVAL;
  729. }
  730. if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
  731. mlx4_hw_rule_sz(dev, type) < 0)
  732. return -EINVAL;
  733. mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
  734. mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
  735. return mlx4_hw_rule_sz(dev, type);
  736. }
  737. struct default_rules {
  738. __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
  739. __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
  740. __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
  741. __u8 link_layer;
  742. };
  743. static const struct default_rules default_table[] = {
  744. {
  745. .mandatory_fields = {IB_FLOW_SPEC_IPV4},
  746. .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
  747. .rules_create_list = {IB_FLOW_SPEC_IB},
  748. .link_layer = IB_LINK_LAYER_INFINIBAND
  749. }
  750. };
  751. static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
  752. struct ib_flow_attr *flow_attr)
  753. {
  754. int i, j, k;
  755. void *ib_flow;
  756. const struct default_rules *pdefault_rules = default_table;
  757. u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
  758. for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
  759. __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
  760. memset(&field_types, 0, sizeof(field_types));
  761. if (link_layer != pdefault_rules->link_layer)
  762. continue;
  763. ib_flow = flow_attr + 1;
  764. /* we assume the specs are sorted */
  765. for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
  766. j < flow_attr->num_of_specs; k++) {
  767. union ib_flow_spec *current_flow =
  768. (union ib_flow_spec *)ib_flow;
  769. /* same layer but different type */
  770. if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
  771. (pdefault_rules->mandatory_fields[k] &
  772. IB_FLOW_SPEC_LAYER_MASK)) &&
  773. (current_flow->type !=
  774. pdefault_rules->mandatory_fields[k]))
  775. goto out;
  776. /* same layer, try match next one */
  777. if (current_flow->type ==
  778. pdefault_rules->mandatory_fields[k]) {
  779. j++;
  780. ib_flow +=
  781. ((union ib_flow_spec *)ib_flow)->size;
  782. }
  783. }
  784. ib_flow = flow_attr + 1;
  785. for (j = 0; j < flow_attr->num_of_specs;
  786. j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
  787. for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
  788. /* same layer and same type */
  789. if (((union ib_flow_spec *)ib_flow)->type ==
  790. pdefault_rules->mandatory_not_fields[k])
  791. goto out;
  792. return i;
  793. }
  794. out:
  795. return -1;
  796. }
  797. static int __mlx4_ib_create_default_rules(
  798. struct mlx4_ib_dev *mdev,
  799. struct ib_qp *qp,
  800. const struct default_rules *pdefault_rules,
  801. struct _rule_hw *mlx4_spec) {
  802. int size = 0;
  803. int i;
  804. for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
  805. int ret;
  806. union ib_flow_spec ib_spec;
  807. switch (pdefault_rules->rules_create_list[i]) {
  808. case 0:
  809. /* no rule */
  810. continue;
  811. case IB_FLOW_SPEC_IB:
  812. ib_spec.type = IB_FLOW_SPEC_IB;
  813. ib_spec.size = sizeof(struct ib_flow_spec_ib);
  814. break;
  815. default:
  816. /* invalid rule */
  817. return -EINVAL;
  818. }
  819. /* We must put empty rule, qpn is being ignored */
  820. ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
  821. mlx4_spec);
  822. if (ret < 0) {
  823. pr_info("invalid parsing\n");
  824. return -EINVAL;
  825. }
  826. mlx4_spec = (void *)mlx4_spec + ret;
  827. size += ret;
  828. }
  829. return size;
  830. }
  831. static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
  832. int domain,
  833. enum mlx4_net_trans_promisc_mode flow_type,
  834. u64 *reg_id)
  835. {
  836. int ret, i;
  837. int size = 0;
  838. void *ib_flow;
  839. struct mlx4_ib_dev *mdev = to_mdev(qp->device);
  840. struct mlx4_cmd_mailbox *mailbox;
  841. struct mlx4_net_trans_rule_hw_ctrl *ctrl;
  842. int default_flow;
  843. static const u16 __mlx4_domain[] = {
  844. [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
  845. [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
  846. [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
  847. [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
  848. };
  849. if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
  850. pr_err("Invalid priority value %d\n", flow_attr->priority);
  851. return -EINVAL;
  852. }
  853. if (domain >= IB_FLOW_DOMAIN_NUM) {
  854. pr_err("Invalid domain value %d\n", domain);
  855. return -EINVAL;
  856. }
  857. if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
  858. return -EINVAL;
  859. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  860. if (IS_ERR(mailbox))
  861. return PTR_ERR(mailbox);
  862. ctrl = mailbox->buf;
  863. ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
  864. flow_attr->priority);
  865. ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
  866. ctrl->port = flow_attr->port;
  867. ctrl->qpn = cpu_to_be32(qp->qp_num);
  868. ib_flow = flow_attr + 1;
  869. size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
  870. /* Add default flows */
  871. default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
  872. if (default_flow >= 0) {
  873. ret = __mlx4_ib_create_default_rules(
  874. mdev, qp, default_table + default_flow,
  875. mailbox->buf + size);
  876. if (ret < 0) {
  877. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  878. return -EINVAL;
  879. }
  880. size += ret;
  881. }
  882. for (i = 0; i < flow_attr->num_of_specs; i++) {
  883. ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
  884. mailbox->buf + size);
  885. if (ret < 0) {
  886. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  887. return -EINVAL;
  888. }
  889. ib_flow += ((union ib_flow_spec *) ib_flow)->size;
  890. size += ret;
  891. }
  892. ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
  893. MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
  894. MLX4_CMD_NATIVE);
  895. if (ret == -ENOMEM)
  896. pr_err("mcg table is full. Fail to register network rule.\n");
  897. else if (ret == -ENXIO)
  898. pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
  899. else if (ret)
  900. pr_err("Invalid argumant. Fail to register network rule.\n");
  901. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  902. return ret;
  903. }
  904. static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
  905. {
  906. int err;
  907. err = mlx4_cmd(dev, reg_id, 0, 0,
  908. MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
  909. MLX4_CMD_NATIVE);
  910. if (err)
  911. pr_err("Fail to detach network rule. registration id = 0x%llx\n",
  912. reg_id);
  913. return err;
  914. }
  915. static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
  916. u64 *reg_id)
  917. {
  918. void *ib_flow;
  919. union ib_flow_spec *ib_spec;
  920. struct mlx4_dev *dev = to_mdev(qp->device)->dev;
  921. int err = 0;
  922. if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  923. return 0; /* do nothing */
  924. ib_flow = flow_attr + 1;
  925. ib_spec = (union ib_flow_spec *)ib_flow;
  926. if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
  927. return 0; /* do nothing */
  928. err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
  929. flow_attr->port, qp->qp_num,
  930. MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
  931. reg_id);
  932. return err;
  933. }
  934. static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
  935. struct ib_flow_attr *flow_attr,
  936. int domain)
  937. {
  938. int err = 0, i = 0;
  939. struct mlx4_ib_flow *mflow;
  940. enum mlx4_net_trans_promisc_mode type[2];
  941. memset(type, 0, sizeof(type));
  942. mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
  943. if (!mflow) {
  944. err = -ENOMEM;
  945. goto err_free;
  946. }
  947. switch (flow_attr->type) {
  948. case IB_FLOW_ATTR_NORMAL:
  949. type[0] = MLX4_FS_REGULAR;
  950. break;
  951. case IB_FLOW_ATTR_ALL_DEFAULT:
  952. type[0] = MLX4_FS_ALL_DEFAULT;
  953. break;
  954. case IB_FLOW_ATTR_MC_DEFAULT:
  955. type[0] = MLX4_FS_MC_DEFAULT;
  956. break;
  957. case IB_FLOW_ATTR_SNIFFER:
  958. type[0] = MLX4_FS_UC_SNIFFER;
  959. type[1] = MLX4_FS_MC_SNIFFER;
  960. break;
  961. default:
  962. err = -EINVAL;
  963. goto err_free;
  964. }
  965. while (i < ARRAY_SIZE(type) && type[i]) {
  966. err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
  967. &mflow->reg_id[i]);
  968. if (err)
  969. goto err_free;
  970. i++;
  971. }
  972. if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
  973. err = mlx4_ib_tunnel_steer_add(qp, flow_attr, &mflow->reg_id[i]);
  974. if (err)
  975. goto err_free;
  976. }
  977. return &mflow->ibflow;
  978. err_free:
  979. kfree(mflow);
  980. return ERR_PTR(err);
  981. }
  982. static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
  983. {
  984. int err, ret = 0;
  985. int i = 0;
  986. struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
  987. struct mlx4_ib_flow *mflow = to_mflow(flow_id);
  988. while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i]) {
  989. err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i]);
  990. if (err)
  991. ret = err;
  992. i++;
  993. }
  994. kfree(mflow);
  995. return ret;
  996. }
  997. static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  998. {
  999. int err;
  1000. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  1001. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  1002. u64 reg_id;
  1003. struct mlx4_ib_steering *ib_steering = NULL;
  1004. enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
  1005. MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
  1006. if (mdev->dev->caps.steering_mode ==
  1007. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1008. ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
  1009. if (!ib_steering)
  1010. return -ENOMEM;
  1011. }
  1012. err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
  1013. !!(mqp->flags &
  1014. MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
  1015. prot, &reg_id);
  1016. if (err)
  1017. goto err_malloc;
  1018. err = add_gid_entry(ibqp, gid);
  1019. if (err)
  1020. goto err_add;
  1021. if (ib_steering) {
  1022. memcpy(ib_steering->gid.raw, gid->raw, 16);
  1023. ib_steering->reg_id = reg_id;
  1024. mutex_lock(&mqp->mutex);
  1025. list_add(&ib_steering->list, &mqp->steering_rules);
  1026. mutex_unlock(&mqp->mutex);
  1027. }
  1028. return 0;
  1029. err_add:
  1030. mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
  1031. prot, reg_id);
  1032. err_malloc:
  1033. kfree(ib_steering);
  1034. return err;
  1035. }
  1036. static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
  1037. {
  1038. struct mlx4_ib_gid_entry *ge;
  1039. struct mlx4_ib_gid_entry *tmp;
  1040. struct mlx4_ib_gid_entry *ret = NULL;
  1041. list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
  1042. if (!memcmp(raw, ge->gid.raw, 16)) {
  1043. ret = ge;
  1044. break;
  1045. }
  1046. }
  1047. return ret;
  1048. }
  1049. static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  1050. {
  1051. int err;
  1052. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  1053. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  1054. struct net_device *ndev;
  1055. struct mlx4_ib_gid_entry *ge;
  1056. u64 reg_id = 0;
  1057. enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
  1058. MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
  1059. if (mdev->dev->caps.steering_mode ==
  1060. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1061. struct mlx4_ib_steering *ib_steering;
  1062. mutex_lock(&mqp->mutex);
  1063. list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
  1064. if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
  1065. list_del(&ib_steering->list);
  1066. break;
  1067. }
  1068. }
  1069. mutex_unlock(&mqp->mutex);
  1070. if (&ib_steering->list == &mqp->steering_rules) {
  1071. pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
  1072. return -EINVAL;
  1073. }
  1074. reg_id = ib_steering->reg_id;
  1075. kfree(ib_steering);
  1076. }
  1077. err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
  1078. prot, reg_id);
  1079. if (err)
  1080. return err;
  1081. mutex_lock(&mqp->mutex);
  1082. ge = find_gid_entry(mqp, gid->raw);
  1083. if (ge) {
  1084. spin_lock(&mdev->iboe.lock);
  1085. ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
  1086. if (ndev)
  1087. dev_hold(ndev);
  1088. spin_unlock(&mdev->iboe.lock);
  1089. if (ndev)
  1090. dev_put(ndev);
  1091. list_del(&ge->list);
  1092. kfree(ge);
  1093. } else
  1094. pr_warn("could not find mgid entry\n");
  1095. mutex_unlock(&mqp->mutex);
  1096. return 0;
  1097. }
  1098. static int init_node_data(struct mlx4_ib_dev *dev)
  1099. {
  1100. struct ib_smp *in_mad = NULL;
  1101. struct ib_smp *out_mad = NULL;
  1102. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  1103. int err = -ENOMEM;
  1104. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  1105. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  1106. if (!in_mad || !out_mad)
  1107. goto out;
  1108. init_query_mad(in_mad);
  1109. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  1110. if (mlx4_is_master(dev->dev))
  1111. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  1112. err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
  1113. if (err)
  1114. goto out;
  1115. memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
  1116. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  1117. err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
  1118. if (err)
  1119. goto out;
  1120. dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
  1121. memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
  1122. out:
  1123. kfree(in_mad);
  1124. kfree(out_mad);
  1125. return err;
  1126. }
  1127. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  1128. char *buf)
  1129. {
  1130. struct mlx4_ib_dev *dev =
  1131. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1132. return sprintf(buf, "MT%d\n", dev->dev->pdev->device);
  1133. }
  1134. static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
  1135. char *buf)
  1136. {
  1137. struct mlx4_ib_dev *dev =
  1138. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1139. return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
  1140. (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
  1141. (int) dev->dev->caps.fw_ver & 0xffff);
  1142. }
  1143. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  1144. char *buf)
  1145. {
  1146. struct mlx4_ib_dev *dev =
  1147. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1148. return sprintf(buf, "%x\n", dev->dev->rev_id);
  1149. }
  1150. static ssize_t show_board(struct device *device, struct device_attribute *attr,
  1151. char *buf)
  1152. {
  1153. struct mlx4_ib_dev *dev =
  1154. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1155. return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
  1156. dev->dev->board_id);
  1157. }
  1158. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  1159. static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  1160. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  1161. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  1162. static struct device_attribute *mlx4_class_attributes[] = {
  1163. &dev_attr_hw_rev,
  1164. &dev_attr_fw_ver,
  1165. &dev_attr_hca_type,
  1166. &dev_attr_board_id
  1167. };
  1168. static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
  1169. struct net_device *dev)
  1170. {
  1171. memcpy(eui, dev->dev_addr, 3);
  1172. memcpy(eui + 5, dev->dev_addr + 3, 3);
  1173. if (vlan_id < 0x1000) {
  1174. eui[3] = vlan_id >> 8;
  1175. eui[4] = vlan_id & 0xff;
  1176. } else {
  1177. eui[3] = 0xff;
  1178. eui[4] = 0xfe;
  1179. }
  1180. eui[0] ^= 2;
  1181. }
  1182. static void update_gids_task(struct work_struct *work)
  1183. {
  1184. struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
  1185. struct mlx4_cmd_mailbox *mailbox;
  1186. union ib_gid *gids;
  1187. int err;
  1188. struct mlx4_dev *dev = gw->dev->dev;
  1189. mailbox = mlx4_alloc_cmd_mailbox(dev);
  1190. if (IS_ERR(mailbox)) {
  1191. pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
  1192. return;
  1193. }
  1194. gids = mailbox->buf;
  1195. memcpy(gids, gw->gids, sizeof gw->gids);
  1196. err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
  1197. 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
  1198. MLX4_CMD_WRAPPED);
  1199. if (err)
  1200. pr_warn("set port command failed\n");
  1201. else
  1202. mlx4_ib_dispatch_event(gw->dev, gw->port, IB_EVENT_GID_CHANGE);
  1203. mlx4_free_cmd_mailbox(dev, mailbox);
  1204. kfree(gw);
  1205. }
  1206. static void reset_gids_task(struct work_struct *work)
  1207. {
  1208. struct update_gid_work *gw =
  1209. container_of(work, struct update_gid_work, work);
  1210. struct mlx4_cmd_mailbox *mailbox;
  1211. union ib_gid *gids;
  1212. int err;
  1213. struct mlx4_dev *dev = gw->dev->dev;
  1214. mailbox = mlx4_alloc_cmd_mailbox(dev);
  1215. if (IS_ERR(mailbox)) {
  1216. pr_warn("reset gid table failed\n");
  1217. goto free;
  1218. }
  1219. gids = mailbox->buf;
  1220. memcpy(gids, gw->gids, sizeof(gw->gids));
  1221. if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
  1222. IB_LINK_LAYER_ETHERNET) {
  1223. err = mlx4_cmd(dev, mailbox->dma,
  1224. MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
  1225. 1, MLX4_CMD_SET_PORT,
  1226. MLX4_CMD_TIME_CLASS_B,
  1227. MLX4_CMD_WRAPPED);
  1228. if (err)
  1229. pr_warn(KERN_WARNING
  1230. "set port %d command failed\n", gw->port);
  1231. }
  1232. mlx4_free_cmd_mailbox(dev, mailbox);
  1233. free:
  1234. kfree(gw);
  1235. }
  1236. static int update_gid_table(struct mlx4_ib_dev *dev, int port,
  1237. union ib_gid *gid, int clear,
  1238. int default_gid)
  1239. {
  1240. struct update_gid_work *work;
  1241. int i;
  1242. int need_update = 0;
  1243. int free = -1;
  1244. int found = -1;
  1245. int max_gids;
  1246. if (default_gid) {
  1247. free = 0;
  1248. } else {
  1249. max_gids = dev->dev->caps.gid_table_len[port];
  1250. for (i = 1; i < max_gids; ++i) {
  1251. if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
  1252. sizeof(*gid)))
  1253. found = i;
  1254. if (clear) {
  1255. if (found >= 0) {
  1256. need_update = 1;
  1257. dev->iboe.gid_table[port - 1][found] =
  1258. zgid;
  1259. break;
  1260. }
  1261. } else {
  1262. if (found >= 0)
  1263. break;
  1264. if (free < 0 &&
  1265. !memcmp(&dev->iboe.gid_table[port - 1][i],
  1266. &zgid, sizeof(*gid)))
  1267. free = i;
  1268. }
  1269. }
  1270. }
  1271. if (found == -1 && !clear && free >= 0) {
  1272. dev->iboe.gid_table[port - 1][free] = *gid;
  1273. need_update = 1;
  1274. }
  1275. if (!need_update)
  1276. return 0;
  1277. work = kzalloc(sizeof(*work), GFP_ATOMIC);
  1278. if (!work)
  1279. return -ENOMEM;
  1280. memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
  1281. INIT_WORK(&work->work, update_gids_task);
  1282. work->port = port;
  1283. work->dev = dev;
  1284. queue_work(wq, &work->work);
  1285. return 0;
  1286. }
  1287. static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
  1288. {
  1289. gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
  1290. mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
  1291. }
  1292. static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
  1293. {
  1294. struct update_gid_work *work;
  1295. work = kzalloc(sizeof(*work), GFP_ATOMIC);
  1296. if (!work)
  1297. return -ENOMEM;
  1298. memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
  1299. memset(work->gids, 0, sizeof(work->gids));
  1300. INIT_WORK(&work->work, reset_gids_task);
  1301. work->dev = dev;
  1302. work->port = port;
  1303. queue_work(wq, &work->work);
  1304. return 0;
  1305. }
  1306. static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
  1307. struct mlx4_ib_dev *ibdev, union ib_gid *gid)
  1308. {
  1309. struct mlx4_ib_iboe *iboe;
  1310. int port = 0;
  1311. struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
  1312. rdma_vlan_dev_real_dev(event_netdev) :
  1313. event_netdev;
  1314. union ib_gid default_gid;
  1315. mlx4_make_default_gid(real_dev, &default_gid);
  1316. if (!memcmp(gid, &default_gid, sizeof(*gid)))
  1317. return 0;
  1318. if (event != NETDEV_DOWN && event != NETDEV_UP)
  1319. return 0;
  1320. if ((real_dev != event_netdev) &&
  1321. (event == NETDEV_DOWN) &&
  1322. rdma_link_local_addr((struct in6_addr *)gid))
  1323. return 0;
  1324. iboe = &ibdev->iboe;
  1325. spin_lock(&iboe->lock);
  1326. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
  1327. if ((netif_is_bond_master(real_dev) &&
  1328. (real_dev == iboe->masters[port - 1])) ||
  1329. (!netif_is_bond_master(real_dev) &&
  1330. (real_dev == iboe->netdevs[port - 1])))
  1331. update_gid_table(ibdev, port, gid,
  1332. event == NETDEV_DOWN, 0);
  1333. spin_unlock(&iboe->lock);
  1334. return 0;
  1335. }
  1336. static u8 mlx4_ib_get_dev_port(struct net_device *dev,
  1337. struct mlx4_ib_dev *ibdev)
  1338. {
  1339. u8 port = 0;
  1340. struct mlx4_ib_iboe *iboe;
  1341. struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
  1342. rdma_vlan_dev_real_dev(dev) : dev;
  1343. iboe = &ibdev->iboe;
  1344. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
  1345. if ((netif_is_bond_master(real_dev) &&
  1346. (real_dev == iboe->masters[port - 1])) ||
  1347. (!netif_is_bond_master(real_dev) &&
  1348. (real_dev == iboe->netdevs[port - 1])))
  1349. break;
  1350. if ((port == 0) || (port > ibdev->dev->caps.num_ports))
  1351. return 0;
  1352. else
  1353. return port;
  1354. }
  1355. static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
  1356. void *ptr)
  1357. {
  1358. struct mlx4_ib_dev *ibdev;
  1359. struct in_ifaddr *ifa = ptr;
  1360. union ib_gid gid;
  1361. struct net_device *event_netdev = ifa->ifa_dev->dev;
  1362. ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
  1363. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
  1364. mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
  1365. return NOTIFY_DONE;
  1366. }
  1367. #if IS_ENABLED(CONFIG_IPV6)
  1368. static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
  1369. void *ptr)
  1370. {
  1371. struct mlx4_ib_dev *ibdev;
  1372. struct inet6_ifaddr *ifa = ptr;
  1373. union ib_gid *gid = (union ib_gid *)&ifa->addr;
  1374. struct net_device *event_netdev = ifa->idev->dev;
  1375. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
  1376. mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
  1377. return NOTIFY_DONE;
  1378. }
  1379. #endif
  1380. #define MLX4_IB_INVALID_MAC ((u64)-1)
  1381. static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
  1382. struct net_device *dev,
  1383. int port)
  1384. {
  1385. u64 new_smac = 0;
  1386. u64 release_mac = MLX4_IB_INVALID_MAC;
  1387. struct mlx4_ib_qp *qp;
  1388. read_lock(&dev_base_lock);
  1389. new_smac = mlx4_mac_to_u64(dev->dev_addr);
  1390. read_unlock(&dev_base_lock);
  1391. mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
  1392. qp = ibdev->qp1_proxy[port - 1];
  1393. if (qp) {
  1394. int new_smac_index;
  1395. u64 old_smac = qp->pri.smac;
  1396. struct mlx4_update_qp_params update_params;
  1397. if (new_smac == old_smac)
  1398. goto unlock;
  1399. new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
  1400. if (new_smac_index < 0)
  1401. goto unlock;
  1402. update_params.smac_index = new_smac_index;
  1403. if (mlx4_update_qp(ibdev->dev, &qp->mqp, MLX4_UPDATE_QP_SMAC,
  1404. &update_params)) {
  1405. release_mac = new_smac;
  1406. goto unlock;
  1407. }
  1408. qp->pri.smac = new_smac;
  1409. qp->pri.smac_index = new_smac_index;
  1410. release_mac = old_smac;
  1411. }
  1412. unlock:
  1413. mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
  1414. if (release_mac != MLX4_IB_INVALID_MAC)
  1415. mlx4_unregister_mac(ibdev->dev, port, release_mac);
  1416. }
  1417. static void mlx4_ib_get_dev_addr(struct net_device *dev,
  1418. struct mlx4_ib_dev *ibdev, u8 port)
  1419. {
  1420. struct in_device *in_dev;
  1421. #if IS_ENABLED(CONFIG_IPV6)
  1422. struct inet6_dev *in6_dev;
  1423. union ib_gid *pgid;
  1424. struct inet6_ifaddr *ifp;
  1425. #endif
  1426. union ib_gid gid;
  1427. if ((port == 0) || (port > ibdev->dev->caps.num_ports))
  1428. return;
  1429. /* IPv4 gids */
  1430. in_dev = in_dev_get(dev);
  1431. if (in_dev) {
  1432. for_ifa(in_dev) {
  1433. /*ifa->ifa_address;*/
  1434. ipv6_addr_set_v4mapped(ifa->ifa_address,
  1435. (struct in6_addr *)&gid);
  1436. update_gid_table(ibdev, port, &gid, 0, 0);
  1437. }
  1438. endfor_ifa(in_dev);
  1439. in_dev_put(in_dev);
  1440. }
  1441. #if IS_ENABLED(CONFIG_IPV6)
  1442. /* IPv6 gids */
  1443. in6_dev = in6_dev_get(dev);
  1444. if (in6_dev) {
  1445. read_lock_bh(&in6_dev->lock);
  1446. list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
  1447. pgid = (union ib_gid *)&ifp->addr;
  1448. update_gid_table(ibdev, port, pgid, 0, 0);
  1449. }
  1450. read_unlock_bh(&in6_dev->lock);
  1451. in6_dev_put(in6_dev);
  1452. }
  1453. #endif
  1454. }
  1455. static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
  1456. struct net_device *dev, u8 port)
  1457. {
  1458. union ib_gid gid;
  1459. mlx4_make_default_gid(dev, &gid);
  1460. update_gid_table(ibdev, port, &gid, 0, 1);
  1461. }
  1462. static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
  1463. {
  1464. struct net_device *dev;
  1465. struct mlx4_ib_iboe *iboe = &ibdev->iboe;
  1466. int i;
  1467. for (i = 1; i <= ibdev->num_ports; ++i)
  1468. if (reset_gid_table(ibdev, i))
  1469. return -1;
  1470. read_lock(&dev_base_lock);
  1471. spin_lock(&iboe->lock);
  1472. for_each_netdev(&init_net, dev) {
  1473. u8 port = mlx4_ib_get_dev_port(dev, ibdev);
  1474. if (port)
  1475. mlx4_ib_get_dev_addr(dev, ibdev, port);
  1476. }
  1477. spin_unlock(&iboe->lock);
  1478. read_unlock(&dev_base_lock);
  1479. return 0;
  1480. }
  1481. static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
  1482. struct net_device *dev,
  1483. unsigned long event)
  1484. {
  1485. struct mlx4_ib_iboe *iboe;
  1486. int update_qps_port = -1;
  1487. int port;
  1488. iboe = &ibdev->iboe;
  1489. spin_lock(&iboe->lock);
  1490. mlx4_foreach_ib_transport_port(port, ibdev->dev) {
  1491. enum ib_port_state port_state = IB_PORT_NOP;
  1492. struct net_device *old_master = iboe->masters[port - 1];
  1493. struct net_device *curr_netdev;
  1494. struct net_device *curr_master;
  1495. iboe->netdevs[port - 1] =
  1496. mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
  1497. if (iboe->netdevs[port - 1])
  1498. mlx4_ib_set_default_gid(ibdev,
  1499. iboe->netdevs[port - 1], port);
  1500. curr_netdev = iboe->netdevs[port - 1];
  1501. if (iboe->netdevs[port - 1] &&
  1502. netif_is_bond_slave(iboe->netdevs[port - 1])) {
  1503. iboe->masters[port - 1] = netdev_master_upper_dev_get(
  1504. iboe->netdevs[port - 1]);
  1505. } else {
  1506. iboe->masters[port - 1] = NULL;
  1507. }
  1508. curr_master = iboe->masters[port - 1];
  1509. if (dev == iboe->netdevs[port - 1] &&
  1510. (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
  1511. event == NETDEV_UP || event == NETDEV_CHANGE))
  1512. update_qps_port = port;
  1513. if (curr_netdev) {
  1514. port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
  1515. IB_PORT_ACTIVE : IB_PORT_DOWN;
  1516. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1517. } else {
  1518. reset_gid_table(ibdev, port);
  1519. }
  1520. /* if using bonding/team and a slave port is down, we don't the bond IP
  1521. * based gids in the table since flows that select port by gid may get
  1522. * the down port.
  1523. */
  1524. if (curr_master && (port_state == IB_PORT_DOWN)) {
  1525. reset_gid_table(ibdev, port);
  1526. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1527. }
  1528. /* if bonding is used it is possible that we add it to masters
  1529. * only after IP address is assigned to the net bonding
  1530. * interface.
  1531. */
  1532. if (curr_master && (old_master != curr_master)) {
  1533. reset_gid_table(ibdev, port);
  1534. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1535. mlx4_ib_get_dev_addr(curr_master, ibdev, port);
  1536. }
  1537. if (!curr_master && (old_master != curr_master)) {
  1538. reset_gid_table(ibdev, port);
  1539. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1540. mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
  1541. }
  1542. }
  1543. spin_unlock(&iboe->lock);
  1544. if (update_qps_port > 0)
  1545. mlx4_ib_update_qps(ibdev, dev, update_qps_port);
  1546. }
  1547. static int mlx4_ib_netdev_event(struct notifier_block *this,
  1548. unsigned long event, void *ptr)
  1549. {
  1550. struct net_device *dev = netdev_notifier_info_to_dev(ptr);
  1551. struct mlx4_ib_dev *ibdev;
  1552. if (!net_eq(dev_net(dev), &init_net))
  1553. return NOTIFY_DONE;
  1554. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
  1555. mlx4_ib_scan_netdevs(ibdev, dev, event);
  1556. return NOTIFY_DONE;
  1557. }
  1558. static void init_pkeys(struct mlx4_ib_dev *ibdev)
  1559. {
  1560. int port;
  1561. int slave;
  1562. int i;
  1563. if (mlx4_is_master(ibdev->dev)) {
  1564. for (slave = 0; slave <= ibdev->dev->num_vfs; ++slave) {
  1565. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
  1566. for (i = 0;
  1567. i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
  1568. ++i) {
  1569. ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
  1570. /* master has the identity virt2phys pkey mapping */
  1571. (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
  1572. ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
  1573. mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
  1574. ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
  1575. }
  1576. }
  1577. }
  1578. /* initialize pkey cache */
  1579. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
  1580. for (i = 0;
  1581. i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
  1582. ++i)
  1583. ibdev->pkeys.phys_pkey_cache[port-1][i] =
  1584. (i) ? 0 : 0xFFFF;
  1585. }
  1586. }
  1587. }
  1588. static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
  1589. {
  1590. char name[80];
  1591. int eq_per_port = 0;
  1592. int added_eqs = 0;
  1593. int total_eqs = 0;
  1594. int i, j, eq;
  1595. /* Legacy mode or comp_pool is not large enough */
  1596. if (dev->caps.comp_pool == 0 ||
  1597. dev->caps.num_ports > dev->caps.comp_pool)
  1598. return;
  1599. eq_per_port = rounddown_pow_of_two(dev->caps.comp_pool/
  1600. dev->caps.num_ports);
  1601. /* Init eq table */
  1602. added_eqs = 0;
  1603. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  1604. added_eqs += eq_per_port;
  1605. total_eqs = dev->caps.num_comp_vectors + added_eqs;
  1606. ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
  1607. if (!ibdev->eq_table)
  1608. return;
  1609. ibdev->eq_added = added_eqs;
  1610. eq = 0;
  1611. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
  1612. for (j = 0; j < eq_per_port; j++) {
  1613. snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
  1614. i, j, dev->pdev->bus->name);
  1615. /* Set IRQ for specific name (per ring) */
  1616. if (mlx4_assign_eq(dev, name, NULL,
  1617. &ibdev->eq_table[eq])) {
  1618. /* Use legacy (same as mlx4_en driver) */
  1619. pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
  1620. ibdev->eq_table[eq] =
  1621. (eq % dev->caps.num_comp_vectors);
  1622. }
  1623. eq++;
  1624. }
  1625. }
  1626. /* Fill the reset of the vector with legacy EQ */
  1627. for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
  1628. ibdev->eq_table[eq++] = i;
  1629. /* Advertise the new number of EQs to clients */
  1630. ibdev->ib_dev.num_comp_vectors = total_eqs;
  1631. }
  1632. static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
  1633. {
  1634. int i;
  1635. /* no additional eqs were added */
  1636. if (!ibdev->eq_table)
  1637. return;
  1638. /* Reset the advertised EQ number */
  1639. ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
  1640. /* Free only the added eqs */
  1641. for (i = 0; i < ibdev->eq_added; i++) {
  1642. /* Don't free legacy eqs if used */
  1643. if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
  1644. continue;
  1645. mlx4_release_eq(dev, ibdev->eq_table[i]);
  1646. }
  1647. kfree(ibdev->eq_table);
  1648. }
  1649. static void *mlx4_ib_add(struct mlx4_dev *dev)
  1650. {
  1651. struct mlx4_ib_dev *ibdev;
  1652. int num_ports = 0;
  1653. int i, j;
  1654. int err;
  1655. struct mlx4_ib_iboe *iboe;
  1656. int ib_num_ports = 0;
  1657. pr_info_once("%s", mlx4_ib_version);
  1658. num_ports = 0;
  1659. mlx4_foreach_ib_transport_port(i, dev)
  1660. num_ports++;
  1661. /* No point in registering a device with no ports... */
  1662. if (num_ports == 0)
  1663. return NULL;
  1664. ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
  1665. if (!ibdev) {
  1666. dev_err(&dev->pdev->dev, "Device struct alloc failed\n");
  1667. return NULL;
  1668. }
  1669. iboe = &ibdev->iboe;
  1670. if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
  1671. goto err_dealloc;
  1672. if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
  1673. goto err_pd;
  1674. ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
  1675. PAGE_SIZE);
  1676. if (!ibdev->uar_map)
  1677. goto err_uar;
  1678. MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
  1679. ibdev->dev = dev;
  1680. strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
  1681. ibdev->ib_dev.owner = THIS_MODULE;
  1682. ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
  1683. ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
  1684. ibdev->num_ports = num_ports;
  1685. ibdev->ib_dev.phys_port_cnt = ibdev->num_ports;
  1686. ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
  1687. ibdev->ib_dev.dma_device = &dev->pdev->dev;
  1688. if (dev->caps.userspace_caps)
  1689. ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
  1690. else
  1691. ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
  1692. ibdev->ib_dev.uverbs_cmd_mask =
  1693. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  1694. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  1695. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  1696. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  1697. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  1698. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  1699. (1ull << IB_USER_VERBS_CMD_REREG_MR) |
  1700. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  1701. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  1702. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  1703. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  1704. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  1705. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  1706. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  1707. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  1708. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  1709. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  1710. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  1711. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  1712. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  1713. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  1714. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  1715. (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
  1716. (1ull << IB_USER_VERBS_CMD_OPEN_QP);
  1717. ibdev->ib_dev.query_device = mlx4_ib_query_device;
  1718. ibdev->ib_dev.query_port = mlx4_ib_query_port;
  1719. ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
  1720. ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
  1721. ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
  1722. ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
  1723. ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
  1724. ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
  1725. ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
  1726. ibdev->ib_dev.mmap = mlx4_ib_mmap;
  1727. ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
  1728. ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
  1729. ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
  1730. ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
  1731. ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
  1732. ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
  1733. ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
  1734. ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
  1735. ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
  1736. ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
  1737. ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
  1738. ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
  1739. ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
  1740. ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
  1741. ibdev->ib_dev.post_send = mlx4_ib_post_send;
  1742. ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
  1743. ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
  1744. ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
  1745. ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
  1746. ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
  1747. ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
  1748. ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
  1749. ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
  1750. ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
  1751. ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
  1752. ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
  1753. ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
  1754. ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
  1755. ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
  1756. ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
  1757. ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
  1758. ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
  1759. if (!mlx4_is_slave(ibdev->dev)) {
  1760. ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
  1761. ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
  1762. ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
  1763. ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
  1764. }
  1765. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
  1766. dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
  1767. ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
  1768. ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
  1769. ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
  1770. ibdev->ib_dev.uverbs_cmd_mask |=
  1771. (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
  1772. (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
  1773. }
  1774. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
  1775. ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
  1776. ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
  1777. ibdev->ib_dev.uverbs_cmd_mask |=
  1778. (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
  1779. (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
  1780. }
  1781. if (check_flow_steering_support(dev)) {
  1782. ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
  1783. ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
  1784. ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
  1785. ibdev->ib_dev.uverbs_ex_cmd_mask |=
  1786. (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
  1787. (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
  1788. }
  1789. mlx4_ib_alloc_eqs(dev, ibdev);
  1790. spin_lock_init(&iboe->lock);
  1791. if (init_node_data(ibdev))
  1792. goto err_map;
  1793. for (i = 0; i < ibdev->num_ports; ++i) {
  1794. mutex_init(&ibdev->qp1_proxy_lock[i]);
  1795. if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
  1796. IB_LINK_LAYER_ETHERNET) {
  1797. err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
  1798. if (err)
  1799. ibdev->counters[i] = -1;
  1800. } else {
  1801. ibdev->counters[i] = -1;
  1802. }
  1803. }
  1804. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  1805. ib_num_ports++;
  1806. spin_lock_init(&ibdev->sm_lock);
  1807. mutex_init(&ibdev->cap_mask_mutex);
  1808. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
  1809. ib_num_ports) {
  1810. ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
  1811. err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
  1812. MLX4_IB_UC_STEER_QPN_ALIGN,
  1813. &ibdev->steer_qpn_base);
  1814. if (err)
  1815. goto err_counter;
  1816. ibdev->ib_uc_qpns_bitmap =
  1817. kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
  1818. sizeof(long),
  1819. GFP_KERNEL);
  1820. if (!ibdev->ib_uc_qpns_bitmap) {
  1821. dev_err(&dev->pdev->dev, "bit map alloc failed\n");
  1822. goto err_steer_qp_release;
  1823. }
  1824. bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
  1825. err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
  1826. dev, ibdev->steer_qpn_base,
  1827. ibdev->steer_qpn_base +
  1828. ibdev->steer_qpn_count - 1);
  1829. if (err)
  1830. goto err_steer_free_bitmap;
  1831. }
  1832. if (ib_register_device(&ibdev->ib_dev, NULL))
  1833. goto err_steer_free_bitmap;
  1834. if (mlx4_ib_mad_init(ibdev))
  1835. goto err_reg;
  1836. if (mlx4_ib_init_sriov(ibdev))
  1837. goto err_mad;
  1838. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
  1839. if (!iboe->nb.notifier_call) {
  1840. iboe->nb.notifier_call = mlx4_ib_netdev_event;
  1841. err = register_netdevice_notifier(&iboe->nb);
  1842. if (err) {
  1843. iboe->nb.notifier_call = NULL;
  1844. goto err_notif;
  1845. }
  1846. }
  1847. if (!iboe->nb_inet.notifier_call) {
  1848. iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
  1849. err = register_inetaddr_notifier(&iboe->nb_inet);
  1850. if (err) {
  1851. iboe->nb_inet.notifier_call = NULL;
  1852. goto err_notif;
  1853. }
  1854. }
  1855. #if IS_ENABLED(CONFIG_IPV6)
  1856. if (!iboe->nb_inet6.notifier_call) {
  1857. iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
  1858. err = register_inet6addr_notifier(&iboe->nb_inet6);
  1859. if (err) {
  1860. iboe->nb_inet6.notifier_call = NULL;
  1861. goto err_notif;
  1862. }
  1863. }
  1864. #endif
  1865. for (i = 1 ; i <= ibdev->num_ports ; ++i)
  1866. reset_gid_table(ibdev, i);
  1867. rtnl_lock();
  1868. mlx4_ib_scan_netdevs(ibdev, NULL, 0);
  1869. rtnl_unlock();
  1870. mlx4_ib_init_gid_table(ibdev);
  1871. }
  1872. for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
  1873. if (device_create_file(&ibdev->ib_dev.dev,
  1874. mlx4_class_attributes[j]))
  1875. goto err_notif;
  1876. }
  1877. ibdev->ib_active = true;
  1878. if (mlx4_is_mfunc(ibdev->dev))
  1879. init_pkeys(ibdev);
  1880. /* create paravirt contexts for any VFs which are active */
  1881. if (mlx4_is_master(ibdev->dev)) {
  1882. for (j = 0; j < MLX4_MFUNC_MAX; j++) {
  1883. if (j == mlx4_master_func_num(ibdev->dev))
  1884. continue;
  1885. if (mlx4_is_slave_active(ibdev->dev, j))
  1886. do_slave_init(ibdev, j, 1);
  1887. }
  1888. }
  1889. return ibdev;
  1890. err_notif:
  1891. if (ibdev->iboe.nb.notifier_call) {
  1892. if (unregister_netdevice_notifier(&ibdev->iboe.nb))
  1893. pr_warn("failure unregistering notifier\n");
  1894. ibdev->iboe.nb.notifier_call = NULL;
  1895. }
  1896. if (ibdev->iboe.nb_inet.notifier_call) {
  1897. if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
  1898. pr_warn("failure unregistering notifier\n");
  1899. ibdev->iboe.nb_inet.notifier_call = NULL;
  1900. }
  1901. #if IS_ENABLED(CONFIG_IPV6)
  1902. if (ibdev->iboe.nb_inet6.notifier_call) {
  1903. if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
  1904. pr_warn("failure unregistering notifier\n");
  1905. ibdev->iboe.nb_inet6.notifier_call = NULL;
  1906. }
  1907. #endif
  1908. flush_workqueue(wq);
  1909. mlx4_ib_close_sriov(ibdev);
  1910. err_mad:
  1911. mlx4_ib_mad_cleanup(ibdev);
  1912. err_reg:
  1913. ib_unregister_device(&ibdev->ib_dev);
  1914. err_steer_free_bitmap:
  1915. kfree(ibdev->ib_uc_qpns_bitmap);
  1916. err_steer_qp_release:
  1917. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
  1918. mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
  1919. ibdev->steer_qpn_count);
  1920. err_counter:
  1921. for (; i; --i)
  1922. if (ibdev->counters[i - 1] != -1)
  1923. mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
  1924. err_map:
  1925. iounmap(ibdev->uar_map);
  1926. err_uar:
  1927. mlx4_uar_free(dev, &ibdev->priv_uar);
  1928. err_pd:
  1929. mlx4_pd_free(dev, ibdev->priv_pdn);
  1930. err_dealloc:
  1931. ib_dealloc_device(&ibdev->ib_dev);
  1932. return NULL;
  1933. }
  1934. int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
  1935. {
  1936. int offset;
  1937. WARN_ON(!dev->ib_uc_qpns_bitmap);
  1938. offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
  1939. dev->steer_qpn_count,
  1940. get_count_order(count));
  1941. if (offset < 0)
  1942. return offset;
  1943. *qpn = dev->steer_qpn_base + offset;
  1944. return 0;
  1945. }
  1946. void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
  1947. {
  1948. if (!qpn ||
  1949. dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
  1950. return;
  1951. BUG_ON(qpn < dev->steer_qpn_base);
  1952. bitmap_release_region(dev->ib_uc_qpns_bitmap,
  1953. qpn - dev->steer_qpn_base,
  1954. get_count_order(count));
  1955. }
  1956. int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  1957. int is_attach)
  1958. {
  1959. int err;
  1960. size_t flow_size;
  1961. struct ib_flow_attr *flow = NULL;
  1962. struct ib_flow_spec_ib *ib_spec;
  1963. if (is_attach) {
  1964. flow_size = sizeof(struct ib_flow_attr) +
  1965. sizeof(struct ib_flow_spec_ib);
  1966. flow = kzalloc(flow_size, GFP_KERNEL);
  1967. if (!flow)
  1968. return -ENOMEM;
  1969. flow->port = mqp->port;
  1970. flow->num_of_specs = 1;
  1971. flow->size = flow_size;
  1972. ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
  1973. ib_spec->type = IB_FLOW_SPEC_IB;
  1974. ib_spec->size = sizeof(struct ib_flow_spec_ib);
  1975. /* Add an empty rule for IB L2 */
  1976. memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
  1977. err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
  1978. IB_FLOW_DOMAIN_NIC,
  1979. MLX4_FS_REGULAR,
  1980. &mqp->reg_id);
  1981. } else {
  1982. err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
  1983. }
  1984. kfree(flow);
  1985. return err;
  1986. }
  1987. static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
  1988. {
  1989. struct mlx4_ib_dev *ibdev = ibdev_ptr;
  1990. int p;
  1991. mlx4_ib_close_sriov(ibdev);
  1992. mlx4_ib_mad_cleanup(ibdev);
  1993. ib_unregister_device(&ibdev->ib_dev);
  1994. if (ibdev->iboe.nb.notifier_call) {
  1995. if (unregister_netdevice_notifier(&ibdev->iboe.nb))
  1996. pr_warn("failure unregistering notifier\n");
  1997. ibdev->iboe.nb.notifier_call = NULL;
  1998. }
  1999. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
  2000. mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
  2001. ibdev->steer_qpn_count);
  2002. kfree(ibdev->ib_uc_qpns_bitmap);
  2003. }
  2004. if (ibdev->iboe.nb_inet.notifier_call) {
  2005. if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
  2006. pr_warn("failure unregistering notifier\n");
  2007. ibdev->iboe.nb_inet.notifier_call = NULL;
  2008. }
  2009. #if IS_ENABLED(CONFIG_IPV6)
  2010. if (ibdev->iboe.nb_inet6.notifier_call) {
  2011. if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
  2012. pr_warn("failure unregistering notifier\n");
  2013. ibdev->iboe.nb_inet6.notifier_call = NULL;
  2014. }
  2015. #endif
  2016. iounmap(ibdev->uar_map);
  2017. for (p = 0; p < ibdev->num_ports; ++p)
  2018. if (ibdev->counters[p] != -1)
  2019. mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
  2020. mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
  2021. mlx4_CLOSE_PORT(dev, p);
  2022. mlx4_ib_free_eqs(dev, ibdev);
  2023. mlx4_uar_free(dev, &ibdev->priv_uar);
  2024. mlx4_pd_free(dev, ibdev->priv_pdn);
  2025. ib_dealloc_device(&ibdev->ib_dev);
  2026. }
  2027. static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
  2028. {
  2029. struct mlx4_ib_demux_work **dm = NULL;
  2030. struct mlx4_dev *dev = ibdev->dev;
  2031. int i;
  2032. unsigned long flags;
  2033. struct mlx4_active_ports actv_ports;
  2034. unsigned int ports;
  2035. unsigned int first_port;
  2036. if (!mlx4_is_master(dev))
  2037. return;
  2038. actv_ports = mlx4_get_active_ports(dev, slave);
  2039. ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
  2040. first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
  2041. dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
  2042. if (!dm) {
  2043. pr_err("failed to allocate memory for tunneling qp update\n");
  2044. goto out;
  2045. }
  2046. for (i = 0; i < ports; i++) {
  2047. dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
  2048. if (!dm[i]) {
  2049. pr_err("failed to allocate memory for tunneling qp update work struct\n");
  2050. for (i = 0; i < dev->caps.num_ports; i++) {
  2051. if (dm[i])
  2052. kfree(dm[i]);
  2053. }
  2054. goto out;
  2055. }
  2056. }
  2057. /* initialize or tear down tunnel QPs for the slave */
  2058. for (i = 0; i < ports; i++) {
  2059. INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
  2060. dm[i]->port = first_port + i + 1;
  2061. dm[i]->slave = slave;
  2062. dm[i]->do_init = do_init;
  2063. dm[i]->dev = ibdev;
  2064. spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
  2065. if (!ibdev->sriov.is_going_down)
  2066. queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
  2067. spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
  2068. }
  2069. out:
  2070. kfree(dm);
  2071. return;
  2072. }
  2073. static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
  2074. enum mlx4_dev_event event, unsigned long param)
  2075. {
  2076. struct ib_event ibev;
  2077. struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
  2078. struct mlx4_eqe *eqe = NULL;
  2079. struct ib_event_work *ew;
  2080. int p = 0;
  2081. if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
  2082. eqe = (struct mlx4_eqe *)param;
  2083. else
  2084. p = (int) param;
  2085. switch (event) {
  2086. case MLX4_DEV_EVENT_PORT_UP:
  2087. if (p > ibdev->num_ports)
  2088. return;
  2089. if (mlx4_is_master(dev) &&
  2090. rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
  2091. IB_LINK_LAYER_INFINIBAND) {
  2092. mlx4_ib_invalidate_all_guid_record(ibdev, p);
  2093. }
  2094. ibev.event = IB_EVENT_PORT_ACTIVE;
  2095. break;
  2096. case MLX4_DEV_EVENT_PORT_DOWN:
  2097. if (p > ibdev->num_ports)
  2098. return;
  2099. ibev.event = IB_EVENT_PORT_ERR;
  2100. break;
  2101. case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
  2102. ibdev->ib_active = false;
  2103. ibev.event = IB_EVENT_DEVICE_FATAL;
  2104. break;
  2105. case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
  2106. ew = kmalloc(sizeof *ew, GFP_ATOMIC);
  2107. if (!ew) {
  2108. pr_err("failed to allocate memory for events work\n");
  2109. break;
  2110. }
  2111. INIT_WORK(&ew->work, handle_port_mgmt_change_event);
  2112. memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
  2113. ew->ib_dev = ibdev;
  2114. /* need to queue only for port owner, which uses GEN_EQE */
  2115. if (mlx4_is_master(dev))
  2116. queue_work(wq, &ew->work);
  2117. else
  2118. handle_port_mgmt_change_event(&ew->work);
  2119. return;
  2120. case MLX4_DEV_EVENT_SLAVE_INIT:
  2121. /* here, p is the slave id */
  2122. do_slave_init(ibdev, p, 1);
  2123. return;
  2124. case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
  2125. /* here, p is the slave id */
  2126. do_slave_init(ibdev, p, 0);
  2127. return;
  2128. default:
  2129. return;
  2130. }
  2131. ibev.device = ibdev_ptr;
  2132. ibev.element.port_num = (u8) p;
  2133. ib_dispatch_event(&ibev);
  2134. }
  2135. static struct mlx4_interface mlx4_ib_interface = {
  2136. .add = mlx4_ib_add,
  2137. .remove = mlx4_ib_remove,
  2138. .event = mlx4_ib_event,
  2139. .protocol = MLX4_PROT_IB_IPV6
  2140. };
  2141. static int __init mlx4_ib_init(void)
  2142. {
  2143. int err;
  2144. wq = create_singlethread_workqueue("mlx4_ib");
  2145. if (!wq)
  2146. return -ENOMEM;
  2147. err = mlx4_ib_mcg_init();
  2148. if (err)
  2149. goto clean_wq;
  2150. err = mlx4_register_interface(&mlx4_ib_interface);
  2151. if (err)
  2152. goto clean_mcg;
  2153. return 0;
  2154. clean_mcg:
  2155. mlx4_ib_mcg_destroy();
  2156. clean_wq:
  2157. destroy_workqueue(wq);
  2158. return err;
  2159. }
  2160. static void __exit mlx4_ib_cleanup(void)
  2161. {
  2162. mlx4_unregister_interface(&mlx4_ib_interface);
  2163. mlx4_ib_mcg_destroy();
  2164. destroy_workqueue(wq);
  2165. }
  2166. module_init(mlx4_ib_init);
  2167. module_exit(mlx4_ib_cleanup);