ad799x.c 21 KB

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  1. /*
  2. * iio/adc/ad799x.c
  3. * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
  4. *
  5. * based on iio/adc/max1363
  6. * Copyright (C) 2008-2010 Jonathan Cameron
  7. *
  8. * based on linux/drivers/i2c/chips/max123x
  9. * Copyright (C) 2002-2004 Stefan Eletzhofer
  10. *
  11. * based on linux/drivers/acron/char/pcf8583.c
  12. * Copyright (C) 2000 Russell King
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. *
  18. * ad799x.c
  19. *
  20. * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
  21. * ad7998 and similar chips.
  22. *
  23. */
  24. #include <linux/interrupt.h>
  25. #include <linux/device.h>
  26. #include <linux/kernel.h>
  27. #include <linux/sysfs.h>
  28. #include <linux/i2c.h>
  29. #include <linux/regulator/consumer.h>
  30. #include <linux/slab.h>
  31. #include <linux/types.h>
  32. #include <linux/err.h>
  33. #include <linux/module.h>
  34. #include <linux/bitops.h>
  35. #include <linux/iio/iio.h>
  36. #include <linux/iio/sysfs.h>
  37. #include <linux/iio/events.h>
  38. #include <linux/iio/buffer.h>
  39. #include <linux/iio/trigger_consumer.h>
  40. #include <linux/iio/triggered_buffer.h>
  41. #define AD799X_CHANNEL_SHIFT 4
  42. /*
  43. * AD7991, AD7995 and AD7999 defines
  44. */
  45. #define AD7991_REF_SEL 0x08
  46. #define AD7991_FLTR 0x04
  47. #define AD7991_BIT_TRIAL_DELAY 0x02
  48. #define AD7991_SAMPLE_DELAY 0x01
  49. /*
  50. * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
  51. */
  52. #define AD7998_FLTR BIT(3)
  53. #define AD7998_ALERT_EN BIT(2)
  54. #define AD7998_BUSY_ALERT BIT(1)
  55. #define AD7998_BUSY_ALERT_POL BIT(0)
  56. #define AD7998_CONV_RES_REG 0x0
  57. #define AD7998_ALERT_STAT_REG 0x1
  58. #define AD7998_CONF_REG 0x2
  59. #define AD7998_CYCLE_TMR_REG 0x3
  60. #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
  61. #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
  62. #define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
  63. #define AD7998_CYC_MASK GENMASK(2, 0)
  64. #define AD7998_CYC_DIS 0x0
  65. #define AD7998_CYC_TCONF_32 0x1
  66. #define AD7998_CYC_TCONF_64 0x2
  67. #define AD7998_CYC_TCONF_128 0x3
  68. #define AD7998_CYC_TCONF_256 0x4
  69. #define AD7998_CYC_TCONF_512 0x5
  70. #define AD7998_CYC_TCONF_1024 0x6
  71. #define AD7998_CYC_TCONF_2048 0x7
  72. #define AD7998_ALERT_STAT_CLEAR 0xFF
  73. /*
  74. * AD7997 and AD7997 defines
  75. */
  76. #define AD7997_8_READ_SINGLE BIT(7)
  77. #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4))
  78. enum {
  79. ad7991,
  80. ad7995,
  81. ad7999,
  82. ad7992,
  83. ad7993,
  84. ad7994,
  85. ad7997,
  86. ad7998
  87. };
  88. /**
  89. * struct ad799x_chip_config - chip specific information
  90. * @channel: channel specification
  91. * @default_config: device default configuration
  92. * @info: pointer to iio_info struct
  93. */
  94. struct ad799x_chip_config {
  95. const struct iio_chan_spec channel[9];
  96. u16 default_config;
  97. const struct iio_info *info;
  98. };
  99. /**
  100. * struct ad799x_chip_info - chip specific information
  101. * @num_channels: number of channels
  102. * @noirq_config: device configuration w/o IRQ
  103. * @irq_config: device configuration w/IRQ
  104. */
  105. struct ad799x_chip_info {
  106. int num_channels;
  107. const struct ad799x_chip_config noirq_config;
  108. const struct ad799x_chip_config irq_config;
  109. };
  110. struct ad799x_state {
  111. struct i2c_client *client;
  112. const struct ad799x_chip_config *chip_config;
  113. struct regulator *reg;
  114. struct regulator *vref;
  115. unsigned id;
  116. u16 config;
  117. u8 *rx_buf;
  118. unsigned int transfer_size;
  119. };
  120. static int ad799x_write_config(struct ad799x_state *st, u16 val)
  121. {
  122. switch (st->id) {
  123. case ad7997:
  124. case ad7998:
  125. return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
  126. val);
  127. default:
  128. return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
  129. val);
  130. }
  131. }
  132. static int ad799x_read_config(struct ad799x_state *st)
  133. {
  134. switch (st->id) {
  135. case ad7997:
  136. case ad7998:
  137. return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
  138. default:
  139. return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
  140. }
  141. }
  142. /**
  143. * ad799x_trigger_handler() bh of trigger launched polling to ring buffer
  144. *
  145. * Currently there is no option in this driver to disable the saving of
  146. * timestamps within the ring.
  147. **/
  148. static irqreturn_t ad799x_trigger_handler(int irq, void *p)
  149. {
  150. struct iio_poll_func *pf = p;
  151. struct iio_dev *indio_dev = pf->indio_dev;
  152. struct ad799x_state *st = iio_priv(indio_dev);
  153. int b_sent;
  154. u8 cmd;
  155. switch (st->id) {
  156. case ad7991:
  157. case ad7995:
  158. case ad7999:
  159. cmd = st->config |
  160. (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
  161. break;
  162. case ad7992:
  163. case ad7993:
  164. case ad7994:
  165. cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
  166. AD7998_CONV_RES_REG;
  167. break;
  168. case ad7997:
  169. case ad7998:
  170. cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
  171. break;
  172. default:
  173. cmd = 0;
  174. }
  175. b_sent = i2c_smbus_read_i2c_block_data(st->client,
  176. cmd, st->transfer_size, st->rx_buf);
  177. if (b_sent < 0)
  178. goto out;
  179. iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
  180. iio_get_time_ns());
  181. out:
  182. iio_trigger_notify_done(indio_dev->trig);
  183. return IRQ_HANDLED;
  184. }
  185. static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
  186. const unsigned long *scan_mask)
  187. {
  188. struct ad799x_state *st = iio_priv(indio_dev);
  189. kfree(st->rx_buf);
  190. st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
  191. if (!st->rx_buf)
  192. return -ENOMEM;
  193. st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
  194. switch (st->id) {
  195. case ad7992:
  196. case ad7993:
  197. case ad7994:
  198. case ad7997:
  199. case ad7998:
  200. st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
  201. st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
  202. return ad799x_write_config(st, st->config);
  203. default:
  204. return 0;
  205. }
  206. }
  207. static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
  208. {
  209. u8 cmd;
  210. switch (st->id) {
  211. case ad7991:
  212. case ad7995:
  213. case ad7999:
  214. cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
  215. break;
  216. case ad7992:
  217. case ad7993:
  218. case ad7994:
  219. cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
  220. break;
  221. case ad7997:
  222. case ad7998:
  223. cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
  224. break;
  225. default:
  226. return -EINVAL;
  227. }
  228. return i2c_smbus_read_word_swapped(st->client, cmd);
  229. }
  230. static int ad799x_read_raw(struct iio_dev *indio_dev,
  231. struct iio_chan_spec const *chan,
  232. int *val,
  233. int *val2,
  234. long m)
  235. {
  236. int ret;
  237. struct ad799x_state *st = iio_priv(indio_dev);
  238. switch (m) {
  239. case IIO_CHAN_INFO_RAW:
  240. mutex_lock(&indio_dev->mlock);
  241. if (iio_buffer_enabled(indio_dev))
  242. ret = -EBUSY;
  243. else
  244. ret = ad799x_scan_direct(st, chan->scan_index);
  245. mutex_unlock(&indio_dev->mlock);
  246. if (ret < 0)
  247. return ret;
  248. *val = (ret >> chan->scan_type.shift) &
  249. GENMASK(chan->scan_type.realbits - 1, 0);
  250. return IIO_VAL_INT;
  251. case IIO_CHAN_INFO_SCALE:
  252. ret = regulator_get_voltage(st->vref);
  253. if (ret < 0)
  254. return ret;
  255. *val = ret / 1000;
  256. *val2 = chan->scan_type.realbits;
  257. return IIO_VAL_FRACTIONAL_LOG2;
  258. }
  259. return -EINVAL;
  260. }
  261. static const unsigned int ad7998_frequencies[] = {
  262. [AD7998_CYC_DIS] = 0,
  263. [AD7998_CYC_TCONF_32] = 15625,
  264. [AD7998_CYC_TCONF_64] = 7812,
  265. [AD7998_CYC_TCONF_128] = 3906,
  266. [AD7998_CYC_TCONF_512] = 976,
  267. [AD7998_CYC_TCONF_1024] = 488,
  268. [AD7998_CYC_TCONF_2048] = 244,
  269. };
  270. static ssize_t ad799x_read_frequency(struct device *dev,
  271. struct device_attribute *attr,
  272. char *buf)
  273. {
  274. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  275. struct ad799x_state *st = iio_priv(indio_dev);
  276. int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
  277. if (ret < 0)
  278. return ret;
  279. return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
  280. }
  281. static ssize_t ad799x_write_frequency(struct device *dev,
  282. struct device_attribute *attr,
  283. const char *buf,
  284. size_t len)
  285. {
  286. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  287. struct ad799x_state *st = iio_priv(indio_dev);
  288. long val;
  289. int ret, i;
  290. ret = kstrtol(buf, 10, &val);
  291. if (ret)
  292. return ret;
  293. mutex_lock(&indio_dev->mlock);
  294. ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
  295. if (ret < 0)
  296. goto error_ret_mutex;
  297. /* Wipe the bits clean */
  298. ret &= ~AD7998_CYC_MASK;
  299. for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
  300. if (val == ad7998_frequencies[i])
  301. break;
  302. if (i == ARRAY_SIZE(ad7998_frequencies)) {
  303. ret = -EINVAL;
  304. goto error_ret_mutex;
  305. }
  306. ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
  307. ret | i);
  308. if (ret < 0)
  309. goto error_ret_mutex;
  310. ret = len;
  311. error_ret_mutex:
  312. mutex_unlock(&indio_dev->mlock);
  313. return ret;
  314. }
  315. static int ad799x_read_event_config(struct iio_dev *indio_dev,
  316. const struct iio_chan_spec *chan,
  317. enum iio_event_type type,
  318. enum iio_event_direction dir)
  319. {
  320. struct ad799x_state *st = iio_priv(indio_dev);
  321. if (!(st->config & AD7998_ALERT_EN))
  322. return 0;
  323. if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
  324. return 1;
  325. return 0;
  326. }
  327. static int ad799x_write_event_config(struct iio_dev *indio_dev,
  328. const struct iio_chan_spec *chan,
  329. enum iio_event_type type,
  330. enum iio_event_direction dir,
  331. int state)
  332. {
  333. struct ad799x_state *st = iio_priv(indio_dev);
  334. int ret;
  335. mutex_lock(&indio_dev->mlock);
  336. if (iio_buffer_enabled(indio_dev)) {
  337. ret = -EBUSY;
  338. goto done;
  339. }
  340. if (state)
  341. st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
  342. else
  343. st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
  344. if (st->config >> AD799X_CHANNEL_SHIFT)
  345. st->config |= AD7998_ALERT_EN;
  346. else
  347. st->config &= ~AD7998_ALERT_EN;
  348. ret = ad799x_write_config(st, st->config);
  349. done:
  350. mutex_unlock(&indio_dev->mlock);
  351. return ret;
  352. }
  353. static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
  354. enum iio_event_direction dir,
  355. enum iio_event_info info)
  356. {
  357. switch (info) {
  358. case IIO_EV_INFO_VALUE:
  359. if (dir == IIO_EV_DIR_FALLING)
  360. return AD7998_DATALOW_REG(chan->channel);
  361. else
  362. return AD7998_DATAHIGH_REG(chan->channel);
  363. case IIO_EV_INFO_HYSTERESIS:
  364. return AD7998_HYST_REG(chan->channel);
  365. default:
  366. return -EINVAL;
  367. }
  368. return 0;
  369. }
  370. static int ad799x_write_event_value(struct iio_dev *indio_dev,
  371. const struct iio_chan_spec *chan,
  372. enum iio_event_type type,
  373. enum iio_event_direction dir,
  374. enum iio_event_info info,
  375. int val, int val2)
  376. {
  377. int ret;
  378. struct ad799x_state *st = iio_priv(indio_dev);
  379. if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
  380. return -EINVAL;
  381. mutex_lock(&indio_dev->mlock);
  382. ret = i2c_smbus_write_word_swapped(st->client,
  383. ad799x_threshold_reg(chan, dir, info),
  384. val << chan->scan_type.shift);
  385. mutex_unlock(&indio_dev->mlock);
  386. return ret;
  387. }
  388. static int ad799x_read_event_value(struct iio_dev *indio_dev,
  389. const struct iio_chan_spec *chan,
  390. enum iio_event_type type,
  391. enum iio_event_direction dir,
  392. enum iio_event_info info,
  393. int *val, int *val2)
  394. {
  395. int ret;
  396. struct ad799x_state *st = iio_priv(indio_dev);
  397. mutex_lock(&indio_dev->mlock);
  398. ret = i2c_smbus_read_word_swapped(st->client,
  399. ad799x_threshold_reg(chan, dir, info));
  400. mutex_unlock(&indio_dev->mlock);
  401. if (ret < 0)
  402. return ret;
  403. *val = (ret >> chan->scan_type.shift) &
  404. GENMASK(chan->scan_type.realbits - 1 , 0);
  405. return IIO_VAL_INT;
  406. }
  407. static irqreturn_t ad799x_event_handler(int irq, void *private)
  408. {
  409. struct iio_dev *indio_dev = private;
  410. struct ad799x_state *st = iio_priv(private);
  411. int i, ret;
  412. ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
  413. if (ret <= 0)
  414. goto done;
  415. if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
  416. AD7998_ALERT_STAT_CLEAR) < 0)
  417. goto done;
  418. for (i = 0; i < 8; i++) {
  419. if (ret & BIT(i))
  420. iio_push_event(indio_dev,
  421. i & 0x1 ?
  422. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  423. (i >> 1),
  424. IIO_EV_TYPE_THRESH,
  425. IIO_EV_DIR_RISING) :
  426. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  427. (i >> 1),
  428. IIO_EV_TYPE_THRESH,
  429. IIO_EV_DIR_FALLING),
  430. iio_get_time_ns());
  431. }
  432. done:
  433. return IRQ_HANDLED;
  434. }
  435. static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
  436. ad799x_read_frequency,
  437. ad799x_write_frequency);
  438. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
  439. static struct attribute *ad799x_event_attributes[] = {
  440. &iio_dev_attr_sampling_frequency.dev_attr.attr,
  441. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  442. NULL,
  443. };
  444. static struct attribute_group ad799x_event_attrs_group = {
  445. .attrs = ad799x_event_attributes,
  446. .name = "events",
  447. };
  448. static const struct iio_info ad7991_info = {
  449. .read_raw = &ad799x_read_raw,
  450. .driver_module = THIS_MODULE,
  451. };
  452. static const struct iio_info ad7993_4_7_8_noirq_info = {
  453. .read_raw = &ad799x_read_raw,
  454. .driver_module = THIS_MODULE,
  455. .update_scan_mode = ad799x_update_scan_mode,
  456. };
  457. static const struct iio_info ad7993_4_7_8_irq_info = {
  458. .read_raw = &ad799x_read_raw,
  459. .event_attrs = &ad799x_event_attrs_group,
  460. .read_event_config = &ad799x_read_event_config,
  461. .write_event_config = &ad799x_write_event_config,
  462. .read_event_value = &ad799x_read_event_value,
  463. .write_event_value = &ad799x_write_event_value,
  464. .driver_module = THIS_MODULE,
  465. .update_scan_mode = ad799x_update_scan_mode,
  466. };
  467. static const struct iio_event_spec ad799x_events[] = {
  468. {
  469. .type = IIO_EV_TYPE_THRESH,
  470. .dir = IIO_EV_DIR_RISING,
  471. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  472. BIT(IIO_EV_INFO_ENABLE),
  473. }, {
  474. .type = IIO_EV_TYPE_THRESH,
  475. .dir = IIO_EV_DIR_FALLING,
  476. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  477. BIT(IIO_EV_INFO_ENABLE),
  478. }, {
  479. .type = IIO_EV_TYPE_THRESH,
  480. .dir = IIO_EV_DIR_EITHER,
  481. .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
  482. },
  483. };
  484. #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
  485. .type = IIO_VOLTAGE, \
  486. .indexed = 1, \
  487. .channel = (_index), \
  488. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  489. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  490. .scan_index = (_index), \
  491. .scan_type = { \
  492. .sign = 'u', \
  493. .realbits = (_realbits), \
  494. .storagebits = 16, \
  495. .shift = 12 - (_realbits), \
  496. .endianness = IIO_BE, \
  497. }, \
  498. .event_spec = _ev_spec, \
  499. .num_event_specs = _num_ev_spec, \
  500. }
  501. #define AD799X_CHANNEL(_index, _realbits) \
  502. _AD799X_CHANNEL(_index, _realbits, NULL, 0)
  503. #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
  504. _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
  505. ARRAY_SIZE(ad799x_events))
  506. static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
  507. [ad7991] = {
  508. .num_channels = 5,
  509. .noirq_config = {
  510. .channel = {
  511. AD799X_CHANNEL(0, 12),
  512. AD799X_CHANNEL(1, 12),
  513. AD799X_CHANNEL(2, 12),
  514. AD799X_CHANNEL(3, 12),
  515. IIO_CHAN_SOFT_TIMESTAMP(4),
  516. },
  517. .info = &ad7991_info,
  518. },
  519. },
  520. [ad7995] = {
  521. .num_channels = 5,
  522. .noirq_config = {
  523. .channel = {
  524. AD799X_CHANNEL(0, 10),
  525. AD799X_CHANNEL(1, 10),
  526. AD799X_CHANNEL(2, 10),
  527. AD799X_CHANNEL(3, 10),
  528. IIO_CHAN_SOFT_TIMESTAMP(4),
  529. },
  530. .info = &ad7991_info,
  531. },
  532. },
  533. [ad7999] = {
  534. .num_channels = 5,
  535. .noirq_config = {
  536. .channel = {
  537. AD799X_CHANNEL(0, 8),
  538. AD799X_CHANNEL(1, 8),
  539. AD799X_CHANNEL(2, 8),
  540. AD799X_CHANNEL(3, 8),
  541. IIO_CHAN_SOFT_TIMESTAMP(4),
  542. },
  543. .info = &ad7991_info,
  544. },
  545. },
  546. [ad7992] = {
  547. .num_channels = 3,
  548. .noirq_config = {
  549. .channel = {
  550. AD799X_CHANNEL(0, 12),
  551. AD799X_CHANNEL(1, 12),
  552. IIO_CHAN_SOFT_TIMESTAMP(3),
  553. },
  554. .info = &ad7993_4_7_8_noirq_info,
  555. },
  556. .irq_config = {
  557. .channel = {
  558. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  559. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  560. IIO_CHAN_SOFT_TIMESTAMP(3),
  561. },
  562. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  563. .info = &ad7993_4_7_8_irq_info,
  564. },
  565. },
  566. [ad7993] = {
  567. .num_channels = 5,
  568. .noirq_config = {
  569. .channel = {
  570. AD799X_CHANNEL(0, 10),
  571. AD799X_CHANNEL(1, 10),
  572. AD799X_CHANNEL(2, 10),
  573. AD799X_CHANNEL(3, 10),
  574. IIO_CHAN_SOFT_TIMESTAMP(4),
  575. },
  576. .info = &ad7993_4_7_8_noirq_info,
  577. },
  578. .irq_config = {
  579. .channel = {
  580. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  581. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  582. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  583. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  584. IIO_CHAN_SOFT_TIMESTAMP(4),
  585. },
  586. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  587. .info = &ad7993_4_7_8_irq_info,
  588. },
  589. },
  590. [ad7994] = {
  591. .num_channels = 5,
  592. .noirq_config = {
  593. .channel = {
  594. AD799X_CHANNEL(0, 12),
  595. AD799X_CHANNEL(1, 12),
  596. AD799X_CHANNEL(2, 12),
  597. AD799X_CHANNEL(3, 12),
  598. IIO_CHAN_SOFT_TIMESTAMP(4),
  599. },
  600. .info = &ad7993_4_7_8_noirq_info,
  601. },
  602. .irq_config = {
  603. .channel = {
  604. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  605. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  606. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  607. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  608. IIO_CHAN_SOFT_TIMESTAMP(4),
  609. },
  610. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  611. .info = &ad7993_4_7_8_irq_info,
  612. },
  613. },
  614. [ad7997] = {
  615. .num_channels = 9,
  616. .noirq_config = {
  617. .channel = {
  618. AD799X_CHANNEL(0, 10),
  619. AD799X_CHANNEL(1, 10),
  620. AD799X_CHANNEL(2, 10),
  621. AD799X_CHANNEL(3, 10),
  622. AD799X_CHANNEL(4, 10),
  623. AD799X_CHANNEL(5, 10),
  624. AD799X_CHANNEL(6, 10),
  625. AD799X_CHANNEL(7, 10),
  626. IIO_CHAN_SOFT_TIMESTAMP(8),
  627. },
  628. .info = &ad7993_4_7_8_noirq_info,
  629. },
  630. .irq_config = {
  631. .channel = {
  632. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  633. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  634. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  635. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  636. AD799X_CHANNEL(4, 10),
  637. AD799X_CHANNEL(5, 10),
  638. AD799X_CHANNEL(6, 10),
  639. AD799X_CHANNEL(7, 10),
  640. IIO_CHAN_SOFT_TIMESTAMP(8),
  641. },
  642. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  643. .info = &ad7993_4_7_8_irq_info,
  644. },
  645. },
  646. [ad7998] = {
  647. .num_channels = 9,
  648. .noirq_config = {
  649. .channel = {
  650. AD799X_CHANNEL(0, 12),
  651. AD799X_CHANNEL(1, 12),
  652. AD799X_CHANNEL(2, 12),
  653. AD799X_CHANNEL(3, 12),
  654. AD799X_CHANNEL(4, 12),
  655. AD799X_CHANNEL(5, 12),
  656. AD799X_CHANNEL(6, 12),
  657. AD799X_CHANNEL(7, 12),
  658. IIO_CHAN_SOFT_TIMESTAMP(8),
  659. },
  660. .info = &ad7993_4_7_8_noirq_info,
  661. },
  662. .irq_config = {
  663. .channel = {
  664. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  665. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  666. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  667. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  668. AD799X_CHANNEL(4, 12),
  669. AD799X_CHANNEL(5, 12),
  670. AD799X_CHANNEL(6, 12),
  671. AD799X_CHANNEL(7, 12),
  672. IIO_CHAN_SOFT_TIMESTAMP(8),
  673. },
  674. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  675. .info = &ad7993_4_7_8_irq_info,
  676. },
  677. },
  678. };
  679. static int ad799x_probe(struct i2c_client *client,
  680. const struct i2c_device_id *id)
  681. {
  682. int ret;
  683. struct ad799x_state *st;
  684. struct iio_dev *indio_dev;
  685. const struct ad799x_chip_info *chip_info =
  686. &ad799x_chip_info_tbl[id->driver_data];
  687. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
  688. if (indio_dev == NULL)
  689. return -ENOMEM;
  690. st = iio_priv(indio_dev);
  691. /* this is only used for device removal purposes */
  692. i2c_set_clientdata(client, indio_dev);
  693. st->id = id->driver_data;
  694. if (client->irq > 0 && chip_info->irq_config.info)
  695. st->chip_config = &chip_info->irq_config;
  696. else
  697. st->chip_config = &chip_info->noirq_config;
  698. /* TODO: Add pdata options for filtering and bit delay */
  699. st->reg = devm_regulator_get(&client->dev, "vcc");
  700. if (IS_ERR(st->reg))
  701. return PTR_ERR(st->reg);
  702. ret = regulator_enable(st->reg);
  703. if (ret)
  704. return ret;
  705. st->vref = devm_regulator_get(&client->dev, "vref");
  706. if (IS_ERR(st->vref)) {
  707. ret = PTR_ERR(st->vref);
  708. goto error_disable_reg;
  709. }
  710. ret = regulator_enable(st->vref);
  711. if (ret)
  712. goto error_disable_reg;
  713. st->client = client;
  714. indio_dev->dev.parent = &client->dev;
  715. indio_dev->name = id->name;
  716. indio_dev->info = st->chip_config->info;
  717. indio_dev->modes = INDIO_DIRECT_MODE;
  718. indio_dev->channels = st->chip_config->channel;
  719. indio_dev->num_channels = chip_info->num_channels;
  720. ret = ad799x_write_config(st, st->chip_config->default_config);
  721. if (ret < 0)
  722. goto error_disable_reg;
  723. ret = ad799x_read_config(st);
  724. if (ret < 0)
  725. goto error_disable_reg;
  726. st->config = ret;
  727. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  728. &ad799x_trigger_handler, NULL);
  729. if (ret)
  730. goto error_disable_vref;
  731. if (client->irq > 0) {
  732. ret = devm_request_threaded_irq(&client->dev,
  733. client->irq,
  734. NULL,
  735. ad799x_event_handler,
  736. IRQF_TRIGGER_FALLING |
  737. IRQF_ONESHOT,
  738. client->name,
  739. indio_dev);
  740. if (ret)
  741. goto error_cleanup_ring;
  742. }
  743. ret = iio_device_register(indio_dev);
  744. if (ret)
  745. goto error_cleanup_ring;
  746. return 0;
  747. error_cleanup_ring:
  748. iio_triggered_buffer_cleanup(indio_dev);
  749. error_disable_vref:
  750. regulator_disable(st->vref);
  751. error_disable_reg:
  752. regulator_disable(st->reg);
  753. return ret;
  754. }
  755. static int ad799x_remove(struct i2c_client *client)
  756. {
  757. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  758. struct ad799x_state *st = iio_priv(indio_dev);
  759. iio_device_unregister(indio_dev);
  760. iio_triggered_buffer_cleanup(indio_dev);
  761. regulator_disable(st->vref);
  762. regulator_disable(st->reg);
  763. kfree(st->rx_buf);
  764. return 0;
  765. }
  766. static const struct i2c_device_id ad799x_id[] = {
  767. { "ad7991", ad7991 },
  768. { "ad7995", ad7995 },
  769. { "ad7999", ad7999 },
  770. { "ad7992", ad7992 },
  771. { "ad7993", ad7993 },
  772. { "ad7994", ad7994 },
  773. { "ad7997", ad7997 },
  774. { "ad7998", ad7998 },
  775. {}
  776. };
  777. MODULE_DEVICE_TABLE(i2c, ad799x_id);
  778. static struct i2c_driver ad799x_driver = {
  779. .driver = {
  780. .name = "ad799x",
  781. },
  782. .probe = ad799x_probe,
  783. .remove = ad799x_remove,
  784. .id_table = ad799x_id,
  785. };
  786. module_i2c_driver(ad799x_driver);
  787. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  788. MODULE_DESCRIPTION("Analog Devices AD799x ADC");
  789. MODULE_LICENSE("GPL v2");